2 * linux/drivers/mfd/ucb1x00-core.c
4 * Copyright (C) 2001 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
10 * The UCB1x00 core driver provides basic services for handling IO,
11 * the ADC, interrupts, and accessing registers. It is designed
12 * such that everything goes through this layer, thereby providing
13 * a consistent locking methodology, as well as allowing the drivers
14 * to be used on other non-MCP-enabled hardware platforms.
16 * Note that all locks are private to this file. Nothing else may
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
23 #include <linux/init.h>
24 #include <linux/errno.h>
25 #include <linux/interrupt.h>
26 #include <linux/device.h>
29 #include <asm/hardware.h>
34 static DECLARE_MUTEX(ucb1x00_sem);
35 static LIST_HEAD(ucb1x00_drivers);
36 static LIST_HEAD(ucb1x00_devices);
39 * ucb1x00_io_set_dir - set IO direction
40 * @ucb: UCB1x00 structure describing chip
41 * @in: bitfield of IO pins to be set as inputs
42 * @out: bitfield of IO pins to be set as outputs
44 * Set the IO direction of the ten general purpose IO pins on
45 * the UCB1x00 chip. The @in bitfield has priority over the
46 * @out bitfield, in that if you specify a pin as both input
47 * and output, it will end up as an input.
49 * ucb1x00_enable must have been called to enable the comms
50 * before using this function.
52 * This function takes a spinlock, disabling interrupts.
54 void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out)
58 spin_lock_irqsave(&ucb->io_lock, flags);
62 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
63 spin_unlock_irqrestore(&ucb->io_lock, flags);
67 * ucb1x00_io_write - set or clear IO outputs
68 * @ucb: UCB1x00 structure describing chip
69 * @set: bitfield of IO pins to set to logic '1'
70 * @clear: bitfield of IO pins to set to logic '0'
72 * Set the IO output state of the specified IO pins. The value
73 * is retained if the pins are subsequently configured as inputs.
74 * The @clear bitfield has priority over the @set bitfield -
75 * outputs will be cleared.
77 * ucb1x00_enable must have been called to enable the comms
78 * before using this function.
80 * This function takes a spinlock, disabling interrupts.
82 void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear)
86 spin_lock_irqsave(&ucb->io_lock, flags);
88 ucb->io_out &= ~clear;
90 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
91 spin_unlock_irqrestore(&ucb->io_lock, flags);
95 * ucb1x00_io_read - read the current state of the IO pins
96 * @ucb: UCB1x00 structure describing chip
98 * Return a bitfield describing the logic state of the ten
99 * general purpose IO pins.
101 * ucb1x00_enable must have been called to enable the comms
102 * before using this function.
104 * This function does not take any semaphores or spinlocks.
106 unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)
108 return ucb1x00_reg_read(ucb, UCB_IO_DATA);
112 * UCB1300 data sheet says we must:
113 * 1. enable ADC => 5us (including reference startup time)
114 * 2. select input => 51*tsibclk => 4.3us
115 * 3. start conversion => 102*tsibclk => 8.5us
116 * (tsibclk = 1/11981000)
117 * Period between SIB 128-bit frames = 10.7us
121 * ucb1x00_adc_enable - enable the ADC converter
122 * @ucb: UCB1x00 structure describing chip
124 * Enable the ucb1x00 and ADC converter on the UCB1x00 for use.
125 * Any code wishing to use the ADC converter must call this
126 * function prior to using it.
128 * This function takes the ADC semaphore to prevent two or more
129 * concurrent uses, and therefore may sleep. As a result, it
130 * can only be called from process context, not interrupt
133 * You should release the ADC as soon as possible using
134 * ucb1x00_adc_disable.
136 void ucb1x00_adc_enable(struct ucb1x00 *ucb)
140 ucb->adc_cr |= UCB_ADC_ENA;
143 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
147 * ucb1x00_adc_read - read the specified ADC channel
148 * @ucb: UCB1x00 structure describing chip
149 * @adc_channel: ADC channel mask
150 * @sync: wait for syncronisation pulse.
152 * Start an ADC conversion and wait for the result. Note that
153 * synchronised ADC conversions (via the ADCSYNC pin) must wait
154 * until the trigger is asserted and the conversion is finished.
156 * This function currently spins waiting for the conversion to
157 * complete (2 frames max without sync).
159 * If called for a synchronised ADC conversion, it may sleep
160 * with the ADC semaphore held.
162 unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)
167 adc_channel |= UCB_ADC_SYNC_ENA;
169 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);
170 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);
173 val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);
174 if (val & UCB_ADC_DAT_VAL)
176 /* yield to other processes */
177 set_current_state(TASK_INTERRUPTIBLE);
181 return UCB_ADC_DAT(val);
185 * ucb1x00_adc_disable - disable the ADC converter
186 * @ucb: UCB1x00 structure describing chip
188 * Disable the ADC converter and release the ADC semaphore.
190 void ucb1x00_adc_disable(struct ucb1x00 *ucb)
192 ucb->adc_cr &= ~UCB_ADC_ENA;
193 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
194 ucb1x00_disable(ucb);
200 * UCB1x00 Interrupt handling.
202 * The UCB1x00 can generate interrupts when the SIBCLK is stopped.
203 * Since we need to read an internal register, we must re-enable
204 * SIBCLK to talk to the chip. We leave the clock running until
205 * we have finished processing all interrupts from the chip.
207 static irqreturn_t ucb1x00_irq(int irqnr, void *devid, struct pt_regs *regs)
209 struct ucb1x00 *ucb = devid;
210 struct ucb1x00_irq *irq;
214 isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);
215 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
216 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
218 for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++)
219 if (isr & 1 && irq->fn)
220 irq->fn(i, irq->devid);
221 ucb1x00_disable(ucb);
227 * ucb1x00_hook_irq - hook a UCB1x00 interrupt
228 * @ucb: UCB1x00 structure describing chip
229 * @idx: interrupt index
230 * @fn: function to call when interrupt is triggered
231 * @devid: device id to pass to interrupt handler
233 * Hook the specified interrupt. You can only register one handler
234 * for each interrupt source. The interrupt source is not enabled
235 * by this function; use ucb1x00_enable_irq instead.
237 * Interrupt handlers will be called with other interrupts enabled.
239 * Returns zero on success, or one of the following errors:
240 * -EINVAL if the interrupt index is invalid
241 * -EBUSY if the interrupt has already been hooked
243 int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid)
245 struct ucb1x00_irq *irq;
249 irq = ucb->irq_handler + idx;
252 spin_lock_irq(&ucb->lock);
253 if (irq->fn == NULL) {
258 spin_unlock_irq(&ucb->lock);
264 * ucb1x00_enable_irq - enable an UCB1x00 interrupt source
265 * @ucb: UCB1x00 structure describing chip
266 * @idx: interrupt index
267 * @edges: interrupt edges to enable
269 * Enable the specified interrupt to trigger on %UCB_RISING,
270 * %UCB_FALLING or both edges. The interrupt should have been
271 * hooked by ucb1x00_hook_irq.
273 void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
278 spin_lock_irqsave(&ucb->lock, flags);
281 if (edges & UCB_RISING) {
282 ucb->irq_ris_enbl |= 1 << idx;
283 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
285 if (edges & UCB_FALLING) {
286 ucb->irq_fal_enbl |= 1 << idx;
287 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
289 ucb1x00_disable(ucb);
290 spin_unlock_irqrestore(&ucb->lock, flags);
295 * ucb1x00_disable_irq - disable an UCB1x00 interrupt source
296 * @ucb: UCB1x00 structure describing chip
297 * @edges: interrupt edges to disable
299 * Disable the specified interrupt triggering on the specified
300 * (%UCB_RISING, %UCB_FALLING or both) edges.
302 void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
307 spin_lock_irqsave(&ucb->lock, flags);
310 if (edges & UCB_RISING) {
311 ucb->irq_ris_enbl &= ~(1 << idx);
312 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
314 if (edges & UCB_FALLING) {
315 ucb->irq_fal_enbl &= ~(1 << idx);
316 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
318 ucb1x00_disable(ucb);
319 spin_unlock_irqrestore(&ucb->lock, flags);
324 * ucb1x00_free_irq - disable and free the specified UCB1x00 interrupt
325 * @ucb: UCB1x00 structure describing chip
326 * @idx: interrupt index
329 * Disable the interrupt source and remove the handler. devid must
330 * match the devid passed when hooking the interrupt.
332 * Returns zero on success, or one of the following errors:
333 * -EINVAL if the interrupt index is invalid
334 * -ENOENT if devid does not match
336 int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid)
338 struct ucb1x00_irq *irq;
344 irq = ucb->irq_handler + idx;
347 spin_lock_irq(&ucb->lock);
348 if (irq->devid == devid) {
349 ucb->irq_ris_enbl &= ~(1 << idx);
350 ucb->irq_fal_enbl &= ~(1 << idx);
353 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
354 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
355 ucb1x00_disable(ucb);
361 spin_unlock_irq(&ucb->lock);
365 printk(KERN_ERR "Freeing bad UCB1x00 irq %d\n", idx);
369 static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv)
371 struct ucb1x00_dev *dev;
374 dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL);
382 list_add(&dev->dev_node, &ucb->devs);
383 list_add(&dev->drv_node, &drv->devs);
391 static void ucb1x00_remove_dev(struct ucb1x00_dev *dev)
393 dev->drv->remove(dev);
394 list_del(&dev->dev_node);
395 list_del(&dev->drv_node);
400 * Try to probe our interrupt, rather than relying on lots of
401 * hard-coded machine dependencies. For reference, the expected
404 * Machine Default IRQ
405 * adsbitsy IRQ_GPCIN4
406 * cerf IRQ_GPIO_UCB1200_IRQ
407 * flexanet IRQ_GPIO_GUI
408 * freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ
409 * graphicsclient ADS_EXT_IRQ(8)
410 * graphicsmaster ADS_EXT_IRQ(8)
411 * lart LART_IRQ_UCB1200
412 * omnimeter IRQ_GPIO23
413 * pfs168 IRQ_GPIO_UCB1300_IRQ
414 * simpad IRQ_GPIO_UCB1300_IRQ
415 * shannon SHANNON_IRQ_GPIO_IRQ_CODEC
416 * yopy IRQ_GPIO_UCB1200_IRQ
418 static int ucb1x00_detect_irq(struct ucb1x00 *ucb)
422 mask = probe_irq_on();
427 * Enable the ADC interrupt.
429 ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
430 ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
431 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
432 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
435 * Cause an ADC interrupt.
437 ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
438 ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
441 * Wait for the conversion to complete.
443 while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0);
444 ucb1x00_reg_write(ucb, UCB_ADC_CR, 0);
447 * Disable and clear interrupt.
449 ucb1x00_reg_write(ucb, UCB_IE_RIS, 0);
450 ucb1x00_reg_write(ucb, UCB_IE_FAL, 0);
451 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
452 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
455 * Read triggered interrupt.
457 return probe_irq_off(mask);
460 static int ucb1x00_probe(struct mcp *mcp)
463 struct ucb1x00_driver *drv;
468 id = mcp_reg_read(mcp, UCB_ID);
470 if (id != UCB_ID_1200 && id != UCB_ID_1300) {
471 printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id);
475 ucb = kmalloc(sizeof(struct ucb1x00), GFP_KERNEL);
480 memset(ucb, 0, sizeof(struct ucb1x00));
482 ucb->cdev.class = &ucb1x00_class;
483 ucb->cdev.dev = &mcp->attached_device;
484 strlcpy(ucb->cdev.class_id, "ucb1x00", sizeof(ucb->cdev.class_id));
486 spin_lock_init(&ucb->lock);
487 spin_lock_init(&ucb->io_lock);
488 sema_init(&ucb->adc_sem, 1);
492 ucb->irq = ucb1x00_detect_irq(ucb);
493 if (ucb->irq == NO_IRQ) {
494 printk(KERN_ERR "UCB1x00: IRQ probe failed\n");
499 ret = request_irq(ucb->irq, ucb1x00_irq, 0, "UCB1x00", ucb);
501 printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n",
506 set_irq_type(ucb->irq, IRQT_RISING);
507 mcp_set_drvdata(mcp, ucb);
509 ret = class_device_register(&ucb->cdev);
513 INIT_LIST_HEAD(&ucb->devs);
515 list_add(&ucb->node, &ucb1x00_devices);
516 list_for_each_entry(drv, &ucb1x00_drivers, node) {
517 ucb1x00_add_dev(ucb, drv);
523 free_irq(ucb->irq, ucb);
532 static void ucb1x00_remove(struct mcp *mcp)
534 struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
535 struct list_head *l, *n;
538 list_del(&ucb->node);
539 list_for_each_safe(l, n, &ucb->devs) {
540 struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node);
541 ucb1x00_remove_dev(dev);
545 free_irq(ucb->irq, ucb);
546 class_device_unregister(&ucb->cdev);
549 static void ucb1x00_release(struct class_device *dev)
551 struct ucb1x00 *ucb = classdev_to_ucb1x00(dev);
555 static struct class ucb1x00_class = {
557 .release = ucb1x00_release,
560 int ucb1x00_register_driver(struct ucb1x00_driver *drv)
564 INIT_LIST_HEAD(&drv->devs);
566 list_add(&drv->node, &ucb1x00_drivers);
567 list_for_each_entry(ucb, &ucb1x00_devices, node) {
568 ucb1x00_add_dev(ucb, drv);
574 void ucb1x00_unregister_driver(struct ucb1x00_driver *drv)
576 struct list_head *n, *l;
579 list_del(&drv->node);
580 list_for_each_safe(l, n, &drv->devs) {
581 struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node);
582 ucb1x00_remove_dev(dev);
587 static int ucb1x00_suspend(struct mcp *mcp, pm_message_t state)
589 struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
590 struct ucb1x00_dev *dev;
593 list_for_each_entry(dev, &ucb->devs, dev_node) {
594 if (dev->drv->suspend)
595 dev->drv->suspend(dev, state);
601 static int ucb1x00_resume(struct mcp *mcp)
603 struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
604 struct ucb1x00_dev *dev;
607 list_for_each_entry(dev, &ucb->devs, dev_node) {
608 if (dev->drv->resume)
609 dev->drv->resume(dev);
615 static struct mcp_driver ucb1x00_driver = {
619 .probe = ucb1x00_probe,
620 .remove = ucb1x00_remove,
621 .suspend = ucb1x00_suspend,
622 .resume = ucb1x00_resume,
625 static int __init ucb1x00_init(void)
627 int ret = class_register(&ucb1x00_class);
629 ret = mcp_driver_register(&ucb1x00_driver);
631 class_unregister(&ucb1x00_class);
636 static void __exit ucb1x00_exit(void)
638 mcp_driver_unregister(&ucb1x00_driver);
639 class_unregister(&ucb1x00_class);
642 module_init(ucb1x00_init);
643 module_exit(ucb1x00_exit);
645 EXPORT_SYMBOL(ucb1x00_class);
647 EXPORT_SYMBOL(ucb1x00_io_set_dir);
648 EXPORT_SYMBOL(ucb1x00_io_write);
649 EXPORT_SYMBOL(ucb1x00_io_read);
651 EXPORT_SYMBOL(ucb1x00_adc_enable);
652 EXPORT_SYMBOL(ucb1x00_adc_read);
653 EXPORT_SYMBOL(ucb1x00_adc_disable);
655 EXPORT_SYMBOL(ucb1x00_hook_irq);
656 EXPORT_SYMBOL(ucb1x00_free_irq);
657 EXPORT_SYMBOL(ucb1x00_enable_irq);
658 EXPORT_SYMBOL(ucb1x00_disable_irq);
660 EXPORT_SYMBOL(ucb1x00_register_driver);
661 EXPORT_SYMBOL(ucb1x00_unregister_driver);
663 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
664 MODULE_DESCRIPTION("UCB1x00 core driver");
665 MODULE_LICENSE("GPL");