1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
33 #define EFX_MAX_MTU (9 * 1024)
35 /* RX slow fill workqueue. If memory allocation fails in the fast path,
36 * a work item is pushed onto this work queue to retry the allocation later,
37 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
38 * workqueue, there is nothing to be gained in making it per NIC
40 static struct workqueue_struct *refill_workqueue;
42 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
43 * queued onto this work queue. This is not a per-nic work queue, because
44 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
46 static struct workqueue_struct *reset_workqueue;
48 /**************************************************************************
52 *************************************************************************/
55 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
57 * This sets the default for new devices. It can be controlled later
60 static int lro = true;
61 module_param(lro, int, 0644);
62 MODULE_PARM_DESC(lro, "Large receive offload acceleration");
65 * Use separate channels for TX and RX events
67 * Set this to 1 to use separate channels for TX and RX. It allows us to
68 * apply a higher level of interrupt moderation to TX events.
70 * This is forced to 0 for MSI interrupt mode as the interrupt vector
73 static unsigned int separate_tx_and_rx_channels = true;
75 /* This is the weight assigned to each of the (per-channel) virtual
78 static int napi_weight = 64;
80 /* This is the time (in jiffies) between invocations of the hardware
81 * monitor, which checks for known hardware bugs and resets the
82 * hardware and driver as necessary.
84 unsigned int efx_monitor_interval = 1 * HZ;
86 /* This controls whether or not the driver will initialise devices
87 * with invalid MAC addresses stored in the EEPROM or flash. If true,
88 * such devices will be initialised with a random locally-generated
89 * MAC address. This allows for loading the sfc_mtd driver to
90 * reprogram the flash, even if the flash contents (including the MAC
91 * address) have previously been erased.
93 static unsigned int allow_bad_hwaddr;
95 /* Initial interrupt moderation settings. They can be modified after
96 * module load with ethtool.
98 * The default for RX should strike a balance between increasing the
99 * round-trip latency and reducing overhead.
101 static unsigned int rx_irq_mod_usec = 60;
103 /* Initial interrupt moderation settings. They can be modified after
104 * module load with ethtool.
106 * This default is chosen to ensure that a 10G link does not go idle
107 * while a TX queue is stopped after it has become full. A queue is
108 * restarted when it drops below half full. The time this takes (assuming
109 * worst case 3 descriptors per packet and 1024 descriptors) is
110 * 512 / 3 * 1.2 = 205 usec.
112 static unsigned int tx_irq_mod_usec = 150;
114 /* This is the first interrupt mode to try out of:
119 static unsigned int interrupt_mode;
121 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
122 * i.e. the number of CPUs among which we may distribute simultaneous
123 * interrupt handling.
125 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
126 * The default (0) means to assign an interrupt to each package (level II cache)
128 static unsigned int rss_cpus;
129 module_param(rss_cpus, uint, 0444);
130 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
132 static int phy_flash_cfg;
133 module_param(phy_flash_cfg, int, 0644);
134 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
136 /**************************************************************************
138 * Utility functions and prototypes
140 *************************************************************************/
141 static void efx_remove_channel(struct efx_channel *channel);
142 static void efx_remove_port(struct efx_nic *efx);
143 static void efx_fini_napi(struct efx_nic *efx);
144 static void efx_fini_channels(struct efx_nic *efx);
146 #define EFX_ASSERT_RESET_SERIALISED(efx) \
148 if (efx->state == STATE_RUNNING) \
152 /**************************************************************************
154 * Event queue processing
156 *************************************************************************/
158 /* Process channel's event queue
160 * This function is responsible for processing the event queue of a
161 * single channel. The caller must guarantee that this function will
162 * never be concurrently called more than once on the same channel,
163 * though different channels may be being processed concurrently.
165 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
167 struct efx_nic *efx = channel->efx;
170 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
174 rx_packets = falcon_process_eventq(channel, rx_quota);
178 /* Deliver last RX packet. */
179 if (channel->rx_pkt) {
180 __efx_rx_packet(channel, channel->rx_pkt,
181 channel->rx_pkt_csummed);
182 channel->rx_pkt = NULL;
185 efx_flush_lro(channel);
186 efx_rx_strategy(channel);
188 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
193 /* Mark channel as finished processing
195 * Note that since we will not receive further interrupts for this
196 * channel before we finish processing and call the eventq_read_ack()
197 * method, there is no need to use the interrupt hold-off timers.
199 static inline void efx_channel_processed(struct efx_channel *channel)
201 /* The interrupt handler for this channel may set work_pending
202 * as soon as we acknowledge the events we've seen. Make sure
203 * it's cleared before then. */
204 channel->work_pending = false;
207 falcon_eventq_read_ack(channel);
212 * NAPI guarantees serialisation of polls of the same device, which
213 * provides the guarantee required by efx_process_channel().
215 static int efx_poll(struct napi_struct *napi, int budget)
217 struct efx_channel *channel =
218 container_of(napi, struct efx_channel, napi_str);
219 struct net_device *napi_dev = channel->napi_dev;
222 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
223 channel->channel, raw_smp_processor_id());
225 rx_packets = efx_process_channel(channel, budget);
227 if (rx_packets < budget) {
228 /* There is no race here; although napi_disable() will
229 * only wait for netif_rx_complete(), this isn't a problem
230 * since efx_channel_processed() will have no effect if
231 * interrupts have already been disabled.
233 netif_rx_complete(napi_dev, napi);
234 efx_channel_processed(channel);
240 /* Process the eventq of the specified channel immediately on this CPU
242 * Disable hardware generated interrupts, wait for any existing
243 * processing to finish, then directly poll (and ack ) the eventq.
244 * Finally reenable NAPI and interrupts.
246 * Since we are touching interrupts the caller should hold the suspend lock
248 void efx_process_channel_now(struct efx_channel *channel)
250 struct efx_nic *efx = channel->efx;
252 BUG_ON(!channel->used_flags);
253 BUG_ON(!channel->enabled);
255 /* Disable interrupts and wait for ISRs to complete */
256 falcon_disable_interrupts(efx);
258 synchronize_irq(efx->legacy_irq);
260 synchronize_irq(channel->irq);
262 /* Wait for any NAPI processing to complete */
263 napi_disable(&channel->napi_str);
265 /* Poll the channel */
266 efx_process_channel(channel, efx->type->evq_size);
268 /* Ack the eventq. This may cause an interrupt to be generated
269 * when they are reenabled */
270 efx_channel_processed(channel);
272 napi_enable(&channel->napi_str);
273 falcon_enable_interrupts(efx);
276 /* Create event queue
277 * Event queue memory allocations are done only once. If the channel
278 * is reset, the memory buffer will be reused; this guards against
279 * errors during channel reset and also simplifies interrupt handling.
281 static int efx_probe_eventq(struct efx_channel *channel)
283 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
285 return falcon_probe_eventq(channel);
288 /* Prepare channel's event queue */
289 static void efx_init_eventq(struct efx_channel *channel)
291 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
293 channel->eventq_read_ptr = 0;
295 falcon_init_eventq(channel);
298 static void efx_fini_eventq(struct efx_channel *channel)
300 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
302 falcon_fini_eventq(channel);
305 static void efx_remove_eventq(struct efx_channel *channel)
307 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
309 falcon_remove_eventq(channel);
312 /**************************************************************************
316 *************************************************************************/
318 static int efx_probe_channel(struct efx_channel *channel)
320 struct efx_tx_queue *tx_queue;
321 struct efx_rx_queue *rx_queue;
324 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
326 rc = efx_probe_eventq(channel);
330 efx_for_each_channel_tx_queue(tx_queue, channel) {
331 rc = efx_probe_tx_queue(tx_queue);
336 efx_for_each_channel_rx_queue(rx_queue, channel) {
337 rc = efx_probe_rx_queue(rx_queue);
342 channel->n_rx_frm_trunc = 0;
347 efx_for_each_channel_rx_queue(rx_queue, channel)
348 efx_remove_rx_queue(rx_queue);
350 efx_for_each_channel_tx_queue(tx_queue, channel)
351 efx_remove_tx_queue(tx_queue);
357 /* Channels are shutdown and reinitialised whilst the NIC is running
358 * to propagate configuration changes (mtu, checksum offload), or
359 * to clear hardware error conditions
361 static void efx_init_channels(struct efx_nic *efx)
363 struct efx_tx_queue *tx_queue;
364 struct efx_rx_queue *rx_queue;
365 struct efx_channel *channel;
367 /* Calculate the rx buffer allocation parameters required to
368 * support the current MTU, including padding for header
369 * alignment and overruns.
371 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
372 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
373 efx->type->rx_buffer_padding);
374 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
376 /* Initialise the channels */
377 efx_for_each_channel(channel, efx) {
378 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
380 efx_init_eventq(channel);
382 efx_for_each_channel_tx_queue(tx_queue, channel)
383 efx_init_tx_queue(tx_queue);
385 /* The rx buffer allocation strategy is MTU dependent */
386 efx_rx_strategy(channel);
388 efx_for_each_channel_rx_queue(rx_queue, channel)
389 efx_init_rx_queue(rx_queue);
391 WARN_ON(channel->rx_pkt != NULL);
392 efx_rx_strategy(channel);
396 /* This enables event queue processing and packet transmission.
398 * Note that this function is not allowed to fail, since that would
399 * introduce too much complexity into the suspend/resume path.
401 static void efx_start_channel(struct efx_channel *channel)
403 struct efx_rx_queue *rx_queue;
405 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
407 if (!(channel->efx->net_dev->flags & IFF_UP))
408 netif_napi_add(channel->napi_dev, &channel->napi_str,
409 efx_poll, napi_weight);
411 /* The interrupt handler for this channel may set work_pending
412 * as soon as we enable it. Make sure it's cleared before
413 * then. Similarly, make sure it sees the enabled flag set. */
414 channel->work_pending = false;
415 channel->enabled = true;
418 napi_enable(&channel->napi_str);
420 /* Load up RX descriptors */
421 efx_for_each_channel_rx_queue(rx_queue, channel)
422 efx_fast_push_rx_descriptors(rx_queue);
425 /* This disables event queue processing and packet transmission.
426 * This function does not guarantee that all queue processing
427 * (e.g. RX refill) is complete.
429 static void efx_stop_channel(struct efx_channel *channel)
431 struct efx_rx_queue *rx_queue;
433 if (!channel->enabled)
436 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
438 channel->enabled = false;
439 napi_disable(&channel->napi_str);
441 /* Ensure that any worker threads have exited or will be no-ops */
442 efx_for_each_channel_rx_queue(rx_queue, channel) {
443 spin_lock_bh(&rx_queue->add_lock);
444 spin_unlock_bh(&rx_queue->add_lock);
448 static void efx_fini_channels(struct efx_nic *efx)
450 struct efx_channel *channel;
451 struct efx_tx_queue *tx_queue;
452 struct efx_rx_queue *rx_queue;
455 EFX_ASSERT_RESET_SERIALISED(efx);
456 BUG_ON(efx->port_enabled);
458 rc = falcon_flush_queues(efx);
460 EFX_ERR(efx, "failed to flush queues\n");
462 EFX_LOG(efx, "successfully flushed all queues\n");
464 efx_for_each_channel(channel, efx) {
465 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
467 efx_for_each_channel_rx_queue(rx_queue, channel)
468 efx_fini_rx_queue(rx_queue);
469 efx_for_each_channel_tx_queue(tx_queue, channel)
470 efx_fini_tx_queue(tx_queue);
471 efx_fini_eventq(channel);
475 static void efx_remove_channel(struct efx_channel *channel)
477 struct efx_tx_queue *tx_queue;
478 struct efx_rx_queue *rx_queue;
480 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
482 efx_for_each_channel_rx_queue(rx_queue, channel)
483 efx_remove_rx_queue(rx_queue);
484 efx_for_each_channel_tx_queue(tx_queue, channel)
485 efx_remove_tx_queue(tx_queue);
486 efx_remove_eventq(channel);
488 channel->used_flags = 0;
491 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
493 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
496 /**************************************************************************
500 **************************************************************************/
502 /* This ensures that the kernel is kept informed (via
503 * netif_carrier_on/off) of the link status, and also maintains the
504 * link status's stop on the port's TX queue.
506 static void efx_link_status_changed(struct efx_nic *efx)
508 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
509 * that no events are triggered between unregister_netdev() and the
510 * driver unloading. A more general condition is that NETDEV_CHANGE
511 * can only be generated between NETDEV_UP and NETDEV_DOWN */
512 if (!netif_running(efx->net_dev))
515 if (efx->port_inhibited) {
516 netif_carrier_off(efx->net_dev);
520 if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
521 efx->n_link_state_changes++;
524 netif_carrier_on(efx->net_dev);
526 netif_carrier_off(efx->net_dev);
529 /* Status message for kernel log */
531 struct mii_if_info *gmii = &efx->mii;
533 /* NONE here means direct XAUI from the controller, with no
534 * MDIO-attached device we can query. */
535 if (efx->phy_type != PHY_TYPE_NONE) {
536 adv = gmii_advertised(gmii);
537 lpa = gmii_lpa(gmii);
539 lpa = GM_LPA_10000 | LPA_DUPLEX;
542 EFX_INFO(efx, "link up at %dMbps %s-duplex "
543 "(adv %04x lpa %04x) (MTU %d)%s\n",
544 (efx->link_options & GM_LPA_10000 ? 10000 :
545 (efx->link_options & GM_LPA_1000 ? 1000 :
546 (efx->link_options & GM_LPA_100 ? 100 :
548 (efx->link_options & GM_LPA_DUPLEX ?
552 (efx->promiscuous ? " [PROMISC]" : ""));
554 EFX_INFO(efx, "link down\n");
559 /* This call reinitialises the MAC to pick up new PHY settings. The
560 * caller must hold the mac_lock */
561 void __efx_reconfigure_port(struct efx_nic *efx)
563 WARN_ON(!mutex_is_locked(&efx->mac_lock));
565 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
566 raw_smp_processor_id());
568 /* Serialise the promiscuous flag with efx_set_multicast_list. */
569 if (efx_dev_registered(efx)) {
570 netif_addr_lock_bh(efx->net_dev);
571 netif_addr_unlock_bh(efx->net_dev);
574 falcon_reconfigure_xmac(efx);
576 /* Inform kernel of loss/gain of carrier */
577 efx_link_status_changed(efx);
580 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
582 void efx_reconfigure_port(struct efx_nic *efx)
584 EFX_ASSERT_RESET_SERIALISED(efx);
586 mutex_lock(&efx->mac_lock);
587 __efx_reconfigure_port(efx);
588 mutex_unlock(&efx->mac_lock);
591 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
592 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
593 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
594 static void efx_reconfigure_work(struct work_struct *data)
596 struct efx_nic *efx = container_of(data, struct efx_nic,
599 mutex_lock(&efx->mac_lock);
600 if (efx->port_enabled)
601 __efx_reconfigure_port(efx);
602 mutex_unlock(&efx->mac_lock);
605 static int efx_probe_port(struct efx_nic *efx)
609 EFX_LOG(efx, "create port\n");
611 /* Connect up MAC/PHY operations table and read MAC address */
612 rc = falcon_probe_port(efx);
617 efx->phy_mode = PHY_MODE_SPECIAL;
619 /* Sanity check MAC address */
620 if (is_valid_ether_addr(efx->mac_address)) {
621 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
623 EFX_ERR(efx, "invalid MAC address %pM\n",
625 if (!allow_bad_hwaddr) {
629 random_ether_addr(efx->net_dev->dev_addr);
630 EFX_INFO(efx, "using locally-generated MAC %pM\n",
631 efx->net_dev->dev_addr);
637 efx_remove_port(efx);
641 static int efx_init_port(struct efx_nic *efx)
645 EFX_LOG(efx, "init port\n");
647 /* Initialise the MAC and PHY */
648 rc = falcon_init_xmac(efx);
652 efx->port_initialized = true;
653 efx->stats_enabled = true;
655 /* Reconfigure port to program MAC registers */
656 falcon_reconfigure_xmac(efx);
661 /* Allow efx_reconfigure_port() to be scheduled, and close the window
662 * between efx_stop_port and efx_flush_all whereby a previously scheduled
663 * efx_reconfigure_port() may have been cancelled */
664 static void efx_start_port(struct efx_nic *efx)
666 EFX_LOG(efx, "start port\n");
667 BUG_ON(efx->port_enabled);
669 mutex_lock(&efx->mac_lock);
670 efx->port_enabled = true;
671 __efx_reconfigure_port(efx);
672 mutex_unlock(&efx->mac_lock);
675 /* Prevent efx_reconfigure_work and efx_monitor() from executing, and
676 * efx_set_multicast_list() from scheduling efx_reconfigure_work.
677 * efx_reconfigure_work can still be scheduled via NAPI processing
678 * until efx_flush_all() is called */
679 static void efx_stop_port(struct efx_nic *efx)
681 EFX_LOG(efx, "stop port\n");
683 mutex_lock(&efx->mac_lock);
684 efx->port_enabled = false;
685 mutex_unlock(&efx->mac_lock);
687 /* Serialise against efx_set_multicast_list() */
688 if (efx_dev_registered(efx)) {
689 netif_addr_lock_bh(efx->net_dev);
690 netif_addr_unlock_bh(efx->net_dev);
694 static void efx_fini_port(struct efx_nic *efx)
696 EFX_LOG(efx, "shut down port\n");
698 if (!efx->port_initialized)
701 falcon_fini_xmac(efx);
702 efx->port_initialized = false;
704 efx->link_up = false;
705 efx_link_status_changed(efx);
708 static void efx_remove_port(struct efx_nic *efx)
710 EFX_LOG(efx, "destroying port\n");
712 falcon_remove_port(efx);
715 /**************************************************************************
719 **************************************************************************/
721 /* This configures the PCI device to enable I/O and DMA. */
722 static int efx_init_io(struct efx_nic *efx)
724 struct pci_dev *pci_dev = efx->pci_dev;
725 dma_addr_t dma_mask = efx->type->max_dma_mask;
728 EFX_LOG(efx, "initialising I/O\n");
730 rc = pci_enable_device(pci_dev);
732 EFX_ERR(efx, "failed to enable PCI device\n");
736 pci_set_master(pci_dev);
738 /* Set the PCI DMA mask. Try all possibilities from our
739 * genuine mask down to 32 bits, because some architectures
740 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
741 * masks event though they reject 46 bit masks.
743 while (dma_mask > 0x7fffffffUL) {
744 if (pci_dma_supported(pci_dev, dma_mask) &&
745 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
750 EFX_ERR(efx, "could not find a suitable DMA mask\n");
753 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
754 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
756 /* pci_set_consistent_dma_mask() is not *allowed* to
757 * fail with a mask that pci_set_dma_mask() accepted,
758 * but just in case...
760 EFX_ERR(efx, "failed to set consistent DMA mask\n");
764 efx->membase_phys = pci_resource_start(efx->pci_dev,
766 rc = pci_request_region(pci_dev, efx->type->mem_bar, "sfc");
768 EFX_ERR(efx, "request for memory BAR failed\n");
772 efx->membase = ioremap_nocache(efx->membase_phys,
773 efx->type->mem_map_size);
775 EFX_ERR(efx, "could not map memory BAR %d at %llx+%x\n",
777 (unsigned long long)efx->membase_phys,
778 efx->type->mem_map_size);
782 EFX_LOG(efx, "memory BAR %u at %llx+%x (virtual %p)\n",
783 efx->type->mem_bar, (unsigned long long)efx->membase_phys,
784 efx->type->mem_map_size, efx->membase);
789 pci_release_region(efx->pci_dev, efx->type->mem_bar);
791 efx->membase_phys = 0;
793 pci_disable_device(efx->pci_dev);
798 static void efx_fini_io(struct efx_nic *efx)
800 EFX_LOG(efx, "shutting down I/O\n");
803 iounmap(efx->membase);
807 if (efx->membase_phys) {
808 pci_release_region(efx->pci_dev, efx->type->mem_bar);
809 efx->membase_phys = 0;
812 pci_disable_device(efx->pci_dev);
815 /* Get number of RX queues wanted. Return number of online CPU
816 * packages in the expectation that an IRQ balancer will spread
817 * interrupts across them. */
818 static int efx_wanted_rx_queues(void)
824 cpus_clear(core_mask);
826 for_each_online_cpu(cpu) {
827 if (!cpu_isset(cpu, core_mask)) {
829 cpus_or(core_mask, core_mask,
830 topology_core_siblings(cpu));
837 /* Probe the number and type of interrupts we are able to obtain, and
838 * the resulting numbers of channels and RX queues.
840 static void efx_probe_interrupts(struct efx_nic *efx)
843 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
846 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
847 struct msix_entry xentries[EFX_MAX_CHANNELS];
850 /* We want one RX queue and interrupt per CPU package
851 * (or as specified by the rss_cpus module parameter).
852 * We will need one channel per interrupt.
854 wanted_ints = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
855 efx->n_rx_queues = min(wanted_ints, max_channels);
857 for (i = 0; i < efx->n_rx_queues; i++)
858 xentries[i].entry = i;
859 rc = pci_enable_msix(efx->pci_dev, xentries, efx->n_rx_queues);
861 EFX_BUG_ON_PARANOID(rc >= efx->n_rx_queues);
862 efx->n_rx_queues = rc;
863 rc = pci_enable_msix(efx->pci_dev, xentries,
868 for (i = 0; i < efx->n_rx_queues; i++)
869 efx->channel[i].irq = xentries[i].vector;
871 /* Fall back to single channel MSI */
872 efx->interrupt_mode = EFX_INT_MODE_MSI;
873 EFX_ERR(efx, "could not enable MSI-X\n");
877 /* Try single interrupt MSI */
878 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
879 efx->n_rx_queues = 1;
880 rc = pci_enable_msi(efx->pci_dev);
882 efx->channel[0].irq = efx->pci_dev->irq;
884 EFX_ERR(efx, "could not enable MSI\n");
885 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
889 /* Assume legacy interrupts */
890 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
891 efx->n_rx_queues = 1;
892 efx->legacy_irq = efx->pci_dev->irq;
896 static void efx_remove_interrupts(struct efx_nic *efx)
898 struct efx_channel *channel;
900 /* Remove MSI/MSI-X interrupts */
901 efx_for_each_channel(channel, efx)
903 pci_disable_msi(efx->pci_dev);
904 pci_disable_msix(efx->pci_dev);
906 /* Remove legacy interrupt */
910 static void efx_set_channels(struct efx_nic *efx)
912 struct efx_tx_queue *tx_queue;
913 struct efx_rx_queue *rx_queue;
915 efx_for_each_tx_queue(tx_queue, efx) {
916 if (!EFX_INT_MODE_USE_MSI(efx) && separate_tx_and_rx_channels)
917 tx_queue->channel = &efx->channel[1];
919 tx_queue->channel = &efx->channel[0];
920 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
923 efx_for_each_rx_queue(rx_queue, efx) {
924 rx_queue->channel = &efx->channel[rx_queue->queue];
925 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
929 static int efx_probe_nic(struct efx_nic *efx)
933 EFX_LOG(efx, "creating NIC\n");
935 /* Carry out hardware-type specific initialisation */
936 rc = falcon_probe_nic(efx);
940 /* Determine the number of channels and RX queues by trying to hook
941 * in MSI-X interrupts. */
942 efx_probe_interrupts(efx);
944 efx_set_channels(efx);
946 /* Initialise the interrupt moderation settings */
947 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec);
952 static void efx_remove_nic(struct efx_nic *efx)
954 EFX_LOG(efx, "destroying NIC\n");
956 efx_remove_interrupts(efx);
957 falcon_remove_nic(efx);
960 /**************************************************************************
962 * NIC startup/shutdown
964 *************************************************************************/
966 static int efx_probe_all(struct efx_nic *efx)
968 struct efx_channel *channel;
972 rc = efx_probe_nic(efx);
974 EFX_ERR(efx, "failed to create NIC\n");
979 rc = efx_probe_port(efx);
981 EFX_ERR(efx, "failed to create port\n");
985 /* Create channels */
986 efx_for_each_channel(channel, efx) {
987 rc = efx_probe_channel(channel);
989 EFX_ERR(efx, "failed to create channel %d\n",
998 efx_for_each_channel(channel, efx)
999 efx_remove_channel(channel);
1000 efx_remove_port(efx);
1002 efx_remove_nic(efx);
1007 /* Called after previous invocation(s) of efx_stop_all, restarts the
1008 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1009 * and ensures that the port is scheduled to be reconfigured.
1010 * This function is safe to call multiple times when the NIC is in any
1012 static void efx_start_all(struct efx_nic *efx)
1014 struct efx_channel *channel;
1016 EFX_ASSERT_RESET_SERIALISED(efx);
1018 /* Check that it is appropriate to restart the interface. All
1019 * of these flags are safe to read under just the rtnl lock */
1020 if (efx->port_enabled)
1022 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1024 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1027 /* Mark the port as enabled so port reconfigurations can start, then
1028 * restart the transmit interface early so the watchdog timer stops */
1029 efx_start_port(efx);
1030 if (efx_dev_registered(efx))
1031 efx_wake_queue(efx);
1033 efx_for_each_channel(channel, efx)
1034 efx_start_channel(channel);
1036 falcon_enable_interrupts(efx);
1038 /* Start hardware monitor if we're in RUNNING */
1039 if (efx->state == STATE_RUNNING)
1040 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1041 efx_monitor_interval);
1044 /* Flush all delayed work. Should only be called when no more delayed work
1045 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1046 * since we're holding the rtnl_lock at this point. */
1047 static void efx_flush_all(struct efx_nic *efx)
1049 struct efx_rx_queue *rx_queue;
1051 /* Make sure the hardware monitor is stopped */
1052 cancel_delayed_work_sync(&efx->monitor_work);
1054 /* Ensure that all RX slow refills are complete. */
1055 efx_for_each_rx_queue(rx_queue, efx)
1056 cancel_delayed_work_sync(&rx_queue->work);
1058 /* Stop scheduled port reconfigurations */
1059 cancel_work_sync(&efx->reconfigure_work);
1063 /* Quiesce hardware and software without bringing the link down.
1064 * Safe to call multiple times, when the nic and interface is in any
1065 * state. The caller is guaranteed to subsequently be in a position
1066 * to modify any hardware and software state they see fit without
1068 static void efx_stop_all(struct efx_nic *efx)
1070 struct efx_channel *channel;
1072 EFX_ASSERT_RESET_SERIALISED(efx);
1074 /* port_enabled can be read safely under the rtnl lock */
1075 if (!efx->port_enabled)
1078 /* Disable interrupts and wait for ISR to complete */
1079 falcon_disable_interrupts(efx);
1080 if (efx->legacy_irq)
1081 synchronize_irq(efx->legacy_irq);
1082 efx_for_each_channel(channel, efx) {
1084 synchronize_irq(channel->irq);
1087 /* Stop all NAPI processing and synchronous rx refills */
1088 efx_for_each_channel(channel, efx)
1089 efx_stop_channel(channel);
1091 /* Stop all asynchronous port reconfigurations. Since all
1092 * event processing has already been stopped, there is no
1093 * window to loose phy events */
1096 /* Flush reconfigure_work, refill_workqueue, monitor_work */
1099 /* Isolate the MAC from the TX and RX engines, so that queue
1100 * flushes will complete in a timely fashion. */
1101 falcon_drain_tx_fifo(efx);
1103 /* Stop the kernel transmit interface late, so the watchdog
1104 * timer isn't ticking over the flush */
1105 if (efx_dev_registered(efx)) {
1106 efx_stop_queue(efx);
1107 netif_tx_lock_bh(efx->net_dev);
1108 netif_tx_unlock_bh(efx->net_dev);
1112 static void efx_remove_all(struct efx_nic *efx)
1114 struct efx_channel *channel;
1116 efx_for_each_channel(channel, efx)
1117 efx_remove_channel(channel);
1118 efx_remove_port(efx);
1119 efx_remove_nic(efx);
1122 /* A convinience function to safely flush all the queues */
1123 void efx_flush_queues(struct efx_nic *efx)
1125 EFX_ASSERT_RESET_SERIALISED(efx);
1129 efx_fini_channels(efx);
1130 efx_init_channels(efx);
1135 /**************************************************************************
1137 * Interrupt moderation
1139 **************************************************************************/
1141 /* Set interrupt moderation parameters */
1142 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs)
1144 struct efx_tx_queue *tx_queue;
1145 struct efx_rx_queue *rx_queue;
1147 EFX_ASSERT_RESET_SERIALISED(efx);
1149 efx_for_each_tx_queue(tx_queue, efx)
1150 tx_queue->channel->irq_moderation = tx_usecs;
1152 efx_for_each_rx_queue(rx_queue, efx)
1153 rx_queue->channel->irq_moderation = rx_usecs;
1156 /**************************************************************************
1160 **************************************************************************/
1162 /* Run periodically off the general workqueue. Serialised against
1163 * efx_reconfigure_port via the mac_lock */
1164 static void efx_monitor(struct work_struct *data)
1166 struct efx_nic *efx = container_of(data, struct efx_nic,
1170 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1171 raw_smp_processor_id());
1174 /* If the mac_lock is already held then it is likely a port
1175 * reconfiguration is already in place, which will likely do
1176 * most of the work of check_hw() anyway. */
1177 if (!mutex_trylock(&efx->mac_lock)) {
1178 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1179 efx_monitor_interval);
1183 if (efx->port_enabled)
1184 rc = falcon_check_xmac(efx);
1185 mutex_unlock(&efx->mac_lock);
1187 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1188 efx_monitor_interval);
1191 /**************************************************************************
1195 *************************************************************************/
1198 * Context: process, rtnl_lock() held.
1200 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1202 struct efx_nic *efx = netdev_priv(net_dev);
1204 EFX_ASSERT_RESET_SERIALISED(efx);
1206 return generic_mii_ioctl(&efx->mii, if_mii(ifr), cmd, NULL);
1209 /**************************************************************************
1213 **************************************************************************/
1215 static int efx_init_napi(struct efx_nic *efx)
1217 struct efx_channel *channel;
1220 efx_for_each_channel(channel, efx) {
1221 channel->napi_dev = efx->net_dev;
1222 rc = efx_lro_init(&channel->lro_mgr, efx);
1232 static void efx_fini_napi(struct efx_nic *efx)
1234 struct efx_channel *channel;
1236 efx_for_each_channel(channel, efx) {
1237 efx_lro_fini(&channel->lro_mgr);
1238 channel->napi_dev = NULL;
1242 /**************************************************************************
1244 * Kernel netpoll interface
1246 *************************************************************************/
1248 #ifdef CONFIG_NET_POLL_CONTROLLER
1250 /* Although in the common case interrupts will be disabled, this is not
1251 * guaranteed. However, all our work happens inside the NAPI callback,
1252 * so no locking is required.
1254 static void efx_netpoll(struct net_device *net_dev)
1256 struct efx_nic *efx = netdev_priv(net_dev);
1257 struct efx_channel *channel;
1259 efx_for_each_channel(channel, efx)
1260 efx_schedule_channel(channel);
1265 /**************************************************************************
1267 * Kernel net device interface
1269 *************************************************************************/
1271 /* Context: process, rtnl_lock() held. */
1272 static int efx_net_open(struct net_device *net_dev)
1274 struct efx_nic *efx = netdev_priv(net_dev);
1275 EFX_ASSERT_RESET_SERIALISED(efx);
1277 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1278 raw_smp_processor_id());
1280 if (efx->phy_mode & PHY_MODE_SPECIAL)
1287 /* Context: process, rtnl_lock() held.
1288 * Note that the kernel will ignore our return code; this method
1289 * should really be a void.
1291 static int efx_net_stop(struct net_device *net_dev)
1293 struct efx_nic *efx = netdev_priv(net_dev);
1295 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1296 raw_smp_processor_id());
1298 /* Stop the device and flush all the channels */
1300 efx_fini_channels(efx);
1301 efx_init_channels(efx);
1306 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1307 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1309 struct efx_nic *efx = netdev_priv(net_dev);
1310 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1311 struct net_device_stats *stats = &net_dev->stats;
1313 /* Update stats if possible, but do not wait if another thread
1314 * is updating them (or resetting the NIC); slightly stale
1315 * stats are acceptable.
1317 if (!spin_trylock(&efx->stats_lock))
1319 if (efx->stats_enabled) {
1320 falcon_update_stats_xmac(efx);
1321 falcon_update_nic_stats(efx);
1323 spin_unlock(&efx->stats_lock);
1325 stats->rx_packets = mac_stats->rx_packets;
1326 stats->tx_packets = mac_stats->tx_packets;
1327 stats->rx_bytes = mac_stats->rx_bytes;
1328 stats->tx_bytes = mac_stats->tx_bytes;
1329 stats->multicast = mac_stats->rx_multicast;
1330 stats->collisions = mac_stats->tx_collision;
1331 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1332 mac_stats->rx_length_error);
1333 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1334 stats->rx_crc_errors = mac_stats->rx_bad;
1335 stats->rx_frame_errors = mac_stats->rx_align_error;
1336 stats->rx_fifo_errors = mac_stats->rx_overflow;
1337 stats->rx_missed_errors = mac_stats->rx_missed;
1338 stats->tx_window_errors = mac_stats->tx_late_collision;
1340 stats->rx_errors = (stats->rx_length_errors +
1341 stats->rx_over_errors +
1342 stats->rx_crc_errors +
1343 stats->rx_frame_errors +
1344 stats->rx_fifo_errors +
1345 stats->rx_missed_errors +
1346 mac_stats->rx_symbol_error);
1347 stats->tx_errors = (stats->tx_window_errors +
1353 /* Context: netif_tx_lock held, BHs disabled. */
1354 static void efx_watchdog(struct net_device *net_dev)
1356 struct efx_nic *efx = netdev_priv(net_dev);
1358 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d:"
1359 " resetting channels\n",
1360 atomic_read(&efx->netif_stop_count), efx->port_enabled);
1362 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1366 /* Context: process, rtnl_lock() held. */
1367 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1369 struct efx_nic *efx = netdev_priv(net_dev);
1372 EFX_ASSERT_RESET_SERIALISED(efx);
1374 if (new_mtu > EFX_MAX_MTU)
1379 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1381 efx_fini_channels(efx);
1382 net_dev->mtu = new_mtu;
1383 efx_init_channels(efx);
1389 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1391 struct efx_nic *efx = netdev_priv(net_dev);
1392 struct sockaddr *addr = data;
1393 char *new_addr = addr->sa_data;
1395 EFX_ASSERT_RESET_SERIALISED(efx);
1397 if (!is_valid_ether_addr(new_addr)) {
1398 EFX_ERR(efx, "invalid ethernet MAC address requested: %pM\n",
1403 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1405 /* Reconfigure the MAC */
1406 efx_reconfigure_port(efx);
1411 /* Context: netif_addr_lock held, BHs disabled. */
1412 static void efx_set_multicast_list(struct net_device *net_dev)
1414 struct efx_nic *efx = netdev_priv(net_dev);
1415 struct dev_mc_list *mc_list = net_dev->mc_list;
1416 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1417 bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
1418 bool changed = (efx->promiscuous != promiscuous);
1423 efx->promiscuous = promiscuous;
1425 /* Build multicast hash table */
1426 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1427 memset(mc_hash, 0xff, sizeof(*mc_hash));
1429 memset(mc_hash, 0x00, sizeof(*mc_hash));
1430 for (i = 0; i < net_dev->mc_count; i++) {
1431 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1432 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1433 set_bit_le(bit, mc_hash->byte);
1434 mc_list = mc_list->next;
1438 if (!efx->port_enabled)
1439 /* Delay pushing settings until efx_start_port() */
1443 queue_work(efx->workqueue, &efx->reconfigure_work);
1445 /* Create and activate new global multicast hash table */
1446 falcon_set_multicast_hash(efx);
1449 static const struct net_device_ops efx_netdev_ops = {
1450 .ndo_open = efx_net_open,
1451 .ndo_stop = efx_net_stop,
1452 .ndo_get_stats = efx_net_stats,
1453 .ndo_tx_timeout = efx_watchdog,
1454 .ndo_start_xmit = efx_hard_start_xmit,
1455 .ndo_validate_addr = eth_validate_addr,
1456 .ndo_do_ioctl = efx_ioctl,
1457 .ndo_change_mtu = efx_change_mtu,
1458 .ndo_set_mac_address = efx_set_mac_address,
1459 .ndo_set_multicast_list = efx_set_multicast_list,
1460 #ifdef CONFIG_NET_POLL_CONTROLLER
1461 .ndo_poll_controller = efx_netpoll,
1465 static int efx_netdev_event(struct notifier_block *this,
1466 unsigned long event, void *ptr)
1468 struct net_device *net_dev = ptr;
1470 if (net_dev->netdev_ops == &efx_netdev_ops && event == NETDEV_CHANGENAME) {
1471 struct efx_nic *efx = netdev_priv(net_dev);
1473 strcpy(efx->name, net_dev->name);
1474 efx_mtd_rename(efx);
1480 static struct notifier_block efx_netdev_notifier = {
1481 .notifier_call = efx_netdev_event,
1484 static int efx_register_netdev(struct efx_nic *efx)
1486 struct net_device *net_dev = efx->net_dev;
1489 net_dev->watchdog_timeo = 5 * HZ;
1490 net_dev->irq = efx->pci_dev->irq;
1491 net_dev->netdev_ops = &efx_netdev_ops;
1492 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1493 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1495 /* Always start with carrier off; PHY events will detect the link */
1496 netif_carrier_off(efx->net_dev);
1498 /* Clear MAC statistics */
1499 falcon_update_stats_xmac(efx);
1500 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1502 rc = register_netdev(net_dev);
1504 EFX_ERR(efx, "could not register net dev\n");
1507 strcpy(efx->name, net_dev->name);
1512 static void efx_unregister_netdev(struct efx_nic *efx)
1514 struct efx_tx_queue *tx_queue;
1519 BUG_ON(netdev_priv(efx->net_dev) != efx);
1521 /* Free up any skbs still remaining. This has to happen before
1522 * we try to unregister the netdev as running their destructors
1523 * may be needed to get the device ref. count to 0. */
1524 efx_for_each_tx_queue(tx_queue, efx)
1525 efx_release_tx_buffers(tx_queue);
1527 if (efx_dev_registered(efx)) {
1528 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1529 unregister_netdev(efx->net_dev);
1533 /**************************************************************************
1535 * Device reset and suspend
1537 **************************************************************************/
1539 /* Tears down the entire software state and most of the hardware state
1541 void efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd)
1545 EFX_ASSERT_RESET_SERIALISED(efx);
1547 /* The net_dev->get_stats handler is quite slow, and will fail
1548 * if a fetch is pending over reset. Serialise against it. */
1549 spin_lock(&efx->stats_lock);
1550 efx->stats_enabled = false;
1551 spin_unlock(&efx->stats_lock);
1554 mutex_lock(&efx->mac_lock);
1555 mutex_lock(&efx->spi_lock);
1557 rc = falcon_xmac_get_settings(efx, ecmd);
1559 EFX_ERR(efx, "could not back up PHY settings\n");
1561 efx_fini_channels(efx);
1564 /* This function will always ensure that the locks acquired in
1565 * efx_reset_down() are released. A failure return code indicates
1566 * that we were unable to reinitialise the hardware, and the
1567 * driver should be disabled. If ok is false, then the rx and tx
1568 * engines are not restarted, pending a RESET_DISABLE. */
1569 int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd, bool ok)
1573 EFX_ASSERT_RESET_SERIALISED(efx);
1575 rc = falcon_init_nic(efx);
1577 EFX_ERR(efx, "failed to initialise NIC\n");
1582 efx_init_channels(efx);
1584 if (falcon_xmac_set_settings(efx, ecmd))
1585 EFX_ERR(efx, "could not restore PHY settings\n");
1588 mutex_unlock(&efx->spi_lock);
1589 mutex_unlock(&efx->mac_lock);
1593 efx->stats_enabled = true;
1598 /* Reset the NIC as transparently as possible. Do not reset the PHY
1599 * Note that the reset may fail, in which case the card will be left
1600 * in a most-probably-unusable state.
1602 * This function will sleep. You cannot reset from within an atomic
1603 * state; use efx_schedule_reset() instead.
1605 * Grabs the rtnl_lock.
1607 static int efx_reset(struct efx_nic *efx)
1609 struct ethtool_cmd ecmd;
1610 enum reset_type method = efx->reset_pending;
1613 /* Serialise with kernel interfaces */
1616 /* If we're not RUNNING then don't reset. Leave the reset_pending
1617 * flag set so that efx_pci_probe_main will be retried */
1618 if (efx->state != STATE_RUNNING) {
1619 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1623 EFX_INFO(efx, "resetting (%d)\n", method);
1625 efx_reset_down(efx, &ecmd);
1627 rc = falcon_reset_hw(efx, method);
1629 EFX_ERR(efx, "failed to reset hardware\n");
1633 /* Allow resets to be rescheduled. */
1634 efx->reset_pending = RESET_TYPE_NONE;
1636 /* Reinitialise bus-mastering, which may have been turned off before
1637 * the reset was scheduled. This is still appropriate, even in the
1638 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1639 * can respond to requests. */
1640 pci_set_master(efx->pci_dev);
1642 /* Leave device stopped if necessary */
1643 if (method == RESET_TYPE_DISABLE) {
1648 rc = efx_reset_up(efx, &ecmd, true);
1652 EFX_LOG(efx, "reset complete\n");
1658 efx_reset_up(efx, &ecmd, false);
1660 EFX_ERR(efx, "has been disabled\n");
1661 efx->state = STATE_DISABLED;
1664 efx_unregister_netdev(efx);
1669 /* The worker thread exists so that code that cannot sleep can
1670 * schedule a reset for later.
1672 static void efx_reset_work(struct work_struct *data)
1674 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1679 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1681 enum reset_type method;
1683 if (efx->reset_pending != RESET_TYPE_NONE) {
1684 EFX_INFO(efx, "quenching already scheduled reset\n");
1689 case RESET_TYPE_INVISIBLE:
1690 case RESET_TYPE_ALL:
1691 case RESET_TYPE_WORLD:
1692 case RESET_TYPE_DISABLE:
1695 case RESET_TYPE_RX_RECOVERY:
1696 case RESET_TYPE_RX_DESC_FETCH:
1697 case RESET_TYPE_TX_DESC_FETCH:
1698 case RESET_TYPE_TX_SKIP:
1699 method = RESET_TYPE_INVISIBLE;
1702 method = RESET_TYPE_ALL;
1707 EFX_LOG(efx, "scheduling reset (%d:%d)\n", type, method);
1709 EFX_LOG(efx, "scheduling reset (%d)\n", method);
1711 efx->reset_pending = method;
1713 queue_work(reset_workqueue, &efx->reset_work);
1716 /**************************************************************************
1718 * List of NICs we support
1720 **************************************************************************/
1722 /* PCI device ID table */
1723 static struct pci_device_id efx_pci_table[] __devinitdata = {
1724 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1725 .driver_data = (unsigned long) &falcon_a_nic_type},
1726 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1727 .driver_data = (unsigned long) &falcon_b_nic_type},
1728 {0} /* end of list */
1731 /**************************************************************************
1733 * Dummy PHY/MAC/Board operations
1735 * Can be used for some unimplemented operations
1736 * Needed so all function pointers are valid and do not have to be tested
1739 **************************************************************************/
1740 int efx_port_dummy_op_int(struct efx_nic *efx)
1744 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1745 void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink) {}
1747 static struct efx_phy_operations efx_dummy_phy_operations = {
1748 .init = efx_port_dummy_op_int,
1749 .reconfigure = efx_port_dummy_op_void,
1750 .check_hw = efx_port_dummy_op_int,
1751 .fini = efx_port_dummy_op_void,
1752 .clear_interrupt = efx_port_dummy_op_void,
1755 static struct efx_board efx_dummy_board_info = {
1756 .init = efx_port_dummy_op_int,
1757 .init_leds = efx_port_dummy_op_int,
1758 .set_fault_led = efx_port_dummy_op_blink,
1759 .monitor = efx_port_dummy_op_int,
1760 .blink = efx_port_dummy_op_blink,
1761 .fini = efx_port_dummy_op_void,
1764 /**************************************************************************
1768 **************************************************************************/
1770 /* This zeroes out and then fills in the invariants in a struct
1771 * efx_nic (including all sub-structures).
1773 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1774 struct pci_dev *pci_dev, struct net_device *net_dev)
1776 struct efx_channel *channel;
1777 struct efx_tx_queue *tx_queue;
1778 struct efx_rx_queue *rx_queue;
1781 /* Initialise common structures */
1782 memset(efx, 0, sizeof(*efx));
1783 spin_lock_init(&efx->biu_lock);
1784 spin_lock_init(&efx->phy_lock);
1785 mutex_init(&efx->spi_lock);
1786 INIT_WORK(&efx->reset_work, efx_reset_work);
1787 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1788 efx->pci_dev = pci_dev;
1789 efx->state = STATE_INIT;
1790 efx->reset_pending = RESET_TYPE_NONE;
1791 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1792 efx->board_info = efx_dummy_board_info;
1794 efx->net_dev = net_dev;
1795 efx->rx_checksum_enabled = true;
1796 spin_lock_init(&efx->netif_stop_lock);
1797 spin_lock_init(&efx->stats_lock);
1798 mutex_init(&efx->mac_lock);
1799 efx->phy_op = &efx_dummy_phy_operations;
1800 efx->mii.dev = net_dev;
1801 INIT_WORK(&efx->reconfigure_work, efx_reconfigure_work);
1802 atomic_set(&efx->netif_stop_count, 1);
1804 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1805 channel = &efx->channel[i];
1807 channel->channel = i;
1808 channel->work_pending = false;
1810 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
1811 tx_queue = &efx->tx_queue[i];
1812 tx_queue->efx = efx;
1813 tx_queue->queue = i;
1814 tx_queue->buffer = NULL;
1815 tx_queue->channel = &efx->channel[0]; /* for safety */
1816 tx_queue->tso_headers_free = NULL;
1818 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1819 rx_queue = &efx->rx_queue[i];
1820 rx_queue->efx = efx;
1821 rx_queue->queue = i;
1822 rx_queue->channel = &efx->channel[0]; /* for safety */
1823 rx_queue->buffer = NULL;
1824 spin_lock_init(&rx_queue->add_lock);
1825 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
1830 /* Sanity-check NIC type */
1831 EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
1832 (efx->type->txd_ring_mask + 1));
1833 EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
1834 (efx->type->rxd_ring_mask + 1));
1835 EFX_BUG_ON_PARANOID(efx->type->evq_size &
1836 (efx->type->evq_size - 1));
1837 /* As close as we can get to guaranteeing that we don't overflow */
1838 EFX_BUG_ON_PARANOID(efx->type->evq_size <
1839 (efx->type->txd_ring_mask + 1 +
1840 efx->type->rxd_ring_mask + 1));
1841 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
1843 /* Higher numbered interrupt modes are less capable! */
1844 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
1847 efx->workqueue = create_singlethread_workqueue("sfc_work");
1848 if (!efx->workqueue)
1854 static void efx_fini_struct(struct efx_nic *efx)
1856 if (efx->workqueue) {
1857 destroy_workqueue(efx->workqueue);
1858 efx->workqueue = NULL;
1862 /**************************************************************************
1866 **************************************************************************/
1868 /* Main body of final NIC shutdown code
1869 * This is called only at module unload (or hotplug removal).
1871 static void efx_pci_remove_main(struct efx_nic *efx)
1873 EFX_ASSERT_RESET_SERIALISED(efx);
1875 /* Skip everything if we never obtained a valid membase */
1879 efx_fini_channels(efx);
1882 /* Shutdown the board, then the NIC and board state */
1883 efx->board_info.fini(efx);
1884 falcon_fini_interrupt(efx);
1887 efx_remove_all(efx);
1890 /* Final NIC shutdown
1891 * This is called only at module unload (or hotplug removal).
1893 static void efx_pci_remove(struct pci_dev *pci_dev)
1895 struct efx_nic *efx;
1897 efx = pci_get_drvdata(pci_dev);
1901 efx_mtd_remove(efx);
1903 /* Mark the NIC as fini, then stop the interface */
1905 efx->state = STATE_FINI;
1906 dev_close(efx->net_dev);
1908 /* Allow any queued efx_resets() to complete */
1911 if (efx->membase == NULL)
1914 efx_unregister_netdev(efx);
1916 /* Wait for any scheduled resets to complete. No more will be
1917 * scheduled from this point because efx_stop_all() has been
1918 * called, we are no longer registered with driverlink, and
1919 * the net_device's have been removed. */
1920 cancel_work_sync(&efx->reset_work);
1922 efx_pci_remove_main(efx);
1926 EFX_LOG(efx, "shutdown successful\n");
1928 pci_set_drvdata(pci_dev, NULL);
1929 efx_fini_struct(efx);
1930 free_netdev(efx->net_dev);
1933 /* Main body of NIC initialisation
1934 * This is called at module load (or hotplug insertion, theoretically).
1936 static int efx_pci_probe_main(struct efx_nic *efx)
1940 /* Do start-of-day initialisation */
1941 rc = efx_probe_all(efx);
1945 rc = efx_init_napi(efx);
1949 /* Initialise the board */
1950 rc = efx->board_info.init(efx);
1952 EFX_ERR(efx, "failed to initialise board\n");
1956 rc = falcon_init_nic(efx);
1958 EFX_ERR(efx, "failed to initialise NIC\n");
1962 rc = efx_init_port(efx);
1964 EFX_ERR(efx, "failed to initialise port\n");
1968 efx_init_channels(efx);
1970 rc = falcon_init_interrupt(efx);
1977 efx_fini_channels(efx);
1981 efx->board_info.fini(efx);
1985 efx_remove_all(efx);
1990 /* NIC initialisation
1992 * This is called at module load (or hotplug insertion,
1993 * theoretically). It sets up PCI mappings, tests and resets the NIC,
1994 * sets up and registers the network devices with the kernel and hooks
1995 * the interrupt service routine. It does not prepare the device for
1996 * transmission; this is left to the first time one of the network
1997 * interfaces is brought up (i.e. efx_net_open).
1999 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2000 const struct pci_device_id *entry)
2002 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2003 struct net_device *net_dev;
2004 struct efx_nic *efx;
2007 /* Allocate and initialise a struct net_device and struct efx_nic */
2008 net_dev = alloc_etherdev(sizeof(*efx));
2011 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2012 NETIF_F_HIGHDMA | NETIF_F_TSO);
2014 net_dev->features |= NETIF_F_LRO;
2015 /* Mask for features that also apply to VLAN devices */
2016 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2017 NETIF_F_HIGHDMA | NETIF_F_TSO);
2018 efx = netdev_priv(net_dev);
2019 pci_set_drvdata(pci_dev, efx);
2020 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2024 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2026 /* Set up basic I/O (BAR mappings etc) */
2027 rc = efx_init_io(efx);
2031 /* No serialisation is required with the reset path because
2032 * we're in STATE_INIT. */
2033 for (i = 0; i < 5; i++) {
2034 rc = efx_pci_probe_main(efx);
2038 /* Serialise against efx_reset(). No more resets will be
2039 * scheduled since efx_stop_all() has been called, and we
2040 * have not and never have been registered with either
2041 * the rtnetlink or driverlink layers. */
2042 cancel_work_sync(&efx->reset_work);
2044 /* Retry if a recoverably reset event has been scheduled */
2045 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2046 (efx->reset_pending != RESET_TYPE_ALL))
2049 efx->reset_pending = RESET_TYPE_NONE;
2053 EFX_ERR(efx, "Could not reset NIC\n");
2057 /* Switch to the running state before we expose the device to
2058 * the OS. This is to ensure that the initial gathering of
2059 * MAC stats succeeds. */
2061 efx->state = STATE_RUNNING;
2064 rc = efx_register_netdev(efx);
2068 EFX_LOG(efx, "initialisation successful\n");
2070 efx_mtd_probe(efx); /* allowed to fail */
2074 efx_pci_remove_main(efx);
2079 efx_fini_struct(efx);
2081 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2082 free_netdev(net_dev);
2086 static struct pci_driver efx_pci_driver = {
2087 .name = EFX_DRIVER_NAME,
2088 .id_table = efx_pci_table,
2089 .probe = efx_pci_probe,
2090 .remove = efx_pci_remove,
2093 /**************************************************************************
2095 * Kernel module interface
2097 *************************************************************************/
2099 module_param(interrupt_mode, uint, 0444);
2100 MODULE_PARM_DESC(interrupt_mode,
2101 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2103 static int __init efx_init_module(void)
2107 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2109 rc = register_netdevice_notifier(&efx_netdev_notifier);
2113 refill_workqueue = create_workqueue("sfc_refill");
2114 if (!refill_workqueue) {
2118 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2119 if (!reset_workqueue) {
2124 rc = pci_register_driver(&efx_pci_driver);
2131 destroy_workqueue(reset_workqueue);
2133 destroy_workqueue(refill_workqueue);
2135 unregister_netdevice_notifier(&efx_netdev_notifier);
2140 static void __exit efx_exit_module(void)
2142 printk(KERN_INFO "Solarflare NET driver unloading\n");
2144 pci_unregister_driver(&efx_pci_driver);
2145 destroy_workqueue(reset_workqueue);
2146 destroy_workqueue(refill_workqueue);
2147 unregister_netdevice_notifier(&efx_netdev_notifier);
2151 module_init(efx_init_module);
2152 module_exit(efx_exit_module);
2154 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2155 "Solarflare Communications");
2156 MODULE_DESCRIPTION("Solarflare Communications network driver");
2157 MODULE_LICENSE("GPL");
2158 MODULE_DEVICE_TABLE(pci, efx_pci_table);