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   1 /* $Id: w6692.c,v 1.18.2.4 2004/02/11 13:21:34 keil Exp $
   2  *
   3  * Winbond W6692 specific routines
   4  *
   5  * Author       Petr Novak
   6  * Copyright    by Petr Novak        <petr.novak@i.cz>
   7  *
   8  * This software may be used and distributed according to the terms
   9  * of the GNU General Public License, incorporated herein by reference.
  10  *
  11  */
  12
  13 #include <linux/init.h>
  14 #include "hisax.h"
  15 #include "w6692.h"
  16 #include "isdnl1.h"
  17 #include <linux/interrupt.h>
  18 #include <linux/pci.h>
  19
  20 /* table entry in the PCI devices list */
  21 typedef struct {
  22         int vendor_id;
  23         int device_id;
  24         char *vendor_name;
  25         char *card_name;
  26 } PCI_ENTRY;
  27
  28 static const PCI_ENTRY id_list[] =
  29 {
  30         {PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, "Winbond", "W6692"},
  31         {PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, "Dynalink/AsusCom", "IS64PH"},
  32         {0, 0, "U.S.Robotics", "ISDN PCI Card TA"}
  33 };
  34
  35 #define W6692_SV_USR   0x16ec
  36 #define W6692_SD_USR   0x3409
  37 #define W6692_WINBOND  0
  38 #define W6692_DYNALINK 1
  39 #define W6692_USR      2
  40
  41 static const char *w6692_revision = "$Revision: 1.18.2.4 $";
  42
  43 #define DBUSY_TIMER_VALUE 80
  44
  45 static char *W6692Ver[] =
  46 {"W6692 V00", "W6692 V01", "W6692 V10",
  47  "W6692 V11"};
  48
  49 static void
  50 W6692Version(struct IsdnCardState *cs, char *s)
  51 {
  52         int val;
  53
  54         val = cs->readW6692(cs, W_D_RBCH);
  55         printk(KERN_INFO "%s Winbond W6692 version (%x): %s\n", s, val, W6692Ver[(val >> 6) & 3]);
  56 }
  57
  58 static void
  59 ph_command(struct IsdnCardState *cs, unsigned int command)
  60 {
  61         if (cs->debug & L1_DEB_ISAC)
  62                 debugl1(cs, "ph_command %x", command);
  63         cs->writeisac(cs, W_CIX, command);
  64 }
  65
  66
  67 static void
  68 W6692_new_ph(struct IsdnCardState *cs)
  69 {
  70         switch (cs->dc.w6692.ph_state) {
  71                 case (W_L1CMD_RST):
  72                         ph_command(cs, W_L1CMD_DRC);
  73                         l1_msg(cs, HW_RESET | INDICATION, NULL);
  74                         /* fallthru */
  75                 case (W_L1IND_CD):
  76                         l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
  77                         break;
  78                 case (W_L1IND_DRD):
  79                         l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
  80                         break;
  81                 case (W_L1IND_CE):
  82                         l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
  83                         break;
  84                 case (W_L1IND_LD):
  85                         l1_msg(cs, HW_RSYNC | INDICATION, NULL);
  86                         break;
  87                 case (W_L1IND_ARD):
  88                         l1_msg(cs, HW_INFO2 | INDICATION, NULL);
  89                         break;
  90                 case (W_L1IND_AI8):
  91                         l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
  92                         break;
  93                 case (W_L1IND_AI10):
  94                         l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
  95                         break;
  96                 default:
  97                         break;
  98         }
  99 }
 100
 101 static void
 102 W6692_bh(struct work_struct *work)
 103 {
 104         struct IsdnCardState *cs =
 105                 container_of(work, struct IsdnCardState, tqueue);
 106         struct PStack *stptr;
 107
 108         if (!cs)
 109                 return;
 110         if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
 111                 if (cs->debug)
 112                         debugl1(cs, "D-Channel Busy cleared");
 113                 stptr = cs->stlist;
 114                 while (stptr != NULL) {
 115                         stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL);
 116                         stptr = stptr->next;
 117                 }
 118         }
 119         if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
 120                 W6692_new_ph(cs);
 121         if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
 122                 DChannel_proc_rcv(cs);
 123         if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
 124                 DChannel_proc_xmt(cs);
 125 /*
 126    if (test_and_clear_bit(D_RX_MON1, &cs->event))
 127    arcofi_fsm(cs, ARCOFI_RX_END, NULL);
 128    if (test_and_clear_bit(D_TX_MON1, &cs->event))
 129    arcofi_fsm(cs, ARCOFI_TX_END, NULL);
 130  */
 131 }
 132
 133 static void
 134 W6692_empty_fifo(struct IsdnCardState *cs, int count)
 135 {
 136         u_char *ptr;
 137
 138         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
 139                 debugl1(cs, "W6692_empty_fifo");
 140
 141         if ((cs->rcvidx + count) >= MAX_DFRAME_LEN_L1) {
 142                 if (cs->debug & L1_DEB_WARN)
 143                         debugl1(cs, "W6692_empty_fifo overrun %d",
 144                                 cs->rcvidx + count);
 145                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
 146                 cs->rcvidx = 0;
 147                 return;
 148         }
 149         ptr = cs->rcvbuf + cs->rcvidx;
 150         cs->rcvidx += count;
 151         cs->readW6692fifo(cs, ptr, count);
 152         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
 153         if (cs->debug & L1_DEB_ISAC_FIFO) {
 154                 char *t = cs->dlog;
 155
 156                 t += sprintf(t, "W6692_empty_fifo cnt %d", count);
 157                 QuickHex(t, ptr, count);
 158                 debugl1(cs, cs->dlog);
 159         }
 160 }
 161
 162 static void
 163 W6692_fill_fifo(struct IsdnCardState *cs)
 164 {
 165         int count, more;
 166         u_char *ptr;
 167
 168         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
 169                 debugl1(cs, "W6692_fill_fifo");
 170
 171         if (!cs->tx_skb)
 172                 return;
 173
 174         count = cs->tx_skb->len;
 175         if (count <= 0)
 176                 return;
 177
 178         more = 0;
 179         if (count > W_D_FIFO_THRESH) {
 180                 more = !0;
 181                 count = W_D_FIFO_THRESH;
 182         }
 183         ptr = cs->tx_skb->data;
 184         skb_pull(cs->tx_skb, count);
 185         cs->tx_cnt += count;
 186         cs->writeW6692fifo(cs, ptr, count);
 187         cs->writeW6692(cs, W_D_CMDR, more ? W_D_CMDR_XMS : (W_D_CMDR_XMS | W_D_CMDR_XME));
 188         if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
 189                 debugl1(cs, "W6692_fill_fifo dbusytimer running");
 190                 del_timer(&cs->dbusytimer);
 191         }
 192         init_timer(&cs->dbusytimer);
 193         cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
 194         add_timer(&cs->dbusytimer);
 195         if (cs->debug & L1_DEB_ISAC_FIFO) {
 196                 char *t = cs->dlog;
 197
 198                 t += sprintf(t, "W6692_fill_fifo cnt %d", count);
 199                 QuickHex(t, ptr, count);
 200                 debugl1(cs, cs->dlog);
 201         }
 202 }
 203
 204 static void
 205 W6692B_empty_fifo(struct BCState *bcs, int count)
 206 {
 207         u_char *ptr;
 208         struct IsdnCardState *cs = bcs->cs;
 209
 210         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
 211                 debugl1(cs, "W6692B_empty_fifo");
 212
 213         if (bcs->hw.w6692.rcvidx + count > HSCX_BUFMAX) {
 214                 if (cs->debug & L1_DEB_WARN)
 215                         debugl1(cs, "W6692B_empty_fifo: incoming packet too large");
 216                 cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
 217                 bcs->hw.w6692.rcvidx = 0;
 218                 return;
 219         }
 220         ptr = bcs->hw.w6692.rcvbuf + bcs->hw.w6692.rcvidx;
 221         bcs->hw.w6692.rcvidx += count;
 222         READW6692BFIFO(cs, bcs->channel, ptr, count);
 223         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
 224         if (cs->debug & L1_DEB_HSCX_FIFO) {
 225                 char *t = bcs->blog;
 226
 227                 t += sprintf(t, "W6692B_empty_fifo %c cnt %d",
 228                              bcs->channel + '1', count);
 229                 QuickHex(t, ptr, count);
 230                 debugl1(cs, bcs->blog);
 231         }
 232 }
 233
 234 static void
 235 W6692B_fill_fifo(struct BCState *bcs)
 236 {
 237         struct IsdnCardState *cs = bcs->cs;
 238         int more, count;
 239         u_char *ptr;
 240
 241         if (!bcs->tx_skb)
 242                 return;
 243         if (bcs->tx_skb->len <= 0)
 244                 return;
 245
 246         more = (bcs->mode == L1_MODE_TRANS) ? 1 : 0;
 247         if (bcs->tx_skb->len > W_B_FIFO_THRESH) {
 248                 more = 1;
 249                 count = W_B_FIFO_THRESH;
 250         } else
 251                 count = bcs->tx_skb->len;
 252
 253         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
 254                 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " ": " last "), count);
 255
 256         ptr = bcs->tx_skb->data;
 257         skb_pull(bcs->tx_skb, count);
 258         bcs->tx_cnt -= count;
 259         bcs->hw.w6692.count += count;
 260         WRITEW6692BFIFO(cs, bcs->channel, ptr, count);
 261         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACT | W_B_CMDR_XMS | (more ? 0 : W_B_CMDR_XME));
 262         if (cs->debug & L1_DEB_HSCX_FIFO) {
 263                 char *t = bcs->blog;
 264
 265                 t += sprintf(t, "W6692B_fill_fifo %c cnt %d",
 266                              bcs->channel + '1', count);
 267                 QuickHex(t, ptr, count);
 268                 debugl1(cs, bcs->blog);
 269         }
 270 }
 271
 272 static void
 273 W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
 274 {
 275         u_char val;
 276         u_char r;
 277         struct BCState *bcs;
 278         struct sk_buff *skb;
 279         int count;
 280
 281         bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs+1);
 282         val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR);
 283         debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val);
 284
 285         if (!test_bit(BC_FLG_INIT, &bcs->Flag)) {
 286                 debugl1(cs, "W6692B not INIT yet");
 287                 return;
 288         }
 289         if (val & W_B_EXI_RME) {        /* RME */
 290                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 291                 if (r & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
 292                         if (cs->debug & L1_DEB_WARN)
 293                                 debugl1(cs, "W6692 B STAR %x", r);
 294                         if ((r & W_B_STAR_RDOV) && bcs->mode)
 295                                 if (cs->debug & L1_DEB_WARN)
 296                                         debugl1(cs, "W6692 B RDOV mode=%d",
 297                                                 bcs->mode);
 298                         if (r & W_B_STAR_CRCE)
 299                                 if (cs->debug & L1_DEB_WARN)
 300                                         debugl1(cs, "W6692 B CRC error");
 301                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
 302                 } else {
 303                         count = cs->BC_Read_Reg(cs, bchan, W_B_RBCL) & (W_B_FIFO_THRESH - 1);
 304                         if (count == 0)
 305                                 count = W_B_FIFO_THRESH;
 306                         W6692B_empty_fifo(bcs, count);
 307                         if ((count = bcs->hw.w6692.rcvidx) > 0) {
 308                                 if (cs->debug & L1_DEB_HSCX_FIFO)
 309                                         debugl1(cs, "W6692 Bchan Frame %d", count);
 310                                 if (!(skb = dev_alloc_skb(count)))
 311                                         printk(KERN_WARNING "W6692: Bchan receive out of memory\n");
 312                                 else {
 313                                         memcpy(skb_put(skb, count), bcs->hw.w6692.rcvbuf, count);
 314                                         skb_queue_tail(&bcs->rqueue, skb);
 315                                 }
 316                         }
 317                 }
 318                 bcs->hw.w6692.rcvidx = 0;
 319                 schedule_event(bcs, B_RCVBUFREADY);
 320         }
 321         if (val & W_B_EXI_RMR) {        /* RMR */
 322                 W6692B_empty_fifo(bcs, W_B_FIFO_THRESH);
 323                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 324                 if (r & W_B_STAR_RDOV) {
 325                         if (cs->debug & L1_DEB_WARN)
 326                                 debugl1(cs, "W6692 B RDOV(RMR) mode=%d",bcs->mode);
 327                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
 328                         if (bcs->mode != L1_MODE_TRANS)
 329                                 bcs->hw.w6692.rcvidx = 0;
 330                 }
 331                 if (bcs->mode == L1_MODE_TRANS) {
 332                         /* receive audio data */
 333                         if (!(skb = dev_alloc_skb(W_B_FIFO_THRESH)))
 334                                 printk(KERN_WARNING "HiSax: receive out of memory\n");
 335                         else {
 336                                 memcpy(skb_put(skb, W_B_FIFO_THRESH), bcs->hw.w6692.rcvbuf, W_B_FIFO_THRESH);
 337                                 skb_queue_tail(&bcs->rqueue, skb);
 338                         }
 339                         bcs->hw.w6692.rcvidx = 0;
 340                         schedule_event(bcs, B_RCVBUFREADY);
 341                 }
 342         }
 343         if (val & W_B_EXI_XDUN) {       /* XDUN */
 344                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
 345                 if (cs->debug & L1_DEB_WARN)
 346                         debugl1(cs, "W6692 B EXIR %x Lost TX", val);
 347                 if (bcs->mode == 1)
 348                         W6692B_fill_fifo(bcs);
 349                 else {
 350                         /* Here we lost an TX interrupt, so
 351                            * restart transmitting the whole frame.
 352                          */
 353                         if (bcs->tx_skb) {
 354                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
 355                                 bcs->tx_cnt += bcs->hw.w6692.count;
 356                                 bcs->hw.w6692.count = 0;
 357                         }
 358                 }
 359                 return;
 360         }
 361         if (val & W_B_EXI_XFR) {        /* XFR */
 362                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 363                 if (r & W_B_STAR_XDOW) {
 364                         if (cs->debug & L1_DEB_WARN)
 365                                 debugl1(cs, "W6692 B STAR %x XDOW", r);
 366                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
 367                         if (bcs->tx_skb && (bcs->mode != 1)) {
 368                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
 369                                 bcs->tx_cnt += bcs->hw.w6692.count;
 370                                 bcs->hw.w6692.count = 0;
 371                         }
 372                 }
 373                 if (bcs->tx_skb) {
 374                         if (bcs->tx_skb->len) {
 375                                 W6692B_fill_fifo(bcs);
 376                                 return;
 377                         } else {
 378                                 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
 379                                         (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
 380                                         u_long  flags;
 381                                         spin_lock_irqsave(&bcs->aclock, flags);
 382                                         bcs->ackcnt += bcs->hw.w6692.count;
 383                                         spin_unlock_irqrestore(&bcs->aclock, flags);
 384                                         schedule_event(bcs, B_ACKPENDING);
 385                                 }
 386                                 dev_kfree_skb_irq(bcs->tx_skb);
 387                                 bcs->hw.w6692.count = 0;
 388                                 bcs->tx_skb = NULL;
 389                         }
 390                 }
 391                 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
 392                         bcs->hw.w6692.count = 0;
 393                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 394                         W6692B_fill_fifo(bcs);
 395                 } else {
 396                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 397                         schedule_event(bcs, B_XMTBUFREADY);
 398                 }
 399         }
 400 }
 401
 402 static irqreturn_t
 403 W6692_interrupt(int intno, void *dev_id)
 404 {
 405         struct IsdnCardState    *cs = dev_id;
 406         u_char                  val, exval, v1;
 407         struct sk_buff          *skb;
 408         u_int                   count;
 409         u_long                  flags;
 410         int                     icnt = 5;
 411
 412         spin_lock_irqsave(&cs->lock, flags);
 413         val = cs->readW6692(cs, W_ISTA);
 414         if (!val) {
 415                 spin_unlock_irqrestore(&cs->lock, flags);
 416                 return IRQ_NONE;
 417         }
 418       StartW6692:
 419         if (cs->debug & L1_DEB_ISAC)
 420                 debugl1(cs, "W6692 ISTA %x", val);
 421
 422         if (val & W_INT_D_RME) {        /* RME */
 423                 exval = cs->readW6692(cs, W_D_RSTA);
 424                 if (exval & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
 425                         if (exval & W_D_RSTA_RDOV)
 426                                 if (cs->debug & L1_DEB_WARN)
 427                                         debugl1(cs, "W6692 RDOV");
 428                         if (exval & W_D_RSTA_CRCE)
 429                                 if (cs->debug & L1_DEB_WARN)
 430                                         debugl1(cs, "W6692 D-channel CRC error");
 431                         if (exval & W_D_RSTA_RMB)
 432                                 if (cs->debug & L1_DEB_WARN)
 433                                         debugl1(cs, "W6692 D-channel ABORT");
 434                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
 435                 } else {
 436                         count = cs->readW6692(cs, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
 437                         if (count == 0)
 438                                 count = W_D_FIFO_THRESH;
 439                         W6692_empty_fifo(cs, count);
 440                         if ((count = cs->rcvidx) > 0) {
 441                                 cs->rcvidx = 0;
 442                                 if (!(skb = alloc_skb(count, GFP_ATOMIC)))
 443                                         printk(KERN_WARNING "HiSax: D receive out of memory\n");
 444                                 else {
 445                                         memcpy(skb_put(skb, count), cs->rcvbuf, count);
 446                                         skb_queue_tail(&cs->rq, skb);
 447                                 }
 448                         }
 449                 }
 450                 cs->rcvidx = 0;
 451                 schedule_event(cs, D_RCVBUFREADY);
 452         }
 453         if (val & W_INT_D_RMR) {        /* RMR */
 454                 W6692_empty_fifo(cs, W_D_FIFO_THRESH);
 455         }
 456         if (val & W_INT_D_XFR) {        /* XFR */
 457                 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 458                         del_timer(&cs->dbusytimer);
 459                 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 460                         schedule_event(cs, D_CLEARBUSY);
 461                 if (cs->tx_skb) {
 462                         if (cs->tx_skb->len) {
 463                                 W6692_fill_fifo(cs);
 464                                 goto afterXFR;
 465                         } else {
 466                                 dev_kfree_skb_irq(cs->tx_skb);
 467                                 cs->tx_cnt = 0;
 468                                 cs->tx_skb = NULL;
 469                         }
 470                 }
 471                 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
 472                         cs->tx_cnt = 0;
 473                         W6692_fill_fifo(cs);
 474                 } else
 475                         schedule_event(cs, D_XMTBUFREADY);
 476         }
 477       afterXFR:
 478         if (val & (W_INT_XINT0 | W_INT_XINT1)) {        /* XINT0/1 - never */
 479                 if (cs->debug & L1_DEB_ISAC)
 480                         debugl1(cs, "W6692 spurious XINT!");
 481         }
 482         if (val & W_INT_D_EXI) {        /* EXI */
 483                 exval = cs->readW6692(cs, W_D_EXIR);
 484                 if (cs->debug & L1_DEB_WARN)
 485                         debugl1(cs, "W6692 D_EXIR %02x", exval);
 486                 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {    /* Transmit underrun/collision */
 487                         debugl1(cs, "W6692 D-chan underrun/collision");
 488                         printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL\n");
 489                         if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 490                                 del_timer(&cs->dbusytimer);
 491                         if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 492                                 schedule_event(cs, D_CLEARBUSY);
 493                         if (cs->tx_skb) {       /* Restart frame */
 494                                 skb_push(cs->tx_skb, cs->tx_cnt);
 495                                 cs->tx_cnt = 0;
 496                                 W6692_fill_fifo(cs);
 497                         } else {
 498                                 printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL no skb\n");
 499                                 debugl1(cs, "W6692 XDUN/XCOL no skb");
 500                                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);
 501                         }
 502                 }
 503                 if (exval & W_D_EXI_RDOV) {     /* RDOV */
 504                         debugl1(cs, "W6692 D-channel RDOV");
 505                         printk(KERN_WARNING "HiSax: W6692 D-RDOV\n");
 506                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST);
 507                 }
 508                 if (exval & W_D_EXI_TIN2) {     /* TIN2 - never */
 509                         debugl1(cs, "W6692 spurious TIN2 interrupt");
 510                 }
 511                 if (exval & W_D_EXI_MOC) {      /* MOC - not supported */
 512                         debugl1(cs, "W6692 spurious MOC interrupt");
 513                         v1 = cs->readW6692(cs, W_MOSR);
 514                         debugl1(cs, "W6692 MOSR %02x", v1);
 515                 }
 516                 if (exval & W_D_EXI_ISC) {      /* ISC - Level1 change */
 517                         v1 = cs->readW6692(cs, W_CIR);
 518                         if (cs->debug & L1_DEB_ISAC)
 519                                 debugl1(cs, "W6692 ISC CIR=0x%02X", v1);
 520                         if (v1 & W_CIR_ICC) {
 521                                 cs->dc.w6692.ph_state = v1 & W_CIR_COD_MASK;
 522                                 if (cs->debug & L1_DEB_ISAC)
 523                                         debugl1(cs, "ph_state_change %x", cs->dc.w6692.ph_state);
 524                                 schedule_event(cs, D_L1STATECHANGE);
 525                         }
 526                         if (v1 & W_CIR_SCC) {
 527                                 v1 = cs->readW6692(cs, W_SQR);
 528                                 debugl1(cs, "W6692 SCC SQR=0x%02X", v1);
 529                         }
 530                 }
 531                 if (exval & W_D_EXI_WEXP) {
 532                         debugl1(cs, "W6692 spurious WEXP interrupt!");
 533                 }
 534                 if (exval & W_D_EXI_TEXP) {
 535                         debugl1(cs, "W6692 spurious TEXP interrupt!");
 536                 }
 537         }
 538         if (val & W_INT_B1_EXI) {
 539                 debugl1(cs, "W6692 B channel 1 interrupt");
 540                 W6692B_interrupt(cs, 0);
 541         }
 542         if (val & W_INT_B2_EXI) {
 543                 debugl1(cs, "W6692 B channel 2 interrupt");
 544                 W6692B_interrupt(cs, 1);
 545         }
 546         val = cs->readW6692(cs, W_ISTA);
 547         if (val && icnt) {
 548                 icnt--;
 549                 goto StartW6692;
 550         }
 551         if (!icnt) {
 552                 printk(KERN_WARNING "W6692 IRQ LOOP\n");
 553                 cs->writeW6692(cs, W_IMASK, 0xff);
 554         }
 555         spin_unlock_irqrestore(&cs->lock, flags);
 556         return IRQ_HANDLED;
 557 }
 558
 559 static void
 560 W6692_l1hw(struct PStack *st, int pr, void *arg)
 561 {
 562         struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
 563         struct sk_buff *skb = arg;
 564         u_long flags;
 565         int val;
 566
 567         switch (pr) {
 568                 case (PH_DATA | REQUEST):
 569                         if (cs->debug & DEB_DLOG_HEX)
 570                                 LogFrame(cs, skb->data, skb->len);
 571                         if (cs->debug & DEB_DLOG_VERBOSE)
 572                                 dlogframe(cs, skb, 0);
 573                         spin_lock_irqsave(&cs->lock, flags);
 574                         if (cs->tx_skb) {
 575                                 skb_queue_tail(&cs->sq, skb);
 576 #ifdef L2FRAME_DEBUG            /* psa */
 577                                 if (cs->debug & L1_DEB_LAPD)
 578                                         Logl2Frame(cs, skb, "PH_DATA Queued", 0);
 579 #endif
 580                         } else {
 581                                 cs->tx_skb = skb;
 582                                 cs->tx_cnt = 0;
 583 #ifdef L2FRAME_DEBUG            /* psa */
 584                                 if (cs->debug & L1_DEB_LAPD)
 585                                         Logl2Frame(cs, skb, "PH_DATA", 0);
 586 #endif
 587                                 W6692_fill_fifo(cs);
 588                         }
 589                         spin_unlock_irqrestore(&cs->lock, flags);
 590                         break;
 591                 case (PH_PULL | INDICATION):
 592                         spin_lock_irqsave(&cs->lock, flags);
 593                         if (cs->tx_skb) {
 594                                 if (cs->debug & L1_DEB_WARN)
 595                                         debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
 596                                 skb_queue_tail(&cs->sq, skb);
 597                                 spin_unlock_irqrestore(&cs->lock, flags);
 598                                 break;
 599                         }
 600                         if (cs->debug & DEB_DLOG_HEX)
 601                                 LogFrame(cs, skb->data, skb->len);
 602                         if (cs->debug & DEB_DLOG_VERBOSE)
 603                                 dlogframe(cs, skb, 0);
 604                         cs->tx_skb = skb;
 605                         cs->tx_cnt = 0;
 606 #ifdef L2FRAME_DEBUG            /* psa */
 607                         if (cs->debug & L1_DEB_LAPD)
 608                                 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
 609 #endif
 610                         W6692_fill_fifo(cs);
 611                         spin_unlock_irqrestore(&cs->lock, flags);
 612                         break;
 613                 case (PH_PULL | REQUEST):
 614 #ifdef L2FRAME_DEBUG            /* psa */
 615                         if (cs->debug & L1_DEB_LAPD)
 616                                 debugl1(cs, "-> PH_REQUEST_PULL");
 617 #endif
 618                         if (!cs->tx_skb) {
 619                                 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 620                                 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
 621                         } else
 622                                 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 623                         break;
 624                 case (HW_RESET | REQUEST):
 625                         spin_lock_irqsave(&cs->lock, flags);
 626                         if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
 627                                 ph_command(cs, W_L1CMD_ECK);
 628                                 spin_unlock_irqrestore(&cs->lock, flags);
 629                         } else {
 630                                 ph_command(cs, W_L1CMD_RST);
 631                                 cs->dc.w6692.ph_state = W_L1CMD_RST;
 632                                 spin_unlock_irqrestore(&cs->lock, flags);
 633                                 W6692_new_ph(cs);
 634                         }
 635                         break;
 636                 case (HW_ENABLE | REQUEST):
 637                         spin_lock_irqsave(&cs->lock, flags);
 638                         ph_command(cs, W_L1CMD_ECK);
 639                         spin_unlock_irqrestore(&cs->lock, flags);
 640                         break;
 641                 case (HW_INFO3 | REQUEST):
 642                         spin_lock_irqsave(&cs->lock, flags);
 643                         ph_command(cs, W_L1CMD_AR8);
 644                         spin_unlock_irqrestore(&cs->lock, flags);
 645                         break;
 646                 case (HW_TESTLOOP | REQUEST):
 647                         val = 0;
 648                         if (1 & (long) arg)
 649                                 val |= 0x0c;
 650                         if (2 & (long) arg)
 651                                 val |= 0x3;
 652                         /* !!! not implemented yet */
 653                         break;
 654                 case (HW_DEACTIVATE | RESPONSE):
 655                         skb_queue_purge(&cs->rq);
 656                         skb_queue_purge(&cs->sq);
 657                         if (cs->tx_skb) {
 658                                 dev_kfree_skb_any(cs->tx_skb);
 659                                 cs->tx_skb = NULL;
 660                         }
 661                         if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 662                                 del_timer(&cs->dbusytimer);
 663                         if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 664                                 schedule_event(cs, D_CLEARBUSY);
 665                         break;
 666                 default:
 667                         if (cs->debug & L1_DEB_WARN)
 668                                 debugl1(cs, "W6692_l1hw unknown %04x", pr);
 669                         break;
 670         }
 671 }
 672
 673 static void
 674 setstack_W6692(struct PStack *st, struct IsdnCardState *cs)
 675 {
 676         st->l1.l1hw = W6692_l1hw;
 677 }
 678
 679 static void
 680 DC_Close_W6692(struct IsdnCardState *cs)
 681 {
 682 }
 683
 684 static void
 685 dbusy_timer_handler(struct IsdnCardState *cs)
 686 {
 687         struct PStack *stptr;
 688         int rbch, star;
 689         u_long flags;
 690
 691         spin_lock_irqsave(&cs->lock, flags);
 692         if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
 693                 rbch = cs->readW6692(cs, W_D_RBCH);
 694                 star = cs->readW6692(cs, W_D_STAR);
 695                 if (cs->debug)
 696                         debugl1(cs, "D-Channel Busy D_RBCH %02x D_STAR %02x",
 697                                 rbch, star);
 698                 if (star & W_D_STAR_XBZ) {      /* D-Channel Busy */
 699                         test_and_set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
 700                         stptr = cs->stlist;
 701                         while (stptr != NULL) {
 702                                 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL);
 703                                 stptr = stptr->next;
 704                         }
 705                 } else {
 706                         /* discard frame; reset transceiver */
 707                         test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags);
 708                         if (cs->tx_skb) {
 709                                 dev_kfree_skb_any(cs->tx_skb);
 710                                 cs->tx_cnt = 0;
 711                                 cs->tx_skb = NULL;
 712                         } else {
 713                                 printk(KERN_WARNING "HiSax: W6692 D-Channel Busy no skb\n");
 714                                 debugl1(cs, "D-Channel Busy no skb");
 715                         }
 716                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);    /* Transmitter reset */
 717                         spin_unlock_irqrestore(&cs->lock, flags);
 718                         cs->irq_func(cs->irq, cs);
 719                         return;
 720                 }
 721         }
 722         spin_unlock_irqrestore(&cs->lock, flags);
 723 }
 724
 725 static void
 726 W6692Bmode(struct BCState *bcs, int mode, int bchan)
 727 {
 728         struct IsdnCardState *cs = bcs->cs;
 729
 730         if (cs->debug & L1_DEB_HSCX)
 731                 debugl1(cs, "w6692 %c mode %d ichan %d",
 732                         '1' + bchan, mode, bchan);
 733         bcs->mode = mode;
 734         bcs->channel = bchan;
 735         bcs->hw.w6692.bchan = bchan;
 736
 737         switch (mode) {
 738                 case (L1_MODE_NULL):
 739                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
 740                         break;
 741                 case (L1_MODE_TRANS):
 742                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
 743                         break;
 744                 case (L1_MODE_HDLC):
 745                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
 746                         cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
 747                         cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
 748                         break;
 749         }
 750         if (mode)
 751                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST |
 752                                  W_B_CMDR_RACT | W_B_CMDR_XRST);
 753         cs->BC_Write_Reg(cs, bchan, W_B_EXIM, 0x00);
 754 }
 755
 756 static void
 757 W6692_l2l1(struct PStack *st, int pr, void *arg)
 758 {
 759         struct sk_buff *skb = arg;
 760         struct BCState *bcs = st->l1.bcs;
 761         u_long flags;
 762
 763         switch (pr) {
 764                 case (PH_DATA | REQUEST):
 765                         spin_lock_irqsave(&bcs->cs->lock, flags);
 766                         if (bcs->tx_skb) {
 767                                 skb_queue_tail(&bcs->squeue, skb);
 768                         } else {
 769                                 bcs->tx_skb = skb;
 770                                 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 771                                 bcs->hw.w6692.count = 0;
 772                                 bcs->cs->BC_Send_Data(bcs);
 773                         }
 774                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 775                         break;
 776                 case (PH_PULL | INDICATION):
 777                         if (bcs->tx_skb) {
 778                                 printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
 779                                 break;
 780                         }
 781                         spin_lock_irqsave(&bcs->cs->lock, flags);
 782                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 783                         bcs->tx_skb = skb;
 784                         bcs->hw.w6692.count = 0;
 785                         bcs->cs->BC_Send_Data(bcs);
 786                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 787                         break;
 788                 case (PH_PULL | REQUEST):
 789                         if (!bcs->tx_skb) {
 790                                 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 791                                 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
 792                         } else
 793                                 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 794                         break;
 795                 case (PH_ACTIVATE | REQUEST):
 796                         spin_lock_irqsave(&bcs->cs->lock, flags);
 797                         test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
 798                         W6692Bmode(bcs, st->l1.mode, st->l1.bc);
 799                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 800                         l1_msg_b(st, pr, arg);
 801                         break;
 802                 case (PH_DEACTIVATE | REQUEST):
 803                         l1_msg_b(st, pr, arg);
 804                         break;
 805                 case (PH_DEACTIVATE | CONFIRM):
 806                         spin_lock_irqsave(&bcs->cs->lock, flags);
 807                         test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
 808                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 809                         W6692Bmode(bcs, 0, st->l1.bc);
 810                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 811                         st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
 812                         break;
 813         }
 814 }
 815
 816 static void
 817 close_w6692state(struct BCState *bcs)
 818 {
 819         W6692Bmode(bcs, 0, bcs->channel);
 820         if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
 821                 kfree(bcs->hw.w6692.rcvbuf);
 822                 bcs->hw.w6692.rcvbuf = NULL;
 823                 kfree(bcs->blog);
 824                 bcs->blog = NULL;
 825                 skb_queue_purge(&bcs->rqueue);
 826                 skb_queue_purge(&bcs->squeue);
 827                 if (bcs->tx_skb) {
 828                         dev_kfree_skb_any(bcs->tx_skb);
 829                         bcs->tx_skb = NULL;
 830                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 831                 }
 832         }
 833 }
 834
 835 static int
 836 open_w6692state(struct IsdnCardState *cs, struct BCState *bcs)
 837 {
 838         if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
 839                 if (!(bcs->hw.w6692.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
 840                         printk(KERN_WARNING
 841                                "HiSax: No memory for w6692.rcvbuf\n");
 842                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
 843                         return (1);
 844                 }
 845                 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
 846                         printk(KERN_WARNING
 847                                "HiSax: No memory for bcs->blog\n");
 848                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
 849                         kfree(bcs->hw.w6692.rcvbuf);
 850                         bcs->hw.w6692.rcvbuf = NULL;
 851                         return (2);
 852                 }
 853                 skb_queue_head_init(&bcs->rqueue);
 854                 skb_queue_head_init(&bcs->squeue);
 855         }
 856         bcs->tx_skb = NULL;
 857         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 858         bcs->event = 0;
 859         bcs->hw.w6692.rcvidx = 0;
 860         bcs->tx_cnt = 0;
 861         return (0);
 862 }
 863
 864 static int
 865 setstack_w6692(struct PStack *st, struct BCState *bcs)
 866 {
 867         bcs->channel = st->l1.bc;
 868         if (open_w6692state(st->l1.hardware, bcs))
 869                 return (-1);
 870         st->l1.bcs = bcs;
 871         st->l2.l2l1 = W6692_l2l1;
 872         setstack_manager(st);
 873         bcs->st = st;
 874         setstack_l1_B(st);
 875         return (0);
 876 }
 877
 878 static void resetW6692(struct IsdnCardState *cs)
 879 {
 880         cs->writeW6692(cs, W_D_CTL, W_D_CTL_SRST);
 881         mdelay(10);
 882         cs->writeW6692(cs, W_D_CTL, 0x00);
 883         mdelay(10);
 884         cs->writeW6692(cs, W_IMASK, 0xff);
 885         cs->writeW6692(cs, W_D_SAM, 0xff);
 886         cs->writeW6692(cs, W_D_TAM, 0xff);
 887         cs->writeW6692(cs, W_D_EXIM, 0x00);
 888         cs->writeW6692(cs, W_D_MODE, W_D_MODE_RACT);
 889         cs->writeW6692(cs, W_IMASK, 0x18);
 890         if (cs->subtyp == W6692_USR) {
 891                 /* seems that USR implemented some power control features
 892                  * Pin 79 is connected to the oscilator circuit so we
 893                  * have to handle it here
 894                  */
 895                 cs->writeW6692(cs, W_PCTL, 0x80);
 896                 cs->writeW6692(cs, W_XDATA, 0x00);
 897         }
 898 }
 899
 900 static void initW6692(struct IsdnCardState *cs, int part)
 901 {
 902         if (part & 1) {
 903                 cs->setstack_d = setstack_W6692;
 904                 cs->DC_Close = DC_Close_W6692;
 905                 cs->dbusytimer.function = (void *) dbusy_timer_handler;
 906                 cs->dbusytimer.data = (long) cs;
 907                 init_timer(&cs->dbusytimer);
 908                 resetW6692(cs);
 909                 ph_command(cs, W_L1CMD_RST);
 910                 cs->dc.w6692.ph_state = W_L1CMD_RST;
 911                 W6692_new_ph(cs);
 912                 ph_command(cs, W_L1CMD_ECK);
 913
 914                 cs->bcs[0].BC_SetStack = setstack_w6692;
 915                 cs->bcs[1].BC_SetStack = setstack_w6692;
 916                 cs->bcs[0].BC_Close = close_w6692state;
 917                 cs->bcs[1].BC_Close = close_w6692state;
 918                 W6692Bmode(cs->bcs, 0, 0);
 919                 W6692Bmode(cs->bcs + 1, 0, 0);
 920         }
 921         if (part & 2) {
 922                 /* Reenable all IRQ */
 923                 cs->writeW6692(cs, W_IMASK, 0x18);
 924                 cs->writeW6692(cs, W_D_EXIM, 0x00);
 925                 cs->BC_Write_Reg(cs, 0, W_B_EXIM, 0x00);
 926                 cs->BC_Write_Reg(cs, 1, W_B_EXIM, 0x00);
 927                 /* Reset D-chan receiver and transmitter */
 928                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
 929         }
 930 }
 931
 932 /* Interface functions */
 933
 934 static u_char
 935 ReadW6692(struct IsdnCardState *cs, u_char offset)
 936 {
 937         return (inb(cs->hw.w6692.iobase + offset));
 938 }
 939
 940 static void
 941 WriteW6692(struct IsdnCardState *cs, u_char offset, u_char value)
 942 {
 943         outb(value, cs->hw.w6692.iobase + offset);
 944 }
 945
 946 static void
 947 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
 948 {
 949         insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size);
 950 }
 951
 952 static void
 953 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
 954 {
 955         outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size);
 956 }
 957
 958 static u_char
 959 ReadW6692B(struct IsdnCardState *cs, int bchan, u_char offset)
 960 {
 961         return (inb(cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset));
 962 }
 963
 964 static void
 965 WriteW6692B(struct IsdnCardState *cs, int bchan, u_char offset, u_char value)
 966 {
 967         outb(value, cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset);
 968 }
 969
 970 static int
 971 w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg)
 972 {
 973         switch (mt) {
 974                 case CARD_RESET:
 975                         resetW6692(cs);
 976                         return (0);
 977                 case CARD_RELEASE:
 978                         cs->writeW6692(cs, W_IMASK, 0xff);
 979                         release_region(cs->hw.w6692.iobase, 256);
 980                         if (cs->subtyp == W6692_USR) {
 981                                 cs->writeW6692(cs, W_XDATA, 0x04);
 982                         }
 983                         return (0);
 984                 case CARD_INIT:
 985                         initW6692(cs, 3);
 986                         return (0);
 987                 case CARD_TEST:
 988                         return (0);
 989         }
 990         return (0);
 991 }
 992
 993 static int id_idx ;
 994
 995 static struct pci_dev *dev_w6692 __devinitdata = NULL;
 996
 997 int __devinit
 998 setup_w6692(struct IsdnCard *card)
 999 {
1000         struct IsdnCardState *cs = card->cs;
1001         char tmp[64];
1002         u_char found = 0;
1003         u_char pci_irq = 0;
1004         u_int pci_ioaddr = 0;
1005
1006         strcpy(tmp, w6692_revision);
1007         printk(KERN_INFO "HiSax: W6692 driver Rev. %s\n", HiSax_getrev(tmp));
1008         if (cs->typ != ISDN_CTYPE_W6692)
1009                 return (0);
1010
1011         while (id_list[id_idx].vendor_id) {
1012                 dev_w6692 = pci_find_device(id_list[id_idx].vendor_id,
1013                                             id_list[id_idx].device_id,
1014                                             dev_w6692);
1015                 if (dev_w6692) {
1016                         if (pci_enable_device(dev_w6692))
1017                                 continue;
1018                         cs->subtyp = id_idx;
1019                         break;
1020                 }
1021                 id_idx++;
1022         }
1023         if (dev_w6692) {
1024                 found = 1;
1025                 pci_irq = dev_w6692->irq;
1026                 /* I think address 0 is allways the configuration area */
1027                 /* and address 1 is the real IO space KKe 03.09.99 */
1028                 pci_ioaddr = pci_resource_start(dev_w6692, 1);
1029                 /* USR ISDN PCI card TA need some special handling */
1030                 if (cs->subtyp == W6692_WINBOND) {
1031                         if ((W6692_SV_USR == dev_w6692->subsystem_vendor) &&
1032                             (W6692_SD_USR == dev_w6692->subsystem_device)) {
1033                                 cs->subtyp = W6692_USR;
1034                         }
1035                 }
1036         }
1037         if (!found) {
1038                 printk(KERN_WARNING "W6692: No PCI card found\n");
1039                 return (0);
1040         }
1041         cs->irq = pci_irq;
1042         if (!cs->irq) {
1043                 printk(KERN_WARNING "W6692: No IRQ for PCI card found\n");
1044                 return (0);
1045         }
1046         if (!pci_ioaddr) {
1047                 printk(KERN_WARNING "W6692: NO I/O Base Address found\n");
1048                 return (0);
1049         }
1050         cs->hw.w6692.iobase = pci_ioaddr;
1051         printk(KERN_INFO "Found: %s %s, I/O base: 0x%x, irq: %d\n",
1052                id_list[cs->subtyp].vendor_name, id_list[cs->subtyp].card_name,
1053                pci_ioaddr, pci_irq);
1054         if (!request_region(cs->hw.w6692.iobase, 256, id_list[cs->subtyp].card_name)) {
1055                 printk(KERN_WARNING
1056                        "HiSax: %s I/O ports %x-%x already in use\n",
1057                        id_list[cs->subtyp].card_name,
1058                        cs->hw.w6692.iobase,
1059                        cs->hw.w6692.iobase + 255);
1060                 return (0);
1061         }
1062
1063         printk(KERN_INFO
1064                "HiSax: %s config irq:%d I/O:%x\n",
1065                id_list[cs->subtyp].card_name, cs->irq,
1066                cs->hw.w6692.iobase);
1067
1068         INIT_WORK(&cs->tqueue, W6692_bh);
1069         cs->readW6692 = &ReadW6692;
1070         cs->writeW6692 = &WriteW6692;
1071         cs->readisacfifo = &ReadISACfifo;
1072         cs->writeisacfifo = &WriteISACfifo;
1073         cs->BC_Read_Reg = &ReadW6692B;
1074         cs->BC_Write_Reg = &WriteW6692B;
1075         cs->BC_Send_Data = &W6692B_fill_fifo;
1076         cs->cardmsg = &w6692_card_msg;
1077         cs->irq_func = &W6692_interrupt;
1078         cs->irq_flags |= IRQF_SHARED;
1079         W6692Version(cs, "W6692:");
1080         printk(KERN_INFO "W6692 ISTA=0x%X\n", ReadW6692(cs, W_ISTA));
1081         printk(KERN_INFO "W6692 IMASK=0x%X\n", ReadW6692(cs, W_IMASK));
1082         printk(KERN_INFO "W6692 D_EXIR=0x%X\n", ReadW6692(cs, W_D_EXIR));
1083         printk(KERN_INFO "W6692 D_EXIM=0x%X\n", ReadW6692(cs, W_D_EXIM));
1084         printk(KERN_INFO "W6692 D_RSTA=0x%X\n", ReadW6692(cs, W_D_RSTA));
1085         return (1);
1086 }