2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
21 #include <mach/board.h>
23 #include <mach/gpio.h>
25 #include <video/atmel_lcdc.h>
27 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
33 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
35 #if defined(CONFIG_ARCH_AT91)
36 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
37 | FBINFO_PARTIAL_PAN_OK \
38 | FBINFO_HWACCEL_YPAN)
40 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
41 struct fb_var_screeninfo *var)
45 #elif defined(CONFIG_AVR32)
46 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
47 | FBINFO_PARTIAL_PAN_OK \
48 | FBINFO_HWACCEL_XPAN \
49 | FBINFO_HWACCEL_YPAN)
51 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
52 struct fb_var_screeninfo *var)
57 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
59 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
60 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
61 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
63 /* Update configuration */
64 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
65 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
66 | ATMEL_LCDC_DMAUPDT);
70 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
71 | ATMEL_LCDC_POL_POSITIVE
72 | ATMEL_LCDC_ENA_PWMENABLE;
74 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
76 /* some bl->props field just changed */
77 static int atmel_bl_update_status(struct backlight_device *bl)
79 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
80 int power = sinfo->bl_power;
81 int brightness = bl->props.brightness;
83 /* REVISIT there may be a meaningful difference between
84 * fb_blank and power ... there seem to be some cases
85 * this doesn't handle correctly.
87 if (bl->props.fb_blank != sinfo->bl_power)
88 power = bl->props.fb_blank;
89 else if (bl->props.power != sinfo->bl_power)
90 power = bl->props.power;
92 if (brightness < 0 && power == FB_BLANK_UNBLANK)
93 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
94 else if (power != FB_BLANK_UNBLANK)
97 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
98 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
99 brightness ? contrast_ctr : 0);
101 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
106 static int atmel_bl_get_brightness(struct backlight_device *bl)
108 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
110 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
113 static struct backlight_ops atmel_lcdc_bl_ops = {
114 .update_status = atmel_bl_update_status,
115 .get_brightness = atmel_bl_get_brightness,
118 static void init_backlight(struct atmel_lcdfb_info *sinfo)
120 struct backlight_device *bl;
122 sinfo->bl_power = FB_BLANK_UNBLANK;
124 if (sinfo->backlight)
127 bl = backlight_device_register("backlight", &sinfo->pdev->dev,
128 sinfo, &atmel_lcdc_bl_ops);
130 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
134 sinfo->backlight = bl;
136 bl->props.power = FB_BLANK_UNBLANK;
137 bl->props.fb_blank = FB_BLANK_UNBLANK;
138 bl->props.max_brightness = 0xff;
139 bl->props.brightness = atmel_bl_get_brightness(bl);
142 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
144 if (sinfo->backlight)
145 backlight_device_unregister(sinfo->backlight);
150 static void init_backlight(struct atmel_lcdfb_info *sinfo)
152 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
155 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
161 static void init_contrast(struct atmel_lcdfb_info *sinfo)
163 /* have some default contrast/backlight settings */
164 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
165 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
167 if (sinfo->lcdcon_is_backlight)
168 init_backlight(sinfo);
172 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
173 .type = FB_TYPE_PACKED_PIXELS,
174 .visual = FB_VISUAL_TRUECOLOR,
178 .accel = FB_ACCEL_NONE,
181 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
185 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
189 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
191 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
194 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
195 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
196 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
197 value = DIV_ROUND_UP(value, 4);
199 value = DIV_ROUND_UP(value, 8);
205 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
207 /* Turn off the LCD controller and the DMA controller */
208 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
209 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
211 /* Wait for the LCDC core to become idle */
212 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
215 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
218 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
220 atmel_lcdfb_stop_nowait(sinfo);
222 /* Wait for DMA engine to become idle... */
223 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
227 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
229 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
230 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
231 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
235 static void atmel_lcdfb_update_dma(struct fb_info *info,
236 struct fb_var_screeninfo *var)
238 struct atmel_lcdfb_info *sinfo = info->par;
239 struct fb_fix_screeninfo *fix = &info->fix;
240 unsigned long dma_addr;
242 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
243 + var->xoffset * var->bits_per_pixel / 8);
247 /* Set framebuffer DMA base address and pixel offset */
248 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
250 atmel_lcdfb_update_dma2d(sinfo, var);
253 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
255 struct fb_info *info = sinfo->info;
257 dma_free_writecombine(info->device, info->fix.smem_len,
258 info->screen_base, info->fix.smem_start);
262 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
263 * @sinfo: the frame buffer to allocate memory for
265 * This function is called only from the atmel_lcdfb_probe()
266 * so no locking by fb_info->mm_lock around smem_len setting is needed.
268 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
270 struct fb_info *info = sinfo->info;
271 struct fb_var_screeninfo *var = &info->var;
272 unsigned int smem_len;
274 smem_len = (var->xres_virtual * var->yres_virtual
275 * ((var->bits_per_pixel + 7) / 8));
276 info->fix.smem_len = max(smem_len, sinfo->smem_len);
278 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
279 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
281 if (!info->screen_base) {
285 memset(info->screen_base, 0, info->fix.smem_len);
290 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
291 struct fb_info *info)
293 struct fb_videomode varfbmode;
294 const struct fb_videomode *fbmode = NULL;
296 fb_var_to_videomode(&varfbmode, var);
297 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
299 fb_videomode_to_var(var, fbmode);
305 * atmel_lcdfb_check_var - Validates a var passed in.
306 * @var: frame buffer variable screen structure
307 * @info: frame buffer structure that represents a single frame buffer
309 * Checks to see if the hardware supports the state requested by
310 * var passed in. This function does not alter the hardware
311 * state!!! This means the data stored in struct fb_info and
312 * struct atmel_lcdfb_info do not change. This includes the var
313 * inside of struct fb_info. Do NOT change these. This function
314 * can be called on its own if we intent to only test a mode and
315 * not actually set it. The stuff in modedb.c is a example of
316 * this. If the var passed in is slightly off by what the
317 * hardware can support then we alter the var PASSED in to what
318 * we can do. If the hardware doesn't support mode change a
319 * -EINVAL will be returned by the upper layers. You don't need
320 * to implement this function then. If you hardware doesn't
321 * support changing the resolution then this function is not
322 * needed. In this case the driver would just provide a var that
323 * represents the static state the screen is in.
325 * Returns negative errno on error, or zero on success.
327 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
328 struct fb_info *info)
330 struct device *dev = info->device;
331 struct atmel_lcdfb_info *sinfo = info->par;
332 unsigned long clk_value_khz;
334 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
336 dev_dbg(dev, "%s:\n", __func__);
338 if (!(var->pixclock && var->bits_per_pixel)) {
339 /* choose a suitable mode if possible */
340 if (!atmel_lcdfb_choose_mode(var, info)) {
341 dev_err(dev, "needed value not specified\n");
346 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
347 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
348 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
349 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
351 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
352 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
356 /* Do not allow to have real resoulution larger than virtual */
357 if (var->xres > var->xres_virtual)
358 var->xres_virtual = var->xres;
360 if (var->yres > var->yres_virtual)
361 var->yres_virtual = var->yres;
363 /* Force same alignment for each line */
364 var->xres = (var->xres + 3) & ~3UL;
365 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
367 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
368 var->transp.msb_right = 0;
369 var->transp.offset = var->transp.length = 0;
370 var->xoffset = var->yoffset = 0;
372 if (info->fix.smem_len) {
373 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
374 * ((var->bits_per_pixel + 7) / 8));
375 if (smem_len > info->fix.smem_len)
379 /* Saturate vertical and horizontal timings at maximum values */
380 var->vsync_len = min_t(u32, var->vsync_len,
381 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
382 var->upper_margin = min_t(u32, var->upper_margin,
383 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
384 var->lower_margin = min_t(u32, var->lower_margin,
386 var->right_margin = min_t(u32, var->right_margin,
387 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
388 var->hsync_len = min_t(u32, var->hsync_len,
389 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
390 var->left_margin = min_t(u32, var->left_margin,
393 /* Some parameters can't be zero */
394 var->vsync_len = max_t(u32, var->vsync_len, 1);
395 var->right_margin = max_t(u32, var->right_margin, 1);
396 var->hsync_len = max_t(u32, var->hsync_len, 1);
397 var->left_margin = max_t(u32, var->left_margin, 1);
399 switch (var->bits_per_pixel) {
404 var->red.offset = var->green.offset = var->blue.offset = 0;
405 var->red.length = var->green.length = var->blue.length
406 = var->bits_per_pixel;
410 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
412 var->red.offset = 11;
413 var->blue.offset = 0;
414 var->green.length = 6;
415 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
416 var->red.offset = 10;
417 var->blue.offset = 0;
418 var->green.length = 5;
422 var->blue.offset = 10;
423 var->green.length = 5;
425 var->green.offset = 5;
426 var->red.length = var->blue.length = 5;
429 var->transp.offset = 24;
430 var->transp.length = 8;
433 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
435 var->red.offset = 16;
436 var->blue.offset = 0;
440 var->blue.offset = 16;
442 var->green.offset = 8;
443 var->red.length = var->green.length = var->blue.length = 8;
446 dev_err(dev, "color depth %d not supported\n",
447 var->bits_per_pixel);
457 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
461 atmel_lcdfb_stop(sinfo);
462 atmel_lcdfb_start(sinfo);
466 * atmel_lcdfb_set_par - Alters the hardware state.
467 * @info: frame buffer structure that represents a single frame buffer
469 * Using the fb_var_screeninfo in fb_info we set the resolution
470 * of the this particular framebuffer. This function alters the
471 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
472 * not alter var in fb_info since we are using that data. This
473 * means we depend on the data in var inside fb_info to be
474 * supported by the hardware. atmel_lcdfb_check_var is always called
475 * before atmel_lcdfb_set_par to ensure this. Again if you can't
476 * change the resolution you don't need this function.
479 static int atmel_lcdfb_set_par(struct fb_info *info)
481 struct atmel_lcdfb_info *sinfo = info->par;
482 unsigned long hozval_linesz;
484 unsigned long clk_value_khz;
485 unsigned long bits_per_line;
489 dev_dbg(info->device, "%s:\n", __func__);
490 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
491 info->var.xres, info->var.yres,
492 info->var.xres_virtual, info->var.yres_virtual);
494 atmel_lcdfb_stop_nowait(sinfo);
496 if (info->var.bits_per_pixel == 1)
497 info->fix.visual = FB_VISUAL_MONO01;
498 else if (info->var.bits_per_pixel <= 8)
499 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
501 info->fix.visual = FB_VISUAL_TRUECOLOR;
503 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
504 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
506 /* Re-initialize the DMA engine... */
507 dev_dbg(info->device, " * update DMA engine\n");
508 atmel_lcdfb_update_dma(info, &info->var);
510 /* ...set frame size and burst length = 8 words (?) */
511 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
512 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
513 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
515 /* Now, the LCDC core... */
517 /* Set pixel clock */
518 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
520 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
523 dev_notice(info->device, "Bypassing pixel clock divider\n");
524 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
526 value = (value / 2) - 1;
527 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
529 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
530 value << ATMEL_LCDC_CLKVAL_OFFSET);
531 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
532 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
533 PICOS2KHZ(info->var.pixclock));
537 /* Initialize control register 2 */
538 value = sinfo->default_lcdcon2;
540 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
541 value |= ATMEL_LCDC_INVLINE_INVERTED;
542 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
543 value |= ATMEL_LCDC_INVFRAME_INVERTED;
545 switch (info->var.bits_per_pixel) {
546 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
547 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
548 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
549 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
550 case 15: /* fall through */
551 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
552 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
553 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
554 default: BUG(); break;
556 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
557 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
559 /* Vertical timing */
560 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
561 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
562 value |= info->var.lower_margin;
563 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
564 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
566 /* Horizontal timing */
567 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
568 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
569 value |= (info->var.left_margin - 1);
570 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
571 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
573 /* Horizontal value (aka line size) */
574 hozval_linesz = compute_hozval(info->var.xres,
575 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
578 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
579 value |= info->var.yres - 1;
580 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
581 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
583 /* FIFO Threshold: Use formula from data sheet */
584 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
585 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
587 /* Toggle LCD_MODE every frame */
588 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
590 /* Disable all interrupts */
591 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
592 /* Enable FIFO & DMA errors */
593 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
595 /* ...wait for DMA engine to become idle... */
596 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
599 atmel_lcdfb_start(sinfo);
601 dev_dbg(info->device, " * DONE\n");
606 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
609 chan >>= 16 - bf->length;
610 return chan << bf->offset;
614 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
615 * @regno: Which register in the CLUT we are programming
616 * @red: The red value which can be up to 16 bits wide
617 * @green: The green value which can be up to 16 bits wide
618 * @blue: The blue value which can be up to 16 bits wide.
619 * @transp: If supported the alpha value which can be up to 16 bits wide.
620 * @info: frame buffer info structure
622 * Set a single color register. The values supplied have a 16 bit
623 * magnitude which needs to be scaled in this function for the hardware.
624 * Things to take into consideration are how many color registers, if
625 * any, are supported with the current color visual. With truecolor mode
626 * no color palettes are supported. Here a psuedo palette is created
627 * which we store the value in pseudo_palette in struct fb_info. For
628 * pseudocolor mode we have a limited color palette. To deal with this
629 * we can program what color is displayed for a particular pixel value.
630 * DirectColor is similar in that we can program each color field. If
631 * we have a static colormap we don't need to implement this function.
633 * Returns negative errno on error, or zero on success. In an
634 * ideal world, this would have been the case, but as it turns
635 * out, the other drivers return 1 on failure, so that's what
638 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
639 unsigned int green, unsigned int blue,
640 unsigned int transp, struct fb_info *info)
642 struct atmel_lcdfb_info *sinfo = info->par;
647 if (info->var.grayscale)
648 red = green = blue = (19595 * red + 38470 * green
649 + 7471 * blue) >> 16;
651 switch (info->fix.visual) {
652 case FB_VISUAL_TRUECOLOR:
654 pal = info->pseudo_palette;
656 val = chan_to_field(red, &info->var.red);
657 val |= chan_to_field(green, &info->var.green);
658 val |= chan_to_field(blue, &info->var.blue);
665 case FB_VISUAL_PSEUDOCOLOR:
667 val = ((red >> 11) & 0x001f);
668 val |= ((green >> 6) & 0x03e0);
669 val |= ((blue >> 1) & 0x7c00);
672 * TODO: intensity bit. Maybe something like
673 * ~(red[10] ^ green[10] ^ blue[10]) & 1
676 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
681 case FB_VISUAL_MONO01:
683 val = (regno == 0) ? 0x00 : 0x1F;
684 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
694 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
695 struct fb_info *info)
697 dev_dbg(info->device, "%s\n", __func__);
699 atmel_lcdfb_update_dma(info, var);
704 static struct fb_ops atmel_lcdfb_ops = {
705 .owner = THIS_MODULE,
706 .fb_check_var = atmel_lcdfb_check_var,
707 .fb_set_par = atmel_lcdfb_set_par,
708 .fb_setcolreg = atmel_lcdfb_setcolreg,
709 .fb_pan_display = atmel_lcdfb_pan_display,
710 .fb_fillrect = cfb_fillrect,
711 .fb_copyarea = cfb_copyarea,
712 .fb_imageblit = cfb_imageblit,
715 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
717 struct fb_info *info = dev_id;
718 struct atmel_lcdfb_info *sinfo = info->par;
721 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
722 if (status & ATMEL_LCDC_UFLWI) {
723 dev_warn(info->device, "FIFO underflow %#x\n", status);
724 /* reset DMA and FIFO to avoid screen shifting */
725 schedule_work(&sinfo->task);
727 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
732 * LCD controller task (to reset the LCD)
734 static void atmel_lcdfb_task(struct work_struct *work)
736 struct atmel_lcdfb_info *sinfo =
737 container_of(work, struct atmel_lcdfb_info, task);
739 atmel_lcdfb_reset(sinfo);
742 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
744 struct fb_info *info = sinfo->info;
747 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
749 dev_info(info->device,
750 "%luKiB frame buffer at %08lx (mapped at %p)\n",
751 (unsigned long)info->fix.smem_len / 1024,
752 (unsigned long)info->fix.smem_start,
755 /* Allocate colormap */
756 ret = fb_alloc_cmap(&info->cmap, 256, 0);
758 dev_err(info->device, "Alloc color map failed\n");
763 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
766 clk_enable(sinfo->bus_clk);
767 clk_enable(sinfo->lcdc_clk);
770 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
773 clk_disable(sinfo->bus_clk);
774 clk_disable(sinfo->lcdc_clk);
778 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
780 struct device *dev = &pdev->dev;
781 struct fb_info *info;
782 struct atmel_lcdfb_info *sinfo;
783 struct atmel_lcdfb_info *pdata_sinfo;
784 struct fb_videomode fbmode;
785 struct resource *regs = NULL;
786 struct resource *map = NULL;
789 dev_dbg(dev, "%s BEGIN\n", __func__);
792 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
794 dev_err(dev, "cannot allocate memory\n");
800 if (dev->platform_data) {
801 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
802 sinfo->default_bpp = pdata_sinfo->default_bpp;
803 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
804 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
805 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
806 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
807 sinfo->guard_time = pdata_sinfo->guard_time;
808 sinfo->smem_len = pdata_sinfo->smem_len;
809 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
810 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
812 dev_err(dev, "cannot get default configuration\n");
818 strcpy(info->fix.id, sinfo->pdev->name);
819 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
820 info->pseudo_palette = sinfo->pseudo_palette;
821 info->fbops = &atmel_lcdfb_ops;
823 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
824 info->fix = atmel_lcdfb_fix;
826 /* Enable LCDC Clocks */
827 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
828 sinfo->bus_clk = clk_get(dev, "hck1");
829 if (IS_ERR(sinfo->bus_clk)) {
830 ret = PTR_ERR(sinfo->bus_clk);
834 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
835 if (IS_ERR(sinfo->lcdc_clk)) {
836 ret = PTR_ERR(sinfo->lcdc_clk);
839 atmel_lcdfb_start_clock(sinfo);
841 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
842 info->monspecs.modedb_len, info->monspecs.modedb,
845 dev_err(dev, "no suitable video mode found\n");
850 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
852 dev_err(dev, "resources unusable\n");
857 sinfo->irq_base = platform_get_irq(pdev, 0);
858 if (sinfo->irq_base < 0) {
859 dev_err(dev, "unable to get irq\n");
860 ret = sinfo->irq_base;
864 /* Initialize video memory */
865 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
867 /* use a pre-allocated memory buffer */
868 info->fix.smem_start = map->start;
869 info->fix.smem_len = map->end - map->start + 1;
870 if (!request_mem_region(info->fix.smem_start,
871 info->fix.smem_len, pdev->name)) {
876 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
877 if (!info->screen_base)
881 * Don't clear the framebuffer -- someone may have set
885 /* alocate memory buffer */
886 ret = atmel_lcdfb_alloc_video_memory(sinfo);
888 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
894 info->fix.mmio_start = regs->start;
895 info->fix.mmio_len = regs->end - regs->start + 1;
897 if (!request_mem_region(info->fix.mmio_start,
898 info->fix.mmio_len, pdev->name)) {
903 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
905 dev_err(dev, "cannot map LCDC registers\n");
909 /* Initialize PWM for contrast or backlight ("off") */
910 init_contrast(sinfo);
913 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
915 dev_err(dev, "request_irq failed: %d\n", ret);
919 /* Some operations on the LCDC might sleep and
920 * require a preemptible task context */
921 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
923 ret = atmel_lcdfb_init_fbinfo(sinfo);
925 dev_err(dev, "init fbinfo failed: %d\n", ret);
926 goto unregister_irqs;
930 * This makes sure that our colour bitfield
931 * descriptors are correctly initialised.
933 atmel_lcdfb_check_var(&info->var, info);
935 ret = fb_set_var(info, &info->var);
937 dev_warn(dev, "unable to set display parameters\n");
941 dev_set_drvdata(dev, info);
944 * Tell the world that we're ready to go
946 ret = register_framebuffer(info);
948 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
952 /* add selected videomode to modelist */
953 fb_var_to_videomode(&fbmode, &info->var);
954 fb_add_videomode(&fbmode, &info->modelist);
956 /* Power up the LCDC screen */
957 if (sinfo->atmel_lcdfb_power_control)
958 sinfo->atmel_lcdfb_power_control(1);
960 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
961 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
966 dev_set_drvdata(dev, NULL);
968 fb_dealloc_cmap(&info->cmap);
970 cancel_work_sync(&sinfo->task);
971 free_irq(sinfo->irq_base, info);
973 exit_backlight(sinfo);
974 iounmap(sinfo->mmio);
976 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
979 iounmap(info->screen_base);
981 atmel_lcdfb_free_video_memory(sinfo);
985 release_mem_region(info->fix.smem_start, info->fix.smem_len);
987 atmel_lcdfb_stop_clock(sinfo);
988 clk_put(sinfo->lcdc_clk);
991 clk_put(sinfo->bus_clk);
993 framebuffer_release(info);
995 dev_dbg(dev, "%s FAILED\n", __func__);
999 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1001 struct device *dev = &pdev->dev;
1002 struct fb_info *info = dev_get_drvdata(dev);
1003 struct atmel_lcdfb_info *sinfo;
1005 if (!info || !info->par)
1009 cancel_work_sync(&sinfo->task);
1010 exit_backlight(sinfo);
1011 if (sinfo->atmel_lcdfb_power_control)
1012 sinfo->atmel_lcdfb_power_control(0);
1013 unregister_framebuffer(info);
1014 atmel_lcdfb_stop_clock(sinfo);
1015 clk_put(sinfo->lcdc_clk);
1017 clk_put(sinfo->bus_clk);
1018 fb_dealloc_cmap(&info->cmap);
1019 free_irq(sinfo->irq_base, info);
1020 iounmap(sinfo->mmio);
1021 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1022 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1023 iounmap(info->screen_base);
1024 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1026 atmel_lcdfb_free_video_memory(sinfo);
1029 dev_set_drvdata(dev, NULL);
1030 framebuffer_release(info);
1037 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1039 struct fb_info *info = platform_get_drvdata(pdev);
1040 struct atmel_lcdfb_info *sinfo = info->par;
1043 * We don't want to handle interrupts while the clock is
1044 * stopped. It may take forever.
1046 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1048 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1049 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1050 if (sinfo->atmel_lcdfb_power_control)
1051 sinfo->atmel_lcdfb_power_control(0);
1053 atmel_lcdfb_stop(sinfo);
1054 atmel_lcdfb_stop_clock(sinfo);
1059 static int atmel_lcdfb_resume(struct platform_device *pdev)
1061 struct fb_info *info = platform_get_drvdata(pdev);
1062 struct atmel_lcdfb_info *sinfo = info->par;
1064 atmel_lcdfb_start_clock(sinfo);
1065 atmel_lcdfb_start(sinfo);
1066 if (sinfo->atmel_lcdfb_power_control)
1067 sinfo->atmel_lcdfb_power_control(1);
1068 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1070 /* Enable FIFO & DMA errors */
1071 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1072 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1078 #define atmel_lcdfb_suspend NULL
1079 #define atmel_lcdfb_resume NULL
1082 static struct platform_driver atmel_lcdfb_driver = {
1083 .remove = __exit_p(atmel_lcdfb_remove),
1084 .suspend = atmel_lcdfb_suspend,
1085 .resume = atmel_lcdfb_resume,
1088 .name = "atmel_lcdfb",
1089 .owner = THIS_MODULE,
1093 static int __init atmel_lcdfb_init(void)
1095 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1098 static void __exit atmel_lcdfb_exit(void)
1100 platform_driver_unregister(&atmel_lcdfb_driver);
1103 module_init(atmel_lcdfb_init);
1104 module_exit(atmel_lcdfb_exit);
1106 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1107 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1108 MODULE_LICENSE("GPL");