Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs...
[linux-2.6] / arch / powerpc / boot / dts / mpc8377_mds.dts
1 /*
2  * MPC8377E MDS Device Tree Source
3  *
4  * Copyright 2007 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "fsl,mpc8377emds";
16         compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 serial0 = &serial0;
24                 serial1 = &serial1;
25                 pci0 = &pci0;
26         };
27
28         cpus {
29                 #address-cells = <1>;
30                 #size-cells = <0>;
31
32                 PowerPC,8377@0 {
33                         device_type = "cpu";
34                         reg = <0x0>;
35                         d-cache-line-size = <32>;
36                         i-cache-line-size = <32>;
37                         d-cache-size = <32768>;
38                         i-cache-size = <32768>;
39                         timebase-frequency = <0>;
40                         bus-frequency = <0>;
41                         clock-frequency = <0>;
42                 };
43         };
44
45         memory {
46                 device_type = "memory";
47                 reg = <0x00000000 0x20000000>;  // 512MB at 0
48         };
49
50         localbus@e0005000 {
51                 #address-cells = <2>;
52                 #size-cells = <1>;
53                 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
54                 reg = <0xe0005000 0x1000>;
55                 interrupts = <77 0x8>;
56                 interrupt-parent = <&ipic>;
57
58                 // booting from NOR flash
59                 ranges = <0 0x0 0xfe000000 0x02000000
60                           1 0x0 0xf8000000 0x00008000
61                           3 0x0 0xe0600000 0x00008000>;
62
63                 flash@0,0 {
64                         #address-cells = <1>;
65                         #size-cells = <1>;
66                         compatible = "cfi-flash";
67                         reg = <0 0x0 0x2000000>;
68                         bank-width = <2>;
69                         device-width = <1>;
70
71                         u-boot@0 {
72                                 reg = <0x0 0x100000>;
73                                 read-only;
74                         };
75
76                         fs@100000 {
77                                 reg = <0x100000 0x800000>;
78                         };
79
80                         kernel@1d00000 {
81                                 reg = <0x1d00000 0x200000>;
82                         };
83
84                         dtb@1f00000 {
85                                 reg = <0x1f00000 0x100000>;
86                         };
87                 };
88
89                 bcsr@1,0 {
90                         reg = <1 0x0 0x8000>;
91                         compatible = "fsl,mpc837xmds-bcsr";
92                 };
93
94                 nand@3,0 {
95                         #address-cells = <1>;
96                         #size-cells = <1>;
97                         compatible = "fsl,mpc8377-fcm-nand",
98                                      "fsl,elbc-fcm-nand";
99                         reg = <3 0x0 0x8000>;
100
101                         u-boot@0 {
102                                 reg = <0x0 0x100000>;
103                                 read-only;
104                         };
105
106                         kernel@100000 {
107                                 reg = <0x100000 0x300000>;
108                         };
109
110                         fs@400000 {
111                                 reg = <0x400000 0x1c00000>;
112                         };
113                 };
114         };
115
116         soc@e0000000 {
117                 #address-cells = <1>;
118                 #size-cells = <1>;
119                 device_type = "soc";
120                 compatible = "simple-bus";
121                 ranges = <0x0 0xe0000000 0x00100000>;
122                 reg = <0xe0000000 0x00000200>;
123                 bus-frequency = <0>;
124
125                 wdt@200 {
126                         compatible = "mpc83xx_wdt";
127                         reg = <0x200 0x100>;
128                 };
129
130                 i2c@3000 {
131                         #address-cells = <1>;
132                         #size-cells = <0>;
133                         cell-index = <0>;
134                         compatible = "fsl-i2c";
135                         reg = <0x3000 0x100>;
136                         interrupts = <14 0x8>;
137                         interrupt-parent = <&ipic>;
138                         dfsrr;
139
140                         rtc@68 {
141                                 compatible = "dallas,ds1374";
142                                 reg = <0x68>;
143                                 interrupts = <19 0x8>;
144                                 interrupt-parent = <&ipic>;
145                         };
146                 };
147
148                 i2c@3100 {
149                         #address-cells = <1>;
150                         #size-cells = <0>;
151                         cell-index = <1>;
152                         compatible = "fsl-i2c";
153                         reg = <0x3100 0x100>;
154                         interrupts = <15 0x8>;
155                         interrupt-parent = <&ipic>;
156                         dfsrr;
157                 };
158
159                 spi@7000 {
160                         cell-index = <0>;
161                         compatible = "fsl,spi";
162                         reg = <0x7000 0x1000>;
163                         interrupts = <16 0x8>;
164                         interrupt-parent = <&ipic>;
165                         mode = "cpu";
166                 };
167
168                 usb@23000 {
169                         compatible = "fsl-usb2-dr";
170                         reg = <0x23000 0x1000>;
171                         #address-cells = <1>;
172                         #size-cells = <0>;
173                         interrupt-parent = <&ipic>;
174                         interrupts = <38 0x8>;
175                         dr_mode = "host";
176                         phy_type = "ulpi";
177                 };
178
179                 mdio@24520 {
180                         #address-cells = <1>;
181                         #size-cells = <0>;
182                         compatible = "fsl,gianfar-mdio";
183                         reg = <0x24520 0x20>;
184                         phy2: ethernet-phy@2 {
185                                 interrupt-parent = <&ipic>;
186                                 interrupts = <17 0x8>;
187                                 reg = <0x2>;
188                                 device_type = "ethernet-phy";
189                         };
190                         phy3: ethernet-phy@3 {
191                                 interrupt-parent = <&ipic>;
192                                 interrupts = <18 0x8>;
193                                 reg = <0x3>;
194                                 device_type = "ethernet-phy";
195                         };
196                 };
197
198                 enet0: ethernet@24000 {
199                         cell-index = <0>;
200                         device_type = "network";
201                         model = "eTSEC";
202                         compatible = "gianfar";
203                         reg = <0x24000 0x1000>;
204                         local-mac-address = [ 00 00 00 00 00 00 ];
205                         interrupts = <32 0x8 33 0x8 34 0x8>;
206                         phy-connection-type = "mii";
207                         interrupt-parent = <&ipic>;
208                         phy-handle = <&phy2>;
209                 };
210
211                 enet1: ethernet@25000 {
212                         cell-index = <1>;
213                         device_type = "network";
214                         model = "eTSEC";
215                         compatible = "gianfar";
216                         reg = <0x25000 0x1000>;
217                         local-mac-address = [ 00 00 00 00 00 00 ];
218                         interrupts = <35 0x8 36 0x8 37 0x8>;
219                         phy-connection-type = "mii";
220                         interrupt-parent = <&ipic>;
221                         phy-handle = <&phy3>;
222                 };
223
224                 serial0: serial@4500 {
225                         cell-index = <0>;
226                         device_type = "serial";
227                         compatible = "ns16550";
228                         reg = <0x4500 0x100>;
229                         clock-frequency = <0>;
230                         interrupts = <9 0x8>;
231                         interrupt-parent = <&ipic>;
232                 };
233
234                 serial1: serial@4600 {
235                         cell-index = <1>;
236                         device_type = "serial";
237                         compatible = "ns16550";
238                         reg = <0x4600 0x100>;
239                         clock-frequency = <0>;
240                         interrupts = <10 0x8>;
241                         interrupt-parent = <&ipic>;
242                 };
243
244                 dma@82a8 {
245                         #address-cells = <1>;
246                         #size-cells = <1>;
247                         compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
248                         reg = <0x82a8 4>;
249                         ranges = <0 0x8100 0x1a8>;
250                         interrupt-parent = <&ipic>;
251                         interrupts = <0x47 8>;
252                         cell-index = <0>;
253                         dma-channel@0 {
254                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
255                                 reg = <0 0x80>;
256                                 cell-index = <0>;
257                                 interrupt-parent = <&ipic>;
258                                 interrupts = <0x47 8>;
259                         };
260                         dma-channel@80 {
261                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
262                                 reg = <0x80 0x80>;
263                                 cell-index = <1>;
264                                 interrupt-parent = <&ipic>;
265                                 interrupts = <0x47 8>;
266                         };
267                         dma-channel@100 {
268                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
269                                 reg = <0x100 0x80>;
270                                 cell-index = <2>;
271                                 interrupt-parent = <&ipic>;
272                                 interrupts = <0x47 8>;
273                         };
274                         dma-channel@180 {
275                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
276                                 reg = <0x180 0x28>;
277                                 cell-index = <3>;
278                                 interrupt-parent = <&ipic>;
279                                 interrupts = <0x47 8>;
280                         };
281                 };
282
283                 crypto@30000 {
284                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
285                                      "fsl,sec2.1", "fsl,sec2.0";
286                         reg = <0x30000 0x10000>;
287                         interrupts = <11 0x8>;
288                         interrupt-parent = <&ipic>;
289                         fsl,num-channels = <4>;
290                         fsl,channel-fifo-len = <24>;
291                         fsl,exec-units-mask = <0x9fe>;
292                         fsl,descriptor-types-mask = <0x3ab0ebf>;
293                 };
294
295                 sdhc@2e000 {
296                         model = "eSDHC";
297                         compatible = "fsl,esdhc";
298                         reg = <0x2e000 0x1000>;
299                         interrupts = <42 0x8>;
300                         interrupt-parent = <&ipic>;
301                 };
302
303                 sata@18000 {
304                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
305                         reg = <0x18000 0x1000>;
306                         interrupts = <44 0x8>;
307                         interrupt-parent = <&ipic>;
308                 };
309
310                 sata@19000 {
311                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
312                         reg = <0x19000 0x1000>;
313                         interrupts = <45 0x8>;
314                         interrupt-parent = <&ipic>;
315                 };
316
317                 /* IPIC
318                  * interrupts cell = <intr #, sense>
319                  * sense values match linux IORESOURCE_IRQ_* defines:
320                  * sense == 8: Level, low assertion
321                  * sense == 2: Edge, high-to-low change
322                  */
323                 ipic: pic@700 {
324                         compatible = "fsl,ipic";
325                         interrupt-controller;
326                         #address-cells = <0>;
327                         #interrupt-cells = <2>;
328                         reg = <0x700 0x100>;
329                 };
330         };
331
332         pci0: pci@e0008500 {
333                 cell-index = <0>;
334                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
335                 interrupt-map = <
336
337                                 /* IDSEL 0x11 */
338                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
339                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
340                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
341                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
342
343                                 /* IDSEL 0x12 */
344                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
345                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
346                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
347                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
348
349                                 /* IDSEL 0x13 */
350                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
351                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
352                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
353                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
354
355                                 /* IDSEL 0x15 */
356                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
357                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
358                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
359                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
360
361                                 /* IDSEL 0x16 */
362                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
363                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
364                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
365                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
366
367                                 /* IDSEL 0x17 */
368                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
369                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
370                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
371                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
372
373                                 /* IDSEL 0x18 */
374                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
375                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
376                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
377                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
378                 interrupt-parent = <&ipic>;
379                 interrupts = <66 0x8>;
380                 bus-range = <0x0 0x0>;
381                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
382                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
383                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
384                 clock-frequency = <0>;
385                 #interrupt-cells = <1>;
386                 #size-cells = <2>;
387                 #address-cells = <3>;
388                 reg = <0xe0008500 0x100         /* internal registers */
389                        0xe0008300 0x8>;         /* config space access registers */
390                 compatible = "fsl,mpc8349-pci";
391                 device_type = "pci";
392         };
393 };