git.oblomov.eu Git - linux-2.6/blob - drivers/spi/spi_bitbang.c

   1 /*
   2  * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/workqueue.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/delay.h>
  24 #include <linux/errno.h>
  25 #include <linux/platform_device.h>
  26
  27 #include <linux/spi/spi.h>
  28 #include <linux/spi/spi_bitbang.h>
  29
  30
  31 /*----------------------------------------------------------------------*/
  32
  33 /*
  34  * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
  35  * Use this for GPIO or shift-register level hardware APIs.
  36  *
  37  * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
  38  * to glue code.  These bitbang setup() and cleanup() routines are always
  39  * used, though maybe they're called from controller-aware code.
  40  *
  41  * chipselect() and friends may use use spi_device->controller_data and
  42  * controller registers as appropriate.
  43  *
  44  *
  45  * NOTE:  SPI controller pins can often be used as GPIO pins instead,
  46  * which means you could use a bitbang driver either to get hardware
  47  * working quickly, or testing for differences that aren't speed related.
  48  */
  49
  50 struct spi_bitbang_cs {
  51         unsigned        nsecs;  /* (clock cycle time)/2 */
  52         u32             (*txrx_word)(struct spi_device *spi, unsigned nsecs,
  53                                         u32 word, u8 bits);
  54         unsigned        (*txrx_bufs)(struct spi_device *,
  55                                         u32 (*txrx_word)(
  56                                                 struct spi_device *spi,
  57                                                 unsigned nsecs,
  58                                                 u32 word, u8 bits),
  59                                         unsigned, struct spi_transfer *);
  60 };
  61
  62 static unsigned bitbang_txrx_8(
  63         struct spi_device       *spi,
  64         u32                     (*txrx_word)(struct spi_device *spi,
  65                                         unsigned nsecs,
  66                                         u32 word, u8 bits),
  67         unsigned                ns,
  68         struct spi_transfer     *t
  69 ) {
  70         unsigned                bits = spi->bits_per_word;
  71         unsigned                count = t->len;
  72         const u8                *tx = t->tx_buf;
  73         u8                      *rx = t->rx_buf;
  74
  75         while (likely(count > 0)) {
  76                 u8              word = 0;
  77
  78                 if (tx)
  79                         word = *tx++;
  80                 word = txrx_word(spi, ns, word, bits);
  81                 if (rx)
  82                         *rx++ = word;
  83                 count -= 1;
  84         }
  85         return t->len - count;
  86 }
  87
  88 static unsigned bitbang_txrx_16(
  89         struct spi_device       *spi,
  90         u32                     (*txrx_word)(struct spi_device *spi,
  91                                         unsigned nsecs,
  92                                         u32 word, u8 bits),
  93         unsigned                ns,
  94         struct spi_transfer     *t
  95 ) {
  96         unsigned                bits = spi->bits_per_word;
  97         unsigned                count = t->len;
  98         const u16               *tx = t->tx_buf;
  99         u16                     *rx = t->rx_buf;
 100
 101         while (likely(count > 1)) {
 102                 u16             word = 0;
 103
 104                 if (tx)
 105                         word = *tx++;
 106                 word = txrx_word(spi, ns, word, bits);
 107                 if (rx)
 108                         *rx++ = word;
 109                 count -= 2;
 110         }
 111         return t->len - count;
 112 }
 113
 114 static unsigned bitbang_txrx_32(
 115         struct spi_device       *spi,
 116         u32                     (*txrx_word)(struct spi_device *spi,
 117                                         unsigned nsecs,
 118                                         u32 word, u8 bits),
 119         unsigned                ns,
 120         struct spi_transfer     *t
 121 ) {
 122         unsigned                bits = spi->bits_per_word;
 123         unsigned                count = t->len;
 124         const u32               *tx = t->tx_buf;
 125         u32                     *rx = t->rx_buf;
 126
 127         while (likely(count > 3)) {
 128                 u32             word = 0;
 129
 130                 if (tx)
 131                         word = *tx++;
 132                 word = txrx_word(spi, ns, word, bits);
 133                 if (rx)
 134                         *rx++ = word;
 135                 count -= 4;
 136         }
 137         return t->len - count;
 138 }
 139
 140 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 141 {
 142         struct spi_bitbang_cs   *cs = spi->controller_state;
 143         u8                      bits_per_word;
 144         u32                     hz;
 145
 146         if (t) {
 147                 bits_per_word = t->bits_per_word;
 148                 hz = t->speed_hz;
 149         } else {
 150                 bits_per_word = 0;
 151                 hz = 0;
 152         }
 153
 154         /* spi_transfer level calls that work per-word */
 155         if (!bits_per_word)
 156                 bits_per_word = spi->bits_per_word;
 157         if (bits_per_word <= 8)
 158                 cs->txrx_bufs = bitbang_txrx_8;
 159         else if (bits_per_word <= 16)
 160                 cs->txrx_bufs = bitbang_txrx_16;
 161         else if (bits_per_word <= 32)
 162                 cs->txrx_bufs = bitbang_txrx_32;
 163         else
 164                 return -EINVAL;
 165
 166         /* nsecs = (clock period)/2 */
 167         if (!hz)
 168                 hz = spi->max_speed_hz;
 169         if (hz) {
 170                 cs->nsecs = (1000000000/2) / hz;
 171                 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
 172                         return -EINVAL;
 173         }
 174
 175         return 0;
 176 }
 177 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
 178
 179 /**
 180  * spi_bitbang_setup - default setup for per-word I/O loops
 181  */
 182 int spi_bitbang_setup(struct spi_device *spi)
 183 {
 184         struct spi_bitbang_cs   *cs = spi->controller_state;
 185         struct spi_bitbang      *bitbang;
 186         int                     retval;
 187         unsigned long           flags;
 188
 189         bitbang = spi_master_get_devdata(spi->master);
 190
 191         if (!cs) {
 192                 cs = kzalloc(sizeof *cs, GFP_KERNEL);
 193                 if (!cs)
 194                         return -ENOMEM;
 195                 spi->controller_state = cs;
 196         }
 197
 198         /* per-word shift register access, in hardware or bitbanging */
 199         cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
 200         if (!cs->txrx_word)
 201                 return -EINVAL;
 202
 203         retval = bitbang->setup_transfer(spi, NULL);
 204         if (retval < 0)
 205                 return retval;
 206
 207         dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
 208
 209         /* NOTE we _need_ to call chipselect() early, ideally with adapter
 210          * setup, unless the hardware defaults cooperate to avoid confusion
 211          * between normal (active low) and inverted chipselects.
 212          */
 213
 214         /* deselect chip (low or high) */
 215         spin_lock_irqsave(&bitbang->lock, flags);
 216         if (!bitbang->busy) {
 217                 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 218                 ndelay(cs->nsecs);
 219         }
 220         spin_unlock_irqrestore(&bitbang->lock, flags);
 221
 222         return 0;
 223 }
 224 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
 225
 226 /**
 227  * spi_bitbang_cleanup - default cleanup for per-word I/O loops
 228  */
 229 void spi_bitbang_cleanup(struct spi_device *spi)
 230 {
 231         kfree(spi->controller_state);
 232 }
 233 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
 234
 235 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
 236 {
 237         struct spi_bitbang_cs   *cs = spi->controller_state;
 238         unsigned                nsecs = cs->nsecs;
 239
 240         return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
 241 }
 242
 243 /*----------------------------------------------------------------------*/
 244
 245 /*
 246  * SECOND PART ... simple transfer queue runner.
 247  *
 248  * This costs a task context per controller, running the queue by
 249  * performing each transfer in sequence.  Smarter hardware can queue
 250  * several DMA transfers at once, and process several controller queues
 251  * in parallel; this driver doesn't match such hardware very well.
 252  *
 253  * Drivers can provide word-at-a-time i/o primitives, or provide
 254  * transfer-at-a-time ones to leverage dma or fifo hardware.
 255  */
 256 static void bitbang_work(struct work_struct *work)
 257 {
 258         struct spi_bitbang      *bitbang =
 259                 container_of(work, struct spi_bitbang, work);
 260         unsigned long           flags;
 261
 262         spin_lock_irqsave(&bitbang->lock, flags);
 263         bitbang->busy = 1;
 264         while (!list_empty(&bitbang->queue)) {
 265                 struct spi_message      *m;
 266                 struct spi_device       *spi;
 267                 unsigned                nsecs;
 268                 struct spi_transfer     *t = NULL;
 269                 unsigned                tmp;
 270                 unsigned                cs_change;
 271                 int                     status;
 272                 int                     (*setup_transfer)(struct spi_device *,
 273                                                 struct spi_transfer *);
 274
 275                 m = container_of(bitbang->queue.next, struct spi_message,
 276                                 queue);
 277                 list_del_init(&m->queue);
 278                 spin_unlock_irqrestore(&bitbang->lock, flags);
 279
 280                 /* FIXME this is made-up ... the correct value is known to
 281                  * word-at-a-time bitbang code, and presumably chipselect()
 282                  * should enforce these requirements too?
 283                  */
 284                 nsecs = 100;
 285
 286                 spi = m->spi;
 287                 tmp = 0;
 288                 cs_change = 1;
 289                 status = 0;
 290                 setup_transfer = NULL;
 291
 292                 list_for_each_entry (t, &m->transfers, transfer_list) {
 293
 294                         /* override or restore speed and wordsize */
 295                         if (t->speed_hz || t->bits_per_word) {
 296                                 setup_transfer = bitbang->setup_transfer;
 297                                 if (!setup_transfer) {
 298                                         status = -ENOPROTOOPT;
 299                                         break;
 300                                 }
 301                         }
 302                         if (setup_transfer) {
 303                                 status = setup_transfer(spi, t);
 304                                 if (status < 0)
 305                                         break;
 306                         }
 307
 308                         /* set up default clock polarity, and activate chip;
 309                          * this implicitly updates clock and spi modes as
 310                          * previously recorded for this device via setup().
 311                          * (and also deselects any other chip that might be
 312                          * selected ...)
 313                          */
 314                         if (cs_change) {
 315                                 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
 316                                 ndelay(nsecs);
 317                         }
 318                         cs_change = t->cs_change;
 319                         if (!t->tx_buf && !t->rx_buf && t->len) {
 320                                 status = -EINVAL;
 321                                 break;
 322                         }
 323
 324                         /* transfer data.  the lower level code handles any
 325                          * new dma mappings it needs. our caller always gave
 326                          * us dma-safe buffers.
 327                          */
 328                         if (t->len) {
 329                                 /* REVISIT dma API still needs a designated
 330                                  * DMA_ADDR_INVALID; ~0 might be better.
 331                                  */
 332                                 if (!m->is_dma_mapped)
 333                                         t->rx_dma = t->tx_dma = 0;
 334                                 status = bitbang->txrx_bufs(spi, t);
 335                         }
 336                         if (status > 0)
 337                                 m->actual_length += status;
 338                         if (status != t->len) {
 339                                 /* always report some kind of error */
 340                                 if (status >= 0)
 341                                         status = -EREMOTEIO;
 342                                 break;
 343                         }
 344                         status = 0;
 345
 346                         /* protocol tweaks before next transfer */
 347                         if (t->delay_usecs)
 348                                 udelay(t->delay_usecs);
 349
 350                         if (!cs_change)
 351                                 continue;
 352                         if (t->transfer_list.next == &m->transfers)
 353                                 break;
 354
 355                         /* sometimes a short mid-message deselect of the chip
 356                          * may be needed to terminate a mode or command
 357                          */
 358                         ndelay(nsecs);
 359                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 360                         ndelay(nsecs);
 361                 }
 362
 363                 m->status = status;
 364                 m->complete(m->context);
 365
 366                 /* restore speed and wordsize */
 367                 if (setup_transfer)
 368                         setup_transfer(spi, NULL);
 369
 370                 /* normally deactivate chipselect ... unless no error and
 371                  * cs_change has hinted that the next message will probably
 372                  * be for this chip too.
 373                  */
 374                 if (!(status == 0 && cs_change)) {
 375                         ndelay(nsecs);
 376                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 377                         ndelay(nsecs);
 378                 }
 379
 380                 spin_lock_irqsave(&bitbang->lock, flags);
 381         }
 382         bitbang->busy = 0;
 383         spin_unlock_irqrestore(&bitbang->lock, flags);
 384 }
 385
 386 /**
 387  * spi_bitbang_transfer - default submit to transfer queue
 388  */
 389 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
 390 {
 391         struct spi_bitbang      *bitbang;
 392         unsigned long           flags;
 393         int                     status = 0;
 394
 395         m->actual_length = 0;
 396         m->status = -EINPROGRESS;
 397
 398         bitbang = spi_master_get_devdata(spi->master);
 399
 400         spin_lock_irqsave(&bitbang->lock, flags);
 401         if (!spi->max_speed_hz)
 402                 status = -ENETDOWN;
 403         else {
 404                 list_add_tail(&m->queue, &bitbang->queue);
 405                 queue_work(bitbang->workqueue, &bitbang->work);
 406         }
 407         spin_unlock_irqrestore(&bitbang->lock, flags);
 408
 409         return status;
 410 }
 411 EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
 412
 413 /*----------------------------------------------------------------------*/
 414
 415 /**
 416  * spi_bitbang_start - start up a polled/bitbanging SPI master driver
 417  * @bitbang: driver handle
 418  *
 419  * Caller should have zero-initialized all parts of the structure, and then
 420  * provided callbacks for chip selection and I/O loops.  If the master has
 421  * a transfer method, its final step should call spi_bitbang_transfer; or,
 422  * that's the default if the transfer routine is not initialized.  It should
 423  * also set up the bus number and number of chipselects.
 424  *
 425  * For i/o loops, provide callbacks either per-word (for bitbanging, or for
 426  * hardware that basically exposes a shift register) or per-spi_transfer
 427  * (which takes better advantage of hardware like fifos or DMA engines).
 428  *
 429  * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
 430  * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
 431  * master methods.  Those methods are the defaults if the bitbang->txrx_bufs
 432  * routine isn't initialized.
 433  *
 434  * This routine registers the spi_master, which will process requests in a
 435  * dedicated task, keeping IRQs unblocked most of the time.  To stop
 436  * processing those requests, call spi_bitbang_stop().
 437  */
 438 int spi_bitbang_start(struct spi_bitbang *bitbang)
 439 {
 440         int     status;
 441
 442         if (!bitbang->master || !bitbang->chipselect)
 443                 return -EINVAL;
 444
 445         INIT_WORK(&bitbang->work, bitbang_work);
 446         spin_lock_init(&bitbang->lock);
 447         INIT_LIST_HEAD(&bitbang->queue);
 448
 449         if (!bitbang->master->mode_bits)
 450                 bitbang->master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
 451
 452         if (!bitbang->master->transfer)
 453                 bitbang->master->transfer = spi_bitbang_transfer;
 454         if (!bitbang->txrx_bufs) {
 455                 bitbang->use_dma = 0;
 456                 bitbang->txrx_bufs = spi_bitbang_bufs;
 457                 if (!bitbang->master->setup) {
 458                         if (!bitbang->setup_transfer)
 459                                 bitbang->setup_transfer =
 460                                          spi_bitbang_setup_transfer;
 461                         bitbang->master->setup = spi_bitbang_setup;
 462                         bitbang->master->cleanup = spi_bitbang_cleanup;
 463                 }
 464         } else if (!bitbang->master->setup)
 465                 return -EINVAL;
 466
 467         /* this task is the only thing to touch the SPI bits */
 468         bitbang->busy = 0;
 469         bitbang->workqueue = create_singlethread_workqueue(
 470                         dev_name(bitbang->master->dev.parent));
 471         if (bitbang->workqueue == NULL) {
 472                 status = -EBUSY;
 473                 goto err1;
 474         }
 475
 476         /* driver may get busy before register() returns, especially
 477          * if someone registered boardinfo for devices
 478          */
 479         status = spi_register_master(bitbang->master);
 480         if (status < 0)
 481                 goto err2;
 482
 483         return status;
 484
 485 err2:
 486         destroy_workqueue(bitbang->workqueue);
 487 err1:
 488         return status;
 489 }
 490 EXPORT_SYMBOL_GPL(spi_bitbang_start);
 491
 492 /**
 493  * spi_bitbang_stop - stops the task providing spi communication
 494  */
 495 int spi_bitbang_stop(struct spi_bitbang *bitbang)
 496 {
 497         spi_unregister_master(bitbang->master);
 498
 499         WARN_ON(!list_empty(&bitbang->queue));
 500
 501         destroy_workqueue(bitbang->workqueue);
 502
 503         return 0;
 504 }
 505 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
 506
 507 MODULE_LICENSE("GPL");
 508