1 Booting the Linux/ppc kernel without Open Firmware
2 --------------------------------------------------
4 (c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>,
6 (c) 2005 Becky Bruce <becky.bruce at freescale.com>,
7 Freescale Semiconductor, FSL SOC and 32-bit additions
8 (c) 2006 MontaVista Software, Inc.
9 Flash chip node definition
15 1) Entry point for arch/powerpc
18 II - The DT block format
20 2) Device tree generalities
21 3) Device tree "structure" block
22 4) Device tree "strings" block
24 III - Required content of the device tree
25 1) Note about cells and address representation
26 2) Note about "compatible" properties
27 3) Note about "name" properties
28 4) Note about node and property names and character set
29 5) Required nodes and properties
33 d) the /memory node(s)
35 f) the /soc<SOCname> node
37 IV - "dtc", the device tree compiler
39 V - Recommendations for a bootloader
41 VI - System-on-a-chip devices and nodes
42 1) Defining child nodes of an SOC
43 2) Representing devices without a current OF specification
45 b) Gianfar-compatible ethernet nodes
47 d) Interrupt controllers
49 f) Freescale SOC USB controllers
50 g) Freescale SOC SEC Security Engines
51 h) Board Control and Status (BCSR)
52 i) Freescale QUICC Engine module (QE)
53 j) CFI or JEDEC memory-mapped NOR flash
54 k) Global Utilities Block
57 VII - Specifying interrupt information for devices
58 1) interrupts property
59 2) interrupt-parent property
60 3) OpenPIC Interrupt Controllers
61 4) ISA Interrupt Controllers
63 Appendix A - Sample SOC node for MPC8540
69 May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet.
71 May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or
72 clarifies the fact that a lot of things are
73 optional, the kernel only requires a very
74 small device tree, though it is encouraged
75 to provide an as complete one as possible.
77 May 24, 2005: Rev 0.3 - Precise that DT block has to be in RAM
79 - Define version 3 and new format version 16
80 for the DT block (version 16 needs kernel
81 patches, will be fwd separately).
82 String block now has a size, and full path
83 is replaced by unit name for more
85 linux,phandle is made optional, only nodes
86 that are referenced by other nodes need it.
87 "name" property is now automatically
88 deduced from the unit name
90 June 1, 2005: Rev 0.4 - Correct confusion between OF_DT_END and
91 OF_DT_END_NODE in structure definition.
92 - Change version 16 format to always align
93 property data to 4 bytes. Since tokens are
94 already aligned, that means no specific
95 required alignment between property size
96 and property data. The old style variable
97 alignment would make it impossible to do
98 "simple" insertion of properties using
99 memmove (thanks Milton for
100 noticing). Updated kernel patch as well
101 - Correct a few more alignment constraints
102 - Add a chapter about the device-tree
103 compiler and the textural representation of
104 the tree that can be "compiled" by dtc.
106 November 21, 2005: Rev 0.5
107 - Additions/generalizations for 32-bit
108 - Changed to reflect the new arch/powerpc
114 - Add some definitions of interrupt tree (simple/complex)
115 - Add some definitions for PCI host bridges
116 - Add some common address format examples
117 - Add definitions for standard properties and "compatible"
118 names for cells that are not already defined by the existing
120 - Compare FSL SOC use of PCI to standard and make sure no new
121 node definition required.
122 - Add more information about node definitions for SOC devices
123 that currently have no standard, like the FSL CPM.
129 During the recent development of the Linux/ppc64 kernel, and more
130 specifically, the addition of new platform types outside of the old
131 IBM pSeries/iSeries pair, it was decided to enforce some strict rules
132 regarding the kernel entry and bootloader <-> kernel interfaces, in
133 order to avoid the degeneration that had become the ppc32 kernel entry
134 point and the way a new platform should be added to the kernel. The
135 legacy iSeries platform breaks those rules as it predates this scheme,
136 but no new board support will be accepted in the main tree that
137 doesn't follows them properly. In addition, since the advent of the
138 arch/powerpc merged architecture for ppc32 and ppc64, new 32-bit
139 platforms and 32-bit platforms which move into arch/powerpc will be
140 required to use these rules as well.
142 The main requirement that will be defined in more detail below is
143 the presence of a device-tree whose format is defined after Open
144 Firmware specification. However, in order to make life easier
145 to embedded board vendors, the kernel doesn't require the device-tree
146 to represent every device in the system and only requires some nodes
147 and properties to be present. This will be described in detail in
148 section III, but, for example, the kernel does not require you to
149 create a node for every PCI device in the system. It is a requirement
150 to have a node for PCI host bridges in order to provide interrupt
151 routing informations and memory/IO ranges, among others. It is also
152 recommended to define nodes for on chip devices and other busses that
153 don't specifically fit in an existing OF specification. This creates a
154 great flexibility in the way the kernel can then probe those and match
155 drivers to device, without having to hard code all sorts of tables. It
156 also makes it more flexible for board vendors to do minor hardware
157 upgrades without significantly impacting the kernel code or cluttering
158 it with special cases.
161 1) Entry point for arch/powerpc
162 -------------------------------
164 There is one and one single entry point to the kernel, at the start
165 of the kernel image. That entry point supports two calling
168 a) Boot from Open Firmware. If your firmware is compatible
169 with Open Firmware (IEEE 1275) or provides an OF compatible
170 client interface API (support for "interpret" callback of
171 forth words isn't required), you can enter the kernel with:
173 r5 : OF callback pointer as defined by IEEE 1275
174 bindings to powerpc. Only the 32-bit client interface
175 is currently supported
177 r3, r4 : address & length of an initrd if any or 0
179 The MMU is either on or off; the kernel will run the
180 trampoline located in arch/powerpc/kernel/prom_init.c to
181 extract the device-tree and other information from open
182 firmware and build a flattened device-tree as described
183 in b). prom_init() will then re-enter the kernel using
184 the second method. This trampoline code runs in the
185 context of the firmware, which is supposed to handle all
186 exceptions during that time.
188 b) Direct entry with a flattened device-tree block. This entry
189 point is called by a) after the OF trampoline and can also be
190 called directly by a bootloader that does not support the Open
191 Firmware client interface. It is also used by "kexec" to
192 implement "hot" booting of a new kernel from a previous
193 running one. This method is what I will describe in more
194 details in this document, as method a) is simply standard Open
195 Firmware, and thus should be implemented according to the
196 various standard documents defining it and its binding to the
197 PowerPC platform. The entry point definition then becomes:
199 r3 : physical pointer to the device-tree block
200 (defined in chapter II) in RAM
202 r4 : physical pointer to the kernel itself. This is
203 used by the assembly code to properly disable the MMU
204 in case you are entering the kernel with MMU enabled
205 and a non-1:1 mapping.
207 r5 : NULL (as to differentiate with method a)
209 Note about SMP entry: Either your firmware puts your other
210 CPUs in some sleep loop or spin loop in ROM where you can get
211 them out via a soft reset or some other means, in which case
212 you don't need to care, or you'll have to enter the kernel
213 with all CPUs. The way to do that with method b) will be
214 described in a later revision of this document.
222 Board supports (platforms) are not exclusive config options. An
223 arbitrary set of board supports can be built in a single kernel
224 image. The kernel will "know" what set of functions to use for a
225 given platform based on the content of the device-tree. Thus, you
228 a) add your platform support as a _boolean_ option in
229 arch/powerpc/Kconfig, following the example of PPC_PSERIES,
230 PPC_PMAC and PPC_MAPLE. The later is probably a good
231 example of a board support to start from.
233 b) create your main platform file as
234 "arch/powerpc/platforms/myplatform/myboard_setup.c" and add it
235 to the Makefile under the condition of your CONFIG_
236 option. This file will define a structure of type "ppc_md"
237 containing the various callbacks that the generic code will
238 use to get to your platform specific code
240 c) Add a reference to your "ppc_md" structure in the
241 "machines" table in arch/powerpc/kernel/setup_64.c if you are
244 d) request and get assigned a platform number (see PLATFORM_*
245 constants in include/asm-powerpc/processor.h
247 32-bit embedded kernels:
249 Currently, board support is essentially an exclusive config option.
250 The kernel is configured for a single platform. Part of the reason
251 for this is to keep kernels on embedded systems small and efficient;
252 part of this is due to the fact the code is already that way. In the
253 future, a kernel may support multiple platforms, but only if the
254 platforms feature the same core architecture. A single kernel build
255 cannot support both configurations with Book E and configurations
256 with classic Powerpc architectures.
258 32-bit embedded platforms that are moved into arch/powerpc using a
259 flattened device tree should adopt the merged tree practice of
260 setting ppc_md up dynamically, even though the kernel is currently
261 built with support for only a single platform at a time. This allows
262 unification of the setup code, and will make it easier to go to a
263 multiple-platform-support model in the future.
265 NOTE: I believe the above will be true once Ben's done with the merge
266 of the boot sequences.... someone speak up if this is wrong!
268 To add a 32-bit embedded platform support, follow the instructions
269 for 64-bit platforms above, with the exception that the Kconfig
270 option should be set up such that the kernel builds exclusively for
271 the platform selected. The processor type for the platform should
272 enable another config option to select the specific board
275 NOTE: If Ben doesn't merge the setup files, may need to change this to
279 I will describe later the boot process and various callbacks that
280 your platform should implement.
283 II - The DT block format
284 ========================
287 This chapter defines the actual format of the flattened device-tree
288 passed to the kernel. The actual content of it and kernel requirements
289 are described later. You can find example of code manipulating that
290 format in various places, including arch/powerpc/kernel/prom_init.c
291 which will generate a flattened device-tree from the Open Firmware
292 representation, or the fs2dt utility which is part of the kexec tools
293 which will generate one from a filesystem representation. It is
294 expected that a bootloader like uboot provides a bit more support,
295 that will be discussed later as well.
297 Note: The block has to be in main memory. It has to be accessible in
298 both real mode and virtual mode with no mapping other than main
299 memory. If you are writing a simple flash bootloader, it should copy
300 the block to RAM before passing it to the kernel.
306 The kernel is entered with r3 pointing to an area of memory that is
307 roughly described in include/asm-powerpc/prom.h by the structure
310 struct boot_param_header {
311 u32 magic; /* magic word OF_DT_HEADER */
312 u32 totalsize; /* total size of DT block */
313 u32 off_dt_struct; /* offset to structure */
314 u32 off_dt_strings; /* offset to strings */
315 u32 off_mem_rsvmap; /* offset to memory reserve map
317 u32 version; /* format version */
318 u32 last_comp_version; /* last compatible version */
320 /* version 2 fields below */
321 u32 boot_cpuid_phys; /* Which physical CPU id we're
323 /* version 3 fields below */
324 u32 size_dt_strings; /* size of the strings block */
326 /* version 17 fields below */
327 u32 size_dt_struct; /* size of the DT structure block */
330 Along with the constants:
332 /* Definitions used by the flattened device tree */
333 #define OF_DT_HEADER 0xd00dfeed /* 4: version,
335 #define OF_DT_BEGIN_NODE 0x1 /* Start node: full name
337 #define OF_DT_END_NODE 0x2 /* End node */
338 #define OF_DT_PROP 0x3 /* Property: name off,
340 #define OF_DT_END 0x9
342 All values in this header are in big endian format, the various
343 fields in this header are defined more precisely below. All
344 "offset" values are in bytes from the start of the header; that is
345 from the value of r3.
349 This is a magic value that "marks" the beginning of the
350 device-tree block header. It contains the value 0xd00dfeed and is
351 defined by the constant OF_DT_HEADER
355 This is the total size of the DT block including the header. The
356 "DT" block should enclose all data structures defined in this
357 chapter (who are pointed to by offsets in this header). That is,
358 the device-tree structure, strings, and the memory reserve map.
362 This is an offset from the beginning of the header to the start
363 of the "structure" part the device tree. (see 2) device tree)
367 This is an offset from the beginning of the header to the start
368 of the "strings" part of the device-tree
372 This is an offset from the beginning of the header to the start
373 of the reserved memory map. This map is a list of pairs of 64-
374 bit integers. Each pair is a physical address and a size. The
375 list is terminated by an entry of size 0. This map provides the
376 kernel with a list of physical memory areas that are "reserved"
377 and thus not to be used for memory allocations, especially during
378 early initialization. The kernel needs to allocate memory during
379 boot for things like un-flattening the device-tree, allocating an
380 MMU hash table, etc... Those allocations must be done in such a
381 way to avoid overriding critical things like, on Open Firmware
382 capable machines, the RTAS instance, or on some pSeries, the TCE
383 tables used for the iommu. Typically, the reserve map should
384 contain _at least_ this DT block itself (header,total_size). If
385 you are passing an initrd to the kernel, you should reserve it as
386 well. You do not need to reserve the kernel image itself. The map
387 should be 64-bit aligned.
391 This is the version of this structure. Version 1 stops
392 here. Version 2 adds an additional field boot_cpuid_phys.
393 Version 3 adds the size of the strings block, allowing the kernel
394 to reallocate it easily at boot and free up the unused flattened
395 structure after expansion. Version 16 introduces a new more
396 "compact" format for the tree itself that is however not backward
397 compatible. Version 17 adds an additional field, size_dt_struct,
398 allowing it to be reallocated or moved more easily (this is
399 particularly useful for bootloaders which need to make
400 adjustments to a device tree based on probed information). You
401 should always generate a structure of the highest version defined
402 at the time of your implementation. Currently that is version 17,
403 unless you explicitly aim at being backward compatible.
407 Last compatible version. This indicates down to what version of
408 the DT block you are backward compatible. For example, version 2
409 is backward compatible with version 1 (that is, a kernel build
410 for version 1 will be able to boot with a version 2 format). You
411 should put a 1 in this field if you generate a device tree of
412 version 1 to 3, or 16 if you generate a tree of version 16 or 17
413 using the new unit name format.
417 This field only exist on version 2 headers. It indicate which
418 physical CPU ID is calling the kernel entry point. This is used,
419 among others, by kexec. If you are on an SMP system, this value
420 should match the content of the "reg" property of the CPU node in
421 the device-tree corresponding to the CPU calling the kernel entry
422 point (see further chapters for more informations on the required
423 device-tree contents)
427 This field only exists on version 3 and later headers. It
428 gives the size of the "strings" section of the device tree (which
429 starts at the offset given by off_dt_strings).
433 This field only exists on version 17 and later headers. It gives
434 the size of the "structure" section of the device tree (which
435 starts at the offset given by off_dt_struct).
437 So the typical layout of a DT block (though the various parts don't
438 need to be in that order) looks like this (addresses go from top to
442 ------------------------------
443 r3 -> | struct boot_param_header |
444 ------------------------------
445 | (alignment gap) (*) |
446 ------------------------------
447 | memory reserve map |
448 ------------------------------
450 ------------------------------
452 | device-tree structure |
454 ------------------------------
456 ------------------------------
458 | device-tree strings |
460 -----> ------------------------------
465 (*) The alignment gaps are not necessarily present; their presence
466 and size are dependent on the various alignment requirements of
467 the individual data blocks.
470 2) Device tree generalities
471 ---------------------------
473 This device-tree itself is separated in two different blocks, a
474 structure block and a strings block. Both need to be aligned to a 4
477 First, let's quickly describe the device-tree concept before detailing
478 the storage format. This chapter does _not_ describe the detail of the
479 required types of nodes & properties for the kernel, this is done
480 later in chapter III.
482 The device-tree layout is strongly inherited from the definition of
483 the Open Firmware IEEE 1275 device-tree. It's basically a tree of
484 nodes, each node having two or more named properties. A property can
487 It is a tree, so each node has one and only one parent except for the
488 root node who has no parent.
490 A node has 2 names. The actual node name is generally contained in a
491 property of type "name" in the node property list whose value is a
492 zero terminated string and is mandatory for version 1 to 3 of the
493 format definition (as it is in Open Firmware). Version 16 makes it
494 optional as it can generate it from the unit name defined below.
496 There is also a "unit name" that is used to differentiate nodes with
497 the same name at the same level, it is usually made of the node
498 names, the "@" sign, and a "unit address", which definition is
499 specific to the bus type the node sits on.
501 The unit name doesn't exist as a property per-se but is included in
502 the device-tree structure. It is typically used to represent "path" in
503 the device-tree. More details about the actual format of these will be
506 The kernel powerpc generic code does not make any formal use of the
507 unit address (though some board support code may do) so the only real
508 requirement here for the unit address is to ensure uniqueness of
509 the node unit name at a given level of the tree. Nodes with no notion
510 of address and no possible sibling of the same name (like /memory or
511 /cpus) may omit the unit address in the context of this specification,
512 or use the "@0" default unit address. The unit name is used to define
513 a node "full path", which is the concatenation of all parent node
514 unit names separated with "/".
516 The root node doesn't have a defined name, and isn't required to have
517 a name property either if you are using version 3 or earlier of the
518 format. It also has no unit address (no @ symbol followed by a unit
519 address). The root node unit name is thus an empty string. The full
520 path to the root node is "/".
522 Every node which actually represents an actual device (that is, a node
523 which isn't only a virtual "container" for more nodes, like "/cpus"
524 is) is also required to have a "device_type" property indicating the
527 Finally, every node that can be referenced from a property in another
528 node is required to have a "linux,phandle" property. Real open
529 firmware implementations provide a unique "phandle" value for every
530 node that the "prom_init()" trampoline code turns into
531 "linux,phandle" properties. However, this is made optional if the
532 flattened device tree is used directly. An example of a node
533 referencing another node via "phandle" is when laying out the
534 interrupt tree which will be described in a further version of this
537 This "linux, phandle" property is a 32-bit value that uniquely
538 identifies a node. You are free to use whatever values or system of
539 values, internal pointers, or whatever to generate these, the only
540 requirement is that every node for which you provide that property has
541 a unique value for it.
543 Here is an example of a simple device-tree. In this example, an "o"
544 designates a node followed by the node unit name. Properties are
545 presented with their name followed by their content. "content"
546 represents an ASCII string (zero terminated) value, while <content>
547 represents a 32-bit hexadecimal value. The various nodes in this
548 example will be discussed in a later chapter. At this point, it is
549 only meant to give you a idea of what a device-tree looks like. I have
550 purposefully kept the "name" and "linux,phandle" properties which
551 aren't necessary in order to give you a better idea of what the tree
552 looks like in practice.
555 |- name = "device-tree"
556 |- model = "MyBoardName"
557 |- compatible = "MyBoardFamilyName"
558 |- #address-cells = <2>
560 |- linux,phandle = <0>
564 | | - linux,phandle = <1>
565 | | - #address-cells = <1>
566 | | - #size-cells = <0>
569 | |- name = "PowerPC,970"
570 | |- device_type = "cpu"
572 | |- clock-frequency = <5f5e1000>
574 | |- linux,phandle = <2>
578 | |- device_type = "memory"
579 | |- reg = <00000000 00000000 00000000 20000000>
580 | |- linux,phandle = <3>
584 |- bootargs = "root=/dev/sda2"
585 |- linux,phandle = <4>
587 This tree is almost a minimal tree. It pretty much contains the
588 minimal set of required nodes and properties to boot a linux kernel;
589 that is, some basic model informations at the root, the CPUs, and the
590 physical memory layout. It also includes misc information passed
591 through /chosen, like in this example, the platform type (mandatory)
592 and the kernel command line arguments (optional).
594 The /cpus/PowerPC,970@0/64-bit property is an example of a
595 property without a value. All other properties have a value. The
596 significance of the #address-cells and #size-cells properties will be
597 explained in chapter IV which defines precisely the required nodes and
598 properties and their content.
601 3) Device tree "structure" block
603 The structure of the device tree is a linearized tree structure. The
604 "OF_DT_BEGIN_NODE" token starts a new node, and the "OF_DT_END_NODE"
605 ends that node definition. Child nodes are simply defined before
606 "OF_DT_END_NODE" (that is nodes within the node). A 'token' is a 32
607 bit value. The tree has to be "finished" with a OF_DT_END token
609 Here's the basic structure of a single node:
611 * token OF_DT_BEGIN_NODE (that is 0x00000001)
612 * for version 1 to 3, this is the node full path as a zero
613 terminated string, starting with "/". For version 16 and later,
614 this is the node unit name only (or an empty string for the
616 * [align gap to next 4 bytes boundary]
618 * token OF_DT_PROP (that is 0x00000003)
619 * 32-bit value of property value size in bytes (or 0 if no
621 * 32-bit value of offset in string block of property name
622 * property value data if any
623 * [align gap to next 4 bytes boundary]
624 * [child nodes if any]
625 * token OF_DT_END_NODE (that is 0x00000002)
627 So the node content can be summarized as a start token, a full path,
628 a list of properties, a list of child nodes, and an end token. Every
629 child node is a full node structure itself as defined above.
631 NOTE: The above definition requires that all property definitions for
632 a particular node MUST precede any subnode definitions for that node.
633 Although the structure would not be ambiguous if properties and
634 subnodes were intermingled, the kernel parser requires that the
635 properties come first (up until at least 2.6.22). Any tools
636 manipulating a flattened tree must take care to preserve this
639 4) Device tree "strings" block
641 In order to save space, property names, which are generally redundant,
642 are stored separately in the "strings" block. This block is simply the
643 whole bunch of zero terminated strings for all property names
644 concatenated together. The device-tree property definitions in the
645 structure block will contain offset values from the beginning of the
649 III - Required content of the device tree
650 =========================================
652 WARNING: All "linux,*" properties defined in this document apply only
653 to a flattened device-tree. If your platform uses a real
654 implementation of Open Firmware or an implementation compatible with
655 the Open Firmware client interface, those properties will be created
656 by the trampoline code in the kernel's prom_init() file. For example,
657 that's where you'll have to add code to detect your board model and
658 set the platform number. However, when using the flattened device-tree
659 entry point, there is no prom_init() pass, and thus you have to
660 provide those properties yourself.
663 1) Note about cells and address representation
664 ----------------------------------------------
666 The general rule is documented in the various Open Firmware
667 documentations. If you choose to describe a bus with the device-tree
668 and there exist an OF bus binding, then you should follow the
669 specification. However, the kernel does not require every single
670 device or bus to be described by the device tree.
672 In general, the format of an address for a device is defined by the
673 parent bus type, based on the #address-cells and #size-cells
674 properties. Note that the parent's parent definitions of #address-cells
675 and #size-cells are not inhereted so every node with children must specify
676 them. The kernel requires the root node to have those properties defining
677 addresses format for devices directly mapped on the processor bus.
679 Those 2 properties define 'cells' for representing an address and a
680 size. A "cell" is a 32-bit number. For example, if both contain 2
681 like the example tree given above, then an address and a size are both
682 composed of 2 cells, and each is a 64-bit number (cells are
683 concatenated and expected to be in big endian format). Another example
684 is the way Apple firmware defines them, with 2 cells for an address
685 and one cell for a size. Most 32-bit implementations should define
686 #address-cells and #size-cells to 1, which represents a 32-bit value.
687 Some 32-bit processors allow for physical addresses greater than 32
688 bits; these processors should define #address-cells as 2.
690 "reg" properties are always a tuple of the type "address size" where
691 the number of cells of address and size is specified by the bus
692 #address-cells and #size-cells. When a bus supports various address
693 spaces and other flags relative to a given address allocation (like
694 prefetchable, etc...) those flags are usually added to the top level
695 bits of the physical address. For example, a PCI physical address is
696 made of 3 cells, the bottom two containing the actual address itself
697 while the top cell contains address space indication, flags, and pci
698 bus & device numbers.
700 For busses that support dynamic allocation, it's the accepted practice
701 to then not provide the address in "reg" (keep it 0) though while
702 providing a flag indicating the address is dynamically allocated, and
703 then, to provide a separate "assigned-addresses" property that
704 contains the fully allocated addresses. See the PCI OF bindings for
707 In general, a simple bus with no address space bits and no dynamic
708 allocation is preferred if it reflects your hardware, as the existing
709 kernel address parsing functions will work out of the box. If you
710 define a bus type with a more complex address format, including things
711 like address space bits, you'll have to add a bus translator to the
712 prom_parse.c file of the recent kernels for your bus type.
714 The "reg" property only defines addresses and sizes (if #size-cells is
715 non-0) within a given bus. In order to translate addresses upward
716 (that is into parent bus addresses, and possibly into CPU physical
717 addresses), all busses must contain a "ranges" property. If the
718 "ranges" property is missing at a given level, it's assumed that
719 translation isn't possible, i.e., the registers are not visible on the
720 parent bus. The format of the "ranges" property for a bus is a list
723 bus address, parent bus address, size
725 "bus address" is in the format of the bus this bus node is defining,
726 that is, for a PCI bridge, it would be a PCI address. Thus, (bus
727 address, size) defines a range of addresses for child devices. "parent
728 bus address" is in the format of the parent bus of this bus. For
729 example, for a PCI host controller, that would be a CPU address. For a
730 PCI<->ISA bridge, that would be a PCI address. It defines the base
731 address in the parent bus where the beginning of that range is mapped.
733 For a new 64-bit powerpc board, I recommend either the 2/2 format or
734 Apple's 2/1 format which is slightly more compact since sizes usually
735 fit in a single 32-bit word. New 32-bit powerpc boards should use a
736 1/1 format, unless the processor supports physical addresses greater
737 than 32-bits, in which case a 2/1 format is recommended.
739 Alternatively, the "ranges" property may be empty, indicating that the
740 registers are visible on the parent bus using an identity mapping
741 translation. In other words, the parent bus address space is the same
742 as the child bus address space.
744 2) Note about "compatible" properties
745 -------------------------------------
747 These properties are optional, but recommended in devices and the root
748 node. The format of a "compatible" property is a list of concatenated
749 zero terminated strings. They allow a device to express its
750 compatibility with a family of similar devices, in some cases,
751 allowing a single driver to match against several devices regardless
752 of their actual names.
754 3) Note about "name" properties
755 -------------------------------
757 While earlier users of Open Firmware like OldWorld macintoshes tended
758 to use the actual device name for the "name" property, it's nowadays
759 considered a good practice to use a name that is closer to the device
760 class (often equal to device_type). For example, nowadays, ethernet
761 controllers are named "ethernet", an additional "model" property
762 defining precisely the chip type/model, and "compatible" property
763 defining the family in case a single driver can driver more than one
764 of these chips. However, the kernel doesn't generally put any
765 restriction on the "name" property; it is simply considered good
766 practice to follow the standard and its evolutions as closely as
769 Note also that the new format version 16 makes the "name" property
770 optional. If it's absent for a node, then the node's unit name is then
771 used to reconstruct the name. That is, the part of the unit name
772 before the "@" sign is used (or the entire unit name if no "@" sign
775 4) Note about node and property names and character set
776 -------------------------------------------------------
778 While open firmware provides more flexible usage of 8859-1, this
779 specification enforces more strict rules. Nodes and properties should
780 be comprised only of ASCII characters 'a' to 'z', '0' to
781 '9', ',', '.', '_', '+', '#', '?', and '-'. Node names additionally
782 allow uppercase characters 'A' to 'Z' (property names should be
783 lowercase. The fact that vendors like Apple don't respect this rule is
784 irrelevant here). Additionally, node and property names should always
785 begin with a character in the range 'a' to 'z' (or 'A' to 'Z' for node
788 The maximum number of characters for both nodes and property names
789 is 31. In the case of node names, this is only the leftmost part of
790 a unit name (the pure "name" property), it doesn't include the unit
791 address which can extend beyond that limit.
794 5) Required nodes and properties
795 --------------------------------
796 These are all that are currently required. However, it is strongly
797 recommended that you expose PCI host bridges as documented in the
798 PCI binding to open firmware, and your interrupt tree as documented
799 in OF interrupt tree specification.
803 The root node requires some properties to be present:
805 - model : this is your board name/model
806 - #address-cells : address representation for "root" devices
807 - #size-cells: the size representation for "root" devices
808 - device_type : This property shouldn't be necessary. However, if
809 you decide to create a device_type for your root node, make sure it
810 is _not_ "chrp" unless your platform is a pSeries or PAPR compliant
811 one for 64-bit, or a CHRP-type machine for 32-bit as this will
812 matched by the kernel this way.
814 Additionally, some recommended properties are:
816 - compatible : the board "family" generally finds its way here,
817 for example, if you have 2 board models with a similar layout,
818 that typically get driven by the same platform code in the
819 kernel, you would use a different "model" property but put a
820 value in "compatible". The kernel doesn't directly use that
821 value but it is generally useful.
823 The root node is also generally where you add additional properties
824 specific to your board like the serial number if any, that sort of
825 thing. It is recommended that if you add any "custom" property whose
826 name may clash with standard defined ones, you prefix them with your
827 vendor name and a comma.
831 This node is the parent of all individual CPU nodes. It doesn't
832 have any specific requirements, though it's generally good practice
835 #address-cells = <00000001>
836 #size-cells = <00000000>
838 This defines that the "address" for a CPU is a single cell, and has
839 no meaningful size. This is not necessary but the kernel will assume
840 that format when reading the "reg" properties of a CPU node, see
845 So under /cpus, you are supposed to create a node for every CPU on
846 the machine. There is no specific restriction on the name of the
847 CPU, though It's common practice to call it PowerPC,<name>. For
848 example, Apple uses PowerPC,G5 while IBM uses PowerPC,970FX.
852 - device_type : has to be "cpu"
853 - reg : This is the physical CPU number, it's a single 32-bit cell
854 and is also used as-is as the unit number for constructing the
855 unit name in the full path. For example, with 2 CPUs, you would
857 /cpus/PowerPC,970FX@0
858 /cpus/PowerPC,970FX@1
859 (unit addresses do not require leading zeroes)
860 - d-cache-block-size : one cell, L1 data cache block size in bytes (*)
861 - i-cache-block-size : one cell, L1 instruction cache block size in
863 - d-cache-size : one cell, size of L1 data cache in bytes
864 - i-cache-size : one cell, size of L1 instruction cache in bytes
866 (*) The cache "block" size is the size on which the cache management
867 instructions operate. Historically, this document used the cache
868 "line" size here which is incorrect. The kernel will prefer the cache
869 block size and will fallback to cache line size for backward
872 Recommended properties:
874 - timebase-frequency : a cell indicating the frequency of the
875 timebase in Hz. This is not directly used by the generic code,
876 but you are welcome to copy/paste the pSeries code for setting
877 the kernel timebase/decrementer calibration based on this
879 - clock-frequency : a cell indicating the CPU core clock frequency
880 in Hz. A new property will be defined for 64-bit values, but if
881 your frequency is < 4Ghz, one cell is enough. Here as well as
882 for the above, the common code doesn't use that property, but
883 you are welcome to re-use the pSeries or Maple one. A future
884 kernel version might provide a common function for this.
885 - d-cache-line-size : one cell, L1 data cache line size in bytes
886 if different from the block size
887 - i-cache-line-size : one cell, L1 instruction cache line size in
888 bytes if different from the block size
890 You are welcome to add any property you find relevant to your board,
891 like some information about the mechanism used to soft-reset the
892 CPUs. For example, Apple puts the GPIO number for CPU soft reset
893 lines in there as a "soft-reset" property since they start secondary
894 CPUs by soft-resetting them.
897 d) the /memory node(s)
899 To define the physical memory layout of your board, you should
900 create one or more memory node(s). You can either create a single
901 node with all memory ranges in its reg property, or you can create
902 several nodes, as you wish. The unit address (@ part) used for the
903 full path is the address of the first range of memory defined by a
904 given node. If you use a single memory node, this will typically be
909 - device_type : has to be "memory"
910 - reg : This property contains all the physical memory ranges of
911 your board. It's a list of addresses/sizes concatenated
912 together, with the number of cells of each defined by the
913 #address-cells and #size-cells of the root node. For example,
914 with both of these properties being 2 like in the example given
915 earlier, a 970 based machine with 6Gb of RAM could typically
916 have a "reg" property here that looks like:
918 00000000 00000000 00000000 80000000
919 00000001 00000000 00000001 00000000
921 That is a range starting at 0 of 0x80000000 bytes and a range
922 starting at 0x100000000 and of 0x100000000 bytes. You can see
923 that there is no memory covering the IO hole between 2Gb and
924 4Gb. Some vendors prefer splitting those ranges into smaller
925 segments, but the kernel doesn't care.
929 This node is a bit "special". Normally, that's where open firmware
930 puts some variable environment information, like the arguments, or
931 the default input/output devices.
933 This specification makes a few of these mandatory, but also defines
934 some linux-specific properties that would be normally constructed by
935 the prom_init() trampoline when booting with an OF client interface,
936 but that you have to provide yourself when using the flattened format.
938 Recommended properties:
940 - bootargs : This zero-terminated string is passed as the kernel
942 - linux,stdout-path : This is the full path to your standard
943 console device if any. Typically, if you have serial devices on
944 your board, you may want to put the full path to the one set as
945 the default console in the firmware here, for the kernel to pick
946 it up as its own default console. If you look at the function
947 set_preferred_console() in arch/ppc64/kernel/setup.c, you'll see
948 that the kernel tries to find out the default console and has
949 knowledge of various types like 8250 serial ports. You may want
950 to extend this function to add your own.
952 Note that u-boot creates and fills in the chosen node for platforms
955 (Note: a practice that is now obsolete was to include a property
956 under /chosen called interrupt-controller which had a phandle value
957 that pointed to the main interrupt controller)
959 f) the /soc<SOCname> node
961 This node is used to represent a system-on-a-chip (SOC) and must be
962 present if the processor is a SOC. The top-level soc node contains
963 information that is global to all devices on the SOC. The node name
964 should contain a unit address for the SOC, which is the base address
965 of the memory-mapped register set for the SOC. The name of an soc
966 node should start with "soc", and the remainder of the name should
967 represent the part number for the soc. For example, the MPC8540's
968 soc node would be called "soc8540".
972 - device_type : Should be "soc"
973 - ranges : Should be defined as specified in 1) to describe the
974 translation of SOC addresses for memory mapped SOC registers.
975 - bus-frequency: Contains the bus frequency for the SOC node.
976 Typically, the value of this field is filled in by the boot
980 Recommended properties:
982 - reg : This property defines the address and size of the
983 memory-mapped registers that are used for the SOC node itself.
984 It does not include the child device registers - these will be
985 defined inside each child node. The address specified in the
986 "reg" property should match the unit address of the SOC node.
987 - #address-cells : Address representation for "soc" devices. The
988 format of this field may vary depending on whether or not the
989 device registers are memory mapped. For memory mapped
990 registers, this field represents the number of cells needed to
991 represent the address of the registers. For SOCs that do not
992 use MMIO, a special address format should be defined that
993 contains enough cells to represent the required information.
994 See 1) above for more details on defining #address-cells.
995 - #size-cells : Size representation for "soc" devices
996 - #interrupt-cells : Defines the width of cells used to represent
997 interrupts. Typically this value is <2>, which includes a
998 32-bit number that represents the interrupt number, and a
999 32-bit number that represents the interrupt sense and level.
1000 This field is only needed if the SOC contains an interrupt
1003 The SOC node may contain child nodes for each SOC device that the
1004 platform uses. Nodes should not be created for devices which exist
1005 on the SOC but are not used by a particular platform. See chapter VI
1006 for more information on how to specify devices that are part of a SOC.
1008 Example SOC node for the MPC8540:
1011 #address-cells = <1>;
1013 #interrupt-cells = <2>;
1014 device_type = "soc";
1015 ranges = <00000000 e0000000 00100000>
1016 reg = <e0000000 00003000>;
1017 bus-frequency = <0>;
1022 IV - "dtc", the device tree compiler
1023 ====================================
1026 dtc source code can be found at
1027 <http://ozlabs.org/~dgibson/dtc/dtc.tar.gz>
1029 WARNING: This version is still in early development stage; the
1030 resulting device-tree "blobs" have not yet been validated with the
1031 kernel. The current generated bloc lacks a useful reserve map (it will
1032 be fixed to generate an empty one, it's up to the bootloader to fill
1033 it up) among others. The error handling needs work, bugs are lurking,
1036 dtc basically takes a device-tree in a given format and outputs a
1037 device-tree in another format. The currently supported formats are:
1042 - "dtb": "blob" format, that is a flattened device-tree block
1044 header all in a binary blob.
1045 - "dts": "source" format. This is a text file containing a
1046 "source" for a device-tree. The format is defined later in this
1048 - "fs" format. This is a representation equivalent to the
1049 output of /proc/device-tree, that is nodes are directories and
1050 properties are files
1055 - "dtb": "blob" format
1056 - "dts": "source" format
1057 - "asm": assembly language file. This is a file that can be
1058 sourced by gas to generate a device-tree "blob". That file can
1059 then simply be added to your Makefile. Additionally, the
1060 assembly file exports some symbols that can be used.
1063 The syntax of the dtc tool is
1065 dtc [-I <input-format>] [-O <output-format>]
1066 [-o output-filename] [-V output_version] input_filename
1069 The "output_version" defines what version of the "blob" format will be
1070 generated. Supported versions are 1,2,3 and 16. The default is
1071 currently version 3 but that may change in the future to version 16.
1073 Additionally, dtc performs various sanity checks on the tree, like the
1074 uniqueness of linux, phandle properties, validity of strings, etc...
1076 The format of the .dts "source" file is "C" like, supports C and C++
1082 The above is the "device-tree" definition. It's the only statement
1083 supported currently at the toplevel.
1086 property1 = "string_value"; /* define a property containing a 0
1090 property2 = <1234abcd>; /* define a property containing a
1091 * numerical 32-bit value (hexadecimal)
1094 property3 = <12345678 12345678 deadbeef>;
1095 /* define a property containing 3
1096 * numerical 32-bit values (cells) in
1099 property4 = [0a 0b 0c 0d de ea ad be ef];
1100 /* define a property whose content is
1101 * an arbitrary array of bytes
1104 childnode@addresss { /* define a child node named "childnode"
1105 * whose unit name is "childnode at
1109 childprop = "hello\n"; /* define a property "childprop" of
1110 * childnode (in this case, a string)
1115 Nodes can contain other nodes etc... thus defining the hierarchical
1116 structure of the tree.
1118 Strings support common escape sequences from C: "\n", "\t", "\r",
1119 "\(octal value)", "\x(hex value)".
1121 It is also suggested that you pipe your source file through cpp (gcc
1122 preprocessor) so you can use #include's, #define for constants, etc...
1124 Finally, various options are planned but not yet implemented, like
1125 automatic generation of phandles, labels (exported to the asm file so
1126 you can point to a property content and change it easily from whatever
1127 you link the device-tree with), label or path instead of numeric value
1128 in some cells to "point" to a node (replaced by a phandle at compile
1129 time), export of reserve map address to the asm file, ability to
1130 specify reserve map content at compile time, etc...
1132 We may provide a .h include file with common definitions of that
1133 proves useful for some properties (like building PCI properties or
1134 interrupt maps) though it may be better to add a notion of struct
1135 definitions to the compiler...
1138 V - Recommendations for a bootloader
1139 ====================================
1142 Here are some various ideas/recommendations that have been proposed
1143 while all this has been defined and implemented.
1145 - The bootloader may want to be able to use the device-tree itself
1146 and may want to manipulate it (to add/edit some properties,
1147 like physical memory size or kernel arguments). At this point, 2
1148 choices can be made. Either the bootloader works directly on the
1149 flattened format, or the bootloader has its own internal tree
1150 representation with pointers (similar to the kernel one) and
1151 re-flattens the tree when booting the kernel. The former is a bit
1152 more difficult to edit/modify, the later requires probably a bit
1153 more code to handle the tree structure. Note that the structure
1154 format has been designed so it's relatively easy to "insert"
1155 properties or nodes or delete them by just memmoving things
1156 around. It contains no internal offsets or pointers for this
1159 - An example of code for iterating nodes & retrieving properties
1160 directly from the flattened tree format can be found in the kernel
1161 file arch/ppc64/kernel/prom.c, look at scan_flat_dt() function,
1162 its usage in early_init_devtree(), and the corresponding various
1163 early_init_dt_scan_*() callbacks. That code can be re-used in a
1164 GPL bootloader, and as the author of that code, I would be happy
1165 to discuss possible free licensing to any vendor who wishes to
1166 integrate all or part of this code into a non-GPL bootloader.
1170 VI - System-on-a-chip devices and nodes
1171 =======================================
1173 Many companies are now starting to develop system-on-a-chip
1174 processors, where the processor core (CPU) and many peripheral devices
1175 exist on a single piece of silicon. For these SOCs, an SOC node
1176 should be used that defines child nodes for the devices that make
1177 up the SOC. While platforms are not required to use this model in
1178 order to boot the kernel, it is highly encouraged that all SOC
1179 implementations define as complete a flat-device-tree as possible to
1180 describe the devices on the SOC. This will allow for the
1181 genericization of much of the kernel code.
1184 1) Defining child nodes of an SOC
1185 ---------------------------------
1187 Each device that is part of an SOC may have its own node entry inside
1188 the SOC node. For each device that is included in the SOC, the unit
1189 address property represents the address offset for this device's
1190 memory-mapped registers in the parent's address space. The parent's
1191 address space is defined by the "ranges" property in the top-level soc
1192 node. The "reg" property for each node that exists directly under the
1193 SOC node should contain the address mapping from the child address space
1194 to the parent SOC address space and the size of the device's
1195 memory-mapped register file.
1197 For many devices that may exist inside an SOC, there are predefined
1198 specifications for the format of the device tree node. All SOC child
1199 nodes should follow these specifications, except where noted in this
1202 See appendix A for an example partial SOC node definition for the
1206 2) Representing devices without a current OF specification
1207 ----------------------------------------------------------
1209 Currently, there are many devices on SOCs that do not have a standard
1210 representation pre-defined as part of the open firmware
1211 specifications, mainly because the boards that contain these SOCs are
1212 not currently booted using open firmware. This section contains
1213 descriptions for the SOC devices for which new nodes have been
1214 defined; this list will expand as more and more SOC-containing
1215 platforms are moved over to use the flattened-device-tree model.
1219 The MDIO is a bus to which the PHY devices are connected. For each
1220 device that exists on this bus, a child node should be created. See
1221 the definition of the PHY node below for an example of how to define
1224 Required properties:
1225 - reg : Offset and length of the register set for the device
1226 - compatible : Should define the compatible device type for the
1227 mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
1233 compatible = "fsl,gianfar-mdio";
1241 b) Gianfar-compatible ethernet nodes
1243 Required properties:
1245 - device_type : Should be "network"
1246 - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
1247 - compatible : Should be "gianfar"
1248 - reg : Offset and length of the register set for the device
1249 - mac-address : List of bytes representing the ethernet address of
1251 - interrupts : <a b> where a is the interrupt number and b is a
1252 field that represents an encoding of the sense and level
1253 information for the interrupt. This should be encoded based on
1254 the information in section 2) depending on the type of interrupt
1255 controller you have.
1256 - interrupt-parent : the phandle for the interrupt controller that
1257 services interrupts for this device.
1258 - phy-handle : The phandle for the PHY connected to this ethernet
1261 Recommended properties:
1263 - linux,network-index : This is the intended "index" of this
1264 network device. This is used by the bootwrapper to interpret
1265 MAC addresses passed by the firmware when no information other
1266 than indices is available to associate an address with a device.
1267 - phy-connection-type : a string naming the controller/PHY interface type,
1268 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
1269 "tbi", or "rtbi". This property is only really needed if the connection
1270 is of type "rgmii-id", as all other connection types are detected by
1278 device_type = "network";
1280 compatible = "gianfar";
1282 mac-address = [ 00 E0 0C 00 73 00 ];
1283 interrupts = <d 3 e 3 12 3>;
1284 interrupt-parent = <40000>;
1285 phy-handle = <2452000>
1292 Required properties:
1294 - device_type : Should be "ethernet-phy"
1295 - interrupts : <a b> where a is the interrupt number and b is a
1296 field that represents an encoding of the sense and level
1297 information for the interrupt. This should be encoded based on
1298 the information in section 2) depending on the type of interrupt
1299 controller you have.
1300 - interrupt-parent : the phandle for the interrupt controller that
1301 services interrupts for this device.
1302 - reg : The ID number for the phy, usually a small integer
1303 - linux,phandle : phandle for this node; likely referenced by an
1304 ethernet controller node.
1310 linux,phandle = <2452000>
1311 interrupt-parent = <40000>;
1312 interrupts = <35 1>;
1314 device_type = "ethernet-phy";
1318 d) Interrupt controllers
1320 Some SOC devices contain interrupt controllers that are different
1321 from the standard Open PIC specification. The SOC device nodes for
1322 these types of controllers should be specified just like a standard
1323 OpenPIC controller. Sense and level information should be encoded
1324 as specified in section 2) of this chapter for each device that
1325 specifies an interrupt.
1330 linux,phandle = <40000>;
1331 clock-frequency = <0>;
1332 interrupt-controller;
1333 #address-cells = <0>;
1334 reg = <40000 40000>;
1336 compatible = "chrp,open-pic";
1337 device_type = "open-pic";
1344 Required properties :
1346 - device_type : Should be "i2c"
1347 - reg : Offset and length of the register set for the device
1349 Recommended properties :
1351 - compatible : Should be "fsl-i2c" for parts compatible with
1352 Freescale I2C specifications.
1353 - interrupts : <a b> where a is the interrupt number and b is a
1354 field that represents an encoding of the sense and level
1355 information for the interrupt. This should be encoded based on
1356 the information in section 2) depending on the type of interrupt
1357 controller you have.
1358 - interrupt-parent : the phandle for the interrupt controller that
1359 services interrupts for this device.
1360 - dfsrr : boolean; if defined, indicates that this I2C device has
1361 a digital filter sampling rate register
1362 - fsl5200-clocking : boolean; if defined, indicated that this device
1363 uses the FSL 5200 clocking mechanism.
1368 interrupt-parent = <40000>;
1369 interrupts = <1b 3>;
1371 device_type = "i2c";
1372 compatible = "fsl-i2c";
1377 f) Freescale SOC USB controllers
1379 The device node for a USB controller that is part of a Freescale
1380 SOC is as described in the document "Open Firmware Recommended
1381 Practice : Universal Serial Bus" with the following modifications
1384 Required properties :
1385 - compatible : Should be "fsl-usb2-mph" for multi port host USB
1386 controllers, or "fsl-usb2-dr" for dual role USB controllers
1387 - phy_type : For multi port host USB controllers, should be one of
1388 "ulpi", or "serial". For dual role USB controllers, should be
1389 one of "ulpi", "utmi", "utmi_wide", or "serial".
1390 - reg : Offset and length of the register set for the device
1391 - port0 : boolean; if defined, indicates port0 is connected for
1392 fsl-usb2-mph compatible controllers. Either this property or
1393 "port1" (or both) must be defined for "fsl-usb2-mph" compatible
1395 - port1 : boolean; if defined, indicates port1 is connected for
1396 fsl-usb2-mph compatible controllers. Either this property or
1397 "port0" (or both) must be defined for "fsl-usb2-mph" compatible
1399 - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
1400 controllers. Can be "host", "peripheral", or "otg". Default to
1401 "host" if not defined for backward compatibility.
1403 Recommended properties :
1404 - interrupts : <a b> where a is the interrupt number and b is a
1405 field that represents an encoding of the sense and level
1406 information for the interrupt. This should be encoded based on
1407 the information in section 2) depending on the type of interrupt
1408 controller you have.
1409 - interrupt-parent : the phandle for the interrupt controller that
1410 services interrupts for this device.
1412 Example multi port host USB controller device node :
1414 compatible = "fsl-usb2-mph";
1416 #address-cells = <1>;
1418 interrupt-parent = <700>;
1419 interrupts = <27 1>;
1425 Example dual role USB controller device node :
1427 compatible = "fsl-usb2-dr";
1429 #address-cells = <1>;
1431 interrupt-parent = <700>;
1432 interrupts = <26 1>;
1438 g) Freescale SOC SEC Security Engines
1440 Required properties:
1442 - device_type : Should be "crypto"
1443 - model : Model of the device. Should be "SEC1" or "SEC2"
1444 - compatible : Should be "talitos"
1445 - reg : Offset and length of the register set for the device
1446 - interrupts : <a b> where a is the interrupt number and b is a
1447 field that represents an encoding of the sense and level
1448 information for the interrupt. This should be encoded based on
1449 the information in section 2) depending on the type of interrupt
1450 controller you have.
1451 - interrupt-parent : the phandle for the interrupt controller that
1452 services interrupts for this device.
1453 - num-channels : An integer representing the number of channels
1455 - channel-fifo-len : An integer representing the number of
1456 descriptor pointers each channel fetch fifo can hold.
1457 - exec-units-mask : The bitmask representing what execution units
1458 (EUs) are available. It's a single 32-bit cell. EU information
1459 should be encoded following the SEC's Descriptor Header Dword
1460 EU_SEL0 field documentation, i.e. as follows:
1462 bit 0 = reserved - should be 0
1463 bit 1 = set if SEC has the ARC4 EU (AFEU)
1464 bit 2 = set if SEC has the DES/3DES EU (DEU)
1465 bit 3 = set if SEC has the message digest EU (MDEU)
1466 bit 4 = set if SEC has the random number generator EU (RNG)
1467 bit 5 = set if SEC has the public key EU (PKEU)
1468 bit 6 = set if SEC has the AES EU (AESU)
1469 bit 7 = set if SEC has the Kasumi EU (KEU)
1471 bits 8 through 31 are reserved for future SEC EUs.
1473 - descriptor-types-mask : The bitmask representing what descriptors
1474 are available. It's a single 32-bit cell. Descriptor type
1475 information should be encoded following the SEC's Descriptor
1476 Header Dword DESC_TYPE field documentation, i.e. as follows:
1478 bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
1479 bit 1 = set if SEC supports the ipsec_esp descriptor type
1480 bit 2 = set if SEC supports the common_nonsnoop desc. type
1481 bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
1482 bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
1483 bit 5 = set if SEC supports the srtp descriptor type
1484 bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
1485 bit 7 = set if SEC supports the pkeu_assemble descriptor type
1486 bit 8 = set if SEC supports the aesu_key_expand_output desc.type
1487 bit 9 = set if SEC supports the pkeu_ptmul descriptor type
1488 bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
1489 bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
1491 ..and so on and so forth.
1497 device_type = "crypto";
1499 compatible = "talitos";
1500 reg = <30000 10000>;
1501 interrupts = <1d 3>;
1502 interrupt-parent = <40000>;
1504 channel-fifo-len = <18>;
1505 exec-units-mask = <000000fe>;
1506 descriptor-types-mask = <012b0ebf>;
1509 h) Board Control and Status (BCSR)
1511 Required properties:
1513 - device_type : Should be "board-control"
1514 - reg : Offset and length of the register set for the device
1519 device_type = "board-control";
1520 reg = <f8000000 8000>;
1523 i) Freescale QUICC Engine module (QE)
1524 This represents qe module that is installed on PowerQUICC II Pro.
1526 NOTE: This is an interim binding; it should be updated to fit
1527 in with the CPM binding later in this document.
1529 Basically, it is a bus of devices, that could act more or less
1530 as a complete entity (UCC, USB etc ). All of them should be siblings on
1531 the "root" qe node, using the common properties from there.
1532 The description below applies to the qe of MPC8360 and
1533 more nodes and properties would be extended in the future.
1537 Required properties:
1538 - device_type : should be "qe";
1539 - model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
1540 - reg : offset and length of the device registers.
1541 - bus-frequency : the clock frequency for QUICC Engine.
1543 Recommended properties
1544 - brg-frequency : the internal clock source frequency for baud-rate
1549 #address-cells = <1>;
1551 #interrupt-cells = <2>;
1554 ranges = <0 e0100000 00100000>;
1555 reg = <e0100000 480>;
1556 brg-frequency = <0>;
1557 bus-frequency = <179A7B00>;
1561 ii) SPI (Serial Peripheral Interface)
1563 Required properties:
1564 - device_type : should be "spi".
1565 - compatible : should be "fsl_spi".
1566 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
1567 - reg : Offset and length of the register set for the device
1568 - interrupts : <a b> where a is the interrupt number and b is a
1569 field that represents an encoding of the sense and level
1570 information for the interrupt. This should be encoded based on
1571 the information in section 2) depending on the type of interrupt
1572 controller you have.
1573 - interrupt-parent : the phandle for the interrupt controller that
1574 services interrupts for this device.
1578 device_type = "spi";
1579 compatible = "fsl_spi";
1581 interrupts = <82 0>;
1582 interrupt-parent = <700>;
1587 iii) USB (Universal Serial Bus Controller)
1589 Required properties:
1590 - compatible : could be "qe_udc" or "fhci-hcd".
1591 - mode : the could be "host" or "slave".
1592 - reg : Offset and length of the register set for the device
1593 - interrupts : <a b> where a is the interrupt number and b is a
1594 field that represents an encoding of the sense and level
1595 information for the interrupt. This should be encoded based on
1596 the information in section 2) depending on the type of interrupt
1597 controller you have.
1598 - interrupt-parent : the phandle for the interrupt controller that
1599 services interrupts for this device.
1603 compatible = "qe_udc";
1605 interrupts = <8b 0>;
1606 interrupt-parent = <700>;
1611 iv) UCC (Unified Communications Controllers)
1613 Required properties:
1614 - device_type : should be "network", "hldc", "uart", "transparent"
1616 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
1617 - model : should be "UCC".
1618 - device-id : the ucc number(1-8), corresponding to UCCx in UM.
1619 - reg : Offset and length of the register set for the device
1620 - interrupts : <a b> where a is the interrupt number and b is a
1621 field that represents an encoding of the sense and level
1622 information for the interrupt. This should be encoded based on
1623 the information in section 2) depending on the type of interrupt
1624 controller you have.
1625 - interrupt-parent : the phandle for the interrupt controller that
1626 services interrupts for this device.
1627 - pio-handle : The phandle for the Parallel I/O port configuration.
1628 - rx-clock-name: the UCC receive clock source
1629 "none": clock source is disabled
1630 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
1631 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
1632 - tx-clock-name: the UCC transmit clock source
1633 "none": clock source is disabled
1634 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
1635 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
1636 The following two properties are deprecated. rx-clock has been replaced
1637 with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
1638 Drivers that currently use the deprecated properties should continue to
1639 do so, in order to support older device trees, but they should be updated
1640 to check for the new properties first.
1641 - rx-clock : represents the UCC receive clock source.
1642 0x00 : clock source is disabled;
1643 0x1~0x10 : clock source is BRG1~BRG16 respectively;
1644 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
1645 - tx-clock: represents the UCC transmit clock source;
1646 0x00 : clock source is disabled;
1647 0x1~0x10 : clock source is BRG1~BRG16 respectively;
1648 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
1650 Required properties for network device_type:
1651 - mac-address : list of bytes representing the ethernet address.
1652 - phy-handle : The phandle for the PHY connected to this controller.
1654 Recommended properties:
1655 - linux,network-index : This is the intended "index" of this
1656 network device. This is used by the bootwrapper to interpret
1657 MAC addresses passed by the firmware when no information other
1658 than indices is available to associate an address with a device.
1659 - phy-connection-type : a string naming the controller/PHY interface type,
1660 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
1661 Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
1666 device_type = "network";
1667 compatible = "ucc_geth";
1671 interrupts = <a0 0>;
1672 interrupt-parent = <700>;
1673 mac-address = [ 00 04 9f 00 23 23 ];
1676 phy-handle = <212000>;
1677 phy-connection-type = "gmii";
1678 pio-handle = <140001>;
1682 v) Parallel I/O Ports
1684 This node configures Parallel I/O ports for CPUs with QE support.
1685 The node should reside in the "soc" node of the tree. For each
1686 device that using parallel I/O ports, a child node should be created.
1687 See the definition of the Pin configuration nodes below for more
1690 Required properties:
1691 - device_type : should be "par_io".
1692 - reg : offset to the register set and its length.
1693 - num-ports : number of Parallel I/O ports
1698 #address-cells = <1>;
1700 device_type = "par_io";
1707 vi) Pin configuration nodes
1709 Required properties:
1710 - linux,phandle : phandle of this node; likely referenced by a QE
1712 - pio-map : array of pin configurations. Each pin is defined by 6
1713 integers. The six numbers are respectively: port, pin, dir,
1714 open_drain, assignment, has_irq.
1715 - port : port number of the pin; 0-6 represent port A-G in UM.
1716 - pin : pin number in the port.
1717 - dir : direction of the pin, should encode as follows:
1719 0 = The pin is disabled
1720 1 = The pin is an output
1721 2 = The pin is an input
1724 - open_drain : indicates the pin is normal or wired-OR:
1726 0 = The pin is actively driven as an output
1727 1 = The pin is an open-drain driver. As an output, the pin is
1728 driven active-low, otherwise it is three-stated.
1730 - assignment : function number of the pin according to the Pin Assignment
1731 tables in User Manual. Each pin can have up to 4 possible functions in
1732 QE and two options for CPM.
1733 - has_irq : indicates if the pin is used as source of external
1738 linux,phandle = <140001>;
1740 /* port pin dir open_drain assignment has_irq */
1741 0 3 1 0 1 0 /* TxD0 */
1742 0 4 1 0 1 0 /* TxD1 */
1743 0 5 1 0 1 0 /* TxD2 */
1744 0 6 1 0 1 0 /* TxD3 */
1745 1 6 1 0 3 0 /* TxD4 */
1746 1 7 1 0 1 0 /* TxD5 */
1747 1 9 1 0 2 0 /* TxD6 */
1748 1 a 1 0 2 0 /* TxD7 */
1749 0 9 2 0 1 0 /* RxD0 */
1750 0 a 2 0 1 0 /* RxD1 */
1751 0 b 2 0 1 0 /* RxD2 */
1752 0 c 2 0 1 0 /* RxD3 */
1753 0 d 2 0 1 0 /* RxD4 */
1754 1 1 2 0 2 0 /* RxD5 */
1755 1 0 2 0 2 0 /* RxD6 */
1756 1 4 2 0 2 0 /* RxD7 */
1757 0 7 1 0 1 0 /* TX_EN */
1758 0 8 1 0 1 0 /* TX_ER */
1759 0 f 2 0 1 0 /* RX_DV */
1760 0 10 2 0 1 0 /* RX_ER */
1761 0 0 2 0 1 0 /* RX_CLK */
1762 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
1763 2 8 2 0 1 0>; /* GTX125 - CLK9 */
1766 vii) Multi-User RAM (MURAM)
1768 Required properties:
1769 - device_type : should be "muram".
1770 - mode : the could be "host" or "slave".
1771 - ranges : Should be defined as specified in 1) to describe the
1772 translation of MURAM addresses.
1773 - data-only : sub-node which defines the address area under MURAM
1774 bus that can be allocated as data/parameter
1779 device_type = "muram";
1780 ranges = <0 00010000 0000c000>;
1787 j) CFI or JEDEC memory-mapped NOR flash
1789 Flash chips (Memory Technology Devices) are often used for solid state
1790 file systems on embedded devices.
1792 - compatible : should contain the specific model of flash chip(s)
1793 used, if known, followed by either "cfi-flash" or "jedec-flash"
1794 - reg : Address range of the flash chip
1795 - bank-width : Width (in bytes) of the flash bank. Equal to the
1796 device width times the number of interleaved chips.
1797 - device-width : (optional) Width of a single flash chip. If
1798 omitted, assumed to be equal to 'bank-width'.
1799 - #address-cells, #size-cells : Must be present if the flash has
1800 sub-nodes representing partitions (see below). In this case
1801 both #address-cells and #size-cells must be equal to 1.
1803 For JEDEC compatible devices, the following additional properties
1806 - vendor-id : Contains the flash chip's vendor id (1 byte).
1807 - device-id : Contains the flash chip's device id (1 byte).
1809 In addition to the information on the flash bank itself, the
1810 device tree may optionally contain additional information
1811 describing partitions of the flash address space. This can be
1812 used on platforms which have strong conventions about which
1813 portions of the flash are used for what purposes, but which don't
1814 use an on-flash partition table such as RedBoot.
1816 Each partition is represented as a sub-node of the flash device.
1817 Each node's name represents the name of the corresponding
1818 partition of the flash device.
1821 - reg : The partition's offset and size within the flash bank.
1822 - label : (optional) The label / name for this flash partition.
1823 If omitted, the label is taken from the node name (excluding
1825 - read-only : (optional) This parameter, if present, is a hint to
1826 Linux that this flash partition should only be mounted
1827 read-only. This is usually used for flash partitions
1828 containing early-boot firmware images or data which should not
1834 compatible = "amd,am29lv128ml", "cfi-flash";
1835 reg = <ff000000 01000000>;
1838 #address-cells = <1>;
1846 reg = <f80000 80000>;
1851 k) Global Utilities Block
1853 The global utilities block controls power management, I/O device
1854 enabling, power-on-reset configuration monitoring, general-purpose
1855 I/O signal configuration, alternate function selection for multiplexed
1856 signals, and clock control.
1858 Required properties:
1860 - compatible : Should define the compatible device type for
1862 - reg : Offset and length of the register set for the device.
1864 Recommended properties:
1866 - fsl,has-rstcr : Indicates that the global utilities register set
1867 contains a functioning "reset control register" (i.e. the board
1868 is wired to reset upon setting the HRESET_REQ bit in this register).
1872 global-utilities@e0000 { /* global utilities block */
1873 compatible = "fsl,mpc8548-guts";
1878 l) Freescale Communications Processor Module
1880 NOTE: This is an interim binding, and will likely change slightly,
1881 as more devices are supported. The QE bindings especially are
1887 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
1888 - reg : A 48-byte region beginning with CPCR.
1892 #address-cells = <1>;
1894 #interrupt-cells = <2>;
1895 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
1899 ii) Properties common to mulitple CPM/QE devices
1901 - fsl,cpm-command : This value is ORed with the opcode and command flag
1902 to specify the device on which a CPM command operates.
1904 - fsl,cpm-brg : Indicates which baud rate generator the device
1905 is associated with. If absent, an unused BRG
1906 should be dynamically allocated. If zero, the
1907 device uses an external clock rather than a BRG.
1909 - reg : Unless otherwise specified, the first resource represents the
1910 scc/fcc/ucc registers, and the second represents the device's
1911 parameter RAM region (if it has one).
1915 Currently defined compatibles:
1925 device_type = "serial";
1926 compatible = "fsl,mpc8272-scc-uart",
1927 "fsl,cpm2-scc-uart";
1928 reg = <11a00 20 8000 100>;
1929 interrupts = <28 8>;
1930 interrupt-parent = <&PIC>;
1932 fsl,cpm-command = <00800000>;
1937 Currently defined compatibles:
1941 - fsl,cpm2-fcc-enet (third resource is GFEMR)
1947 device_type = "network";
1948 compatible = "fsl,mpc8272-fcc-enet",
1949 "fsl,cpm2-fcc-enet";
1950 reg = <11300 20 8400 100 11390 1>;
1951 local-mac-address = [ 00 00 00 00 00 00 ];
1952 interrupts = <20 8>;
1953 interrupt-parent = <&PIC>;
1954 phy-handle = <&PHY0>;
1955 linux,network-index = <0>;
1956 fsl,cpm-command = <12000300>;
1961 Currently defined compatibles:
1962 fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
1963 fsl,cpm2-mdio-bitbang (reg is port C registers)
1965 Properties for fsl,cpm2-mdio-bitbang:
1966 fsl,mdio-pin : pin of port C controlling mdio data
1967 fsl,mdc-pin : pin of port C controlling mdio clock
1972 device_type = "mdio";
1973 compatible = "fsl,mpc8272ads-mdio-bitbang",
1974 "fsl,mpc8272-mdio-bitbang",
1975 "fsl,cpm2-mdio-bitbang";
1977 #address-cells = <1>;
1979 fsl,mdio-pin = <12>;
1983 v) Baud Rate Generators
1985 Currently defined compatibles:
1991 - reg : There may be an arbitrary number of reg resources; BRG
1992 numbers are assigned to these in order.
1993 - clock-frequency : Specifies the base frequency driving
1999 compatible = "fsl,mpc8272-brg",
2002 reg = <119f0 10 115f0 10>;
2003 clock-frequency = <d#25000000>;
2006 vi) Interrupt Controllers
2008 Currently defined compatibles:
2010 - only one interrupt cell
2013 - second interrupt cell is level/sense:
2019 interrupt-controller@10c00 {
2020 #interrupt-cells = <2>;
2021 interrupt-controller;
2023 compatible = "mpc8272-pic", "fsl,cpm2-pic";
2026 vii) USB (Universal Serial Bus Controller)
2029 - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
2033 #address-cells = <1>;
2035 compatible = "fsl,cpm2-usb";
2036 reg = <11b60 18 8b00 100>;
2038 interrupt-parent = <&PIC>;
2039 fsl,cpm-command = <2e600000>;
2042 viii) Multi-User RAM (MURAM)
2044 The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
2046 Ranges must be set up subject to the following restrictions:
2048 - Children's reg nodes must be offsets from the start of all muram, even
2049 if the user-data area does not begin at zero.
2050 - If multiple range entries are used, the difference between the parent
2051 address and the child address must be the same in all, so that a single
2052 mapping can cover them all while maintaining the ability to determine
2053 CPM-side offsets with pointer subtraction. It is recommended that
2054 multiple range entries not be used.
2055 - A child address of zero must be translatable, even if no reg resources
2058 A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
2059 indicate the portion of muram that is usable by the OS for arbitrary
2060 purposes. The data node may have an arbitrary number of reg resources,
2061 all of which contribute to the allocatable muram pool.
2063 Example, based on mpc8272:
2066 #address-cells = <1>;
2068 ranges = <0 0 10000>;
2071 compatible = "fsl,cpm-muram-data";
2072 reg = <0 2000 9800 800>;
2076 m) Chipselect/Local Bus
2079 - name : Should be localbus
2080 - #address-cells : Should be either two or three. The first cell is the
2081 chipselect number, and the remaining cells are the
2082 offset into the chipselect.
2083 - #size-cells : Either one or two, depending on how large each chipselect
2085 - ranges : Each range corresponds to a single chipselect, and cover
2086 the entire access window as configured.
2090 compatible = "fsl,mpc8272-localbus",
2092 #address-cells = <2>;
2094 reg = <f0010100 40>;
2096 ranges = <0 0 fe000000 02000000
2097 1 0 f4500000 00008000>;
2100 compatible = "jedec-flash";
2101 reg = <0 0 2000000>;
2108 compatible = "fsl,mpc8272ads-bcsr";
2113 n) 4xx/Axon EMAC ethernet nodes
2115 The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
2116 the Axon bridge. To operate this needs to interact with a ths
2117 special McMAL DMA controller, and sometimes an RGMII or ZMII
2118 interface. In addition to the nodes and properties described
2119 below, the node for the OPB bus on which the EMAC sits must have a
2120 correct clock-frequency property.
2122 i) The EMAC node itself
2124 Required properties:
2125 - device_type : "network"
2127 - compatible : compatible list, contains 2 entries, first is
2128 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
2129 405gp, Axon) and second is either "ibm,emac" or
2130 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
2132 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
2133 - interrupt-parent : optional, if needed for interrupt mapping
2134 - reg : <registers mapping>
2135 - local-mac-address : 6 bytes, MAC address
2136 - mal-device : phandle of the associated McMAL node
2137 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
2139 - mal-rx-channel : 1 cell, index of the rx channel on McMAL associated
2141 - cell-index : 1 cell, hardware index of the EMAC cell on a given
2142 ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on
2144 - max-frame-size : 1 cell, maximum frame size supported in bytes
2145 - rx-fifo-size : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec
2148 - tx-fifo-size : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec
2151 - fifo-entry-size : 1 cell, size of a fifo entry (used to calculate
2153 For Axon, 0x00000010
2154 - mal-burst-size : 1 cell, MAL burst size (used to calculate thresholds)
2156 For Axon, 0x00000100 (I think ...)
2157 - phy-mode : string, mode of operations of the PHY interface.
2158 Supported values are: "mii", "rmii", "smii", "rgmii",
2159 "tbi", "gmii", rtbi", "sgmii".
2160 For Axon on CAB, it is "rgmii"
2161 - mdio-device : 1 cell, required iff using shared MDIO registers
2162 (440EP). phandle of the EMAC to use to drive the
2163 MDIO lines for the PHY used by this EMAC.
2164 - zmii-device : 1 cell, required iff connected to a ZMII. phandle of
2165 the ZMII device node
2166 - zmii-channel : 1 cell, required iff connected to a ZMII. Which ZMII
2167 channel or 0xffffffff if ZMII is only used for MDIO.
2168 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
2169 of the RGMII device node.
2170 For Axon: phandle of plb5/plb4/opb/rgmii
2171 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
2172 RGMII channel is used by this EMAC.
2173 Fox Axon: present, whatever value is appropriate for each
2174 EMAC, that is the content of the current (bogus) "phy-port"
2177 Recommended properties:
2178 - linux,network-index : This is the intended "index" of this
2179 network device. This is used by the bootwrapper to interpret
2180 MAC addresses passed by the firmware when no information other
2181 than indices is available to associate an address with a device.
2183 Optional properties:
2184 - phy-address : 1 cell, optional, MDIO address of the PHY. If absent,
2185 a search is performed.
2186 - phy-map : 1 cell, optional, bitmap of addresses to probe the PHY
2187 for, used if phy-address is absent. bit 0x00000001 is
2189 For Axon it can be absent, thouugh my current driver
2190 doesn't handle phy-address yet so for now, keep
2192 - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
2193 operations (if absent the value is the same as
2194 rx-fifo-size). For Axon, either absent or 2048.
2195 - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec
2196 operations (if absent the value is the same as
2197 tx-fifo-size). For Axon, either absent or 2048.
2198 - tah-device : 1 cell, optional. If connected to a TAH engine for
2199 offload, phandle of the TAH device node.
2200 - tah-channel : 1 cell, optional. If appropriate, channel used on the
2205 EMAC0: ethernet@40000800 {
2206 linux,network-index = <0>;
2207 device_type = "network";
2208 compatible = "ibm,emac-440gp", "ibm,emac";
2209 interrupt-parent = <&UIC1>;
2210 interrupts = <1c 4 1d 4>;
2211 reg = <40000800 70>;
2212 local-mac-address = [00 04 AC E3 1B 1E];
2213 mal-device = <&MAL0>;
2214 mal-tx-channel = <0 1>;
2215 mal-rx-channel = <0>;
2217 max-frame-size = <5dc>;
2218 rx-fifo-size = <1000>;
2219 tx-fifo-size = <800>;
2221 phy-map = <00000001>;
2222 zmii-device = <&ZMII0>;
2228 Required properties:
2229 - device_type : "dma-controller"
2230 - compatible : compatible list, containing 2 entries, first is
2231 "ibm,mcmal-CHIP" where CHIP is the host ASIC (like
2232 emac) and the second is either "ibm,mcmal" or
2234 For Axon, "ibm,mcmal-axon","ibm,mcmal2"
2235 - interrupts : <interrupt mapping for the MAL interrupts sources:
2236 5 sources: tx_eob, rx_eob, serr, txde, rxde>.
2237 For Axon: This is _different_ from the current
2238 firmware. We use the "delayed" interrupts for txeob
2239 and rxeob. Thus we end up with mapping those 5 MPIC
2240 interrupts, all level positive sensitive: 10, 11, 32,
2242 - dcr-reg : < DCR registers range >
2243 - dcr-parent : if needed for dcr-reg
2244 - num-tx-chans : 1 cell, number of Tx channels
2245 - num-rx-chans : 1 cell, number of Rx channels
2249 Required properties:
2250 - compatible : compatible list, containing 2 entries, first is
2251 "ibm,zmii-CHIP" where CHIP is the host ASIC (like
2252 EMAC) and the second is "ibm,zmii".
2253 For Axon, there is no ZMII node.
2254 - reg : <registers mapping>
2258 Required properties:
2259 - compatible : compatible list, containing 2 entries, first is
2260 "ibm,rgmii-CHIP" where CHIP is the host ASIC (like
2261 EMAC) and the second is "ibm,rgmii".
2262 For Axon, "ibm,rgmii-axon","ibm,rgmii"
2263 - reg : <registers mapping>
2264 - revision : as provided by the RGMII new version register if
2266 For Axon: 0x0000012a
2270 The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
2271 in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range
2272 of standard device types (network, serial, etc.) and miscellanious
2273 devices (gpio, LCD, spi, etc). Also, since these devices are
2274 implemented within the fpga fabric every instance of the device can be
2275 synthesised with different options that change the behaviour.
2277 Each IP-core has a set of parameters which the FPGA designer can use to
2278 control how the core is synthesized. Historically, the EDK tool would
2279 extract the device parameters relevant to device drivers and copy them
2280 into an 'xparameters.h' in the form of #define symbols. This tells the
2281 device drivers how the IP cores are configured, but it requres the kernel
2282 to be recompiled every time the FPGA bitstream is resynthesized.
2284 The new approach is to export the parameters into the device tree and
2285 generate a new device tree each time the FPGA bitstream changes. The
2286 parameters which used to be exported as #defines will now become
2287 properties of the device node. In general, device nodes for IP-cores
2288 will take the following form:
2290 (name): (generic-name)@(base-address) {
2291 compatible = "xlnx,(ip-core-name)-(HW_VER)"
2292 [, (list of compatible devices), ...];
2293 reg = <(baseaddr) (size)>;
2294 interrupt-parent = <&interrupt-controller-phandle>;
2295 interrupts = < ... >;
2296 xlnx,(parameter1) = "(string-value)";
2297 xlnx,(parameter2) = <(int-value)>;
2300 (generic-name): an open firmware-style name that describes the
2301 generic class of device. Preferably, this is one word, such
2302 as 'serial' or 'ethernet'.
2303 (ip-core-name): the name of the ip block (given after the BEGIN
2304 directive in system.mhs). Should be in lowercase
2305 and all underscores '_' converted to dashes '-'.
2306 (name): is derived from the "PARAMETER INSTANCE" value.
2307 (parameter#): C_* parameters from system.mhs. The C_ prefix is
2308 dropped from the parameter name, the name is converted
2309 to lowercase and all underscore '_' characters are
2310 converted to dashes '-'.
2311 (baseaddr): the baseaddr parameter value (often named C_BASEADDR).
2312 (HW_VER): from the HW_VER parameter.
2313 (size): the address range size (often C_HIGHADDR - C_BASEADDR + 1).
2315 Typically, the compatible list will include the exact IP core version
2316 followed by an older IP core version which implements the same
2317 interface or any other device with the same interface.
2319 'reg', 'interrupt-parent' and 'interrupts' are all optional properties.
2321 For example, the following block from system.mhs:
2324 PARAMETER INSTANCE = opb_uartlite_0
2325 PARAMETER HW_VER = 1.00.b
2326 PARAMETER C_BAUDRATE = 115200
2327 PARAMETER C_DATA_BITS = 8
2328 PARAMETER C_ODD_PARITY = 0
2329 PARAMETER C_USE_PARITY = 0
2330 PARAMETER C_CLK_FREQ = 50000000
2331 PARAMETER C_BASEADDR = 0xEC100000
2332 PARAMETER C_HIGHADDR = 0xEC10FFFF
2333 BUS_INTERFACE SOPB = opb_7
2334 PORT OPB_Clk = CLK_50MHz
2335 PORT Interrupt = opb_uartlite_0_Interrupt
2336 PORT RX = opb_uartlite_0_RX
2337 PORT TX = opb_uartlite_0_TX
2338 PORT OPB_Rst = sys_bus_reset_0
2341 becomes the following device tree node:
2343 opb_uartlite_0: serial@ec100000 {
2344 device_type = "serial";
2345 compatible = "xlnx,opb-uartlite-1.00.b";
2346 reg = <ec100000 10000>;
2347 interrupt-parent = <&opb_intc_0>;
2348 interrupts = <1 0>; // got this from the opb_intc parameters
2349 current-speed = <d#115200>; // standard serial device prop
2350 clock-frequency = <d#50000000>; // standard serial device prop
2351 xlnx,data-bits = <8>;
2352 xlnx,odd-parity = <0>;
2353 xlnx,use-parity = <0>;
2356 Some IP cores actually implement 2 or more logical devices. In
2357 this case, the device should still describe the whole IP core with
2358 a single node and add a child node for each logical device. The
2359 ranges property can be used to translate from parent IP-core to the
2360 registers of each device. In addition, the parent node should be
2361 compatible with the bus type 'xlnx,compound', and should contain
2362 #address-cells and #size-cells, as with any other bus. (Note: this
2363 makes the assumption that both logical devices have the same bus
2364 binding. If this is not true, then separate nodes should be used
2365 for each logical device). The 'cell-index' property can be used to
2366 enumerate logical devices within an IP core. For example, the
2367 following is the system.mhs entry for the dual ps2 controller found
2368 on the ml403 reference design.
2370 BEGIN opb_ps2_dual_ref
2371 PARAMETER INSTANCE = opb_ps2_dual_ref_0
2372 PARAMETER HW_VER = 1.00.a
2373 PARAMETER C_BASEADDR = 0xA9000000
2374 PARAMETER C_HIGHADDR = 0xA9001FFF
2375 BUS_INTERFACE SOPB = opb_v20_0
2376 PORT Sys_Intr1 = ps2_1_intr
2377 PORT Sys_Intr2 = ps2_2_intr
2378 PORT Clkin1 = ps2_clk_rx_1
2379 PORT Clkin2 = ps2_clk_rx_2
2380 PORT Clkpd1 = ps2_clk_tx_1
2381 PORT Clkpd2 = ps2_clk_tx_2
2382 PORT Rx1 = ps2_d_rx_1
2383 PORT Rx2 = ps2_d_rx_2
2384 PORT Txpd1 = ps2_d_tx_1
2385 PORT Txpd2 = ps2_d_tx_2
2388 It would result in the following device tree nodes:
2390 opb_ps2_dual_ref_0: opb-ps2-dual-ref@a9000000 {
2391 #address-cells = <1>;
2393 compatible = "xlnx,compound";
2394 ranges = <0 a9000000 2000>;
2395 // If this device had extra parameters, then they would
2398 compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
2400 interrupt-parent = <&opb_intc_0>;
2405 compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
2407 interrupt-parent = <&opb_intc_0>;
2413 Also, the system.mhs file defines bus attachments from the processor
2414 to the devices. The device tree structure should reflect the bus
2415 attachments. Again an example; this system.mhs fragment:
2417 BEGIN ppc405_virtex4
2418 PARAMETER INSTANCE = ppc405_0
2419 PARAMETER HW_VER = 1.01.a
2420 BUS_INTERFACE DPLB = plb_v34_0
2421 BUS_INTERFACE IPLB = plb_v34_0
2425 PARAMETER INSTANCE = opb_intc_0
2426 PARAMETER HW_VER = 1.00.c
2427 PARAMETER C_BASEADDR = 0xD1000FC0
2428 PARAMETER C_HIGHADDR = 0xD1000FDF
2429 BUS_INTERFACE SOPB = opb_v20_0
2433 PARAMETER INSTANCE = opb_uart16550_0
2434 PARAMETER HW_VER = 1.00.d
2435 PARAMETER C_BASEADDR = 0xa0000000
2436 PARAMETER C_HIGHADDR = 0xa0001FFF
2437 BUS_INTERFACE SOPB = opb_v20_0
2441 PARAMETER INSTANCE = plb_v34_0
2442 PARAMETER HW_VER = 1.02.a
2445 BEGIN plb_bram_if_cntlr
2446 PARAMETER INSTANCE = plb_bram_if_cntlr_0
2447 PARAMETER HW_VER = 1.00.b
2448 PARAMETER C_BASEADDR = 0xFFFF0000
2449 PARAMETER C_HIGHADDR = 0xFFFFFFFF
2450 BUS_INTERFACE SPLB = plb_v34_0
2453 BEGIN plb2opb_bridge
2454 PARAMETER INSTANCE = plb2opb_bridge_0
2455 PARAMETER HW_VER = 1.01.a
2456 PARAMETER C_RNG0_BASEADDR = 0x20000000
2457 PARAMETER C_RNG0_HIGHADDR = 0x3FFFFFFF
2458 PARAMETER C_RNG1_BASEADDR = 0x60000000
2459 PARAMETER C_RNG1_HIGHADDR = 0x7FFFFFFF
2460 PARAMETER C_RNG2_BASEADDR = 0x80000000
2461 PARAMETER C_RNG2_HIGHADDR = 0xBFFFFFFF
2462 PARAMETER C_RNG3_BASEADDR = 0xC0000000
2463 PARAMETER C_RNG3_HIGHADDR = 0xDFFFFFFF
2464 BUS_INTERFACE SPLB = plb_v34_0
2465 BUS_INTERFACE MOPB = opb_v20_0
2468 Gives this device tree (some properties removed for clarity):
2471 #address-cells = <1>;
2473 compatible = "xlnx,plb-v34-1.02.a";
2474 device_type = "ibm,plb";
2475 ranges; // 1:1 translation
2477 plb_bram_if_cntrl_0: bram@ffff0000 {
2478 reg = <ffff0000 10000>;
2482 #address-cells = <1>;
2484 ranges = <20000000 20000000 20000000
2485 60000000 60000000 20000000
2486 80000000 80000000 40000000
2487 c0000000 c0000000 20000000>;
2489 opb_uart16550_0: serial@a0000000 {
2490 reg = <a00000000 2000>;
2493 opb_intc_0: interrupt-controller@d1000fc0 {
2494 reg = <d1000fc0 20>;
2499 That covers the general approach to binding xilinx IP cores into the
2500 device tree. The following are bindings for specific devices:
2502 i) Xilinx ML300 Framebuffer
2504 Simple framebuffer device from the ML300 reference design (also on the
2505 ML403 reference design as well as others).
2507 Optional properties:
2508 - resolution = <xres yres> : pixel resolution of framebuffer. Some
2509 implementations use a different resolution.
2510 Default is <d#640 d#480>
2511 - virt-resolution = <xvirt yvirt> : Size of framebuffer in memory.
2512 Default is <d#1024 d#480>.
2513 - rotate-display (empty) : rotate display 180 degrees.
2515 ii) Xilinx SystemACE
2517 The Xilinx SystemACE device is used to program FPGAs from an FPGA
2518 bitstream stored on a CF card. It can also be used as a generic CF
2521 Optional properties:
2522 - 8-bit (empty) : Set this property for SystemACE in 8 bit mode
2524 iii) Xilinx EMAC and Xilinx TEMAC
2526 Xilinx Ethernet devices. In addition to general xilinx properties
2527 listed above, nodes for these devices should include a phy-handle
2528 property, and may include other common network device properties
2529 like local-mac-address.
2533 Xilinx uartlite devices are simple fixed speed serial ports.
2536 - current-speed : Baud rate of uartlite
2538 More devices will be defined as this spec matures.
2540 VII - Specifying interrupt information for devices
2541 ===================================================
2543 The device tree represents the busses and devices of a hardware
2544 system in a form similar to the physical bus topology of the
2547 In addition, a logical 'interrupt tree' exists which represents the
2548 hierarchy and routing of interrupts in the hardware.
2550 The interrupt tree model is fully described in the
2551 document "Open Firmware Recommended Practice: Interrupt
2552 Mapping Version 0.9". The document is available at:
2553 <http://playground.sun.com/1275/practice>.
2555 1) interrupts property
2556 ----------------------
2558 Devices that generate interrupts to a single interrupt controller
2559 should use the conventional OF representation described in the
2560 OF interrupt mapping documentation.
2562 Each device which generates interrupts must have an 'interrupt'
2563 property. The interrupt property value is an arbitrary number of
2564 of 'interrupt specifier' values which describe the interrupt or
2565 interrupts for the device.
2567 The encoding of an interrupt specifier is determined by the
2568 interrupt domain in which the device is located in the
2569 interrupt tree. The root of an interrupt domain specifies in
2570 its #interrupt-cells property the number of 32-bit cells
2571 required to encode an interrupt specifier. See the OF interrupt
2572 mapping documentation for a detailed description of domains.
2574 For example, the binding for the OpenPIC interrupt controller
2575 specifies an #interrupt-cells value of 2 to encode the interrupt
2576 number and level/sense information. All interrupt children in an
2577 OpenPIC interrupt domain use 2 cells per interrupt in their interrupts
2580 The PCI bus binding specifies a #interrupt-cell value of 1 to encode
2581 which interrupt pin (INTA,INTB,INTC,INTD) is used.
2583 2) interrupt-parent property
2584 ----------------------------
2586 The interrupt-parent property is specified to define an explicit
2587 link between a device node and its interrupt parent in
2588 the interrupt tree. The value of interrupt-parent is the
2589 phandle of the parent node.
2591 If the interrupt-parent property is not defined for a node, it's
2592 interrupt parent is assumed to be an ancestor in the node's
2593 _device tree_ hierarchy.
2595 3) OpenPIC Interrupt Controllers
2596 --------------------------------
2598 OpenPIC interrupt controllers require 2 cells to encode
2599 interrupt information. The first cell defines the interrupt
2600 number. The second cell defines the sense and level
2603 Sense and level information should be encoded as follows:
2605 0 = low to high edge sensitive type enabled
2606 1 = active low level sensitive type enabled
2607 2 = active high level sensitive type enabled
2608 3 = high to low edge sensitive type enabled
2610 4) ISA Interrupt Controllers
2611 ----------------------------
2613 ISA PIC interrupt controllers require 2 cells to encode
2614 interrupt information. The first cell defines the interrupt
2615 number. The second cell defines the sense and level
2618 ISA PIC interrupt controllers should adhere to the ISA PIC
2619 encodings listed below:
2621 0 = active low level sensitive type enabled
2622 1 = active high level sensitive type enabled
2623 2 = high to low edge sensitive type enabled
2624 3 = low to high edge sensitive type enabled
2627 Appendix A - Sample SOC node for MPC8540
2628 ========================================
2630 Note that the #address-cells and #size-cells for the SoC node
2631 in this example have been explicitly listed; these are likely
2632 not necessary as they are usually the same as the root node.
2635 #address-cells = <1>;
2637 #interrupt-cells = <2>;
2638 device_type = "soc";
2639 ranges = <00000000 e0000000 00100000>
2640 reg = <e0000000 00003000>;
2641 bus-frequency = <0>;
2645 device_type = "mdio";
2646 compatible = "gianfar";
2649 linux,phandle = <2452000>
2650 interrupt-parent = <40000>;
2651 interrupts = <35 1>;
2653 device_type = "ethernet-phy";
2657 linux,phandle = <2452001>
2658 interrupt-parent = <40000>;
2659 interrupts = <35 1>;
2661 device_type = "ethernet-phy";
2665 linux,phandle = <2452002>
2666 interrupt-parent = <40000>;
2667 interrupts = <35 1>;
2669 device_type = "ethernet-phy";
2676 device_type = "network";
2678 compatible = "gianfar";
2680 mac-address = [ 00 E0 0C 00 73 00 ];
2681 interrupts = <d 3 e 3 12 3>;
2682 interrupt-parent = <40000>;
2683 phy-handle = <2452000>;
2687 #address-cells = <1>;
2689 device_type = "network";
2691 compatible = "gianfar";
2693 mac-address = [ 00 E0 0C 00 73 01 ];
2694 interrupts = <13 3 14 3 18 3>;
2695 interrupt-parent = <40000>;
2696 phy-handle = <2452001>;
2700 #address-cells = <1>;
2702 device_type = "network";
2704 compatible = "gianfar";
2706 mac-address = [ 00 E0 0C 00 73 02 ];
2707 interrupts = <19 3>;
2708 interrupt-parent = <40000>;
2709 phy-handle = <2452002>;
2713 device_type = "serial";
2714 compatible = "ns16550";
2716 clock-frequency = <0>;
2717 interrupts = <1a 3>;
2718 interrupt-parent = <40000>;
2722 linux,phandle = <40000>;
2723 clock-frequency = <0>;
2724 interrupt-controller;
2725 #address-cells = <0>;
2726 reg = <40000 40000>;
2728 compatible = "chrp,open-pic";
2729 device_type = "open-pic";
2734 interrupt-parent = <40000>;
2735 interrupts = <1b 3>;
2737 device_type = "i2c";
2738 compatible = "fsl-i2c";
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