git.oblomov.eu Git - linux-2.6/blob - drivers/isdn/hisax/w6692.c

   1 /* $Id: w6692.c,v 1.18.2.4 2004/02/11 13:21:34 keil Exp $
   2  *
   3  * Winbond W6692 specific routines
   4  *
   5  * Author       Petr Novak
   6  * Copyright    by Petr Novak        <petr.novak@i.cz>
   7  *
   8  * This software may be used and distributed according to the terms
   9  * of the GNU General Public License, incorporated herein by reference.
  10  *
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/init.h>
  15 #include "hisax.h"
  16 #include "w6692.h"
  17 #include "isdnl1.h"
  18 #include <linux/interrupt.h>
  19 #include <linux/pci.h>
  20
  21 /* table entry in the PCI devices list */
  22 typedef struct {
  23         int vendor_id;
  24         int device_id;
  25         char *vendor_name;
  26         char *card_name;
  27 } PCI_ENTRY;
  28
  29 static const PCI_ENTRY id_list[] =
  30 {
  31         {PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, "Winbond", "W6692"},
  32         {PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, "Dynalink/AsusCom", "IS64PH"},
  33         {0, 0, "U.S.Robotics", "ISDN PCI Card TA"}
  34 };
  35
  36 #define W6692_SV_USR   0x16ec
  37 #define W6692_SD_USR   0x3409
  38 #define W6692_WINBOND  0
  39 #define W6692_DYNALINK 1
  40 #define W6692_USR      2
  41
  42 extern const char *CardType[];
  43
  44 static const char *w6692_revision = "$Revision: 1.18.2.4 $";
  45
  46 #define DBUSY_TIMER_VALUE 80
  47
  48 static char *W6692Ver[] __initdata =
  49 {"W6692 V00", "W6692 V01", "W6692 V10",
  50  "W6692 V11"};
  51
  52 static void __init
  53 W6692Version(struct IsdnCardState *cs, char *s)
  54 {
  55         int val;
  56
  57         val = cs->readW6692(cs, W_D_RBCH);
  58         printk(KERN_INFO "%s Winbond W6692 version (%x): %s\n", s, val, W6692Ver[(val >> 6) & 3]);
  59 }
  60
  61 static void
  62 ph_command(struct IsdnCardState *cs, unsigned int command)
  63 {
  64         if (cs->debug & L1_DEB_ISAC)
  65                 debugl1(cs, "ph_command %x", command);
  66         cs->writeisac(cs, W_CIX, command);
  67 }
  68
  69
  70 static void
  71 W6692_new_ph(struct IsdnCardState *cs)
  72 {
  73         switch (cs->dc.w6692.ph_state) {
  74                 case (W_L1CMD_RST):
  75                         ph_command(cs, W_L1CMD_DRC);
  76                         l1_msg(cs, HW_RESET | INDICATION, NULL);
  77                         /* fallthru */
  78                 case (W_L1IND_CD):
  79                         l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
  80                         break;
  81                 case (W_L1IND_DRD):
  82                         l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
  83                         break;
  84                 case (W_L1IND_CE):
  85                         l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
  86                         break;
  87                 case (W_L1IND_LD):
  88                         l1_msg(cs, HW_RSYNC | INDICATION, NULL);
  89                         break;
  90                 case (W_L1IND_ARD):
  91                         l1_msg(cs, HW_INFO2 | INDICATION, NULL);
  92                         break;
  93                 case (W_L1IND_AI8):
  94                         l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
  95                         break;
  96                 case (W_L1IND_AI10):
  97                         l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
  98                         break;
  99                 default:
 100                         break;
 101         }
 102 }
 103
 104 static void
 105 W6692_bh(struct IsdnCardState *cs)
 106 {
 107         struct PStack *stptr;
 108
 109         if (!cs)
 110                 return;
 111         if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
 112                 if (cs->debug)
 113                         debugl1(cs, "D-Channel Busy cleared");
 114                 stptr = cs->stlist;
 115                 while (stptr != NULL) {
 116                         stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL);
 117                         stptr = stptr->next;
 118                 }
 119         }
 120         if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
 121                 W6692_new_ph(cs);
 122         if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
 123                 DChannel_proc_rcv(cs);
 124         if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
 125                 DChannel_proc_xmt(cs);
 126 /*
 127    if (test_and_clear_bit(D_RX_MON1, &cs->event))
 128    arcofi_fsm(cs, ARCOFI_RX_END, NULL);
 129    if (test_and_clear_bit(D_TX_MON1, &cs->event))
 130    arcofi_fsm(cs, ARCOFI_TX_END, NULL);
 131  */
 132 }
 133
 134 static void
 135 W6692_empty_fifo(struct IsdnCardState *cs, int count)
 136 {
 137         u_char *ptr;
 138
 139         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
 140                 debugl1(cs, "W6692_empty_fifo");
 141
 142         if ((cs->rcvidx + count) >= MAX_DFRAME_LEN_L1) {
 143                 if (cs->debug & L1_DEB_WARN)
 144                         debugl1(cs, "W6692_empty_fifo overrun %d",
 145                                 cs->rcvidx + count);
 146                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
 147                 cs->rcvidx = 0;
 148                 return;
 149         }
 150         ptr = cs->rcvbuf + cs->rcvidx;
 151         cs->rcvidx += count;
 152         cs->readW6692fifo(cs, ptr, count);
 153         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
 154         if (cs->debug & L1_DEB_ISAC_FIFO) {
 155                 char *t = cs->dlog;
 156
 157                 t += sprintf(t, "W6692_empty_fifo cnt %d", count);
 158                 QuickHex(t, ptr, count);
 159                 debugl1(cs, cs->dlog);
 160         }
 161 }
 162
 163 static void
 164 W6692_fill_fifo(struct IsdnCardState *cs)
 165 {
 166         int count, more;
 167         u_char *ptr;
 168
 169         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
 170                 debugl1(cs, "W6692_fill_fifo");
 171
 172         if (!cs->tx_skb)
 173                 return;
 174
 175         count = cs->tx_skb->len;
 176         if (count <= 0)
 177                 return;
 178
 179         more = 0;
 180         if (count > W_D_FIFO_THRESH) {
 181                 more = !0;
 182                 count = W_D_FIFO_THRESH;
 183         }
 184         ptr = cs->tx_skb->data;
 185         skb_pull(cs->tx_skb, count);
 186         cs->tx_cnt += count;
 187         cs->writeW6692fifo(cs, ptr, count);
 188         cs->writeW6692(cs, W_D_CMDR, more ? W_D_CMDR_XMS : (W_D_CMDR_XMS | W_D_CMDR_XME));
 189         if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
 190                 debugl1(cs, "W6692_fill_fifo dbusytimer running");
 191                 del_timer(&cs->dbusytimer);
 192         }
 193         init_timer(&cs->dbusytimer);
 194         cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
 195         add_timer(&cs->dbusytimer);
 196         if (cs->debug & L1_DEB_ISAC_FIFO) {
 197                 char *t = cs->dlog;
 198
 199                 t += sprintf(t, "W6692_fill_fifo cnt %d", count);
 200                 QuickHex(t, ptr, count);
 201                 debugl1(cs, cs->dlog);
 202         }
 203 }
 204
 205 static void
 206 W6692B_empty_fifo(struct BCState *bcs, int count)
 207 {
 208         u_char *ptr;
 209         struct IsdnCardState *cs = bcs->cs;
 210
 211         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
 212                 debugl1(cs, "W6692B_empty_fifo");
 213
 214         if (bcs->hw.w6692.rcvidx + count > HSCX_BUFMAX) {
 215                 if (cs->debug & L1_DEB_WARN)
 216                         debugl1(cs, "W6692B_empty_fifo: incoming packet too large");
 217                 cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
 218                 bcs->hw.w6692.rcvidx = 0;
 219                 return;
 220         }
 221         ptr = bcs->hw.w6692.rcvbuf + bcs->hw.w6692.rcvidx;
 222         bcs->hw.w6692.rcvidx += count;
 223         READW6692BFIFO(cs, bcs->channel, ptr, count);
 224         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
 225         if (cs->debug & L1_DEB_HSCX_FIFO) {
 226                 char *t = bcs->blog;
 227
 228                 t += sprintf(t, "W6692B_empty_fifo %c cnt %d",
 229                              bcs->channel + '1', count);
 230                 QuickHex(t, ptr, count);
 231                 debugl1(cs, bcs->blog);
 232         }
 233 }
 234
 235 static void
 236 W6692B_fill_fifo(struct BCState *bcs)
 237 {
 238         struct IsdnCardState *cs = bcs->cs;
 239         int more, count;
 240         u_char *ptr;
 241
 242         if (!bcs->tx_skb)
 243                 return;
 244         if (bcs->tx_skb->len <= 0)
 245                 return;
 246
 247         more = (bcs->mode == L1_MODE_TRANS) ? 1 : 0;
 248         if (bcs->tx_skb->len > W_B_FIFO_THRESH) {
 249                 more = 1;
 250                 count = W_B_FIFO_THRESH;
 251         } else
 252                 count = bcs->tx_skb->len;
 253
 254         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
 255                 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " ": " last "), count);
 256
 257         ptr = bcs->tx_skb->data;
 258         skb_pull(bcs->tx_skb, count);
 259         bcs->tx_cnt -= count;
 260         bcs->hw.w6692.count += count;
 261         WRITEW6692BFIFO(cs, bcs->channel, ptr, count);
 262         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACT | W_B_CMDR_XMS | (more ? 0 : W_B_CMDR_XME));
 263         if (cs->debug & L1_DEB_HSCX_FIFO) {
 264                 char *t = bcs->blog;
 265
 266                 t += sprintf(t, "W6692B_fill_fifo %c cnt %d",
 267                              bcs->channel + '1', count);
 268                 QuickHex(t, ptr, count);
 269                 debugl1(cs, bcs->blog);
 270         }
 271 }
 272
 273 static void
 274 W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
 275 {
 276         u_char val;
 277         u_char r;
 278         struct BCState *bcs;
 279         struct sk_buff *skb;
 280         int count;
 281
 282         bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs+1);
 283         val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR);
 284         debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val);
 285
 286         if (!test_bit(BC_FLG_INIT, &bcs->Flag)) {
 287                 debugl1(cs, "W6692B not INIT yet");
 288                 return;
 289         }
 290         if (val & W_B_EXI_RME) {        /* RME */
 291                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 292                 if (r & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
 293                         if (cs->debug & L1_DEB_WARN)
 294                                 debugl1(cs, "W6692 B STAR %x", r);
 295                         if ((r & W_B_STAR_RDOV) && bcs->mode)
 296                                 if (cs->debug & L1_DEB_WARN)
 297                                         debugl1(cs, "W6692 B RDOV mode=%d",
 298                                                 bcs->mode);
 299                         if (r & W_B_STAR_CRCE)
 300                                 if (cs->debug & L1_DEB_WARN)
 301                                         debugl1(cs, "W6692 B CRC error");
 302                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
 303                 } else {
 304                         count = cs->BC_Read_Reg(cs, bchan, W_B_RBCL) & (W_B_FIFO_THRESH - 1);
 305                         if (count == 0)
 306                                 count = W_B_FIFO_THRESH;
 307                         W6692B_empty_fifo(bcs, count);
 308                         if ((count = bcs->hw.w6692.rcvidx) > 0) {
 309                                 if (cs->debug & L1_DEB_HSCX_FIFO)
 310                                         debugl1(cs, "W6692 Bchan Frame %d", count);
 311                                 if (!(skb = dev_alloc_skb(count)))
 312                                         printk(KERN_WARNING "W6692: Bchan receive out of memory\n");
 313                                 else {
 314                                         memcpy(skb_put(skb, count), bcs->hw.w6692.rcvbuf, count);
 315                                         skb_queue_tail(&bcs->rqueue, skb);
 316                                 }
 317                         }
 318                 }
 319                 bcs->hw.w6692.rcvidx = 0;
 320                 schedule_event(bcs, B_RCVBUFREADY);
 321         }
 322         if (val & W_B_EXI_RMR) {        /* RMR */
 323                 W6692B_empty_fifo(bcs, W_B_FIFO_THRESH);
 324                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 325                 if (r & W_B_STAR_RDOV) {
 326                         if (cs->debug & L1_DEB_WARN)
 327                                 debugl1(cs, "W6692 B RDOV(RMR) mode=%d",bcs->mode);
 328                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
 329                         if (bcs->mode != L1_MODE_TRANS)
 330                                 bcs->hw.w6692.rcvidx = 0;
 331                 }
 332                 if (bcs->mode == L1_MODE_TRANS) {
 333                         /* receive audio data */
 334                         if (!(skb = dev_alloc_skb(W_B_FIFO_THRESH)))
 335                                 printk(KERN_WARNING "HiSax: receive out of memory\n");
 336                         else {
 337                                 memcpy(skb_put(skb, W_B_FIFO_THRESH), bcs->hw.w6692.rcvbuf, W_B_FIFO_THRESH);
 338                                 skb_queue_tail(&bcs->rqueue, skb);
 339                         }
 340                         bcs->hw.w6692.rcvidx = 0;
 341                         schedule_event(bcs, B_RCVBUFREADY);
 342                 }
 343         }
 344         if (val & W_B_EXI_XDUN) {       /* XDUN */
 345                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
 346                 if (cs->debug & L1_DEB_WARN)
 347                         debugl1(cs, "W6692 B EXIR %x Lost TX", val);
 348                 if (bcs->mode == 1)
 349                         W6692B_fill_fifo(bcs);
 350                 else {
 351                         /* Here we lost an TX interrupt, so
 352                            * restart transmitting the whole frame.
 353                          */
 354                         if (bcs->tx_skb) {
 355                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
 356                                 bcs->tx_cnt += bcs->hw.w6692.count;
 357                                 bcs->hw.w6692.count = 0;
 358                         }
 359                 }
 360                 return;
 361         }
 362         if (val & W_B_EXI_XFR) {        /* XFR */
 363                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 364                 if (r & W_B_STAR_XDOW) {
 365                         if (cs->debug & L1_DEB_WARN)
 366                                 debugl1(cs, "W6692 B STAR %x XDOW", r);
 367                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
 368                         if (bcs->tx_skb && (bcs->mode != 1)) {
 369                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
 370                                 bcs->tx_cnt += bcs->hw.w6692.count;
 371                                 bcs->hw.w6692.count = 0;
 372                         }
 373                 }
 374                 if (bcs->tx_skb) {
 375                         if (bcs->tx_skb->len) {
 376                                 W6692B_fill_fifo(bcs);
 377                                 return;
 378                         } else {
 379                                 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
 380                                         (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
 381                                         u_long  flags;
 382                                         spin_lock_irqsave(&bcs->aclock, flags);
 383                                         bcs->ackcnt += bcs->hw.w6692.count;
 384                                         spin_unlock_irqrestore(&bcs->aclock, flags);
 385                                         schedule_event(bcs, B_ACKPENDING);
 386                                 }
 387                                 dev_kfree_skb_irq(bcs->tx_skb);
 388                                 bcs->hw.w6692.count = 0;
 389                                 bcs->tx_skb = NULL;
 390                         }
 391                 }
 392                 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
 393                         bcs->hw.w6692.count = 0;
 394                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 395                         W6692B_fill_fifo(bcs);
 396                 } else {
 397                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 398                         schedule_event(bcs, B_XMTBUFREADY);
 399                 }
 400         }
 401 }
 402
 403 static irqreturn_t
 404 W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs)
 405 {
 406         struct IsdnCardState    *cs = dev_id;
 407         u_char                  val, exval, v1;
 408         struct sk_buff          *skb;
 409         u_int                   count;
 410         u_long                  flags;
 411         int                     icnt = 5;
 412
 413         spin_lock_irqsave(&cs->lock, flags);
 414         val = cs->readW6692(cs, W_ISTA);
 415         if (!val) {
 416                 spin_unlock_irqrestore(&cs->lock, flags);
 417                 return IRQ_NONE;
 418         }
 419       StartW6692:
 420         if (cs->debug & L1_DEB_ISAC)
 421                 debugl1(cs, "W6692 ISTA %x", val);
 422
 423         if (val & W_INT_D_RME) {        /* RME */
 424                 exval = cs->readW6692(cs, W_D_RSTA);
 425                 if (exval & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
 426                         if (exval & W_D_RSTA_RDOV)
 427                                 if (cs->debug & L1_DEB_WARN)
 428                                         debugl1(cs, "W6692 RDOV");
 429                         if (exval & W_D_RSTA_CRCE)
 430                                 if (cs->debug & L1_DEB_WARN)
 431                                         debugl1(cs, "W6692 D-channel CRC error");
 432                         if (exval & W_D_RSTA_RMB)
 433                                 if (cs->debug & L1_DEB_WARN)
 434                                         debugl1(cs, "W6692 D-channel ABORT");
 435                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
 436                 } else {
 437                         count = cs->readW6692(cs, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
 438                         if (count == 0)
 439                                 count = W_D_FIFO_THRESH;
 440                         W6692_empty_fifo(cs, count);
 441                         if ((count = cs->rcvidx) > 0) {
 442                                 cs->rcvidx = 0;
 443                                 if (!(skb = alloc_skb(count, GFP_ATOMIC)))
 444                                         printk(KERN_WARNING "HiSax: D receive out of memory\n");
 445                                 else {
 446                                         memcpy(skb_put(skb, count), cs->rcvbuf, count);
 447                                         skb_queue_tail(&cs->rq, skb);
 448                                 }
 449                         }
 450                 }
 451                 cs->rcvidx = 0;
 452                 schedule_event(cs, D_RCVBUFREADY);
 453         }
 454         if (val & W_INT_D_RMR) {        /* RMR */
 455                 W6692_empty_fifo(cs, W_D_FIFO_THRESH);
 456         }
 457         if (val & W_INT_D_XFR) {        /* XFR */
 458                 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 459                         del_timer(&cs->dbusytimer);
 460                 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 461                         schedule_event(cs, D_CLEARBUSY);
 462                 if (cs->tx_skb) {
 463                         if (cs->tx_skb->len) {
 464                                 W6692_fill_fifo(cs);
 465                                 goto afterXFR;
 466                         } else {
 467                                 dev_kfree_skb_irq(cs->tx_skb);
 468                                 cs->tx_cnt = 0;
 469                                 cs->tx_skb = NULL;
 470                         }
 471                 }
 472                 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
 473                         cs->tx_cnt = 0;
 474                         W6692_fill_fifo(cs);
 475                 } else
 476                         schedule_event(cs, D_XMTBUFREADY);
 477         }
 478       afterXFR:
 479         if (val & (W_INT_XINT0 | W_INT_XINT1)) {        /* XINT0/1 - never */
 480                 if (cs->debug & L1_DEB_ISAC)
 481                         debugl1(cs, "W6692 spurious XINT!");
 482         }
 483         if (val & W_INT_D_EXI) {        /* EXI */
 484                 exval = cs->readW6692(cs, W_D_EXIR);
 485                 if (cs->debug & L1_DEB_WARN)
 486                         debugl1(cs, "W6692 D_EXIR %02x", exval);
 487                 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {    /* Transmit underrun/collision */
 488                         debugl1(cs, "W6692 D-chan underrun/collision");
 489                         printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL\n");
 490                         if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 491                                 del_timer(&cs->dbusytimer);
 492                         if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 493                                 schedule_event(cs, D_CLEARBUSY);
 494                         if (cs->tx_skb) {       /* Restart frame */
 495                                 skb_push(cs->tx_skb, cs->tx_cnt);
 496                                 cs->tx_cnt = 0;
 497                                 W6692_fill_fifo(cs);
 498                         } else {
 499                                 printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL no skb\n");
 500                                 debugl1(cs, "W6692 XDUN/XCOL no skb");
 501                                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);
 502                         }
 503                 }
 504                 if (exval & W_D_EXI_RDOV) {     /* RDOV */
 505                         debugl1(cs, "W6692 D-channel RDOV");
 506                         printk(KERN_WARNING "HiSax: W6692 D-RDOV\n");
 507                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST);
 508                 }
 509                 if (exval & W_D_EXI_TIN2) {     /* TIN2 - never */
 510                         debugl1(cs, "W6692 spurious TIN2 interrupt");
 511                 }
 512                 if (exval & W_D_EXI_MOC) {      /* MOC - not supported */
 513                         debugl1(cs, "W6692 spurious MOC interrupt");
 514                         v1 = cs->readW6692(cs, W_MOSR);
 515                         debugl1(cs, "W6692 MOSR %02x", v1);
 516                 }
 517                 if (exval & W_D_EXI_ISC) {      /* ISC - Level1 change */
 518                         v1 = cs->readW6692(cs, W_CIR);
 519                         if (cs->debug & L1_DEB_ISAC)
 520                                 debugl1(cs, "W6692 ISC CIR=0x%02X", v1);
 521                         if (v1 & W_CIR_ICC) {
 522                                 cs->dc.w6692.ph_state = v1 & W_CIR_COD_MASK;
 523                                 if (cs->debug & L1_DEB_ISAC)
 524                                         debugl1(cs, "ph_state_change %x", cs->dc.w6692.ph_state);
 525                                 schedule_event(cs, D_L1STATECHANGE);
 526                         }
 527                         if (v1 & W_CIR_SCC) {
 528                                 v1 = cs->readW6692(cs, W_SQR);
 529                                 debugl1(cs, "W6692 SCC SQR=0x%02X", v1);
 530                         }
 531                 }
 532                 if (exval & W_D_EXI_WEXP) {
 533                         debugl1(cs, "W6692 spurious WEXP interrupt!");
 534                 }
 535                 if (exval & W_D_EXI_TEXP) {
 536                         debugl1(cs, "W6692 spurious TEXP interrupt!");
 537                 }
 538         }
 539         if (val & W_INT_B1_EXI) {
 540                 debugl1(cs, "W6692 B channel 1 interrupt");
 541                 W6692B_interrupt(cs, 0);
 542         }
 543         if (val & W_INT_B2_EXI) {
 544                 debugl1(cs, "W6692 B channel 2 interrupt");
 545                 W6692B_interrupt(cs, 1);
 546         }
 547         val = cs->readW6692(cs, W_ISTA);
 548         if (val && icnt) {
 549                 icnt--;
 550                 goto StartW6692;
 551         }
 552         if (!icnt) {
 553                 printk(KERN_WARNING "W6692 IRQ LOOP\n");
 554                 cs->writeW6692(cs, W_IMASK, 0xff);
 555         }
 556         spin_unlock_irqrestore(&cs->lock, flags);
 557         return IRQ_HANDLED;
 558 }
 559
 560 static void
 561 W6692_l1hw(struct PStack *st, int pr, void *arg)
 562 {
 563         struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
 564         struct sk_buff *skb = arg;
 565         u_long flags;
 566         int val;
 567
 568         switch (pr) {
 569                 case (PH_DATA | REQUEST):
 570                         if (cs->debug & DEB_DLOG_HEX)
 571                                 LogFrame(cs, skb->data, skb->len);
 572                         if (cs->debug & DEB_DLOG_VERBOSE)
 573                                 dlogframe(cs, skb, 0);
 574                         spin_lock_irqsave(&cs->lock, flags);
 575                         if (cs->tx_skb) {
 576                                 skb_queue_tail(&cs->sq, skb);
 577 #ifdef L2FRAME_DEBUG            /* psa */
 578                                 if (cs->debug & L1_DEB_LAPD)
 579                                         Logl2Frame(cs, skb, "PH_DATA Queued", 0);
 580 #endif
 581                         } else {
 582                                 cs->tx_skb = skb;
 583                                 cs->tx_cnt = 0;
 584 #ifdef L2FRAME_DEBUG            /* psa */
 585                                 if (cs->debug & L1_DEB_LAPD)
 586                                         Logl2Frame(cs, skb, "PH_DATA", 0);
 587 #endif
 588                                 W6692_fill_fifo(cs);
 589                         }
 590                         spin_unlock_irqrestore(&cs->lock, flags);
 591                         break;
 592                 case (PH_PULL | INDICATION):
 593                         spin_lock_irqsave(&cs->lock, flags);
 594                         if (cs->tx_skb) {
 595                                 if (cs->debug & L1_DEB_WARN)
 596                                         debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
 597                                 skb_queue_tail(&cs->sq, skb);
 598                                 spin_unlock_irqrestore(&cs->lock, flags);
 599                                 break;
 600                         }
 601                         if (cs->debug & DEB_DLOG_HEX)
 602                                 LogFrame(cs, skb->data, skb->len);
 603                         if (cs->debug & DEB_DLOG_VERBOSE)
 604                                 dlogframe(cs, skb, 0);
 605                         cs->tx_skb = skb;
 606                         cs->tx_cnt = 0;
 607 #ifdef L2FRAME_DEBUG            /* psa */
 608                         if (cs->debug & L1_DEB_LAPD)
 609                                 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
 610 #endif
 611                         W6692_fill_fifo(cs);
 612                         spin_unlock_irqrestore(&cs->lock, flags);
 613                         break;
 614                 case (PH_PULL | REQUEST):
 615 #ifdef L2FRAME_DEBUG            /* psa */
 616                         if (cs->debug & L1_DEB_LAPD)
 617                                 debugl1(cs, "-> PH_REQUEST_PULL");
 618 #endif
 619                         if (!cs->tx_skb) {
 620                                 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 621                                 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
 622                         } else
 623                                 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 624                         break;
 625                 case (HW_RESET | REQUEST):
 626                         spin_lock_irqsave(&cs->lock, flags);
 627                         if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
 628                                 ph_command(cs, W_L1CMD_ECK);
 629                                 spin_unlock_irqrestore(&cs->lock, flags);
 630                         } else {
 631                                 ph_command(cs, W_L1CMD_RST);
 632                                 cs->dc.w6692.ph_state = W_L1CMD_RST;
 633                                 spin_unlock_irqrestore(&cs->lock, flags);
 634                                 W6692_new_ph(cs);
 635                         }
 636                         break;
 637                 case (HW_ENABLE | REQUEST):
 638                         spin_lock_irqsave(&cs->lock, flags);
 639                         ph_command(cs, W_L1CMD_ECK);
 640                         spin_unlock_irqrestore(&cs->lock, flags);
 641                         break;
 642                 case (HW_INFO3 | REQUEST):
 643                         spin_lock_irqsave(&cs->lock, flags);
 644                         ph_command(cs, W_L1CMD_AR8);
 645                         spin_unlock_irqrestore(&cs->lock, flags);
 646                         break;
 647                 case (HW_TESTLOOP | REQUEST):
 648                         val = 0;
 649                         if (1 & (long) arg)
 650                                 val |= 0x0c;
 651                         if (2 & (long) arg)
 652                                 val |= 0x3;
 653                         /* !!! not implemented yet */
 654                         break;
 655                 case (HW_DEACTIVATE | RESPONSE):
 656                         skb_queue_purge(&cs->rq);
 657                         skb_queue_purge(&cs->sq);
 658                         if (cs->tx_skb) {
 659                                 dev_kfree_skb_any(cs->tx_skb);
 660                                 cs->tx_skb = NULL;
 661                         }
 662                         if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 663                                 del_timer(&cs->dbusytimer);
 664                         if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 665                                 schedule_event(cs, D_CLEARBUSY);
 666                         break;
 667                 default:
 668                         if (cs->debug & L1_DEB_WARN)
 669                                 debugl1(cs, "W6692_l1hw unknown %04x", pr);
 670                         break;
 671         }
 672 }
 673
 674 static void
 675 setstack_W6692(struct PStack *st, struct IsdnCardState *cs)
 676 {
 677         st->l1.l1hw = W6692_l1hw;
 678 }
 679
 680 static void
 681 DC_Close_W6692(struct IsdnCardState *cs)
 682 {
 683 }
 684
 685 static void
 686 dbusy_timer_handler(struct IsdnCardState *cs)
 687 {
 688         struct PStack *stptr;
 689         int rbch, star;
 690         u_long flags;
 691
 692         spin_lock_irqsave(&cs->lock, flags);
 693         if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
 694                 rbch = cs->readW6692(cs, W_D_RBCH);
 695                 star = cs->readW6692(cs, W_D_STAR);
 696                 if (cs->debug)
 697                         debugl1(cs, "D-Channel Busy D_RBCH %02x D_STAR %02x",
 698                                 rbch, star);
 699                 if (star & W_D_STAR_XBZ) {      /* D-Channel Busy */
 700                         test_and_set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
 701                         stptr = cs->stlist;
 702                         while (stptr != NULL) {
 703                                 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL);
 704                                 stptr = stptr->next;
 705                         }
 706                 } else {
 707                         /* discard frame; reset transceiver */
 708                         test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags);
 709                         if (cs->tx_skb) {
 710                                 dev_kfree_skb_any(cs->tx_skb);
 711                                 cs->tx_cnt = 0;
 712                                 cs->tx_skb = NULL;
 713                         } else {
 714                                 printk(KERN_WARNING "HiSax: W6692 D-Channel Busy no skb\n");
 715                                 debugl1(cs, "D-Channel Busy no skb");
 716                         }
 717                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);    /* Transmitter reset */
 718                         spin_unlock_irqrestore(&cs->lock, flags);
 719                         cs->irq_func(cs->irq, cs, NULL);
 720                         return;
 721                 }
 722         }
 723         spin_unlock_irqrestore(&cs->lock, flags);
 724 }
 725
 726 static void
 727 W6692Bmode(struct BCState *bcs, int mode, int bchan)
 728 {
 729         struct IsdnCardState *cs = bcs->cs;
 730
 731         if (cs->debug & L1_DEB_HSCX)
 732                 debugl1(cs, "w6692 %c mode %d ichan %d",
 733                         '1' + bchan, mode, bchan);
 734         bcs->mode = mode;
 735         bcs->channel = bchan;
 736         bcs->hw.w6692.bchan = bchan;
 737
 738         switch (mode) {
 739                 case (L1_MODE_NULL):
 740                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
 741                         break;
 742                 case (L1_MODE_TRANS):
 743                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
 744                         break;
 745                 case (L1_MODE_HDLC):
 746                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
 747                         cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
 748                         cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
 749                         break;
 750         }
 751         if (mode)
 752                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST |
 753                                  W_B_CMDR_RACT | W_B_CMDR_XRST);
 754         cs->BC_Write_Reg(cs, bchan, W_B_EXIM, 0x00);
 755 }
 756
 757 static void
 758 W6692_l2l1(struct PStack *st, int pr, void *arg)
 759 {
 760         struct sk_buff *skb = arg;
 761         struct BCState *bcs = st->l1.bcs;
 762         u_long flags;
 763
 764         switch (pr) {
 765                 case (PH_DATA | REQUEST):
 766                         spin_lock_irqsave(&bcs->cs->lock, flags);
 767                         if (bcs->tx_skb) {
 768                                 skb_queue_tail(&bcs->squeue, skb);
 769                         } else {
 770                                 bcs->tx_skb = skb;
 771                                 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 772                                 bcs->hw.w6692.count = 0;
 773                                 bcs->cs->BC_Send_Data(bcs);
 774                         }
 775                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 776                         break;
 777                 case (PH_PULL | INDICATION):
 778                         if (bcs->tx_skb) {
 779                                 printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
 780                                 break;
 781                         }
 782                         spin_lock_irqsave(&bcs->cs->lock, flags);
 783                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 784                         bcs->tx_skb = skb;
 785                         bcs->hw.w6692.count = 0;
 786                         bcs->cs->BC_Send_Data(bcs);
 787                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 788                         break;
 789                 case (PH_PULL | REQUEST):
 790                         if (!bcs->tx_skb) {
 791                                 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 792                                 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
 793                         } else
 794                                 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 795                         break;
 796                 case (PH_ACTIVATE | REQUEST):
 797                         spin_lock_irqsave(&bcs->cs->lock, flags);
 798                         test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
 799                         W6692Bmode(bcs, st->l1.mode, st->l1.bc);
 800                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 801                         l1_msg_b(st, pr, arg);
 802                         break;
 803                 case (PH_DEACTIVATE | REQUEST):
 804                         l1_msg_b(st, pr, arg);
 805                         break;
 806                 case (PH_DEACTIVATE | CONFIRM):
 807                         spin_lock_irqsave(&bcs->cs->lock, flags);
 808                         test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
 809                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 810                         W6692Bmode(bcs, 0, st->l1.bc);
 811                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
 812                         st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
 813                         break;
 814         }
 815 }
 816
 817 static void
 818 close_w6692state(struct BCState *bcs)
 819 {
 820         W6692Bmode(bcs, 0, bcs->channel);
 821         if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
 822                 if (bcs->hw.w6692.rcvbuf) {
 823                         kfree(bcs->hw.w6692.rcvbuf);
 824                         bcs->hw.w6692.rcvbuf = NULL;
 825                 }
 826                 if (bcs->blog) {
 827                         kfree(bcs->blog);
 828                         bcs->blog = NULL;
 829                 }
 830                 skb_queue_purge(&bcs->rqueue);
 831                 skb_queue_purge(&bcs->squeue);
 832                 if (bcs->tx_skb) {
 833                         dev_kfree_skb_any(bcs->tx_skb);
 834                         bcs->tx_skb = NULL;
 835                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 836                 }
 837         }
 838 }
 839
 840 static int
 841 open_w6692state(struct IsdnCardState *cs, struct BCState *bcs)
 842 {
 843         if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
 844                 if (!(bcs->hw.w6692.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
 845                         printk(KERN_WARNING
 846                                "HiSax: No memory for w6692.rcvbuf\n");
 847                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
 848                         return (1);
 849                 }
 850                 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
 851                         printk(KERN_WARNING
 852                                "HiSax: No memory for bcs->blog\n");
 853                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
 854                         kfree(bcs->hw.w6692.rcvbuf);
 855                         bcs->hw.w6692.rcvbuf = NULL;
 856                         return (2);
 857                 }
 858                 skb_queue_head_init(&bcs->rqueue);
 859                 skb_queue_head_init(&bcs->squeue);
 860         }
 861         bcs->tx_skb = NULL;
 862         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 863         bcs->event = 0;
 864         bcs->hw.w6692.rcvidx = 0;
 865         bcs->tx_cnt = 0;
 866         return (0);
 867 }
 868
 869 static int
 870 setstack_w6692(struct PStack *st, struct BCState *bcs)
 871 {
 872         bcs->channel = st->l1.bc;
 873         if (open_w6692state(st->l1.hardware, bcs))
 874                 return (-1);
 875         st->l1.bcs = bcs;
 876         st->l2.l2l1 = W6692_l2l1;
 877         setstack_manager(st);
 878         bcs->st = st;
 879         setstack_l1_B(st);
 880         return (0);
 881 }
 882
 883 static void resetW6692(struct IsdnCardState *cs)
 884 {
 885         cs->writeW6692(cs, W_D_CTL, W_D_CTL_SRST);
 886         mdelay(10);
 887         cs->writeW6692(cs, W_D_CTL, 0x00);
 888         mdelay(10);
 889         cs->writeW6692(cs, W_IMASK, 0xff);
 890         cs->writeW6692(cs, W_D_SAM, 0xff);
 891         cs->writeW6692(cs, W_D_TAM, 0xff);
 892         cs->writeW6692(cs, W_D_EXIM, 0x00);
 893         cs->writeW6692(cs, W_D_MODE, W_D_MODE_RACT);
 894         cs->writeW6692(cs, W_IMASK, 0x18);
 895         if (cs->subtyp == W6692_USR) {
 896                 /* seems that USR implemented some power control features
 897                  * Pin 79 is connected to the oscilator circuit so we
 898                  * have to handle it here
 899                  */
 900                 cs->writeW6692(cs, W_PCTL, 0x80);
 901                 cs->writeW6692(cs, W_XDATA, 0x00);
 902         }
 903 }
 904
 905 static void __init initW6692(struct IsdnCardState *cs, int part)
 906 {
 907         if (part & 1) {
 908                 cs->setstack_d = setstack_W6692;
 909                 cs->DC_Close = DC_Close_W6692;
 910                 cs->dbusytimer.function = (void *) dbusy_timer_handler;
 911                 cs->dbusytimer.data = (long) cs;
 912                 init_timer(&cs->dbusytimer);
 913                 resetW6692(cs);
 914                 ph_command(cs, W_L1CMD_RST);
 915                 cs->dc.w6692.ph_state = W_L1CMD_RST;
 916                 W6692_new_ph(cs);
 917                 ph_command(cs, W_L1CMD_ECK);
 918
 919                 cs->bcs[0].BC_SetStack = setstack_w6692;
 920                 cs->bcs[1].BC_SetStack = setstack_w6692;
 921                 cs->bcs[0].BC_Close = close_w6692state;
 922                 cs->bcs[1].BC_Close = close_w6692state;
 923                 W6692Bmode(cs->bcs, 0, 0);
 924                 W6692Bmode(cs->bcs + 1, 0, 0);
 925         }
 926         if (part & 2) {
 927                 /* Reenable all IRQ */
 928                 cs->writeW6692(cs, W_IMASK, 0x18);
 929                 cs->writeW6692(cs, W_D_EXIM, 0x00);
 930                 cs->BC_Write_Reg(cs, 0, W_B_EXIM, 0x00);
 931                 cs->BC_Write_Reg(cs, 1, W_B_EXIM, 0x00);
 932                 /* Reset D-chan receiver and transmitter */
 933                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
 934         }
 935 }
 936
 937 /* Interface functions */
 938
 939 static u_char
 940 ReadW6692(struct IsdnCardState *cs, u_char offset)
 941 {
 942         return (inb(cs->hw.w6692.iobase + offset));
 943 }
 944
 945 static void
 946 WriteW6692(struct IsdnCardState *cs, u_char offset, u_char value)
 947 {
 948         outb(value, cs->hw.w6692.iobase + offset);
 949 }
 950
 951 static void
 952 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
 953 {
 954         insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size);
 955 }
 956
 957 static void
 958 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
 959 {
 960         outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size);
 961 }
 962
 963 static u_char
 964 ReadW6692B(struct IsdnCardState *cs, int bchan, u_char offset)
 965 {
 966         return (inb(cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset));
 967 }
 968
 969 static void
 970 WriteW6692B(struct IsdnCardState *cs, int bchan, u_char offset, u_char value)
 971 {
 972         outb(value, cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset);
 973 }
 974
 975 static int
 976 w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg)
 977 {
 978         switch (mt) {
 979                 case CARD_RESET:
 980                         resetW6692(cs);
 981                         return (0);
 982                 case CARD_RELEASE:
 983                         cs->writeW6692(cs, W_IMASK, 0xff);
 984                         release_region(cs->hw.w6692.iobase, 256);
 985                         if (cs->subtyp == W6692_USR) {
 986                                 cs->writeW6692(cs, W_XDATA, 0x04);
 987                         }
 988                         return (0);
 989                 case CARD_INIT:
 990                         initW6692(cs, 3);
 991                         return (0);
 992                 case CARD_TEST:
 993                         return (0);
 994         }
 995         return (0);
 996 }
 997
 998 static int id_idx ;
 999
1000 static struct pci_dev *dev_w6692 __initdata = NULL;
1001
1002 int __init
1003 setup_w6692(struct IsdnCard *card)
1004 {
1005         struct IsdnCardState *cs = card->cs;
1006         char tmp[64];
1007         u_char found = 0;
1008         u_char pci_irq = 0;
1009         u_int pci_ioaddr = 0;
1010
1011         strcpy(tmp, w6692_revision);
1012         printk(KERN_INFO "HiSax: W6692 driver Rev. %s\n", HiSax_getrev(tmp));
1013         if (cs->typ != ISDN_CTYPE_W6692)
1014                 return (0);
1015 #ifdef CONFIG_PCI
1016         while (id_list[id_idx].vendor_id) {
1017                 dev_w6692 = pci_find_device(id_list[id_idx].vendor_id,
1018                                             id_list[id_idx].device_id,
1019                                             dev_w6692);
1020                 if (dev_w6692) {
1021                         if (pci_enable_device(dev_w6692))
1022                                 continue;
1023                         cs->subtyp = id_idx;
1024                         break;
1025                 }
1026                 id_idx++;
1027         }
1028         if (dev_w6692) {
1029                 found = 1;
1030                 pci_irq = dev_w6692->irq;
1031                 /* I think address 0 is allways the configuration area */
1032                 /* and address 1 is the real IO space KKe 03.09.99 */
1033                 pci_ioaddr = pci_resource_start(dev_w6692, 1);
1034                 /* USR ISDN PCI card TA need some special handling */
1035                 if (cs->subtyp == W6692_WINBOND) {
1036                         if ((W6692_SV_USR == dev_w6692->subsystem_vendor) &&
1037                             (W6692_SD_USR == dev_w6692->subsystem_device)) {
1038                                 cs->subtyp = W6692_USR;
1039                         }
1040                 }
1041         }
1042         if (!found) {
1043                 printk(KERN_WARNING "W6692: No PCI card found\n");
1044                 return (0);
1045         }
1046         cs->irq = pci_irq;
1047         if (!cs->irq) {
1048                 printk(KERN_WARNING "W6692: No IRQ for PCI card found\n");
1049                 return (0);
1050         }
1051         if (!pci_ioaddr) {
1052                 printk(KERN_WARNING "W6692: NO I/O Base Address found\n");
1053                 return (0);
1054         }
1055         cs->hw.w6692.iobase = pci_ioaddr;
1056         printk(KERN_INFO "Found: %s %s, I/O base: 0x%x, irq: %d\n",
1057                id_list[cs->subtyp].vendor_name, id_list[cs->subtyp].card_name,
1058                pci_ioaddr, pci_irq);
1059         if (!request_region(cs->hw.w6692.iobase, 256, id_list[cs->subtyp].card_name)) {
1060                 printk(KERN_WARNING
1061                        "HiSax: %s I/O ports %x-%x already in use\n",
1062                        id_list[cs->subtyp].card_name,
1063                        cs->hw.w6692.iobase,
1064                        cs->hw.w6692.iobase + 255);
1065                 return (0);
1066         }
1067 #else
1068         printk(KERN_WARNING "HiSax: W6692 and NO_PCI_BIOS\n");
1069         printk(KERN_WARNING "HiSax: W6692 unable to config\n");
1070         return (0);
1071 #endif                          /* CONFIG_PCI */
1072
1073         printk(KERN_INFO
1074                "HiSax: %s config irq:%d I/O:%x\n",
1075                id_list[cs->subtyp].card_name, cs->irq,
1076                cs->hw.w6692.iobase);
1077
1078         INIT_WORK(&cs->tqueue, (void *)(void *) W6692_bh, cs);
1079         cs->readW6692 = &ReadW6692;
1080         cs->writeW6692 = &WriteW6692;
1081         cs->readisacfifo = &ReadISACfifo;
1082         cs->writeisacfifo = &WriteISACfifo;
1083         cs->BC_Read_Reg = &ReadW6692B;
1084         cs->BC_Write_Reg = &WriteW6692B;
1085         cs->BC_Send_Data = &W6692B_fill_fifo;
1086         cs->cardmsg = &w6692_card_msg;
1087         cs->irq_func = &W6692_interrupt;
1088         cs->irq_flags |= SA_SHIRQ;
1089         W6692Version(cs, "W6692:");
1090         printk(KERN_INFO "W6692 ISTA=0x%X\n", ReadW6692(cs, W_ISTA));
1091         printk(KERN_INFO "W6692 IMASK=0x%X\n", ReadW6692(cs, W_IMASK));
1092         printk(KERN_INFO "W6692 D_EXIR=0x%X\n", ReadW6692(cs, W_D_EXIR));
1093         printk(KERN_INFO "W6692 D_EXIM=0x%X\n", ReadW6692(cs, W_D_EXIM));
1094         printk(KERN_INFO "W6692 D_RSTA=0x%X\n", ReadW6692(cs, W_D_RSTA));
1095         return (1);
1096 }