2 * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
3 * Copyright (C) 2008 Markus Plessing <plessing@ems-wuensche.com>
4 * Copyright (C) 2008 Sebastian Haas <haas@ems-wuensche.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/netdevice.h>
24 #include <linux/delay.h>
25 #include <linux/pci.h>
26 #include <linux/can.h>
27 #include <linux/can/dev.h>
32 #define DRV_NAME "ems_pci"
34 MODULE_AUTHOR("Sebastian Haas <haas@ems-wuenche.com>");
35 MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-PCI/PCIe CAN cards");
36 MODULE_SUPPORTED_DEVICE("EMS CPC-PCI/PCIe CAN card");
37 MODULE_LICENSE("GPL v2");
39 #define EMS_PCI_MAX_CHAN 2
44 struct pci_dev *pci_dev;
45 struct net_device *net_dev[EMS_PCI_MAX_CHAN];
47 void __iomem *conf_addr;
48 void __iomem *base_addr;
51 #define EMS_PCI_CAN_CLOCK (16000000 / 2)
54 * Register definitions and descriptions are from LinCAN 0.3.3.
56 * PSB4610 PITA-2 bridge control registers
58 #define PITA2_ICR 0x00 /* Interrupt Control Register */
59 #define PITA2_ICR_INT0 0x00000002 /* [RC] INT0 Active/Clear */
60 #define PITA2_ICR_INT0_EN 0x00020000 /* [RW] Enable INT0 */
62 #define PITA2_MISC 0x1c /* Miscellaneous Register */
63 #define PITA2_MISC_CONFIG 0x04000000 /* Multiplexed parallel interface */
66 * The board configuration is probably following:
67 * RX1 is connected to ground.
68 * TX1 is not connected.
69 * CLKO is not connected.
70 * Setting the OCR register to 0xDA is a good idea.
71 * This means normal output mode , push-pull and the correct polarity.
73 #define EMS_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
76 * In the CDR register, you should set CBP to 1.
77 * You will probably also want to set the clock divider value to 7
78 * (meaning direct oscillator output) because the second SJA1000 chip
79 * is driven by the first one CLKOUT output.
81 #define EMS_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
82 #define EMS_PCI_MEM_SIZE 4096 /* Size of the remapped io-memory */
83 #define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */
84 #define EMS_PCI_CAN_CTRL_SIZE 0x200 /* memory size for each controller */
86 #define EMS_PCI_PORT_BYTES 0x4 /* Each register occupies 4 bytes */
88 #define EMS_PCI_VENDOR_ID 0x110a /* PCI device and vendor ID */
89 #define EMS_PCI_DEVICE_ID 0x2104
91 static struct pci_device_id ems_pci_tbl[] = {
92 {EMS_PCI_VENDOR_ID, EMS_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
95 MODULE_DEVICE_TABLE(pci, ems_pci_tbl);
98 * Helper to read internal registers from card logic (not CAN)
100 static u8 ems_pci_readb(struct ems_pci_card *card, unsigned int port)
102 return readb(card->base_addr + (port * EMS_PCI_PORT_BYTES));
105 static u8 ems_pci_read_reg(const struct sja1000_priv *priv, int port)
107 return readb(priv->reg_base + (port * EMS_PCI_PORT_BYTES));
110 static void ems_pci_write_reg(const struct sja1000_priv *priv, int port, u8 val)
112 writeb(val, priv->reg_base + (port * EMS_PCI_PORT_BYTES));
115 static void ems_pci_post_irq(const struct sja1000_priv *priv)
117 struct ems_pci_card *card = (struct ems_pci_card *)priv->priv;
119 /* reset int flag of pita */
120 writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0, card->conf_addr
125 * Check if a CAN controller is present at the specified location
126 * by trying to set 'em into the PeliCAN mode
128 static inline int ems_pci_check_chan(const struct sja1000_priv *priv)
132 /* Make sure SJA1000 is in reset mode */
133 ems_pci_write_reg(priv, REG_MOD, 1);
135 ems_pci_write_reg(priv, REG_CDR, CDR_PELICAN);
137 /* read reset-values */
138 res = ems_pci_read_reg(priv, REG_CDR);
140 if (res == CDR_PELICAN)
146 static void ems_pci_del_card(struct pci_dev *pdev)
148 struct ems_pci_card *card = pci_get_drvdata(pdev);
149 struct net_device *dev;
152 for (i = 0; i < card->channels; i++) {
153 dev = card->net_dev[i];
158 dev_info(&pdev->dev, "Removing %s.\n", dev->name);
159 unregister_sja1000dev(dev);
160 free_sja1000dev(dev);
163 if (card->base_addr != NULL)
164 pci_iounmap(card->pci_dev, card->base_addr);
166 if (card->conf_addr != NULL)
167 pci_iounmap(card->pci_dev, card->conf_addr);
171 pci_disable_device(pdev);
172 pci_set_drvdata(pdev, NULL);
175 static void ems_pci_card_reset(struct ems_pci_card *card)
177 /* Request board reset */
178 writeb(0, card->base_addr);
182 * Probe PCI device for EMS CAN signature and register each available
183 * CAN channel to SJA1000 Socket-CAN subsystem.
185 static int __devinit ems_pci_add_card(struct pci_dev *pdev,
186 const struct pci_device_id *ent)
188 struct sja1000_priv *priv;
189 struct net_device *dev;
190 struct ems_pci_card *card;
193 /* Enabling PCI device */
194 if (pci_enable_device(pdev) < 0) {
195 dev_err(&pdev->dev, "Enabling PCI device failed\n");
199 /* Allocating card structures to hold addresses, ... */
200 card = kzalloc(sizeof(struct ems_pci_card), GFP_KERNEL);
202 dev_err(&pdev->dev, "Unable to allocate memory\n");
203 pci_disable_device(pdev);
207 pci_set_drvdata(pdev, card);
209 card->pci_dev = pdev;
213 /* Remap PITA configuration space, and controller memory area */
214 card->conf_addr = pci_iomap(pdev, 0, EMS_PCI_MEM_SIZE);
215 if (card->conf_addr == NULL) {
217 goto failure_cleanup;
220 card->base_addr = pci_iomap(pdev, 1, EMS_PCI_MEM_SIZE);
221 if (card->base_addr == NULL) {
223 goto failure_cleanup;
226 /* Configure PITA-2 parallel interface (enable MUX) */
227 writel(PITA2_MISC_CONFIG, card->conf_addr + PITA2_MISC);
229 /* Check for unique EMS CAN signature */
230 if (ems_pci_readb(card, 0) != 0x55 ||
231 ems_pci_readb(card, 1) != 0xAA ||
232 ems_pci_readb(card, 2) != 0x01 ||
233 ems_pci_readb(card, 3) != 0xCB ||
234 ems_pci_readb(card, 4) != 0x11) {
235 dev_err(&pdev->dev, "Not EMS Dr. Thomas Wuensche interface\n");
237 goto failure_cleanup;
240 ems_pci_card_reset(card);
242 /* Detect available channels */
243 for (i = 0; i < EMS_PCI_MAX_CHAN; i++) {
244 dev = alloc_sja1000dev(0);
247 goto failure_cleanup;
250 card->net_dev[i] = dev;
251 priv = netdev_priv(dev);
253 priv->irq_flags = IRQF_SHARED;
255 dev->irq = pdev->irq;
256 priv->reg_base = card->base_addr + EMS_PCI_CAN_BASE_OFFSET
257 + (i * EMS_PCI_CAN_CTRL_SIZE);
259 /* Check if channel is present */
260 if (ems_pci_check_chan(priv)) {
261 priv->read_reg = ems_pci_read_reg;
262 priv->write_reg = ems_pci_write_reg;
263 priv->post_irq = ems_pci_post_irq;
264 priv->can.clock.freq = EMS_PCI_CAN_CLOCK;
265 priv->ocr = EMS_PCI_OCR;
266 priv->cdr = EMS_PCI_CDR;
268 SET_NETDEV_DEV(dev, &pdev->dev);
270 /* Enable interrupts from card */
271 writel(PITA2_ICR_INT0_EN, card->conf_addr + PITA2_ICR);
273 /* Register SJA1000 device */
274 err = register_sja1000dev(dev);
276 dev_err(&pdev->dev, "Registering device failed "
278 free_sja1000dev(dev);
279 goto failure_cleanup;
284 dev_info(&pdev->dev, "Channel #%d at 0x%p, irq %d\n",
285 i + 1, priv->reg_base, dev->irq);
287 free_sja1000dev(dev);
294 dev_err(&pdev->dev, "Error: %d. Cleaning Up.\n", err);
296 ems_pci_del_card(pdev);
301 static struct pci_driver ems_pci_driver = {
303 .id_table = ems_pci_tbl,
304 .probe = ems_pci_add_card,
305 .remove = ems_pci_del_card,
308 static int __init ems_pci_init(void)
310 return pci_register_driver(&ems_pci_driver);
313 static void __exit ems_pci_exit(void)
315 pci_unregister_driver(&ems_pci_driver);
318 module_init(ems_pci_init);
319 module_exit(ems_pci_exit);