2 * Handles the Intel 27x USB Device Controller (UDC)
4 * Inspired by original driver by Frank Becker, David Brownell, and others.
5 * Copyright (C) 2008 Robert Jarzmik
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27 #include <linux/delay.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/proc_fs.h>
31 #include <linux/clk.h>
32 #include <linux/irq.h>
33 #include <linux/gpio.h>
35 #include <asm/byteorder.h>
36 #include <mach/hardware.h>
38 #include <linux/usb.h>
39 #include <linux/usb/ch9.h>
40 #include <linux/usb/gadget.h>
41 #include <mach/pxa2xx-regs.h> /* FIXME: for PSSR */
44 #include "pxa27x_udc.h"
47 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
50 * Such controller drivers work with a gadget driver. The gadget driver
51 * returns descriptors, implements configuration and data protocols used
52 * by the host to interact with this device, and allocates endpoints to
53 * the different protocol interfaces. The controller driver virtualizes
54 * usb hardware so that the gadget drivers will be more portable.
56 * This UDC hardware wants to implement a bit too much USB protocol. The
57 * biggest issues are: that the endpoints have to be set up before the
58 * controller can be enabled (minor, and not uncommon); and each endpoint
59 * can only have one configuration, interface and alternative interface
60 * number (major, and very unusual). Once set up, these cannot be changed
61 * without a controller reset.
63 * The workaround is to setup all combinations necessary for the gadgets which
64 * will work with this driver. This is done in pxa_udc structure, statically.
65 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
66 * (You could modify this if needed. Some drivers have a "fifo_mode" module
67 * parameter to facilitate such changes.)
69 * The combinations have been tested with these gadgets :
71 * - file storage gadget
74 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
75 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
77 * All the requests are handled the same way :
78 * - the drivers tries to handle the request directly to the IO
79 * - if the IO fifo is not big enough, the remaining is send/received in
83 #define DRIVER_VERSION "2008-04-18"
84 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
86 static const char driver_name[] = "pxa27x_udc";
87 static struct pxa_udc *the_controller;
89 static void handle_ep(struct pxa_ep *ep);
94 #ifdef CONFIG_USB_GADGET_DEBUG_FS
96 #include <linux/debugfs.h>
97 #include <linux/uaccess.h>
98 #include <linux/seq_file.h>
100 static int state_dbg_show(struct seq_file *s, void *p)
102 struct pxa_udc *udc = s->private;
110 /* basic device status */
111 pos += seq_printf(s, DRIVER_DESC "\n"
112 "%s version: %s\nGadget driver: %s\n",
113 driver_name, DRIVER_VERSION,
114 udc->driver ? udc->driver->driver.name : "(none)");
116 tmp = udc_readl(udc, UDCCR);
118 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
119 "con=%d,inter=%d,altinter=%d\n", tmp,
120 (tmp & UDCCR_OEN) ? " oen":"",
121 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
122 (tmp & UDCCR_AHNP) ? " rem" : "",
123 (tmp & UDCCR_BHNP) ? " rstir" : "",
124 (tmp & UDCCR_DWRE) ? " dwre" : "",
125 (tmp & UDCCR_SMAC) ? " smac" : "",
126 (tmp & UDCCR_EMCE) ? " emce" : "",
127 (tmp & UDCCR_UDR) ? " udr" : "",
128 (tmp & UDCCR_UDA) ? " uda" : "",
129 (tmp & UDCCR_UDE) ? " ude" : "",
130 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
131 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
132 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
133 /* registers for device and ep0 */
134 pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
135 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
136 pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
137 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
138 pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
139 pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
141 udc->stats.irqs_reset, udc->stats.irqs_suspend,
142 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
149 static int queues_dbg_show(struct seq_file *s, void *p)
151 struct pxa_udc *udc = s->private;
153 struct pxa27x_request *req;
154 int pos = 0, i, maxpkt, ret;
160 /* dump endpoint queues */
161 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
162 ep = &udc->pxa_ep[i];
163 maxpkt = ep->fifo_size;
164 pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
165 EPNAME(ep), maxpkt, "pio");
167 if (list_empty(&ep->queue)) {
168 pos += seq_printf(s, "\t(nothing queued)\n");
172 list_for_each_entry(req, &ep->queue, queue) {
173 pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
174 &req->req, req->req.actual,
175 req->req.length, req->req.buf);
184 static int eps_dbg_show(struct seq_file *s, void *p)
186 struct pxa_udc *udc = s->private;
195 ep = &udc->pxa_ep[0];
196 tmp = udc_ep_readl(ep, UDCCSR);
197 pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
198 (tmp & UDCCSR0_SA) ? " sa" : "",
199 (tmp & UDCCSR0_RNE) ? " rne" : "",
200 (tmp & UDCCSR0_FST) ? " fst" : "",
201 (tmp & UDCCSR0_SST) ? " sst" : "",
202 (tmp & UDCCSR0_DME) ? " dme" : "",
203 (tmp & UDCCSR0_IPR) ? " ipr" : "",
204 (tmp & UDCCSR0_OPC) ? " opc" : "");
205 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
206 ep = &udc->pxa_ep[i];
207 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
208 pos += seq_printf(s, "%-12s: "
209 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
210 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
213 ep->stats.in_bytes, ep->stats.in_ops,
214 ep->stats.out_bytes, ep->stats.out_ops,
216 tmp, udc_ep_readl(ep, UDCCSR),
217 udc_ep_readl(ep, UDCBCR));
225 static int eps_dbg_open(struct inode *inode, struct file *file)
227 return single_open(file, eps_dbg_show, inode->i_private);
230 static int queues_dbg_open(struct inode *inode, struct file *file)
232 return single_open(file, queues_dbg_show, inode->i_private);
235 static int state_dbg_open(struct inode *inode, struct file *file)
237 return single_open(file, state_dbg_show, inode->i_private);
240 static const struct file_operations state_dbg_fops = {
241 .owner = THIS_MODULE,
242 .open = state_dbg_open,
245 .release = single_release,
248 static const struct file_operations queues_dbg_fops = {
249 .owner = THIS_MODULE,
250 .open = queues_dbg_open,
253 .release = single_release,
256 static const struct file_operations eps_dbg_fops = {
257 .owner = THIS_MODULE,
258 .open = eps_dbg_open,
261 .release = single_release,
264 static void pxa_init_debugfs(struct pxa_udc *udc)
266 struct dentry *root, *state, *queues, *eps;
268 root = debugfs_create_dir(udc->gadget.name, NULL);
269 if (IS_ERR(root) || !root)
272 state = debugfs_create_file("udcstate", 0400, root, udc,
276 queues = debugfs_create_file("queues", 0400, root, udc,
280 eps = debugfs_create_file("epstate", 0400, root, udc,
285 udc->debugfs_root = root;
286 udc->debugfs_state = state;
287 udc->debugfs_queues = queues;
288 udc->debugfs_eps = eps;
293 debugfs_remove(queues);
295 debugfs_remove(root);
297 dev_err(udc->dev, "debugfs is not available\n");
300 static void pxa_cleanup_debugfs(struct pxa_udc *udc)
302 debugfs_remove(udc->debugfs_eps);
303 debugfs_remove(udc->debugfs_queues);
304 debugfs_remove(udc->debugfs_state);
305 debugfs_remove(udc->debugfs_root);
306 udc->debugfs_eps = NULL;
307 udc->debugfs_queues = NULL;
308 udc->debugfs_state = NULL;
309 udc->debugfs_root = NULL;
313 static inline void pxa_init_debugfs(struct pxa_udc *udc)
317 static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
323 * is_match_usb_pxa - check if usb_ep and pxa_ep match
324 * @udc_usb_ep: usb endpoint
326 * @config: configuration required in pxa_ep
327 * @interface: interface required in pxa_ep
328 * @altsetting: altsetting required in pxa_ep
330 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
332 static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
333 int config, int interface, int altsetting)
335 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
337 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
339 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
341 if ((ep->config != config) || (ep->interface != interface)
342 || (ep->alternate != altsetting))
348 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
350 * @udc_usb_ep: udc_usb_ep structure
352 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
353 * This is necessary because of the strong pxa hardware restriction requiring
354 * that once pxa endpoints are initialized, their configuration is freezed, and
355 * no change can be made to their address, direction, or in which configuration,
356 * interface or altsetting they are active ... which differs from more usual
357 * models which have endpoints be roughly just addressable fifos, and leave
358 * configuration events up to gadget drivers (like all control messages).
360 * Note that there is still a blurred point here :
361 * - we rely on UDCCR register "active interface" and "active altsetting".
362 * This is a nonsense in regard of USB spec, where multiple interfaces are
363 * active at the same time.
364 * - if we knew for sure that the pxa can handle multiple interface at the
365 * same time, assuming Intel's Developer Guide is wrong, this function
366 * should be reviewed, and a cache of couples (iface, altsetting) should
367 * be kept in the pxa_udc structure. In this case this function would match
368 * against the cache of couples instead of the "last altsetting" set up.
370 * Returns the matched pxa_ep structure or NULL if none found
372 static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
373 struct udc_usb_ep *udc_usb_ep)
377 int cfg = udc->config;
378 int iface = udc->last_interface;
379 int alt = udc->last_alternate;
381 if (udc_usb_ep == &udc->udc_usb_ep[0])
382 return &udc->pxa_ep[0];
384 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
385 ep = &udc->pxa_ep[i];
386 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
393 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
396 * Context: in_interrupt()
398 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
399 * previously set up (and is not NULL). The update is necessary is a
400 * configuration change or altsetting change was issued by the USB host.
402 static void update_pxa_ep_matches(struct pxa_udc *udc)
405 struct udc_usb_ep *udc_usb_ep;
407 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
408 udc_usb_ep = &udc->udc_usb_ep[i];
409 if (udc_usb_ep->pxa_ep)
410 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
415 * pio_irq_enable - Enables irq generation for one endpoint
418 static void pio_irq_enable(struct pxa_ep *ep)
420 struct pxa_udc *udc = ep->dev;
421 int index = EPIDX(ep);
422 u32 udcicr0 = udc_readl(udc, UDCICR0);
423 u32 udcicr1 = udc_readl(udc, UDCICR1);
426 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
428 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
432 * pio_irq_disable - Disables irq generation for one endpoint
435 static void pio_irq_disable(struct pxa_ep *ep)
437 struct pxa_udc *udc = ep->dev;
438 int index = EPIDX(ep);
439 u32 udcicr0 = udc_readl(udc, UDCICR0);
440 u32 udcicr1 = udc_readl(udc, UDCICR1);
443 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
445 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
449 * udc_set_mask_UDCCR - set bits in UDCCR
451 * @mask: bits to set in UDCCR
453 * Sets bits in UDCCR, leaving DME and FST bits as they were.
455 static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
457 u32 udccr = udc_readl(udc, UDCCR);
458 udc_writel(udc, UDCCR,
459 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
463 * udc_clear_mask_UDCCR - clears bits in UDCCR
465 * @mask: bit to clear in UDCCR
467 * Clears bits in UDCCR, leaving DME and FST bits as they were.
469 static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
471 u32 udccr = udc_readl(udc, UDCCR);
472 udc_writel(udc, UDCCR,
473 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
477 * ep_count_bytes_remain - get how many bytes in udc endpoint
480 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
482 static int ep_count_bytes_remain(struct pxa_ep *ep)
486 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
490 * ep_is_empty - checks if ep has byte ready for reading
493 * If endpoint is the control endpoint, checks if there are bytes in the
494 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
495 * are ready for reading on OUT endpoint.
497 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
499 static int ep_is_empty(struct pxa_ep *ep)
503 if (!is_ep0(ep) && ep->dir_in)
506 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
508 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
513 * ep_is_full - checks if ep has place to write bytes
516 * If endpoint is not the control endpoint and is an IN endpoint, checks if
517 * there is place to write bytes into the endpoint.
519 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
521 static int ep_is_full(struct pxa_ep *ep)
524 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
527 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
531 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
534 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
536 static int epout_has_pkt(struct pxa_ep *ep)
538 if (!is_ep0(ep) && ep->dir_in)
541 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
542 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
546 * set_ep0state - Set ep0 automata state
550 static void set_ep0state(struct pxa_udc *udc, int state)
552 struct pxa_ep *ep = &udc->pxa_ep[0];
553 char *old_stname = EP0_STNAME(udc);
555 udc->ep0state = state;
556 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
557 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
558 udc_ep_readl(ep, UDCBCR));
562 * ep0_idle - Put control endpoint into idle state
565 static void ep0_idle(struct pxa_udc *dev)
567 set_ep0state(dev, WAIT_FOR_SETUP);
571 * inc_ep_stats_reqs - Update ep stats counts
572 * @ep: physical endpoint
574 * @is_in: ep direction (USB_DIR_IN or 0)
577 static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
586 * inc_ep_stats_bytes - Update ep stats counts
587 * @ep: physical endpoint
588 * @count: bytes transfered on endpoint
589 * @is_in: ep direction (USB_DIR_IN or 0)
591 static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
594 ep->stats.in_bytes += count;
596 ep->stats.out_bytes += count;
600 * pxa_ep_setup - Sets up an usb physical endpoint
601 * @ep: pxa27x physical endpoint
603 * Find the physical pxa27x ep, and setup its UDCCR
605 static __init void pxa_ep_setup(struct pxa_ep *ep)
609 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
610 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
611 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
612 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
613 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
614 | ((ep->dir_in) ? UDCCONR_ED : 0)
615 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
618 udc_ep_writel(ep, UDCCR, new_udccr);
622 * pxa_eps_setup - Sets up all usb physical endpoints
625 * Setup all pxa physical endpoints, except ep0
627 static __init void pxa_eps_setup(struct pxa_udc *dev)
631 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
633 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
634 pxa_ep_setup(&dev->pxa_ep[i]);
638 * pxa_ep_alloc_request - Allocate usb request
642 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
643 * must still pass correctly initialized endpoints, since other controller
644 * drivers may care about how it's currently set up (dma issues etc).
646 static struct usb_request *
647 pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
649 struct pxa27x_request *req;
651 req = kzalloc(sizeof *req, gfp_flags);
655 INIT_LIST_HEAD(&req->queue);
657 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
663 * pxa_ep_free_request - Free usb request
667 * Wrapper around kfree to free _req
669 static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
671 struct pxa27x_request *req;
673 req = container_of(_req, struct pxa27x_request, req);
674 WARN_ON(!list_empty(&req->queue));
679 * ep_add_request - add a request to the endpoint's queue
683 * Context: ep->lock held
685 * Queues the request in the endpoint's queue, and enables the interrupts
688 static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
692 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
693 req->req.length, udc_ep_readl(ep, UDCCSR));
696 list_add_tail(&req->queue, &ep->queue);
701 * ep_del_request - removes a request from the endpoint's queue
705 * Context: ep->lock held
707 * Unqueue the request from the endpoint's queue. If there are no more requests
708 * on the endpoint, and if it's not the control endpoint, interrupts are
709 * disabled on the endpoint.
711 static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
715 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
716 req->req.length, udc_ep_readl(ep, UDCCSR));
718 list_del_init(&req->queue);
720 if (!is_ep0(ep) && list_empty(&ep->queue))
725 * req_done - Complete an usb request
726 * @ep: pxa physical endpoint
728 * @status: usb request status sent to gadget API
730 * Context: ep->lock held
732 * Retire a pxa27x usb request. Endpoint must be locked.
734 static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status)
736 ep_del_request(ep, req);
737 if (likely(req->req.status == -EINPROGRESS))
738 req->req.status = status;
740 status = req->req.status;
742 if (status && status != -ESHUTDOWN)
743 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
745 req->req.actual, req->req.length);
747 req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
751 * ep_end_out_req - Ends endpoint OUT request
752 * @ep: physical endpoint
755 * Context: ep->lock held
757 * Ends endpoint OUT request (completes usb request).
759 static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req)
761 inc_ep_stats_reqs(ep, !USB_DIR_IN);
762 req_done(ep, req, 0);
766 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
767 * @ep: physical endpoint
770 * Context: ep->lock held
772 * Ends control endpoint OUT request (completes usb request), and puts
773 * control endpoint into idle state
775 static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req)
777 set_ep0state(ep->dev, OUT_STATUS_STAGE);
778 ep_end_out_req(ep, req);
783 * ep_end_in_req - Ends endpoint IN request
784 * @ep: physical endpoint
787 * Context: ep->lock held
789 * Ends endpoint IN request (completes usb request).
791 static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req)
793 inc_ep_stats_reqs(ep, USB_DIR_IN);
794 req_done(ep, req, 0);
798 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
799 * @ep: physical endpoint
802 * Context: ep->lock held
804 * Ends control endpoint IN request (completes usb request), and puts
805 * control endpoint into status state
807 static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req)
809 set_ep0state(ep->dev, IN_STATUS_STAGE);
810 ep_end_in_req(ep, req);
814 * nuke - Dequeue all requests
816 * @status: usb request status
818 * Context: ep->lock held
820 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
821 * disabled on that endpoint (because no more requests).
823 static void nuke(struct pxa_ep *ep, int status)
825 struct pxa27x_request *req;
827 while (!list_empty(&ep->queue)) {
828 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
829 req_done(ep, req, status);
834 * read_packet - transfer 1 packet from an OUT endpoint into request
835 * @ep: pxa physical endpoint
838 * Takes bytes from OUT endpoint and transfers them info the usb request.
839 * If there is less space in request than bytes received in OUT endpoint,
840 * bytes are left in the OUT endpoint.
842 * Returns how many bytes were actually transfered
844 static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
847 int bytes_ep, bufferspace, count, i;
849 bytes_ep = ep_count_bytes_remain(ep);
850 bufferspace = req->req.length - req->req.actual;
852 buf = (u32 *)(req->req.buf + req->req.actual);
855 if (likely(!ep_is_empty(ep)))
856 count = min(bytes_ep, bufferspace);
860 for (i = count; i > 0; i -= 4)
861 *buf++ = udc_ep_readl(ep, UDCDR);
862 req->req.actual += count;
864 udc_ep_writel(ep, UDCCSR, UDCCSR_PC);
870 * write_packet - transfer 1 packet from request into an IN endpoint
871 * @ep: pxa physical endpoint
873 * @max: max bytes that fit into endpoint
875 * Takes bytes from usb request, and transfers them into the physical
876 * endpoint. If there are no bytes to transfer, doesn't write anything
877 * to physical endpoint.
879 * Returns how many bytes were actually transfered.
881 static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
884 int length, count, remain, i;
888 buf = (u32 *)(req->req.buf + req->req.actual);
891 length = min(req->req.length - req->req.actual, max);
892 req->req.actual += length;
894 remain = length & 0x3;
895 count = length & ~(0x3);
896 for (i = count; i > 0 ; i -= 4)
897 udc_ep_writel(ep, UDCDR, *buf++);
900 for (i = remain; i > 0; i--)
901 udc_ep_writeb(ep, UDCDR, *buf_8++);
903 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
904 udc_ep_readl(ep, UDCCSR));
910 * read_fifo - Transfer packets from OUT endpoint into usb request
911 * @ep: pxa physical endpoint
914 * Context: callable when in_interrupt()
916 * Unload as many packets as possible from the fifo we use for usb OUT
917 * transfers and put them into the request. Caller should have made sure
918 * there's at least one packet ready.
919 * Doesn't complete the request, that's the caller's job
921 * Returns 1 if the request completed, 0 otherwise
923 static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
925 int count, is_short, completed = 0;
927 while (epout_has_pkt(ep)) {
928 count = read_packet(ep, req);
929 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
931 is_short = (count < ep->fifo_size);
932 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
933 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
934 &req->req, req->req.actual, req->req.length);
937 if (is_short || req->req.actual == req->req.length) {
941 /* finished that packet. the next one may be waiting... */
947 * write_fifo - transfer packets from usb request into an IN endpoint
948 * @ep: pxa physical endpoint
949 * @req: pxa usb request
951 * Write to an IN endpoint fifo, as many packets as possible.
952 * irqs will use this to write the rest later.
953 * caller guarantees at least one packet buffer is ready (or a zlp).
954 * Doesn't complete the request, that's the caller's job
956 * Returns 1 if request fully transfered, 0 if partial transfer
958 static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
961 int count, is_short, is_last = 0, completed = 0, totcount = 0;
968 udccsr = udc_ep_readl(ep, UDCCSR);
969 if (udccsr & UDCCSR_PC) {
970 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
972 udc_ep_writel(ep, UDCCSR, UDCCSR_PC);
974 if (udccsr & UDCCSR_TRN) {
975 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
977 udc_ep_writel(ep, UDCCSR, UDCCSR_TRN);
980 count = write_packet(ep, req, max);
981 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
984 /* last packet is usually short (or a zlp) */
985 if (unlikely(count < max)) {
989 if (likely(req->req.length > req->req.actual)
994 /* interrupt/iso maxpacket may not fill the fifo */
995 is_short = unlikely(max < ep->fifo_size);
999 udc_ep_writel(ep, UDCCSR, UDCCSR_SP);
1001 /* requests complete when all IN data is in the FIFO */
1006 } while (!ep_is_full(ep));
1008 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1009 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1010 req->req.length - req->req.actual, &req->req);
1016 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1017 * @ep: control endpoint
1018 * @req: pxa usb request
1020 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1021 * endpoint as can be read, and stores them into usb request (limited by request
1024 * Returns 0 if usb request only partially filled, 1 if fully filled
1026 static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1028 int count, is_short, completed = 0;
1030 while (epout_has_pkt(ep)) {
1031 count = read_packet(ep, req);
1032 udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC);
1033 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1035 is_short = (count < ep->fifo_size);
1036 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1037 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1038 &req->req, req->req.actual, req->req.length);
1040 if (is_short || req->req.actual >= req->req.length) {
1050 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1051 * @ep: control endpoint
1054 * Context: callable when in_interrupt()
1056 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1057 * If the request doesn't fit, the remaining part will be sent from irq.
1058 * The request is considered fully written only if either :
1059 * - last write transfered all remaining bytes, but fifo was not fully filled
1060 * - last write was a 0 length write
1062 * Returns 1 if request fully written, 0 if request only partially sent
1064 static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1067 int is_last, is_short;
1069 count = write_packet(ep, req, EP0_FIFO_SIZE);
1070 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1072 is_short = (count < EP0_FIFO_SIZE);
1073 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1075 /* Sends either a short packet or a 0 length packet */
1076 if (unlikely(is_short))
1077 udc_ep_writel(ep, UDCCSR, UDCCSR0_IPR);
1079 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1080 count, is_short ? "/S" : "", is_last ? "/L" : "",
1081 req->req.length - req->req.actual,
1082 &req->req, udc_ep_readl(ep, UDCCSR));
1088 * pxa_ep_queue - Queue a request into an IN endpoint
1089 * @_ep: usb endpoint
1090 * @_req: usb request
1093 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1094 * in the special case of ep0 setup :
1095 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1097 * Returns 0 if succedeed, error otherwise
1099 static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1102 struct udc_usb_ep *udc_usb_ep;
1104 struct pxa27x_request *req;
1105 struct pxa_udc *dev;
1106 unsigned long flags;
1111 req = container_of(_req, struct pxa27x_request, req);
1112 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1114 if (unlikely(!_req || !_req->complete || !_req->buf))
1120 dev = udc_usb_ep->dev;
1121 ep = udc_usb_ep->pxa_ep;
1126 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1127 ep_dbg(ep, "bogus device state\n");
1131 /* iso is always one packet per request, that's the only way
1132 * we can report per-packet status. that also helps with dma.
1134 if (unlikely(EPXFERTYPE_is_ISO(ep)
1135 && req->req.length > ep->fifo_size))
1138 spin_lock_irqsave(&ep->lock, flags);
1140 is_first_req = list_empty(&ep->queue);
1141 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1142 _req, is_first_req ? "yes" : "no",
1143 _req->length, _req->buf);
1146 _req->status = -ESHUTDOWN;
1152 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1156 length = _req->length;
1157 _req->status = -EINPROGRESS;
1160 ep_add_request(ep, req);
1163 switch (dev->ep0state) {
1164 case WAIT_ACK_SET_CONF_INTERF:
1166 ep_end_in_req(ep, req);
1168 ep_err(ep, "got a request of %d bytes while"
1169 "in state WAIT_ACK_SET_CONF_INTERF\n",
1171 ep_del_request(ep, req);
1177 if (!ep_is_full(ep))
1178 if (write_ep0_fifo(ep, req))
1179 ep0_end_in_req(ep, req);
1181 case OUT_DATA_STAGE:
1182 if ((length == 0) || !epout_has_pkt(ep))
1183 if (read_ep0_fifo(ep, req))
1184 ep0_end_out_req(ep, req);
1187 ep_err(ep, "odd state %s to send me a request\n",
1188 EP0_STNAME(ep->dev));
1189 ep_del_request(ep, req);
1198 spin_unlock_irqrestore(&ep->lock, flags);
1203 * pxa_ep_dequeue - Dequeue one request
1204 * @_ep: usb endpoint
1205 * @_req: usb request
1207 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1209 static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1212 struct udc_usb_ep *udc_usb_ep;
1213 struct pxa27x_request *req;
1214 unsigned long flags;
1219 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1220 ep = udc_usb_ep->pxa_ep;
1221 if (!ep || is_ep0(ep))
1224 spin_lock_irqsave(&ep->lock, flags);
1226 /* make sure it's actually queued on this endpoint */
1227 list_for_each_entry(req, &ep->queue, queue) {
1228 if (&req->req == _req) {
1229 req_done(ep, req, -ECONNRESET);
1235 spin_unlock_irqrestore(&ep->lock, flags);
1240 * pxa_ep_set_halt - Halts operations on one endpoint
1241 * @_ep: usb endpoint
1244 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1246 static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1249 struct udc_usb_ep *udc_usb_ep;
1250 unsigned long flags;
1256 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1257 ep = udc_usb_ep->pxa_ep;
1258 if (!ep || is_ep0(ep))
1263 * This path (reset toggle+halt) is needed to implement
1264 * SET_INTERFACE on normal hardware. but it can't be
1265 * done from software on the PXA UDC, and the hardware
1266 * forgets to do it as part of SET_INTERFACE automagic.
1268 ep_dbg(ep, "only host can clear halt\n");
1272 spin_lock_irqsave(&ep->lock, flags);
1275 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1278 /* FST, FEF bits are the same for control and non control endpoints */
1280 udc_ep_writel(ep, UDCCSR, UDCCSR_FST | UDCCSR_FEF);
1282 set_ep0state(ep->dev, STALL);
1285 spin_unlock_irqrestore(&ep->lock, flags);
1290 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1291 * @_ep: usb endpoint
1293 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1295 static int pxa_ep_fifo_status(struct usb_ep *_ep)
1298 struct udc_usb_ep *udc_usb_ep;
1302 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1303 ep = udc_usb_ep->pxa_ep;
1304 if (!ep || is_ep0(ep))
1309 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1312 return ep_count_bytes_remain(ep) + 1;
1316 * pxa_ep_fifo_flush - Flushes one endpoint
1317 * @_ep: usb endpoint
1319 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1321 static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1324 struct udc_usb_ep *udc_usb_ep;
1325 unsigned long flags;
1329 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1330 ep = udc_usb_ep->pxa_ep;
1331 if (!ep || is_ep0(ep))
1334 spin_lock_irqsave(&ep->lock, flags);
1336 if (unlikely(!list_empty(&ep->queue)))
1337 ep_dbg(ep, "called while queue list not empty\n");
1338 ep_dbg(ep, "called\n");
1340 /* for OUT, just read and discard the FIFO contents. */
1342 while (!ep_is_empty(ep))
1343 udc_ep_readl(ep, UDCDR);
1345 /* most IN status is the same, but ISO can't stall */
1346 udc_ep_writel(ep, UDCCSR,
1347 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1348 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1351 spin_unlock_irqrestore(&ep->lock, flags);
1357 * pxa_ep_enable - Enables usb endpoint
1358 * @_ep: usb endpoint
1359 * @desc: usb endpoint descriptor
1361 * Nothing much to do here, as ep configuration is done once and for all
1362 * before udc is enabled. After udc enable, no physical endpoint configuration
1364 * Function makes sanity checks and flushes the endpoint.
1366 static int pxa_ep_enable(struct usb_ep *_ep,
1367 const struct usb_endpoint_descriptor *desc)
1370 struct udc_usb_ep *udc_usb_ep;
1371 struct pxa_udc *udc;
1376 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1377 if (udc_usb_ep->pxa_ep) {
1378 ep = udc_usb_ep->pxa_ep;
1379 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1382 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1385 if (!ep || is_ep0(ep)) {
1386 dev_err(udc_usb_ep->dev->dev,
1387 "unable to match pxa_ep for ep %s\n",
1392 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1393 || (ep->type != usb_endpoint_type(desc))) {
1394 ep_err(ep, "type mismatch\n");
1398 if (ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) {
1399 ep_err(ep, "bad maxpacket\n");
1403 udc_usb_ep->pxa_ep = ep;
1406 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1407 ep_err(ep, "bogus device state\n");
1413 /* flush fifo (mostly for OUT buffers) */
1414 pxa_ep_fifo_flush(_ep);
1416 ep_dbg(ep, "enabled\n");
1421 * pxa_ep_disable - Disable usb endpoint
1422 * @_ep: usb endpoint
1424 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1426 * Function flushes the endpoint and related requests.
1428 static int pxa_ep_disable(struct usb_ep *_ep)
1431 struct udc_usb_ep *udc_usb_ep;
1432 unsigned long flags;
1437 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1438 ep = udc_usb_ep->pxa_ep;
1439 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1442 spin_lock_irqsave(&ep->lock, flags);
1444 nuke(ep, -ESHUTDOWN);
1445 spin_unlock_irqrestore(&ep->lock, flags);
1447 pxa_ep_fifo_flush(_ep);
1448 udc_usb_ep->pxa_ep = NULL;
1450 ep_dbg(ep, "disabled\n");
1454 static struct usb_ep_ops pxa_ep_ops = {
1455 .enable = pxa_ep_enable,
1456 .disable = pxa_ep_disable,
1458 .alloc_request = pxa_ep_alloc_request,
1459 .free_request = pxa_ep_free_request,
1461 .queue = pxa_ep_queue,
1462 .dequeue = pxa_ep_dequeue,
1464 .set_halt = pxa_ep_set_halt,
1465 .fifo_status = pxa_ep_fifo_status,
1466 .fifo_flush = pxa_ep_fifo_flush,
1470 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1472 * @on: 0 if disconnect pullup resistor, 1 otherwise
1475 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1476 * declare it as a full speed usb device
1478 static void dplus_pullup(struct pxa_udc *udc, int on)
1481 if (gpio_is_valid(udc->mach->gpio_pullup))
1482 gpio_set_value(udc->mach->gpio_pullup,
1483 !udc->mach->gpio_pullup_inverted);
1484 if (udc->mach->udc_command)
1485 udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1487 if (gpio_is_valid(udc->mach->gpio_pullup))
1488 gpio_set_value(udc->mach->gpio_pullup,
1489 udc->mach->gpio_pullup_inverted);
1490 if (udc->mach->udc_command)
1491 udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1493 udc->pullup_on = on;
1497 * pxa_udc_get_frame - Returns usb frame number
1498 * @_gadget: usb gadget
1500 static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1502 struct pxa_udc *udc = to_gadget_udc(_gadget);
1504 return (udc_readl(udc, UDCFNR) & 0x7ff);
1508 * pxa_udc_wakeup - Force udc device out of suspend
1509 * @_gadget: usb gadget
1511 * Returns 0 if succesfull, error code otherwise
1513 static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1515 struct pxa_udc *udc = to_gadget_udc(_gadget);
1517 /* host may not have enabled remote wakeup */
1518 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1519 return -EHOSTUNREACH;
1520 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1524 static void udc_enable(struct pxa_udc *udc);
1525 static void udc_disable(struct pxa_udc *udc);
1528 * should_enable_udc - Tells if UDC should be enabled
1532 * The UDC should be enabled if :
1534 * - the pullup resistor is connected
1535 * - and a gadget driver is bound
1536 * - and vbus is sensed (or no vbus sense is available)
1538 * Returns 1 if UDC should be enabled, 0 otherwise
1540 static int should_enable_udc(struct pxa_udc *udc)
1544 put_on = ((udc->pullup_on) && (udc->driver));
1545 put_on &= ((udc->vbus_sensed) || (!udc->transceiver));
1550 * should_disable_udc - Tells if UDC should be disabled
1554 * The UDC should be disabled if :
1555 * - the pullup resistor is not connected
1556 * - or no gadget driver is bound
1557 * - or no vbus is sensed (when vbus sesing is available)
1559 * Returns 1 if UDC should be disabled
1561 static int should_disable_udc(struct pxa_udc *udc)
1565 put_off = ((!udc->pullup_on) || (!udc->driver));
1566 put_off |= ((!udc->vbus_sensed) && (udc->transceiver));
1571 * pxa_udc_pullup - Offer manual D+ pullup control
1572 * @_gadget: usb gadget using the control
1573 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1574 * Context: !in_interrupt()
1576 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1578 static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1580 struct pxa_udc *udc = to_gadget_udc(_gadget);
1582 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1585 dplus_pullup(udc, is_active);
1587 if (should_enable_udc(udc))
1589 if (should_disable_udc(udc))
1594 static void udc_enable(struct pxa_udc *udc);
1595 static void udc_disable(struct pxa_udc *udc);
1598 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1599 * @_gadget: usb gadget
1600 * @is_active: 0 if should disable the udc, 1 if should enable
1602 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1603 * udc, and deactivates D+ pullup resistor.
1607 static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1609 struct pxa_udc *udc = to_gadget_udc(_gadget);
1611 udc->vbus_sensed = is_active;
1612 if (should_enable_udc(udc))
1614 if (should_disable_udc(udc))
1621 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1622 * @_gadget: usb gadget
1623 * @mA: current drawn
1625 * Context: !in_interrupt()
1627 * Called after a configuration was chosen by a USB host, to inform how much
1628 * current can be drawn by the device from VBus line.
1630 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1632 static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1634 struct pxa_udc *udc;
1636 udc = to_gadget_udc(_gadget);
1637 if (udc->transceiver)
1638 return otg_set_power(udc->transceiver, mA);
1642 static const struct usb_gadget_ops pxa_udc_ops = {
1643 .get_frame = pxa_udc_get_frame,
1644 .wakeup = pxa_udc_wakeup,
1645 .pullup = pxa_udc_pullup,
1646 .vbus_session = pxa_udc_vbus_session,
1647 .vbus_draw = pxa_udc_vbus_draw,
1651 * udc_disable - disable udc device controller
1655 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1658 static void udc_disable(struct pxa_udc *udc)
1663 udc_writel(udc, UDCICR0, 0);
1664 udc_writel(udc, UDCICR1, 0);
1666 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1667 clk_disable(udc->clk);
1670 udc->gadget.speed = USB_SPEED_UNKNOWN;
1676 * udc_init_data - Initialize udc device data structures
1679 * Initializes gadget endpoint list, endpoints locks. No action is taken
1682 static __init void udc_init_data(struct pxa_udc *dev)
1687 /* device/ep0 records init */
1688 INIT_LIST_HEAD(&dev->gadget.ep_list);
1689 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1690 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1693 /* PXA endpoints init */
1694 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1695 ep = &dev->pxa_ep[i];
1697 ep->enabled = is_ep0(ep);
1698 INIT_LIST_HEAD(&ep->queue);
1699 spin_lock_init(&ep->lock);
1702 /* USB endpoints init */
1703 for (i = 1; i < NR_USB_ENDPOINTS; i++)
1704 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1705 &dev->gadget.ep_list);
1709 * udc_enable - Enables the udc device
1712 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1713 * interrupts, sets usb as UDC client and setups endpoints.
1715 static void udc_enable(struct pxa_udc *udc)
1720 udc_writel(udc, UDCICR0, 0);
1721 udc_writel(udc, UDCICR1, 0);
1722 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1724 clk_enable(udc->clk);
1727 udc->gadget.speed = USB_SPEED_FULL;
1728 memset(&udc->stats, 0, sizeof(udc->stats));
1730 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1732 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1733 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1736 * Caller must be able to sleep in order to cope with startup transients
1740 /* enable suspend/resume and reset irqs */
1741 udc_writel(udc, UDCICR1,
1742 UDCICR1_IECC | UDCICR1_IERU
1743 | UDCICR1_IESU | UDCICR1_IERS);
1745 /* enable ep0 irqs */
1746 pio_irq_enable(&udc->pxa_ep[0]);
1752 * usb_gadget_register_driver - Register gadget driver
1753 * @driver: gadget driver
1755 * When a driver is successfully registered, it will receive control requests
1756 * including set_configuration(), which enables non-control requests. Then
1757 * usb traffic follows until a disconnect is reported. Then a host may connect
1758 * again, or the driver might get unbound.
1760 * Note that the udc is not automatically enabled. Check function
1761 * should_enable_udc().
1763 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1765 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1767 struct pxa_udc *udc = the_controller;
1770 if (!driver || driver->speed < USB_SPEED_FULL || !driver->bind
1771 || !driver->disconnect || !driver->setup)
1778 /* first hook up the driver ... */
1779 udc->driver = driver;
1780 udc->gadget.dev.driver = &driver->driver;
1781 dplus_pullup(udc, 1);
1783 retval = device_add(&udc->gadget.dev);
1785 dev_err(udc->dev, "device_add error %d\n", retval);
1788 retval = driver->bind(&udc->gadget);
1790 dev_err(udc->dev, "bind to driver %s --> error %d\n",
1791 driver->driver.name, retval);
1794 dev_dbg(udc->dev, "registered gadget driver '%s'\n",
1795 driver->driver.name);
1797 if (udc->transceiver) {
1798 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
1800 dev_err(udc->dev, "can't bind to transceiver\n");
1801 goto transceiver_fail;
1805 if (should_enable_udc(udc))
1811 driver->unbind(&udc->gadget);
1813 device_del(&udc->gadget.dev);
1816 udc->gadget.dev.driver = NULL;
1819 EXPORT_SYMBOL(usb_gadget_register_driver);
1823 * stop_activity - Stops udc endpoints
1825 * @driver: gadget driver
1827 * Disables all udc endpoints (even control endpoint), report disconnect to
1830 static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1834 /* don't disconnect drivers more than once */
1835 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1837 udc->gadget.speed = USB_SPEED_UNKNOWN;
1839 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1840 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1843 driver->disconnect(&udc->gadget);
1847 * usb_gadget_unregister_driver - Unregister the gadget driver
1848 * @driver: gadget driver
1850 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1852 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1854 struct pxa_udc *udc = the_controller;
1858 if (!driver || driver != udc->driver || !driver->unbind)
1861 stop_activity(udc, driver);
1863 dplus_pullup(udc, 0);
1865 driver->unbind(&udc->gadget);
1868 device_del(&udc->gadget.dev);
1869 dev_info(udc->dev, "unregistered gadget driver '%s'\n",
1870 driver->driver.name);
1872 if (udc->transceiver)
1873 return otg_set_peripheral(udc->transceiver, NULL);
1876 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1879 * handle_ep0_ctrl_req - handle control endpoint control request
1881 * @req: control request
1883 static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1884 struct pxa27x_request *req)
1886 struct pxa_ep *ep = &udc->pxa_ep[0];
1888 struct usb_ctrlrequest r;
1892 int have_extrabytes = 0;
1896 /* read SETUP packet */
1897 for (i = 0; i < 2; i++) {
1898 if (unlikely(ep_is_empty(ep)))
1900 u.word[i] = udc_ep_readl(ep, UDCDR);
1903 have_extrabytes = !ep_is_empty(ep);
1904 while (!ep_is_empty(ep)) {
1905 i = udc_ep_readl(ep, UDCDR);
1906 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1909 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1910 u.r.bRequestType, u.r.bRequest,
1911 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1912 le16_to_cpu(u.r.wLength));
1913 if (unlikely(have_extrabytes))
1916 if (u.r.bRequestType & USB_DIR_IN)
1917 set_ep0state(udc, IN_DATA_STAGE);
1919 set_ep0state(udc, OUT_DATA_STAGE);
1921 /* Tell UDC to enter Data Stage */
1922 udc_ep_writel(ep, UDCCSR, UDCCSR0_SA | UDCCSR0_OPC);
1924 i = udc->driver->setup(&udc->gadget, &u.r);
1930 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1931 udc_ep_readl(ep, UDCCSR), i);
1932 udc_ep_writel(ep, UDCCSR, UDCCSR0_FST | UDCCSR0_FTF);
1933 set_ep0state(udc, STALL);
1938 * handle_ep0 - Handle control endpoint data transfers
1940 * @fifo_irq: 1 if triggered by fifo service type irq
1941 * @opc_irq: 1 if triggered by output packet complete type irq
1943 * Context : when in_interrupt() or with ep->lock held
1945 * Tries to transfer all pending request data into the endpoint and/or
1946 * transfer all pending data in the endpoint into usb requests.
1947 * Handles states of ep0 automata.
1949 * PXA27x hardware handles several standard usb control requests without
1950 * driver notification. The requests fully handled by hardware are :
1951 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
1953 * The requests handled by hardware, but with irq notification are :
1954 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
1955 * The remaining standard requests really handled by handle_ep0 are :
1956 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
1957 * Requests standardized outside of USB 2.0 chapter 9 are handled more
1958 * uniformly, by gadget drivers.
1960 * The control endpoint state machine is _not_ USB spec compliant, it's even
1961 * hardly compliant with Intel PXA270 developers guide.
1962 * The key points which inferred this state machine are :
1963 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
1965 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
1966 * cleared by software.
1967 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
1968 * before reading ep0.
1969 * - irq can be called on a "packet complete" event (opc_irq=1), while
1970 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
1971 * from experimentation).
1972 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
1973 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
1974 * => we never actually read the "status stage" packet of an IN data stage
1975 * => this is not documented in Intel documentation
1976 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
1977 * STAGE. The driver add STATUS STAGE to send last zero length packet in
1979 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
1980 * event is detected, we terminate the status stage without ackowledging the
1981 * packet (not to risk to loose a potential SETUP packet)
1983 static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
1986 struct pxa_ep *ep = &udc->pxa_ep[0];
1987 struct pxa27x_request *req = NULL;
1990 if (!list_empty(&ep->queue))
1991 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
1993 udccsr0 = udc_ep_readl(ep, UDCCSR);
1994 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
1995 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
1996 (fifo_irq << 1 | opc_irq));
1998 if (udccsr0 & UDCCSR0_SST) {
1999 ep_dbg(ep, "clearing stall status\n");
2001 udc_ep_writel(ep, UDCCSR, UDCCSR0_SST);
2005 if (udccsr0 & UDCCSR0_SA) {
2007 set_ep0state(udc, SETUP_STAGE);
2010 switch (udc->ep0state) {
2011 case WAIT_FOR_SETUP:
2013 * Hardware bug : beware, we cannot clear OPC, since we would
2014 * miss a potential OPC irq for a setup packet.
2015 * So, we only do ... nothing, and hope for a next irq with
2020 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2021 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2022 handle_ep0_ctrl_req(udc, req);
2024 case IN_DATA_STAGE: /* GET_DESCRIPTOR */
2025 if (epout_has_pkt(ep))
2026 udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC);
2027 if (req && !ep_is_full(ep))
2028 completed = write_ep0_fifo(ep, req);
2030 ep0_end_in_req(ep, req);
2032 case OUT_DATA_STAGE: /* SET_DESCRIPTOR */
2033 if (epout_has_pkt(ep) && req)
2034 completed = read_ep0_fifo(ep, req);
2036 ep0_end_out_req(ep, req);
2039 udc_ep_writel(ep, UDCCSR, UDCCSR0_FST);
2041 case IN_STATUS_STAGE:
2043 * Hardware bug : beware, we cannot clear OPC, since we would
2044 * miss a potential PC irq for a setup packet.
2045 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2050 case OUT_STATUS_STAGE:
2051 case WAIT_ACK_SET_CONF_INTERF:
2052 ep_warn(ep, "should never get in %s state here!!!\n",
2053 EP0_STNAME(ep->dev));
2060 * handle_ep - Handle endpoint data tranfers
2061 * @ep: pxa physical endpoint
2063 * Tries to transfer all pending request data into the endpoint and/or
2064 * transfer all pending data in the endpoint into usb requests.
2066 * Is always called when in_interrupt() or with ep->lock held.
2068 static void handle_ep(struct pxa_ep *ep)
2070 struct pxa27x_request *req;
2073 int is_in = ep->dir_in;
2078 udccsr = udc_ep_readl(ep, UDCCSR);
2079 if (likely(!list_empty(&ep->queue)))
2080 req = list_entry(ep->queue.next,
2081 struct pxa27x_request, queue);
2085 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2086 req, udccsr, loop++);
2088 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2089 udc_ep_writel(ep, UDCCSR,
2090 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2094 if (unlikely(is_in)) {
2095 if (likely(!ep_is_full(ep)))
2096 completed = write_fifo(ep, req);
2098 ep_end_in_req(ep, req);
2100 if (likely(epout_has_pkt(ep)))
2101 completed = read_fifo(ep, req);
2103 ep_end_out_req(ep, req);
2105 } while (completed);
2109 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2111 * @config: usb configuration
2113 * Post the request to upper level.
2114 * Don't use any pxa specific harware configuration capabilities
2116 static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2118 struct usb_ctrlrequest req ;
2120 dev_dbg(udc->dev, "config=%d\n", config);
2122 udc->config = config;
2123 udc->last_interface = 0;
2124 udc->last_alternate = 0;
2126 req.bRequestType = 0;
2127 req.bRequest = USB_REQ_SET_CONFIGURATION;
2128 req.wValue = config;
2132 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2133 udc->driver->setup(&udc->gadget, &req);
2137 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2139 * @iface: interface number
2140 * @alt: alternate setting number
2142 * Post the request to upper level.
2143 * Don't use any pxa specific harware configuration capabilities
2145 static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2147 struct usb_ctrlrequest req;
2149 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2151 udc->last_interface = iface;
2152 udc->last_alternate = alt;
2154 req.bRequestType = USB_RECIP_INTERFACE;
2155 req.bRequest = USB_REQ_SET_INTERFACE;
2160 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2161 udc->driver->setup(&udc->gadget, &req);
2165 * irq_handle_data - Handle data transfer
2166 * @irq: irq IRQ number
2167 * @udc: dev pxa_udc device structure
2169 * Called from irq handler, transferts data to or from endpoint to queue
2171 static void irq_handle_data(int irq, struct pxa_udc *udc)
2175 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2176 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2178 if (udcisr0 & UDCISR_INT_MASK) {
2179 udc->pxa_ep[0].stats.irqs++;
2180 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2181 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2182 !!(udcisr0 & UDCICR_PKTCOMPL));
2186 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2187 if (!(udcisr0 & UDCISR_INT_MASK))
2190 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2191 ep = &udc->pxa_ep[i];
2196 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2197 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2198 if (!(udcisr1 & UDCISR_INT_MASK))
2201 ep = &udc->pxa_ep[i];
2209 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2212 static void irq_udc_suspend(struct pxa_udc *udc)
2214 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2215 udc->stats.irqs_suspend++;
2217 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2218 && udc->driver && udc->driver->suspend)
2219 udc->driver->suspend(&udc->gadget);
2224 * irq_udc_resume - Handle IRQ "UDC Resume"
2227 static void irq_udc_resume(struct pxa_udc *udc)
2229 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2230 udc->stats.irqs_resume++;
2232 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2233 && udc->driver && udc->driver->resume)
2234 udc->driver->resume(&udc->gadget);
2238 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2241 static void irq_udc_reconfig(struct pxa_udc *udc)
2243 unsigned config, interface, alternate, config_change;
2244 u32 udccr = udc_readl(udc, UDCCR);
2246 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2247 udc->stats.irqs_reconfig++;
2249 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2250 config_change = (config != udc->config);
2251 pxa27x_change_configuration(udc, config);
2253 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2254 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2255 pxa27x_change_interface(udc, interface, alternate);
2258 update_pxa_ep_matches(udc);
2259 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2263 * irq_udc_reset - Handle IRQ "UDC Reset"
2266 static void irq_udc_reset(struct pxa_udc *udc)
2268 u32 udccr = udc_readl(udc, UDCCR);
2269 struct pxa_ep *ep = &udc->pxa_ep[0];
2271 dev_info(udc->dev, "USB reset\n");
2272 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2273 udc->stats.irqs_reset++;
2275 if ((udccr & UDCCR_UDA) == 0) {
2276 dev_dbg(udc->dev, "USB reset start\n");
2277 stop_activity(udc, udc->driver);
2279 udc->gadget.speed = USB_SPEED_FULL;
2280 memset(&udc->stats, 0, sizeof udc->stats);
2283 udc_ep_writel(ep, UDCCSR, UDCCSR0_FTF | UDCCSR0_OPC);
2288 * pxa_udc_irq - Main irq handler
2292 * Handles all udc interrupts
2294 static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2296 struct pxa_udc *udc = _dev;
2297 u32 udcisr0 = udc_readl(udc, UDCISR0);
2298 u32 udcisr1 = udc_readl(udc, UDCISR1);
2299 u32 udccr = udc_readl(udc, UDCCR);
2302 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2303 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2305 udcisr1_spec = udcisr1 & 0xf8000000;
2306 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2307 irq_udc_suspend(udc);
2308 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2309 irq_udc_resume(udc);
2310 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2311 irq_udc_reconfig(udc);
2312 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2315 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2316 irq_handle_data(irq, udc);
2321 static struct pxa_udc memory = {
2323 .ops = &pxa_udc_ops,
2324 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2325 .name = driver_name,
2327 .init_name = "gadget",
2342 /* Endpoints for gadget zero */
2343 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2344 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2345 /* Endpoints for ether gadget, file storage gadget */
2346 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2347 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2348 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2349 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2350 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2351 /* Endpoints for RNDIS, serial */
2352 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2353 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2354 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2356 * All the following endpoints are only for completion. They
2357 * won't never work, as multiple interfaces are really broken on
2360 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2361 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2362 /* Endpoint for CDC Ether */
2363 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2364 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2369 * pxa_udc_probe - probes the udc device
2370 * @_dev: platform device
2372 * Perform basic init : allocates udc clock, creates sysfs files, requests
2375 static int __init pxa_udc_probe(struct platform_device *pdev)
2377 struct resource *regs;
2378 struct pxa_udc *udc = &memory;
2379 int retval = 0, gpio;
2381 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2384 udc->irq = platform_get_irq(pdev, 0);
2388 udc->dev = &pdev->dev;
2389 udc->mach = pdev->dev.platform_data;
2390 udc->transceiver = otg_get_transceiver();
2392 gpio = udc->mach->gpio_pullup;
2393 if (gpio_is_valid(gpio)) {
2394 retval = gpio_request(gpio, "USB D+ pullup");
2396 gpio_direction_output(gpio,
2397 udc->mach->gpio_pullup_inverted);
2400 dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2405 udc->clk = clk_get(&pdev->dev, NULL);
2406 if (IS_ERR(udc->clk)) {
2407 retval = PTR_ERR(udc->clk);
2412 udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
2414 dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2418 device_initialize(&udc->gadget.dev);
2419 udc->gadget.dev.parent = &pdev->dev;
2420 udc->gadget.dev.dma_mask = NULL;
2421 udc->vbus_sensed = 0;
2423 the_controller = udc;
2424 platform_set_drvdata(pdev, udc);
2428 /* irq setup after old hardware state is cleaned up */
2429 retval = request_irq(udc->irq, pxa_udc_irq,
2430 IRQF_SHARED, driver_name, udc);
2432 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2433 driver_name, IRQ_USB, retval);
2437 pxa_init_debugfs(udc);
2449 * pxa_udc_remove - removes the udc device driver
2450 * @_dev: platform device
2452 static int __exit pxa_udc_remove(struct platform_device *_dev)
2454 struct pxa_udc *udc = platform_get_drvdata(_dev);
2455 int gpio = udc->mach->gpio_pullup;
2457 usb_gadget_unregister_driver(udc->driver);
2458 free_irq(udc->irq, udc);
2459 pxa_cleanup_debugfs(udc);
2460 if (gpio_is_valid(gpio))
2463 otg_put_transceiver(udc->transceiver);
2465 udc->transceiver = NULL;
2466 platform_set_drvdata(_dev, NULL);
2467 the_controller = NULL;
2474 static void pxa_udc_shutdown(struct platform_device *_dev)
2476 struct pxa_udc *udc = platform_get_drvdata(_dev);
2478 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2484 * pxa_udc_suspend - Suspend udc device
2485 * @_dev: platform device
2486 * @state: suspend state
2488 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2491 static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2494 struct pxa_udc *udc = platform_get_drvdata(_dev);
2497 ep = &udc->pxa_ep[0];
2498 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2499 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2500 ep = &udc->pxa_ep[i];
2501 ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2502 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2503 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2504 ep->udccsr_value, ep->udccr_value);
2508 udc->pullup_resume = udc->pullup_on;
2509 dplus_pullup(udc, 0);
2515 * pxa_udc_resume - Resume udc device
2516 * @_dev: platform device
2518 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2521 static int pxa_udc_resume(struct platform_device *_dev)
2524 struct pxa_udc *udc = platform_get_drvdata(_dev);
2527 ep = &udc->pxa_ep[0];
2528 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2529 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2530 ep = &udc->pxa_ep[i];
2531 udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2532 udc_ep_writel(ep, UDCCR, ep->udccr_value);
2533 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2534 ep->udccsr_value, ep->udccr_value);
2537 dplus_pullup(udc, udc->pullup_resume);
2538 if (should_enable_udc(udc))
2541 * We do not handle OTG yet.
2543 * OTGPH bit is set when sleep mode is entered.
2544 * it indicates that OTG pad is retaining its state.
2545 * Upon exit from sleep mode and before clearing OTGPH,
2546 * Software must configure the USB OTG pad, UDC, and UHC
2547 * to the state they were in before entering sleep mode.
2549 if (cpu_is_pxa27x())
2556 /* work with hotplug and coldplug */
2557 MODULE_ALIAS("platform:pxa27x-udc");
2559 static struct platform_driver udc_driver = {
2561 .name = "pxa27x-udc",
2562 .owner = THIS_MODULE,
2564 .remove = __exit_p(pxa_udc_remove),
2565 .shutdown = pxa_udc_shutdown,
2567 .suspend = pxa_udc_suspend,
2568 .resume = pxa_udc_resume
2572 static int __init udc_init(void)
2574 if (!cpu_is_pxa27x())
2577 printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2578 return platform_driver_probe(&udc_driver, pxa_udc_probe);
2580 module_init(udc_init);
2583 static void __exit udc_exit(void)
2585 platform_driver_unregister(&udc_driver);
2587 module_exit(udc_exit);
2589 MODULE_DESCRIPTION(DRIVER_DESC);
2590 MODULE_AUTHOR("Robert Jarzmik");
2591 MODULE_LICENSE("GPL");