2 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <rdma/ib_mad.h>
35 #include <rdma/ib_user_verbs.h>
37 #include <linux/utsname.h>
39 #include "ipath_kernel.h"
40 #include "ipath_verbs.h"
41 #include "ipath_common.h"
43 static unsigned int ib_ipath_qp_table_size = 251;
44 module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
45 MODULE_PARM_DESC(qp_table_size, "QP table size");
47 unsigned int ib_ipath_lkey_table_size = 12;
48 module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
50 MODULE_PARM_DESC(lkey_table_size,
51 "LKEY table size in bits (2^n, 1 <= n <= 23)");
53 static unsigned int ib_ipath_max_pds = 0xFFFF;
54 module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
55 MODULE_PARM_DESC(max_pds,
56 "Maximum number of protection domains to support");
58 static unsigned int ib_ipath_max_ahs = 0xFFFF;
59 module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
60 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
62 unsigned int ib_ipath_max_cqes = 0x2FFFF;
63 module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
64 MODULE_PARM_DESC(max_cqes,
65 "Maximum number of completion queue entries to support");
67 unsigned int ib_ipath_max_cqs = 0x1FFFF;
68 module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
69 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
71 unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
72 module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
74 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
76 unsigned int ib_ipath_max_qps = 16384;
77 module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
78 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
80 unsigned int ib_ipath_max_sges = 0x60;
81 module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
82 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
84 unsigned int ib_ipath_max_mcast_grps = 16384;
85 module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
87 MODULE_PARM_DESC(max_mcast_grps,
88 "Maximum number of multicast groups to support");
90 unsigned int ib_ipath_max_mcast_qp_attached = 16;
91 module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
92 uint, S_IWUSR | S_IRUGO);
93 MODULE_PARM_DESC(max_mcast_qp_attached,
94 "Maximum number of attached QPs to support");
96 unsigned int ib_ipath_max_srqs = 1024;
97 module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
98 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
100 unsigned int ib_ipath_max_srq_sges = 128;
101 module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
102 uint, S_IWUSR | S_IRUGO);
103 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
105 unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
106 module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
107 uint, S_IWUSR | S_IRUGO);
108 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
110 static unsigned int ib_ipath_disable_sma;
111 module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
112 MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
114 const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
116 [IB_QPS_INIT] = IPATH_POST_RECV_OK,
117 [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
118 [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
119 IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
120 [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
122 [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
126 struct ipath_ucontext {
127 struct ib_ucontext ibucontext;
130 static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
133 return container_of(ibucontext, struct ipath_ucontext, ibucontext);
137 * Translate ib_wr_opcode into ib_wc_opcode.
139 const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
140 [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
141 [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
142 [IB_WR_SEND] = IB_WC_SEND,
143 [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
144 [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
145 [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
146 [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
152 static __be64 sys_image_guid;
155 * ipath_copy_sge - copy data to SGE memory
157 * @data: the data to copy
158 * @length: the length of the data
160 void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
162 struct ipath_sge *sge = &ss->sge;
165 u32 len = sge->length;
169 if (len > sge->sge_length)
170 len = sge->sge_length;
172 memcpy(sge->vaddr, data, len);
175 sge->sge_length -= len;
176 if (sge->sge_length == 0) {
178 *sge = *ss->sg_list++;
179 } else if (sge->length == 0 && sge->mr != NULL) {
180 if (++sge->n >= IPATH_SEGSZ) {
181 if (++sge->m >= sge->mr->mapsz)
186 sge->mr->map[sge->m]->segs[sge->n].vaddr;
188 sge->mr->map[sge->m]->segs[sge->n].length;
196 * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
198 * @length: the number of bytes to skip
200 void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
202 struct ipath_sge *sge = &ss->sge;
205 u32 len = sge->length;
209 if (len > sge->sge_length)
210 len = sge->sge_length;
214 sge->sge_length -= len;
215 if (sge->sge_length == 0) {
217 *sge = *ss->sg_list++;
218 } else if (sge->length == 0 && sge->mr != NULL) {
219 if (++sge->n >= IPATH_SEGSZ) {
220 if (++sge->m >= sge->mr->mapsz)
225 sge->mr->map[sge->m]->segs[sge->n].vaddr;
227 sge->mr->map[sge->m]->segs[sge->n].length;
234 * ipath_post_send - post a send on a QP
235 * @ibqp: the QP to post the send on
236 * @wr: the list of work requests to post
237 * @bad_wr: the first bad WR is put here
239 * This may be called from interrupt context.
241 static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
242 struct ib_send_wr **bad_wr)
244 struct ipath_qp *qp = to_iqp(ibqp);
247 /* Check that state is OK to post send. */
248 if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK)) {
254 for (; wr; wr = wr->next) {
255 switch (qp->ibqp.qp_type) {
258 err = ipath_post_ruc_send(qp, wr);
264 err = ipath_post_ud_send(qp, wr);
281 * ipath_post_receive - post a receive on a QP
282 * @ibqp: the QP to post the receive on
283 * @wr: the WR to post
284 * @bad_wr: the first bad WR is put here
286 * This may be called from interrupt context.
288 static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
289 struct ib_recv_wr **bad_wr)
291 struct ipath_qp *qp = to_iqp(ibqp);
292 struct ipath_rwq *wq = qp->r_rq.wq;
296 /* Check that state is OK to post receive. */
297 if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
303 for (; wr; wr = wr->next) {
304 struct ipath_rwqe *wqe;
308 if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
314 spin_lock_irqsave(&qp->r_rq.lock, flags);
316 if (next >= qp->r_rq.size)
318 if (next == wq->tail) {
319 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
325 wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
326 wqe->wr_id = wr->wr_id;
327 wqe->num_sge = wr->num_sge;
328 for (i = 0; i < wr->num_sge; i++)
329 wqe->sg_list[i] = wr->sg_list[i];
331 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
340 * ipath_qp_rcv - processing an incoming packet on a QP
341 * @dev: the device the packet came on
342 * @hdr: the packet header
343 * @has_grh: true if the packet has a GRH
344 * @data: the packet data
345 * @tlen: the packet length
346 * @qp: the QP the packet came on
348 * This is called from ipath_ib_rcv() to process an incoming packet
350 * Called at interrupt level.
352 static void ipath_qp_rcv(struct ipath_ibdev *dev,
353 struct ipath_ib_header *hdr, int has_grh,
354 void *data, u32 tlen, struct ipath_qp *qp)
356 /* Check for valid receive state. */
357 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
362 switch (qp->ibqp.qp_type) {
365 if (ib_ipath_disable_sma)
369 ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
373 ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
377 ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
386 * ipath_ib_rcv - process an incoming packet
387 * @arg: the device pointer
388 * @rhdr: the header of the packet
389 * @data: the packet data
390 * @tlen: the packet length
392 * This is called from ipath_kreceive() to process an incoming packet at
393 * interrupt level. Tlen is the length of the header + data + CRC in bytes.
395 void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
398 struct ipath_ib_header *hdr = rhdr;
399 struct ipath_other_headers *ohdr;
406 if (unlikely(dev == NULL))
409 if (unlikely(tlen < 24)) { /* LRH+BTH+CRC */
414 /* Check for a valid destination LID (see ch. 7.11.1). */
415 lid = be16_to_cpu(hdr->lrh[1]);
416 if (lid < IPATH_MULTICAST_LID_BASE) {
417 lid &= ~((1 << (dev->mkeyprot_resv_lmc & 7)) - 1);
418 if (unlikely(lid != dev->dd->ipath_lid)) {
425 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
426 if (lnh == IPATH_LRH_BTH)
428 else if (lnh == IPATH_LRH_GRH)
429 ohdr = &hdr->u.l.oth;
435 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
436 dev->opstats[opcode].n_bytes += tlen;
437 dev->opstats[opcode].n_packets++;
439 /* Get the destination QP number. */
440 qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
441 if (qp_num == IPATH_MULTICAST_QPN) {
442 struct ipath_mcast *mcast;
443 struct ipath_mcast_qp *p;
445 if (lnh != IPATH_LRH_GRH) {
449 mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
454 dev->n_multicast_rcv++;
455 list_for_each_entry_rcu(p, &mcast->qp_list, list)
456 ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
458 * Notify ipath_multicast_detach() if it is waiting for us
461 if (atomic_dec_return(&mcast->refcount) <= 1)
462 wake_up(&mcast->wait);
464 qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
466 dev->n_unicast_rcv++;
467 ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
470 * Notify ipath_destroy_qp() if it is waiting
473 if (atomic_dec_and_test(&qp->refcount))
483 * ipath_ib_timer - verbs timer
484 * @arg: the device pointer
486 * This is called from ipath_do_rcv_timer() at interrupt level to check for
487 * QPs which need retransmits and to collect performance numbers.
489 void ipath_ib_timer(struct ipath_ibdev *dev)
491 struct ipath_qp *resend = NULL;
492 struct list_head *last;
499 spin_lock_irqsave(&dev->pending_lock, flags);
500 /* Start filling the next pending queue. */
501 if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
502 dev->pending_index = 0;
503 /* Save any requests still in the new queue, they have timed out. */
504 last = &dev->pending[dev->pending_index];
505 while (!list_empty(last)) {
506 qp = list_entry(last->next, struct ipath_qp, timerwait);
507 list_del_init(&qp->timerwait);
508 qp->timer_next = resend;
510 atomic_inc(&qp->refcount);
512 last = &dev->rnrwait;
513 if (!list_empty(last)) {
514 qp = list_entry(last->next, struct ipath_qp, timerwait);
515 if (--qp->s_rnr_timeout == 0) {
517 list_del_init(&qp->timerwait);
518 tasklet_hi_schedule(&qp->s_task);
519 if (list_empty(last))
521 qp = list_entry(last->next, struct ipath_qp,
523 } while (qp->s_rnr_timeout == 0);
527 * We should only be in the started state if pma_sample_start != 0
529 if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
530 --dev->pma_sample_start == 0) {
531 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
532 ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
536 &dev->ipath_xmit_wait);
538 if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
539 if (dev->pma_sample_interval == 0) {
540 u64 ta, tb, tc, td, te;
542 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
543 ipath_snapshot_counters(dev->dd, &ta, &tb,
546 dev->ipath_sword = ta - dev->ipath_sword;
547 dev->ipath_rword = tb - dev->ipath_rword;
548 dev->ipath_spkts = tc - dev->ipath_spkts;
549 dev->ipath_rpkts = td - dev->ipath_rpkts;
550 dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
553 dev->pma_sample_interval--;
555 spin_unlock_irqrestore(&dev->pending_lock, flags);
557 /* XXX What if timer fires again while this is running? */
558 for (qp = resend; qp != NULL; qp = qp->timer_next) {
561 spin_lock_irqsave(&qp->s_lock, flags);
562 if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
564 ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
566 spin_unlock_irqrestore(&qp->s_lock, flags);
568 /* Notify ipath_destroy_qp() if it is waiting. */
569 if (atomic_dec_and_test(&qp->refcount))
574 static void update_sge(struct ipath_sge_state *ss, u32 length)
576 struct ipath_sge *sge = &ss->sge;
578 sge->vaddr += length;
579 sge->length -= length;
580 sge->sge_length -= length;
581 if (sge->sge_length == 0) {
583 *sge = *ss->sg_list++;
584 } else if (sge->length == 0 && sge->mr != NULL) {
585 if (++sge->n >= IPATH_SEGSZ) {
586 if (++sge->m >= sge->mr->mapsz)
590 sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
591 sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
595 #ifdef __LITTLE_ENDIAN
596 static inline u32 get_upper_bits(u32 data, u32 shift)
598 return data >> shift;
601 static inline u32 set_upper_bits(u32 data, u32 shift)
603 return data << shift;
606 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
608 data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
609 data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
613 static inline u32 get_upper_bits(u32 data, u32 shift)
615 return data << shift;
618 static inline u32 set_upper_bits(u32 data, u32 shift)
620 return data >> shift;
623 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
625 data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
626 data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
631 static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
639 u32 len = ss->sge.length;
645 if (len > ss->sge.sge_length)
646 len = ss->sge.sge_length;
647 /* If the source address is not aligned, try to align it. */
648 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
650 u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
652 u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
655 y = sizeof(u32) - off;
658 if (len + extra >= sizeof(u32)) {
659 data |= set_upper_bits(v, extra *
661 len = sizeof(u32) - extra;
666 __raw_writel(data, piobuf);
671 /* Clear unused upper bytes */
672 data |= clear_upper_bytes(v, len, extra);
680 /* Source address is aligned. */
681 u32 *addr = (u32 *) ss->sge.vaddr;
682 int shift = extra * BITS_PER_BYTE;
683 int ushift = 32 - shift;
686 while (l >= sizeof(u32)) {
689 data |= set_upper_bits(v, shift);
690 __raw_writel(data, piobuf);
691 data = get_upper_bits(v, ushift);
697 * We still have 'extra' number of bytes leftover.
702 if (l + extra >= sizeof(u32)) {
703 data |= set_upper_bits(v, shift);
704 len -= l + extra - sizeof(u32);
709 __raw_writel(data, piobuf);
714 /* Clear unused upper bytes */
715 data |= clear_upper_bytes(v, l,
723 } else if (len == length) {
727 } else if (len == length) {
731 * Need to round up for the last dword in the
735 __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
737 last = ((u32 *) ss->sge.vaddr)[w - 1];
742 __iowrite32_copy(piobuf, ss->sge.vaddr, w);
745 extra = len & (sizeof(u32) - 1);
747 u32 v = ((u32 *) ss->sge.vaddr)[w];
749 /* Clear unused upper bytes */
750 data = clear_upper_bytes(v, extra, 0);
756 /* Update address before sending packet. */
757 update_sge(ss, length);
758 /* must flush early everything before trigger word */
760 __raw_writel(last, piobuf);
761 /* be sure trigger word is written */
766 * ipath_verbs_send - send a packet
767 * @dd: the infinipath device
768 * @hdrwords: the number of words in the header
769 * @hdr: the packet header
770 * @len: the length of the packet in bytes
771 * @ss: the SGE to send
773 int ipath_verbs_send(struct ipath_devdata *dd, u32 hdrwords,
774 u32 *hdr, u32 len, struct ipath_sge_state *ss)
780 /* +1 is for the qword padding of pbc */
781 plen = hdrwords + ((len + 3) >> 2) + 1;
782 if (unlikely((plen << 2) > dd->ipath_ibmaxlen)) {
787 /* Get a PIO buffer to use. */
788 piobuf = ipath_getpiobuf(dd, NULL);
789 if (unlikely(piobuf == NULL)) {
795 * Write len to control qword, no flags.
796 * We have to flush after the PBC for correctness on some cpus
797 * or WC buffer can be written out of order.
799 writeq(plen, piobuf);
804 * If there is just the header portion, must flush before
805 * writing last word of header for correctness, and after
806 * the last header word (trigger word).
808 __iowrite32_copy(piobuf, hdr, hdrwords - 1);
810 __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
816 __iowrite32_copy(piobuf, hdr, hdrwords);
819 /* The common case is aligned and contained in one segment. */
820 if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
821 !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
823 u32 *addr = (u32 *) ss->sge.vaddr;
825 /* Update address before sending packet. */
827 /* Need to round up for the last dword in the packet. */
829 __iowrite32_copy(piobuf, addr, w - 1);
830 /* must flush early everything before trigger word */
832 __raw_writel(addr[w - 1], piobuf + w - 1);
833 /* be sure trigger word is written */
838 copy_io(piobuf, ss, len);
845 int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
846 u64 *rwords, u64 *spkts, u64 *rpkts,
851 if (!(dd->ipath_flags & IPATH_INITTED)) {
852 /* no hardware, freeze, etc. */
853 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
857 *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
858 *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
859 *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
860 *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
861 *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
870 * ipath_get_counters - get various chip counters
871 * @dd: the infinipath device
872 * @cntrs: counters are placed here
874 * Return the counters needed by recv_pma_get_portcounters().
876 int ipath_get_counters(struct ipath_devdata *dd,
877 struct ipath_verbs_counters *cntrs)
881 if (!(dd->ipath_flags & IPATH_INITTED)) {
882 /* no hardware, freeze, etc. */
883 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
887 cntrs->symbol_error_counter =
888 ipath_snap_cntr(dd, dd->ipath_cregs->cr_ibsymbolerrcnt);
889 cntrs->link_error_recovery_counter =
890 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkerrrecovcnt);
892 * The link downed counter counts when the other side downs the
893 * connection. We add in the number of times we downed the link
894 * due to local link integrity errors to compensate.
896 cntrs->link_downed_counter =
897 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkdowncnt);
898 cntrs->port_rcv_errors =
899 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rxdroppktcnt) +
900 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvovflcnt) +
901 ipath_snap_cntr(dd, dd->ipath_cregs->cr_portovflcnt) +
902 ipath_snap_cntr(dd, dd->ipath_cregs->cr_err_rlencnt) +
903 ipath_snap_cntr(dd, dd->ipath_cregs->cr_invalidrlencnt) +
904 ipath_snap_cntr(dd, dd->ipath_cregs->cr_erricrccnt) +
905 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errvcrccnt) +
906 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errlpcrccnt) +
907 ipath_snap_cntr(dd, dd->ipath_cregs->cr_badformatcnt) +
908 dd->ipath_rxfc_unsupvl_errs;
909 cntrs->port_rcv_remphys_errors =
910 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvebpcnt);
911 cntrs->port_xmit_discards =
912 ipath_snap_cntr(dd, dd->ipath_cregs->cr_unsupvlcnt);
913 cntrs->port_xmit_data =
914 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
915 cntrs->port_rcv_data =
916 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
917 cntrs->port_xmit_packets =
918 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
919 cntrs->port_rcv_packets =
920 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
921 cntrs->local_link_integrity_errors =
922 (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
923 dd->ipath_lli_errs : dd->ipath_lli_errors;
924 cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
933 * ipath_ib_piobufavail - callback when a PIO buffer is available
934 * @arg: the device pointer
936 * This is called from ipath_intr() at interrupt level when a PIO buffer is
937 * available after ipath_verbs_send() returned an error that no buffers were
938 * available. Return 1 if we consumed all the PIO buffers and we still have
939 * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
942 int ipath_ib_piobufavail(struct ipath_ibdev *dev)
950 spin_lock_irqsave(&dev->pending_lock, flags);
951 while (!list_empty(&dev->piowait)) {
952 qp = list_entry(dev->piowait.next, struct ipath_qp,
954 list_del_init(&qp->piowait);
955 clear_bit(IPATH_S_BUSY, &qp->s_busy);
956 tasklet_hi_schedule(&qp->s_task);
958 spin_unlock_irqrestore(&dev->pending_lock, flags);
964 static int ipath_query_device(struct ib_device *ibdev,
965 struct ib_device_attr *props)
967 struct ipath_ibdev *dev = to_idev(ibdev);
969 memset(props, 0, sizeof(*props));
971 props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
972 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
973 IB_DEVICE_SYS_IMAGE_GUID;
974 props->page_size_cap = PAGE_SIZE;
975 props->vendor_id = dev->dd->ipath_vendorid;
976 props->vendor_part_id = dev->dd->ipath_deviceid;
977 props->hw_ver = dev->dd->ipath_pcirev;
979 props->sys_image_guid = dev->sys_image_guid;
981 props->max_mr_size = ~0ull;
982 props->max_qp = ib_ipath_max_qps;
983 props->max_qp_wr = ib_ipath_max_qp_wrs;
984 props->max_sge = ib_ipath_max_sges;
985 props->max_cq = ib_ipath_max_cqs;
986 props->max_ah = ib_ipath_max_ahs;
987 props->max_cqe = ib_ipath_max_cqes;
988 props->max_mr = dev->lk_table.max;
989 props->max_fmr = dev->lk_table.max;
990 props->max_map_per_fmr = 32767;
991 props->max_pd = ib_ipath_max_pds;
992 props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
993 props->max_qp_init_rd_atom = 255;
994 /* props->max_res_rd_atom */
995 props->max_srq = ib_ipath_max_srqs;
996 props->max_srq_wr = ib_ipath_max_srq_wrs;
997 props->max_srq_sge = ib_ipath_max_srq_sges;
998 /* props->local_ca_ack_delay */
999 props->atomic_cap = IB_ATOMIC_GLOB;
1000 props->max_pkeys = ipath_get_npkeys(dev->dd);
1001 props->max_mcast_grp = ib_ipath_max_mcast_grps;
1002 props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
1003 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
1004 props->max_mcast_grp;
1009 const u8 ipath_cvt_physportstate[16] = {
1010 [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
1011 [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
1012 [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
1013 [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
1014 [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
1015 [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
1016 [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
1017 [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
1018 [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
1019 [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
1020 [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
1021 [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
1022 [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
1025 u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
1027 return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
1030 static int ipath_query_port(struct ib_device *ibdev,
1031 u8 port, struct ib_port_attr *props)
1033 struct ipath_ibdev *dev = to_idev(ibdev);
1035 u16 lid = dev->dd->ipath_lid;
1038 memset(props, 0, sizeof(*props));
1039 props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1040 props->lmc = dev->mkeyprot_resv_lmc & 7;
1041 props->sm_lid = dev->sm_lid;
1042 props->sm_sl = dev->sm_sl;
1043 ibcstat = dev->dd->ipath_lastibcstat;
1044 props->state = ((ibcstat >> 4) & 0x3) + 1;
1045 /* See phys_state_show() */
1046 props->phys_state = ipath_cvt_physportstate[
1047 dev->dd->ipath_lastibcstat & 0xf];
1048 props->port_cap_flags = dev->port_cap_flags;
1049 props->gid_tbl_len = 1;
1050 props->max_msg_sz = 0x80000000;
1051 props->pkey_tbl_len = ipath_get_npkeys(dev->dd);
1052 props->bad_pkey_cntr = ipath_get_cr_errpkey(dev->dd) -
1053 dev->z_pkey_violations;
1054 props->qkey_viol_cntr = dev->qkey_violations;
1055 props->active_width = IB_WIDTH_4X;
1056 /* See rate_show() */
1057 props->active_speed = 1; /* Regular 10Mbs speed. */
1058 props->max_vl_num = 1; /* VLCap = VL0 */
1059 props->init_type_reply = 0;
1062 * Note: the chips support a maximum MTU of 4096, but the driver
1063 * hasn't implemented this feature yet, so set the maximum value
1066 props->max_mtu = IB_MTU_2048;
1067 switch (dev->dd->ipath_ibmtu) {
1086 props->active_mtu = mtu;
1087 props->subnet_timeout = dev->subnet_timeout;
1092 static int ipath_modify_device(struct ib_device *device,
1093 int device_modify_mask,
1094 struct ib_device_modify *device_modify)
1098 if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1099 IB_DEVICE_MODIFY_NODE_DESC)) {
1104 if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
1105 memcpy(device->node_desc, device_modify->node_desc, 64);
1107 if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
1108 to_idev(device)->sys_image_guid =
1109 cpu_to_be64(device_modify->sys_image_guid);
1117 static int ipath_modify_port(struct ib_device *ibdev,
1118 u8 port, int port_modify_mask,
1119 struct ib_port_modify *props)
1121 struct ipath_ibdev *dev = to_idev(ibdev);
1123 dev->port_cap_flags |= props->set_port_cap_mask;
1124 dev->port_cap_flags &= ~props->clr_port_cap_mask;
1125 if (port_modify_mask & IB_PORT_SHUTDOWN)
1126 ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
1127 if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
1128 dev->qkey_violations = 0;
1132 static int ipath_query_gid(struct ib_device *ibdev, u8 port,
1133 int index, union ib_gid *gid)
1135 struct ipath_ibdev *dev = to_idev(ibdev);
1142 gid->global.subnet_prefix = dev->gid_prefix;
1143 gid->global.interface_id = dev->dd->ipath_guid;
1151 static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
1152 struct ib_ucontext *context,
1153 struct ib_udata *udata)
1155 struct ipath_ibdev *dev = to_idev(ibdev);
1156 struct ipath_pd *pd;
1160 * This is actually totally arbitrary. Some correctness tests
1161 * assume there's a maximum number of PDs that can be allocated.
1162 * We don't actually have this limit, but we fail the test if
1163 * we allow allocations of more than we report for this value.
1166 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1168 ret = ERR_PTR(-ENOMEM);
1172 spin_lock(&dev->n_pds_lock);
1173 if (dev->n_pds_allocated == ib_ipath_max_pds) {
1174 spin_unlock(&dev->n_pds_lock);
1176 ret = ERR_PTR(-ENOMEM);
1180 dev->n_pds_allocated++;
1181 spin_unlock(&dev->n_pds_lock);
1183 /* ib_alloc_pd() will initialize pd->ibpd. */
1184 pd->user = udata != NULL;
1192 static int ipath_dealloc_pd(struct ib_pd *ibpd)
1194 struct ipath_pd *pd = to_ipd(ibpd);
1195 struct ipath_ibdev *dev = to_idev(ibpd->device);
1197 spin_lock(&dev->n_pds_lock);
1198 dev->n_pds_allocated--;
1199 spin_unlock(&dev->n_pds_lock);
1207 * ipath_create_ah - create an address handle
1208 * @pd: the protection domain
1209 * @ah_attr: the attributes of the AH
1211 * This may be called from interrupt context.
1213 static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
1214 struct ib_ah_attr *ah_attr)
1216 struct ipath_ah *ah;
1218 struct ipath_ibdev *dev = to_idev(pd->device);
1219 unsigned long flags;
1221 /* A multicast address requires a GRH (see ch. 8.4.1). */
1222 if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
1223 ah_attr->dlid != IPATH_PERMISSIVE_LID &&
1224 !(ah_attr->ah_flags & IB_AH_GRH)) {
1225 ret = ERR_PTR(-EINVAL);
1229 if (ah_attr->dlid == 0) {
1230 ret = ERR_PTR(-EINVAL);
1234 if (ah_attr->port_num < 1 ||
1235 ah_attr->port_num > pd->device->phys_port_cnt) {
1236 ret = ERR_PTR(-EINVAL);
1240 ah = kmalloc(sizeof *ah, GFP_ATOMIC);
1242 ret = ERR_PTR(-ENOMEM);
1246 spin_lock_irqsave(&dev->n_ahs_lock, flags);
1247 if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
1248 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1250 ret = ERR_PTR(-ENOMEM);
1254 dev->n_ahs_allocated++;
1255 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1257 /* ib_create_ah() will initialize ah->ibah. */
1258 ah->attr = *ah_attr;
1267 * ipath_destroy_ah - destroy an address handle
1268 * @ibah: the AH to destroy
1270 * This may be called from interrupt context.
1272 static int ipath_destroy_ah(struct ib_ah *ibah)
1274 struct ipath_ibdev *dev = to_idev(ibah->device);
1275 struct ipath_ah *ah = to_iah(ibah);
1276 unsigned long flags;
1278 spin_lock_irqsave(&dev->n_ahs_lock, flags);
1279 dev->n_ahs_allocated--;
1280 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1287 static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
1289 struct ipath_ah *ah = to_iah(ibah);
1291 *ah_attr = ah->attr;
1297 * ipath_get_npkeys - return the size of the PKEY table for port 0
1298 * @dd: the infinipath device
1300 unsigned ipath_get_npkeys(struct ipath_devdata *dd)
1302 return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
1306 * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
1307 * @dd: the infinipath device
1308 * @index: the PKEY index
1310 unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
1314 if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
1317 ret = dd->ipath_pd[0]->port_pkeys[index];
1322 static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
1325 struct ipath_ibdev *dev = to_idev(ibdev);
1328 if (index >= ipath_get_npkeys(dev->dd)) {
1333 *pkey = ipath_get_pkey(dev->dd, index);
1341 * ipath_alloc_ucontext - allocate a ucontest
1342 * @ibdev: the infiniband device
1343 * @udata: not used by the InfiniPath driver
1346 static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
1347 struct ib_udata *udata)
1349 struct ipath_ucontext *context;
1350 struct ib_ucontext *ret;
1352 context = kmalloc(sizeof *context, GFP_KERNEL);
1354 ret = ERR_PTR(-ENOMEM);
1358 ret = &context->ibucontext;
1364 static int ipath_dealloc_ucontext(struct ib_ucontext *context)
1366 kfree(to_iucontext(context));
1370 static int ipath_verbs_register_sysfs(struct ib_device *dev);
1372 static void __verbs_timer(unsigned long arg)
1374 struct ipath_devdata *dd = (struct ipath_devdata *) arg;
1377 * If port 0 receive packet interrupts are not available, or
1378 * can be missed, poll the receive queue
1380 if (dd->ipath_flags & IPATH_POLL_RX_INTR)
1383 /* Handle verbs layer timeouts. */
1384 ipath_ib_timer(dd->verbs_dev);
1386 mod_timer(&dd->verbs_timer, jiffies + 1);
1389 static int enable_timer(struct ipath_devdata *dd)
1392 * Early chips had a design flaw where the chip and kernel idea
1393 * of the tail register don't always agree, and therefore we won't
1394 * get an interrupt on the next packet received.
1395 * If the board supports per packet receive interrupts, use it.
1396 * Otherwise, the timer function periodically checks for packets
1397 * to cover this case.
1398 * Either way, the timer is needed for verbs layer related
1401 if (dd->ipath_flags & IPATH_GPIO_INTR) {
1402 ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
1403 0x2074076542310ULL);
1404 /* Enable GPIO bit 2 interrupt */
1405 dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
1406 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1407 dd->ipath_gpio_mask);
1410 init_timer(&dd->verbs_timer);
1411 dd->verbs_timer.function = __verbs_timer;
1412 dd->verbs_timer.data = (unsigned long)dd;
1413 dd->verbs_timer.expires = jiffies + 1;
1414 add_timer(&dd->verbs_timer);
1419 static int disable_timer(struct ipath_devdata *dd)
1421 /* Disable GPIO bit 2 interrupt */
1422 if (dd->ipath_flags & IPATH_GPIO_INTR) {
1424 /* Disable GPIO bit 2 interrupt */
1425 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
1426 dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
1427 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1428 dd->ipath_gpio_mask);
1430 * We might want to undo changes to debugportselect,
1435 del_timer_sync(&dd->verbs_timer);
1441 * ipath_register_ib_device - register our device with the infiniband core
1442 * @dd: the device data structure
1443 * Return the allocated ipath_ibdev pointer or NULL on error.
1445 int ipath_register_ib_device(struct ipath_devdata *dd)
1447 struct ipath_verbs_counters cntrs;
1448 struct ipath_ibdev *idev;
1449 struct ib_device *dev;
1452 idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
1460 /* Only need to initialize non-zero fields. */
1461 spin_lock_init(&idev->n_pds_lock);
1462 spin_lock_init(&idev->n_ahs_lock);
1463 spin_lock_init(&idev->n_cqs_lock);
1464 spin_lock_init(&idev->n_qps_lock);
1465 spin_lock_init(&idev->n_srqs_lock);
1466 spin_lock_init(&idev->n_mcast_grps_lock);
1468 spin_lock_init(&idev->qp_table.lock);
1469 spin_lock_init(&idev->lk_table.lock);
1470 idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1471 /* Set the prefix to the default value (see ch. 4.1.1) */
1472 idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
1474 ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
1479 * The top ib_ipath_lkey_table_size bits are used to index the
1480 * table. The lower 8 bits can be owned by the user (copied from
1481 * the LKEY). The remaining bits act as a generation number or tag.
1483 idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
1484 idev->lk_table.table = kzalloc(idev->lk_table.max *
1485 sizeof(*idev->lk_table.table),
1487 if (idev->lk_table.table == NULL) {
1491 INIT_LIST_HEAD(&idev->pending_mmaps);
1492 spin_lock_init(&idev->pending_lock);
1493 idev->mmap_offset = PAGE_SIZE;
1494 spin_lock_init(&idev->mmap_offset_lock);
1495 INIT_LIST_HEAD(&idev->pending[0]);
1496 INIT_LIST_HEAD(&idev->pending[1]);
1497 INIT_LIST_HEAD(&idev->pending[2]);
1498 INIT_LIST_HEAD(&idev->piowait);
1499 INIT_LIST_HEAD(&idev->rnrwait);
1500 idev->pending_index = 0;
1501 idev->port_cap_flags =
1502 IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
1503 idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1504 idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1505 idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1506 idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1507 idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1508 idev->link_width_enabled = 3; /* 1x or 4x */
1510 /* Snapshot current HW counters to "clear" them. */
1511 ipath_get_counters(dd, &cntrs);
1512 idev->z_symbol_error_counter = cntrs.symbol_error_counter;
1513 idev->z_link_error_recovery_counter =
1514 cntrs.link_error_recovery_counter;
1515 idev->z_link_downed_counter = cntrs.link_downed_counter;
1516 idev->z_port_rcv_errors = cntrs.port_rcv_errors;
1517 idev->z_port_rcv_remphys_errors =
1518 cntrs.port_rcv_remphys_errors;
1519 idev->z_port_xmit_discards = cntrs.port_xmit_discards;
1520 idev->z_port_xmit_data = cntrs.port_xmit_data;
1521 idev->z_port_rcv_data = cntrs.port_rcv_data;
1522 idev->z_port_xmit_packets = cntrs.port_xmit_packets;
1523 idev->z_port_rcv_packets = cntrs.port_rcv_packets;
1524 idev->z_local_link_integrity_errors =
1525 cntrs.local_link_integrity_errors;
1526 idev->z_excessive_buffer_overrun_errors =
1527 cntrs.excessive_buffer_overrun_errors;
1530 * The system image GUID is supposed to be the same for all
1531 * IB HCAs in a single system but since there can be other
1532 * device types in the system, we can't be sure this is unique.
1534 if (!sys_image_guid)
1535 sys_image_guid = dd->ipath_guid;
1536 idev->sys_image_guid = sys_image_guid;
1537 idev->ib_unit = dd->ipath_unit;
1540 strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
1541 dev->owner = THIS_MODULE;
1542 dev->node_guid = dd->ipath_guid;
1543 dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
1544 dev->uverbs_cmd_mask =
1545 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1546 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1547 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1548 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1549 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1550 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
1551 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
1552 (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
1553 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1554 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1555 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1556 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1557 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1558 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1559 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
1560 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
1561 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1562 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1563 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1564 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1565 (1ull << IB_USER_VERBS_CMD_POST_SEND) |
1566 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
1567 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1568 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1569 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1570 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1571 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1572 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1573 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
1574 dev->node_type = RDMA_NODE_IB_CA;
1575 dev->phys_port_cnt = 1;
1576 dev->num_comp_vectors = 1;
1577 dev->dma_device = &dd->pcidev->dev;
1578 dev->query_device = ipath_query_device;
1579 dev->modify_device = ipath_modify_device;
1580 dev->query_port = ipath_query_port;
1581 dev->modify_port = ipath_modify_port;
1582 dev->query_pkey = ipath_query_pkey;
1583 dev->query_gid = ipath_query_gid;
1584 dev->alloc_ucontext = ipath_alloc_ucontext;
1585 dev->dealloc_ucontext = ipath_dealloc_ucontext;
1586 dev->alloc_pd = ipath_alloc_pd;
1587 dev->dealloc_pd = ipath_dealloc_pd;
1588 dev->create_ah = ipath_create_ah;
1589 dev->destroy_ah = ipath_destroy_ah;
1590 dev->query_ah = ipath_query_ah;
1591 dev->create_srq = ipath_create_srq;
1592 dev->modify_srq = ipath_modify_srq;
1593 dev->query_srq = ipath_query_srq;
1594 dev->destroy_srq = ipath_destroy_srq;
1595 dev->create_qp = ipath_create_qp;
1596 dev->modify_qp = ipath_modify_qp;
1597 dev->query_qp = ipath_query_qp;
1598 dev->destroy_qp = ipath_destroy_qp;
1599 dev->post_send = ipath_post_send;
1600 dev->post_recv = ipath_post_receive;
1601 dev->post_srq_recv = ipath_post_srq_receive;
1602 dev->create_cq = ipath_create_cq;
1603 dev->destroy_cq = ipath_destroy_cq;
1604 dev->resize_cq = ipath_resize_cq;
1605 dev->poll_cq = ipath_poll_cq;
1606 dev->req_notify_cq = ipath_req_notify_cq;
1607 dev->get_dma_mr = ipath_get_dma_mr;
1608 dev->reg_phys_mr = ipath_reg_phys_mr;
1609 dev->reg_user_mr = ipath_reg_user_mr;
1610 dev->dereg_mr = ipath_dereg_mr;
1611 dev->alloc_fmr = ipath_alloc_fmr;
1612 dev->map_phys_fmr = ipath_map_phys_fmr;
1613 dev->unmap_fmr = ipath_unmap_fmr;
1614 dev->dealloc_fmr = ipath_dealloc_fmr;
1615 dev->attach_mcast = ipath_multicast_attach;
1616 dev->detach_mcast = ipath_multicast_detach;
1617 dev->process_mad = ipath_process_mad;
1618 dev->mmap = ipath_mmap;
1619 dev->dma_ops = &ipath_dma_mapping_ops;
1621 snprintf(dev->node_desc, sizeof(dev->node_desc),
1622 IPATH_IDSTR " %s", init_utsname()->nodename);
1624 ret = ib_register_device(dev);
1628 if (ipath_verbs_register_sysfs(dev))
1636 ib_unregister_device(dev);
1638 kfree(idev->lk_table.table);
1640 kfree(idev->qp_table.table);
1642 ib_dealloc_device(dev);
1643 ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1647 dd->verbs_dev = idev;
1651 void ipath_unregister_ib_device(struct ipath_ibdev *dev)
1653 struct ib_device *ibdev = &dev->ibdev;
1655 disable_timer(dev->dd);
1657 ib_unregister_device(ibdev);
1659 if (!list_empty(&dev->pending[0]) ||
1660 !list_empty(&dev->pending[1]) ||
1661 !list_empty(&dev->pending[2]))
1662 ipath_dev_err(dev->dd, "pending list not empty!\n");
1663 if (!list_empty(&dev->piowait))
1664 ipath_dev_err(dev->dd, "piowait list not empty!\n");
1665 if (!list_empty(&dev->rnrwait))
1666 ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
1667 if (!ipath_mcast_tree_empty())
1668 ipath_dev_err(dev->dd, "multicast table memory leak!\n");
1670 * Note that ipath_unregister_ib_device() can be called before all
1671 * the QPs are destroyed!
1673 ipath_free_all_qps(&dev->qp_table);
1674 kfree(dev->qp_table.table);
1675 kfree(dev->lk_table.table);
1676 ib_dealloc_device(ibdev);
1679 static ssize_t show_rev(struct class_device *cdev, char *buf)
1681 struct ipath_ibdev *dev =
1682 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1684 return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
1687 static ssize_t show_hca(struct class_device *cdev, char *buf)
1689 struct ipath_ibdev *dev =
1690 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1693 ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
1703 static ssize_t show_stats(struct class_device *cdev, char *buf)
1705 struct ipath_ibdev *dev =
1706 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1725 dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
1726 dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
1727 dev->n_other_naks, dev->n_timeouts,
1728 dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
1729 dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
1730 for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
1731 const struct ipath_opcode_stats *si = &dev->opstats[i];
1733 if (!si->n_packets && !si->n_bytes)
1735 len += sprintf(buf + len, "%02x %llu/%llu\n", i,
1736 (unsigned long long) si->n_packets,
1737 (unsigned long long) si->n_bytes);
1742 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1743 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1744 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
1745 static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
1747 static struct class_device_attribute *ipath_class_attributes[] = {
1748 &class_device_attr_hw_rev,
1749 &class_device_attr_hca_type,
1750 &class_device_attr_board_id,
1751 &class_device_attr_stats
1754 static int ipath_verbs_register_sysfs(struct ib_device *dev)
1759 for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
1760 if (class_device_create_file(&dev->class_dev,
1761 ipath_class_attributes[i])) {