4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #include <linux/config.h>
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/irq.h>
20 #include <linux/module.h>
22 #include <asm/system.h>
23 #include <asm/atomic.h>
25 #include <asm/pci-bridge.h>
27 #include <sysdev/fsl_soc.h>
32 #define DBG(x...) printk(x)
37 int mpc83xx_pci2_busno;
40 int __init add_bridge(struct device_node *dev)
43 struct pci_controller *hose;
46 int primary = 1, has_address = 0;
47 phys_addr_t immr = get_immrbase();
49 DBG("Adding PCI host bridge %s\n", dev->full_name);
51 /* Fetch host bridge registers address */
52 has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
54 /* Get bus range if any */
55 bus_range = (int *) get_property(dev, "bus-range", &len);
56 if (bus_range == NULL || len < 2 * sizeof(int)) {
57 printk(KERN_WARNING "Can't get bus-range for %s, assume"
58 " bus 0\n", dev->full_name);
61 hose = pcibios_alloc_controller();
64 hose->arch_data = dev;
65 hose->set_cfg_type = 1;
67 hose->first_busno = bus_range ? bus_range[0] : 0;
68 hose->last_busno = bus_range ? bus_range[1] : 0xff;
70 /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
71 * the other at 0x8600, we consider the 0x8500 the primary controller
74 if ((rsrc.start & 0xfffff) == 0x8500) {
75 setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304);
78 if ((rsrc.start & 0xfffff) == 0x8600) {
79 setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384);
81 hose->bus_offset = hose->first_busno;
82 mpc83xx_pci2_busno = hose->first_busno;
85 printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%08lx. "
86 "Firmware bus number: %d->%d\n",
87 rsrc.start, hose->first_busno, hose->last_busno);
89 DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
90 hose, hose->cfg_addr, hose->cfg_data);
92 /* Interpret the "ranges" property */
93 /* This also maps the I/O region and sets isa_io/mem_base */
94 pci_process_bridge_OF_ranges(hose, dev, primary);