2 * MPC8377E RDB Device Tree Source
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "fsl,mpc8377rdb";
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
40 clock-frequency = <0>;
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
52 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
77 compatible = "fsl,mpc8377-fcm-nand",
79 reg = <0x1 0x0 0x8000>;
87 reg = <0x100000 0x300000>;
90 reg = <0x400000 0x1c00000>;
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
111 #address-cells = <1>;
114 compatible = "fsl-i2c";
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>;
121 compatible = "dallas,ds1339";
127 #address-cells = <1>;
130 compatible = "fsl-i2c";
131 reg = <0x3100 0x100>;
132 interrupts = <15 0x8>;
133 interrupt-parent = <&ipic>;
139 compatible = "fsl,spi";
140 reg = <0x7000 0x1000>;
141 interrupts = <16 0x8>;
142 interrupt-parent = <&ipic>;
146 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
148 compatible = "fsl-usb2-dr";
149 reg = <0x23000 0x1000>;
150 #address-cells = <1>;
152 interrupt-parent = <&ipic>;
153 interrupts = <38 0x8>;
158 #address-cells = <1>;
160 compatible = "fsl,gianfar-mdio";
161 reg = <0x24520 0x20>;
162 phy2: ethernet-phy@2 {
163 interrupt-parent = <&ipic>;
164 interrupts = <17 0x8>;
166 device_type = "ethernet-phy";
168 phy3: ethernet-phy@3 {
169 interrupt-parent = <&ipic>;
170 interrupts = <18 0x8>;
172 device_type = "ethernet-phy";
176 enet0: ethernet@24000 {
178 device_type = "network";
180 compatible = "gianfar";
181 reg = <0x24000 0x1000>;
182 local-mac-address = [ 00 00 00 00 00 00 ];
183 interrupts = <32 0x8 33 0x8 34 0x8>;
184 phy-connection-type = "mii";
185 interrupt-parent = <&ipic>;
186 phy-handle = <&phy2>;
189 enet1: ethernet@25000 {
191 device_type = "network";
193 compatible = "gianfar";
194 reg = <0x25000 0x1000>;
195 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <35 0x8 36 0x8 37 0x8>;
197 phy-connection-type = "mii";
198 interrupt-parent = <&ipic>;
199 phy-handle = <&phy3>;
202 serial0: serial@4500 {
204 device_type = "serial";
205 compatible = "ns16550";
206 reg = <0x4500 0x100>;
207 clock-frequency = <0>;
208 interrupts = <9 0x8>;
209 interrupt-parent = <&ipic>;
212 serial1: serial@4600 {
214 device_type = "serial";
215 compatible = "ns16550";
216 reg = <0x4600 0x100>;
217 clock-frequency = <0>;
218 interrupts = <10 0x8>;
219 interrupt-parent = <&ipic>;
224 device_type = "crypto";
225 compatible = "talitos";
226 reg = <0x30000 0x10000>;
227 interrupts = <11 0x8>;
228 interrupt-parent = <&ipic>;
229 /* Rev. 3.0 geometry */
231 channel-fifo-len = <24>;
232 exec-units-mask = <0x000001fe>;
233 descriptor-types-mask = <0x03ab0ebf>;
237 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
238 reg = <0x18000 0x1000>;
239 interrupts = <44 0x8>;
240 interrupt-parent = <&ipic>;
244 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
245 reg = <0x19000 0x1000>;
246 interrupts = <45 0x8>;
247 interrupt-parent = <&ipic>;
251 * interrupts cell = <intr #, sense>
252 * sense values match linux IORESOURCE_IRQ_* defines:
253 * sense == 8: Level, low assertion
254 * sense == 2: Edge, high-to-low change
256 ipic: interrupt-controller@700 {
257 compatible = "fsl,ipic";
258 interrupt-controller;
259 #address-cells = <0>;
260 #interrupt-cells = <2>;
266 interrupt-map-mask = <0xf800 0 0 7>;
268 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
270 /* IDSEL AD14 IRQ6 inta */
271 0x7000 0x0 0x0 0x1 &ipic 22 0x8
273 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
274 0x7800 0x0 0x0 0x1 &ipic 21 0x8
275 0x7800 0x0 0x0 0x2 &ipic 22 0x8
276 0x7800 0x0 0x0 0x4 &ipic 23 0x8
278 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
279 0xE000 0x0 0x0 0x1 &ipic 23 0x8
280 0xE000 0x0 0x0 0x2 &ipic 21 0x8
281 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
282 interrupt-parent = <&ipic>;
283 interrupts = <66 0x8>;
285 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
286 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
287 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
288 clock-frequency = <66666666>;
289 #interrupt-cells = <1>;
291 #address-cells = <3>;
292 reg = <0xe0008500 0x100>;
293 compatible = "fsl,mpc8349-pci";