git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-at91/at91sam9rl_devices.c

   1 /*
   2  *  Copyright (C) 2007 Atmel Corporation
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file COPYING in the main directory of this archive for
   6  * more details.
   7  */
   8
   9 #include <asm/mach/arch.h>
  10 #include <asm/mach/map.h>
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/i2c-gpio.h>
  14
  15 #include <linux/fb.h>
  16 #include <video/atmel_lcdc.h>
  17
  18 #include <asm/arch/board.h>
  19 #include <asm/arch/gpio.h>
  20 #include <asm/arch/at91sam9rl.h>
  21 #include <asm/arch/at91sam9rl_matrix.h>
  22 #include <asm/arch/at91sam926x_mc.h>
  23
  24 #include "generic.h"
  25
  26
  27 /* --------------------------------------------------------------------
  28  *  MMC / SD
  29  * -------------------------------------------------------------------- */
  30
  31 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
  32 static u64 mmc_dmamask = 0xffffffffUL;
  33 static struct at91_mmc_data mmc_data;
  34
  35 static struct resource mmc_resources[] = {
  36         [0] = {
  37                 .start  = AT91SAM9RL_BASE_MCI,
  38                 .end    = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
  39                 .flags  = IORESOURCE_MEM,
  40         },
  41         [1] = {
  42                 .start  = AT91SAM9RL_ID_MCI,
  43                 .end    = AT91SAM9RL_ID_MCI,
  44                 .flags  = IORESOURCE_IRQ,
  45         },
  46 };
  47
  48 static struct platform_device at91sam9rl_mmc_device = {
  49         .name           = "at91_mci",
  50         .id             = -1,
  51         .dev            = {
  52                                 .dma_mask               = &mmc_dmamask,
  53                                 .coherent_dma_mask      = 0xffffffff,
  54                                 .platform_data          = &mmc_data,
  55         },
  56         .resource       = mmc_resources,
  57         .num_resources  = ARRAY_SIZE(mmc_resources),
  58 };
  59
  60 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
  61 {
  62         if (!data)
  63                 return;
  64
  65         /* input/irq */
  66         if (data->det_pin) {
  67                 at91_set_gpio_input(data->det_pin, 1);
  68                 at91_set_deglitch(data->det_pin, 1);
  69         }
  70         if (data->wp_pin)
  71                 at91_set_gpio_input(data->wp_pin, 1);
  72         if (data->vcc_pin)
  73                 at91_set_gpio_output(data->vcc_pin, 0);
  74
  75         /* CLK */
  76         at91_set_A_periph(AT91_PIN_PA2, 0);
  77
  78         /* CMD */
  79         at91_set_A_periph(AT91_PIN_PA1, 1);
  80
  81         /* DAT0, maybe DAT1..DAT3 */
  82         at91_set_A_periph(AT91_PIN_PA0, 1);
  83         if (data->wire4) {
  84                 at91_set_A_periph(AT91_PIN_PA3, 1);
  85                 at91_set_A_periph(AT91_PIN_PA4, 1);
  86                 at91_set_A_periph(AT91_PIN_PA5, 1);
  87         }
  88
  89         mmc_data = *data;
  90         platform_device_register(&at91sam9rl_mmc_device);
  91 }
  92 #else
  93 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
  94 #endif
  95
  96
  97 /* --------------------------------------------------------------------
  98  *  NAND / SmartMedia
  99  * -------------------------------------------------------------------- */
 100
 101 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
 102 static struct at91_nand_data nand_data;
 103
 104 #define NAND_BASE       AT91_CHIPSELECT_3
 105
 106 static struct resource nand_resources[] = {
 107         {
 108                 .start  = NAND_BASE,
 109                 .end    = NAND_BASE + SZ_256M - 1,
 110                 .flags  = IORESOURCE_MEM,
 111         }
 112 };
 113
 114 static struct platform_device at91_nand_device = {
 115         .name           = "at91_nand",
 116         .id             = -1,
 117         .dev            = {
 118                                 .platform_data  = &nand_data,
 119         },
 120         .resource       = nand_resources,
 121         .num_resources  = ARRAY_SIZE(nand_resources),
 122 };
 123
 124 void __init at91_add_device_nand(struct at91_nand_data *data)
 125 {
 126         unsigned long csa;
 127
 128         if (!data)
 129                 return;
 130
 131         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 132         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 133
 134         /* set the bus interface characteristics */
 135         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
 136                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
 137
 138         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
 139                         | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
 140
 141         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
 142
 143         at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
 144
 145         /* enable pin */
 146         if (data->enable_pin)
 147                 at91_set_gpio_output(data->enable_pin, 1);
 148
 149         /* ready/busy pin */
 150         if (data->rdy_pin)
 151                 at91_set_gpio_input(data->rdy_pin, 1);
 152
 153         /* card detect pin */
 154         if (data->det_pin)
 155                 at91_set_gpio_input(data->det_pin, 1);
 156
 157         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
 158         at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
 159
 160         nand_data = *data;
 161         platform_device_register(&at91_nand_device);
 162 }
 163
 164 #else
 165 void __init at91_add_device_nand(struct at91_nand_data *data) {}
 166 #endif
 167
 168
 169 /* --------------------------------------------------------------------
 170  *  TWI (i2c)
 171  * -------------------------------------------------------------------- */
 172
 173 /*
 174  * Prefer the GPIO code since the TWI controller isn't robust
 175  * (gets overruns and underruns under load) and can only issue
 176  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 177  */
 178 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 179
 180 static struct i2c_gpio_platform_data pdata = {
 181         .sda_pin                = AT91_PIN_PA23,
 182         .sda_is_open_drain      = 1,
 183         .scl_pin                = AT91_PIN_PA24,
 184         .scl_is_open_drain      = 1,
 185         .udelay                 = 2,            /* ~100 kHz */
 186 };
 187
 188 static struct platform_device at91sam9rl_twi_device = {
 189         .name                   = "i2c-gpio",
 190         .id                     = -1,
 191         .dev.platform_data      = &pdata,
 192 };
 193
 194 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 195 {
 196         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 197         at91_set_multi_drive(AT91_PIN_PA23, 1);
 198
 199         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 200         at91_set_multi_drive(AT91_PIN_PA24, 1);
 201
 202         i2c_register_board_info(0, devices, nr_devices);
 203         platform_device_register(&at91sam9rl_twi_device);
 204 }
 205
 206 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 207
 208 static struct resource twi_resources[] = {
 209         [0] = {
 210                 .start  = AT91SAM9RL_BASE_TWI0,
 211                 .end    = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
 212                 .flags  = IORESOURCE_MEM,
 213         },
 214         [1] = {
 215                 .start  = AT91SAM9RL_ID_TWI0,
 216                 .end    = AT91SAM9RL_ID_TWI0,
 217                 .flags  = IORESOURCE_IRQ,
 218         },
 219 };
 220
 221 static struct platform_device at91sam9rl_twi_device = {
 222         .name           = "at91_i2c",
 223         .id             = -1,
 224         .resource       = twi_resources,
 225         .num_resources  = ARRAY_SIZE(twi_resources),
 226 };
 227
 228 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 229 {
 230         /* pins used for TWI interface */
 231         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 232         at91_set_multi_drive(AT91_PIN_PA23, 1);
 233
 234         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 235         at91_set_multi_drive(AT91_PIN_PA24, 1);
 236
 237         i2c_register_board_info(0, devices, nr_devices);
 238         platform_device_register(&at91sam9rl_twi_device);
 239 }
 240 #else
 241 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 242 #endif
 243
 244
 245 /* --------------------------------------------------------------------
 246  *  SPI
 247  * -------------------------------------------------------------------- */
 248
 249 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 250 static u64 spi_dmamask = 0xffffffffUL;
 251
 252 static struct resource spi_resources[] = {
 253         [0] = {
 254                 .start  = AT91SAM9RL_BASE_SPI,
 255                 .end    = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
 256                 .flags  = IORESOURCE_MEM,
 257         },
 258         [1] = {
 259                 .start  = AT91SAM9RL_ID_SPI,
 260                 .end    = AT91SAM9RL_ID_SPI,
 261                 .flags  = IORESOURCE_IRQ,
 262         },
 263 };
 264
 265 static struct platform_device at91sam9rl_spi_device = {
 266         .name           = "atmel_spi",
 267         .id             = 0,
 268         .dev            = {
 269                                 .dma_mask               = &spi_dmamask,
 270                                 .coherent_dma_mask      = 0xffffffff,
 271         },
 272         .resource       = spi_resources,
 273         .num_resources  = ARRAY_SIZE(spi_resources),
 274 };
 275
 276 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
 277
 278
 279 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 280 {
 281         int i;
 282         unsigned long cs_pin;
 283
 284         at91_set_A_periph(AT91_PIN_PA25, 0);    /* MISO */
 285         at91_set_A_periph(AT91_PIN_PA26, 0);    /* MOSI */
 286         at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPCK */
 287
 288         /* Enable SPI chip-selects */
 289         for (i = 0; i < nr_devices; i++) {
 290                 if (devices[i].controller_data)
 291                         cs_pin = (unsigned long) devices[i].controller_data;
 292                 else
 293                         cs_pin = spi_standard_cs[devices[i].chip_select];
 294
 295                 /* enable chip-select pin */
 296                 at91_set_gpio_output(cs_pin, 1);
 297
 298                 /* pass chip-select pin to driver */
 299                 devices[i].controller_data = (void *) cs_pin;
 300         }
 301
 302         spi_register_board_info(devices, nr_devices);
 303         platform_device_register(&at91sam9rl_spi_device);
 304 }
 305 #else
 306 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 307 #endif
 308
 309
 310 /* --------------------------------------------------------------------
 311  *  LCD Controller
 312  * -------------------------------------------------------------------- */
 313
 314 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 315 static u64 lcdc_dmamask = 0xffffffffUL;
 316 static struct atmel_lcdfb_info lcdc_data;
 317
 318 static struct resource lcdc_resources[] = {
 319         [0] = {
 320                 .start  = AT91SAM9RL_LCDC_BASE,
 321                 .end    = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
 322                 .flags  = IORESOURCE_MEM,
 323         },
 324         [1] = {
 325                 .start  = AT91SAM9RL_ID_LCDC,
 326                 .end    = AT91SAM9RL_ID_LCDC,
 327                 .flags  = IORESOURCE_IRQ,
 328         },
 329 #if defined(CONFIG_FB_INTSRAM)
 330         [2] = {
 331                 .start  = AT91SAM9RL_SRAM_BASE,
 332                 .end    = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
 333                 .flags  = IORESOURCE_MEM,
 334         },
 335 #endif
 336 };
 337
 338 static struct platform_device at91_lcdc_device = {
 339         .name           = "atmel_lcdfb",
 340         .id             = 0,
 341         .dev            = {
 342                                 .dma_mask               = &lcdc_dmamask,
 343                                 .coherent_dma_mask      = 0xffffffff,
 344                                 .platform_data          = &lcdc_data,
 345         },
 346         .resource       = lcdc_resources,
 347         .num_resources  = ARRAY_SIZE(lcdc_resources),
 348 };
 349
 350 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 351 {
 352         if (!data) {
 353                 return;
 354         }
 355
 356         at91_set_B_periph(AT91_PIN_PC1, 0);     /* LCDPWR */
 357         at91_set_A_periph(AT91_PIN_PC5, 0);     /* LCDHSYNC */
 358         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDDOTCK */
 359         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDDEN */
 360         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDCC */
 361         at91_set_B_periph(AT91_PIN_PC9, 0);     /* LCDD3 */
 362         at91_set_B_periph(AT91_PIN_PC10, 0);    /* LCDD4 */
 363         at91_set_B_periph(AT91_PIN_PC11, 0);    /* LCDD5 */
 364         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD6 */
 365         at91_set_B_periph(AT91_PIN_PC13, 0);    /* LCDD7 */
 366         at91_set_B_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 367         at91_set_B_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 368         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
 369         at91_set_B_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 370         at91_set_B_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 371         at91_set_B_periph(AT91_PIN_PC20, 0);    /* LCDD18 */
 372         at91_set_B_periph(AT91_PIN_PC21, 0);    /* LCDD19 */
 373         at91_set_B_periph(AT91_PIN_PC22, 0);    /* LCDD20 */
 374         at91_set_B_periph(AT91_PIN_PC23, 0);    /* LCDD21 */
 375         at91_set_B_periph(AT91_PIN_PC24, 0);    /* LCDD22 */
 376         at91_set_B_periph(AT91_PIN_PC25, 0);    /* LCDD23 */
 377
 378         lcdc_data = *data;
 379         platform_device_register(&at91_lcdc_device);
 380 }
 381 #else
 382 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 383 #endif
 384
 385
 386 /* --------------------------------------------------------------------
 387  *  RTC
 388  * -------------------------------------------------------------------- */
 389
 390 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 391 static struct platform_device at91sam9rl_rtc_device = {
 392         .name           = "at91_rtc",
 393         .id             = -1,
 394         .num_resources  = 0,
 395 };
 396
 397 static void __init at91_add_device_rtc(void)
 398 {
 399         platform_device_register(&at91sam9rl_rtc_device);
 400 }
 401 #else
 402 static void __init at91_add_device_rtc(void) {}
 403 #endif
 404
 405
 406 /* --------------------------------------------------------------------
 407  *  RTT
 408  * -------------------------------------------------------------------- */
 409
 410 static struct resource rtt_resources[] = {
 411         {
 412                 .start  = AT91_BASE_SYS + AT91_RTT,
 413                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
 414                 .flags  = IORESOURCE_MEM,
 415         }
 416 };
 417
 418 static struct platform_device at91sam9rl_rtt_device = {
 419         .name           = "at91_rtt",
 420         .id             = -1,
 421         .resource       = rtt_resources,
 422         .num_resources  = ARRAY_SIZE(rtt_resources),
 423 };
 424
 425 static void __init at91_add_device_rtt(void)
 426 {
 427         platform_device_register(&at91sam9rl_rtt_device);
 428 }
 429
 430
 431 /* --------------------------------------------------------------------
 432  *  Watchdog
 433  * -------------------------------------------------------------------- */
 434
 435 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
 436 static struct platform_device at91sam9rl_wdt_device = {
 437         .name           = "at91_wdt",
 438         .id             = -1,
 439         .num_resources  = 0,
 440 };
 441
 442 static void __init at91_add_device_watchdog(void)
 443 {
 444         platform_device_register(&at91sam9rl_wdt_device);
 445 }
 446 #else
 447 static void __init at91_add_device_watchdog(void) {}
 448 #endif
 449
 450
 451 /* --------------------------------------------------------------------
 452  *  LEDs
 453  * -------------------------------------------------------------------- */
 454
 455 #if defined(CONFIG_LEDS)
 456 u8 at91_leds_cpu;
 457 u8 at91_leds_timer;
 458
 459 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
 460 {
 461         /* Enable GPIO to access the LEDs */
 462         at91_set_gpio_output(cpu_led, 1);
 463         at91_set_gpio_output(timer_led, 1);
 464
 465         at91_leds_cpu   = cpu_led;
 466         at91_leds_timer = timer_led;
 467 }
 468 #else
 469 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
 470 #endif
 471
 472
 473 /* --------------------------------------------------------------------
 474  *  UART
 475  * -------------------------------------------------------------------- */
 476
 477 #if defined(CONFIG_SERIAL_ATMEL)
 478 static struct resource dbgu_resources[] = {
 479         [0] = {
 480                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 481                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 482                 .flags  = IORESOURCE_MEM,
 483         },
 484         [1] = {
 485                 .start  = AT91_ID_SYS,
 486                 .end    = AT91_ID_SYS,
 487                 .flags  = IORESOURCE_IRQ,
 488         },
 489 };
 490
 491 static struct atmel_uart_data dbgu_data = {
 492         .use_dma_tx     = 0,
 493         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 494         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 495 };
 496
 497 static struct platform_device at91sam9rl_dbgu_device = {
 498         .name           = "atmel_usart",
 499         .id             = 0,
 500         .dev            = {
 501                                 .platform_data  = &dbgu_data,
 502                                 .coherent_dma_mask = 0xffffffff,
 503         },
 504         .resource       = dbgu_resources,
 505         .num_resources  = ARRAY_SIZE(dbgu_resources),
 506 };
 507
 508 static inline void configure_dbgu_pins(void)
 509 {
 510         at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
 511         at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
 512 }
 513
 514 static struct resource uart0_resources[] = {
 515         [0] = {
 516                 .start  = AT91SAM9RL_BASE_US0,
 517                 .end    = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
 518                 .flags  = IORESOURCE_MEM,
 519         },
 520         [1] = {
 521                 .start  = AT91SAM9RL_ID_US0,
 522                 .end    = AT91SAM9RL_ID_US0,
 523                 .flags  = IORESOURCE_IRQ,
 524         },
 525 };
 526
 527 static struct atmel_uart_data uart0_data = {
 528         .use_dma_tx     = 1,
 529         .use_dma_rx     = 1,
 530 };
 531
 532 static struct platform_device at91sam9rl_uart0_device = {
 533         .name           = "atmel_usart",
 534         .id             = 1,
 535         .dev            = {
 536                                 .platform_data  = &uart0_data,
 537                                 .coherent_dma_mask = 0xffffffff,
 538         },
 539         .resource       = uart0_resources,
 540         .num_resources  = ARRAY_SIZE(uart0_resources),
 541 };
 542
 543 static inline void configure_usart0_pins(void)
 544 {
 545         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
 546         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
 547         at91_set_A_periph(AT91_PIN_PA9, 0);             /* RTS0 */
 548         at91_set_A_periph(AT91_PIN_PA10, 0);            /* CTS0 */
 549 }
 550
 551 static struct resource uart1_resources[] = {
 552         [0] = {
 553                 .start  = AT91SAM9RL_BASE_US1,
 554                 .end    = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
 555                 .flags  = IORESOURCE_MEM,
 556         },
 557         [1] = {
 558                 .start  = AT91SAM9RL_ID_US1,
 559                 .end    = AT91SAM9RL_ID_US1,
 560                 .flags  = IORESOURCE_IRQ,
 561         },
 562 };
 563
 564 static struct atmel_uart_data uart1_data = {
 565         .use_dma_tx     = 1,
 566         .use_dma_rx     = 1,
 567 };
 568
 569 static struct platform_device at91sam9rl_uart1_device = {
 570         .name           = "atmel_usart",
 571         .id             = 2,
 572         .dev            = {
 573                                 .platform_data  = &uart1_data,
 574                                 .coherent_dma_mask = 0xffffffff,
 575         },
 576         .resource       = uart1_resources,
 577         .num_resources  = ARRAY_SIZE(uart1_resources),
 578 };
 579
 580 static inline void configure_usart1_pins(void)
 581 {
 582         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
 583         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
 584 }
 585
 586 static struct resource uart2_resources[] = {
 587         [0] = {
 588                 .start  = AT91SAM9RL_BASE_US2,
 589                 .end    = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
 590                 .flags  = IORESOURCE_MEM,
 591         },
 592         [1] = {
 593                 .start  = AT91SAM9RL_ID_US2,
 594                 .end    = AT91SAM9RL_ID_US2,
 595                 .flags  = IORESOURCE_IRQ,
 596         },
 597 };
 598
 599 static struct atmel_uart_data uart2_data = {
 600         .use_dma_tx     = 1,
 601         .use_dma_rx     = 1,
 602 };
 603
 604 static struct platform_device at91sam9rl_uart2_device = {
 605         .name           = "atmel_usart",
 606         .id             = 3,
 607         .dev            = {
 608                                 .platform_data  = &uart2_data,
 609                                 .coherent_dma_mask = 0xffffffff,
 610         },
 611         .resource       = uart2_resources,
 612         .num_resources  = ARRAY_SIZE(uart2_resources),
 613 };
 614
 615 static inline void configure_usart2_pins(void)
 616 {
 617         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
 618         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
 619 }
 620
 621 static struct resource uart3_resources[] = {
 622         [0] = {
 623                 .start  = AT91SAM9RL_BASE_US3,
 624                 .end    = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
 625                 .flags  = IORESOURCE_MEM,
 626         },
 627         [1] = {
 628                 .start  = AT91SAM9RL_ID_US3,
 629                 .end    = AT91SAM9RL_ID_US3,
 630                 .flags  = IORESOURCE_IRQ,
 631         },
 632 };
 633
 634 static struct atmel_uart_data uart3_data = {
 635         .use_dma_tx     = 1,
 636         .use_dma_rx     = 1,
 637 };
 638
 639 static struct platform_device at91sam9rl_uart3_device = {
 640         .name           = "atmel_usart",
 641         .id             = 4,
 642         .dev            = {
 643                                 .platform_data  = &uart3_data,
 644                                 .coherent_dma_mask = 0xffffffff,
 645         },
 646         .resource       = uart3_resources,
 647         .num_resources  = ARRAY_SIZE(uart3_resources),
 648 };
 649
 650 static inline void configure_usart3_pins(void)
 651 {
 652         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
 653         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
 654 }
 655
 656 struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
 657 struct platform_device *atmel_default_console_device;   /* the serial console device */
 658
 659 void __init at91_init_serial(struct at91_uart_config *config)
 660 {
 661         int i;
 662
 663         /* Fill in list of supported UARTs */
 664         for (i = 0; i < config->nr_tty; i++) {
 665                 switch (config->tty_map[i]) {
 666                         case 0:
 667                                 configure_usart0_pins();
 668                                 at91_uarts[i] = &at91sam9rl_uart0_device;
 669                                 at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
 670                                 break;
 671                         case 1:
 672                                 configure_usart1_pins();
 673                                 at91_uarts[i] = &at91sam9rl_uart1_device;
 674                                 at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
 675                                 break;
 676                         case 2:
 677                                 configure_usart2_pins();
 678                                 at91_uarts[i] = &at91sam9rl_uart2_device;
 679                                 at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
 680                                 break;
 681                         case 3:
 682                                 configure_usart3_pins();
 683                                 at91_uarts[i] = &at91sam9rl_uart3_device;
 684                                 at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
 685                                 break;
 686                         case 4:
 687                                 configure_dbgu_pins();
 688                                 at91_uarts[i] = &at91sam9rl_dbgu_device;
 689                                 at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart");
 690                                 break;
 691                         default:
 692                                 continue;
 693                 }
 694                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
 695         }
 696
 697         /* Set serial console device */
 698         if (config->console_tty < ATMEL_MAX_UART)
 699                 atmel_default_console_device = at91_uarts[config->console_tty];
 700         if (!atmel_default_console_device)
 701                 printk(KERN_INFO "AT91: No default serial console defined.\n");
 702 }
 703
 704 void __init at91_add_device_serial(void)
 705 {
 706         int i;
 707
 708         for (i = 0; i < ATMEL_MAX_UART; i++) {
 709                 if (at91_uarts[i])
 710                         platform_device_register(at91_uarts[i]);
 711         }
 712 }
 713 #else
 714 void __init at91_init_serial(struct at91_uart_config *config) {}
 715 void __init at91_add_device_serial(void) {}
 716 #endif
 717
 718
 719 /* -------------------------------------------------------------------- */
 720
 721 /*
 722  * These devices are always present and don't need any board-specific
 723  * setup.
 724  */
 725 static int __init at91_add_standard_devices(void)
 726 {
 727         at91_add_device_rtc();
 728         at91_add_device_rtt();
 729         at91_add_device_watchdog();
 730         return 0;
 731 }
 732
 733 arch_initcall(at91_add_standard_devices);