1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name[] = "ixgbe";
47 static const char ixgbe_driver_string[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "2.0.8-k2"
51 const char ixgbe_driver_version[] = DRV_VERSION;
52 static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation.";
54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
55 [board_82598] = &ixgbe_82598_info,
56 [board_82599] = &ixgbe_82599_info,
59 /* ixgbe_pci_tbl - PCI Device ID Table
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
67 static struct pci_device_id ixgbe_pci_tbl[] = {
68 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
72 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
74 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
76 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
78 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
84 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4),
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
95 /* required last entry */
98 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
100 #ifdef CONFIG_IXGBE_DCA
101 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
103 static struct notifier_block dca_notifier = {
104 .notifier_call = ixgbe_notify_dca,
110 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
111 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
112 MODULE_LICENSE("GPL");
113 MODULE_VERSION(DRV_VERSION);
115 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
117 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
121 /* Let firmware take over control of h/w */
122 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
123 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
124 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
127 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
131 /* Let firmware know the driver has taken over */
132 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
133 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
134 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
138 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
139 * @adapter: pointer to adapter struct
140 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
141 * @queue: queue to map the corresponding interrupt to
142 * @msix_vector: the vector to map to the corresponding queue
145 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
146 u8 queue, u8 msix_vector)
149 struct ixgbe_hw *hw = &adapter->hw;
150 switch (hw->mac.type) {
151 case ixgbe_mac_82598EB:
152 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
155 index = (((direction * 64) + queue) >> 2) & 0x1F;
156 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
157 ivar &= ~(0xFF << (8 * (queue & 0x3)));
158 ivar |= (msix_vector << (8 * (queue & 0x3)));
159 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
161 case ixgbe_mac_82599EB:
162 if (direction == -1) {
164 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
165 index = ((queue & 1) * 8);
166 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
167 ivar &= ~(0xFF << index);
168 ivar |= (msix_vector << index);
169 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
172 /* tx or rx causes */
173 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
174 index = ((16 * (queue & 1)) + (8 * direction));
175 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
176 ivar &= ~(0xFF << index);
177 ivar |= (msix_vector << index);
178 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
186 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
187 struct ixgbe_tx_buffer
190 if (tx_buffer_info->dma) {
191 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
192 tx_buffer_info->length, PCI_DMA_TODEVICE);
193 tx_buffer_info->dma = 0;
195 if (tx_buffer_info->skb) {
196 dev_kfree_skb_any(tx_buffer_info->skb);
197 tx_buffer_info->skb = NULL;
199 /* tx_buffer_info must be completely set up in the transmit path */
202 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
203 struct ixgbe_ring *tx_ring,
206 struct ixgbe_hw *hw = &adapter->hw;
209 /* Detect a transmit hang in hardware, this serializes the
210 * check with the clearing of time_stamp and movement of eop */
211 head = IXGBE_READ_REG(hw, tx_ring->head);
212 tail = IXGBE_READ_REG(hw, tx_ring->tail);
213 adapter->detect_tx_hung = false;
214 if ((head != tail) &&
215 tx_ring->tx_buffer_info[eop].time_stamp &&
216 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
217 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
218 /* detected Tx unit hang */
219 union ixgbe_adv_tx_desc *tx_desc;
220 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
221 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
223 " TDH, TDT <%x>, <%x>\n"
224 " next_to_use <%x>\n"
225 " next_to_clean <%x>\n"
226 "tx_buffer_info[next_to_clean]\n"
227 " time_stamp <%lx>\n"
229 tx_ring->queue_index,
231 tx_ring->next_to_use, eop,
232 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
239 #define IXGBE_MAX_TXD_PWR 14
240 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
242 /* Tx Descriptors needed, worst case */
243 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
244 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
245 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
246 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
248 static void ixgbe_tx_timeout(struct net_device *netdev);
251 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
252 * @adapter: board private structure
253 * @tx_ring: tx ring to clean
255 * returns true if transmit work is done
257 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
258 struct ixgbe_ring *tx_ring)
260 struct net_device *netdev = adapter->netdev;
261 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
262 struct ixgbe_tx_buffer *tx_buffer_info;
263 unsigned int i, eop, count = 0;
264 unsigned int total_bytes = 0, total_packets = 0;
266 i = tx_ring->next_to_clean;
267 eop = tx_ring->tx_buffer_info[i].next_to_watch;
268 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
270 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
271 (count < tx_ring->work_limit)) {
272 bool cleaned = false;
273 for ( ; !cleaned; count++) {
275 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
276 tx_buffer_info = &tx_ring->tx_buffer_info[i];
277 cleaned = (i == eop);
278 skb = tx_buffer_info->skb;
280 if (cleaned && skb) {
281 unsigned int segs, bytecount;
283 /* gso_segs is currently only valid for tcp */
284 segs = skb_shinfo(skb)->gso_segs ?: 1;
285 /* multiply data chunks by size of headers */
286 bytecount = ((segs - 1) * skb_headlen(skb)) +
288 total_packets += segs;
289 total_bytes += bytecount;
292 ixgbe_unmap_and_free_tx_resource(adapter,
295 tx_desc->wb.status = 0;
298 if (i == tx_ring->count)
302 eop = tx_ring->tx_buffer_info[i].next_to_watch;
303 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
306 tx_ring->next_to_clean = i;
308 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
309 if (unlikely(count && netif_carrier_ok(netdev) &&
310 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
311 /* Make sure that anybody stopping the queue after this
312 * sees the new next_to_clean.
315 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
316 !test_bit(__IXGBE_DOWN, &adapter->state)) {
317 netif_wake_subqueue(netdev, tx_ring->queue_index);
318 ++adapter->restart_queue;
322 if (adapter->detect_tx_hung) {
323 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
324 /* schedule immediate reset if we believe we hung */
326 "tx hang %d detected, resetting adapter\n",
327 adapter->tx_timeout_count + 1);
328 ixgbe_tx_timeout(adapter->netdev);
332 /* re-arm the interrupt */
333 if (count >= tx_ring->work_limit)
334 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
336 tx_ring->total_bytes += total_bytes;
337 tx_ring->total_packets += total_packets;
338 tx_ring->stats.packets += total_packets;
339 tx_ring->stats.bytes += total_bytes;
340 adapter->net_stats.tx_bytes += total_bytes;
341 adapter->net_stats.tx_packets += total_packets;
342 return (count < tx_ring->work_limit);
345 #ifdef CONFIG_IXGBE_DCA
346 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
347 struct ixgbe_ring *rx_ring)
351 int q = rx_ring - adapter->rx_ring;
353 if (rx_ring->cpu != cpu) {
354 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
355 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
356 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
357 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
358 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
359 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599;
360 rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
361 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599);
363 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
364 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
365 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
366 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
367 IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
368 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
374 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
375 struct ixgbe_ring *tx_ring)
379 int q = tx_ring - adapter->tx_ring;
381 if (tx_ring->cpu != cpu) {
382 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
383 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
384 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
385 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
386 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
387 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
388 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
389 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
391 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
392 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
398 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
402 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
405 for (i = 0; i < adapter->num_tx_queues; i++) {
406 adapter->tx_ring[i].cpu = -1;
407 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
409 for (i = 0; i < adapter->num_rx_queues; i++) {
410 adapter->rx_ring[i].cpu = -1;
411 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
415 static int __ixgbe_notify_dca(struct device *dev, void *data)
417 struct net_device *netdev = dev_get_drvdata(dev);
418 struct ixgbe_adapter *adapter = netdev_priv(netdev);
419 unsigned long event = *(unsigned long *)data;
422 case DCA_PROVIDER_ADD:
423 /* if we're already enabled, don't do it again */
424 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
426 /* Always use CB2 mode, difference is masked
427 * in the CB driver. */
428 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
429 if (dca_add_requester(dev) == 0) {
430 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
431 ixgbe_setup_dca(adapter);
434 /* Fall Through since DCA is disabled. */
435 case DCA_PROVIDER_REMOVE:
436 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
437 dca_remove_requester(dev);
438 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
439 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
447 #endif /* CONFIG_IXGBE_DCA */
449 * ixgbe_receive_skb - Send a completed packet up the stack
450 * @adapter: board private structure
451 * @skb: packet to send up
452 * @status: hardware indication of status of receive
453 * @rx_ring: rx descriptor ring (for a specific queue) to setup
454 * @rx_desc: rx descriptor
456 static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
457 struct sk_buff *skb, u8 status,
458 union ixgbe_adv_rx_desc *rx_desc)
460 struct ixgbe_adapter *adapter = q_vector->adapter;
461 struct napi_struct *napi = &q_vector->napi;
462 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
463 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
465 skb_record_rx_queue(skb, q_vector - &adapter->q_vector[0]);
466 if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
467 if (adapter->vlgrp && is_vlan && (tag != 0))
468 vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
470 napi_gro_receive(napi, skb);
472 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
473 if (adapter->vlgrp && is_vlan && (tag != 0))
474 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
476 netif_receive_skb(skb);
478 if (adapter->vlgrp && is_vlan && (tag != 0))
479 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
487 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
488 * @adapter: address of board private structure
489 * @status_err: hardware indication of status of receive
490 * @skb: skb currently being received and modified
492 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
493 u32 status_err, struct sk_buff *skb)
495 skb->ip_summed = CHECKSUM_NONE;
497 /* Rx csum disabled */
498 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
501 /* if IP and error */
502 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
503 (status_err & IXGBE_RXDADV_ERR_IPE)) {
504 adapter->hw_csum_rx_error++;
508 if (!(status_err & IXGBE_RXD_STAT_L4CS))
511 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
512 adapter->hw_csum_rx_error++;
516 /* It must be a TCP or UDP packet with a valid checksum */
517 skb->ip_summed = CHECKSUM_UNNECESSARY;
518 adapter->hw_csum_rx_good++;
521 static inline void ixgbe_release_rx_desc(struct ixgbe_hw *hw,
522 struct ixgbe_ring *rx_ring, u32 val)
525 * Force memory writes to complete before letting h/w
526 * know there are new descriptors to fetch. (Only
527 * applicable for weak-ordered memory model archs,
531 IXGBE_WRITE_REG(hw, IXGBE_RDT(rx_ring->reg_idx), val);
535 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
536 * @adapter: address of board private structure
538 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
539 struct ixgbe_ring *rx_ring,
542 struct pci_dev *pdev = adapter->pdev;
543 union ixgbe_adv_rx_desc *rx_desc;
544 struct ixgbe_rx_buffer *bi;
546 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
548 i = rx_ring->next_to_use;
549 bi = &rx_ring->rx_buffer_info[i];
551 while (cleaned_count--) {
552 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
555 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
557 bi->page = alloc_page(GFP_ATOMIC);
559 adapter->alloc_rx_page_failed++;
564 /* use a half page if we're re-using */
565 bi->page_offset ^= (PAGE_SIZE / 2);
568 bi->page_dma = pci_map_page(pdev, bi->page,
576 skb = netdev_alloc_skb(adapter->netdev, bufsz);
579 adapter->alloc_rx_buff_failed++;
584 * Make buffer alignment 2 beyond a 16 byte boundary
585 * this will result in a 16 byte aligned IP header after
586 * the 14 byte MAC header is removed
588 skb_reserve(skb, NET_IP_ALIGN);
591 bi->dma = pci_map_single(pdev, skb->data, bufsz,
594 /* Refresh the desc even if buffer_addrs didn't change because
595 * each write-back erases this info. */
596 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
597 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
598 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
600 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
604 if (i == rx_ring->count)
606 bi = &rx_ring->rx_buffer_info[i];
610 if (rx_ring->next_to_use != i) {
611 rx_ring->next_to_use = i;
613 i = (rx_ring->count - 1);
615 ixgbe_release_rx_desc(&adapter->hw, rx_ring, i);
619 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
621 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
624 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
626 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
629 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
630 struct ixgbe_ring *rx_ring,
631 int *work_done, int work_to_do)
633 struct ixgbe_adapter *adapter = q_vector->adapter;
634 struct pci_dev *pdev = adapter->pdev;
635 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
636 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
641 bool cleaned = false;
642 int cleaned_count = 0;
643 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
645 i = rx_ring->next_to_clean;
646 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
647 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
648 rx_buffer_info = &rx_ring->rx_buffer_info[i];
650 while (staterr & IXGBE_RXD_STAT_DD) {
652 if (*work_done >= work_to_do)
656 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
657 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
658 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
659 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
660 if (hdr_info & IXGBE_RXDADV_SPH)
661 adapter->rx_hdr_split++;
662 if (len > IXGBE_RX_HDR_SIZE)
663 len = IXGBE_RX_HDR_SIZE;
664 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
666 len = le16_to_cpu(rx_desc->wb.upper.length);
670 skb = rx_buffer_info->skb;
671 prefetch(skb->data - NET_IP_ALIGN);
672 rx_buffer_info->skb = NULL;
674 if (len && !skb_shinfo(skb)->nr_frags) {
675 pci_unmap_single(pdev, rx_buffer_info->dma,
682 pci_unmap_page(pdev, rx_buffer_info->page_dma,
683 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
684 rx_buffer_info->page_dma = 0;
685 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
686 rx_buffer_info->page,
687 rx_buffer_info->page_offset,
690 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
691 (page_count(rx_buffer_info->page) != 1))
692 rx_buffer_info->page = NULL;
694 get_page(rx_buffer_info->page);
696 skb->len += upper_len;
697 skb->data_len += upper_len;
698 skb->truesize += upper_len;
702 if (i == rx_ring->count)
704 next_buffer = &rx_ring->rx_buffer_info[i];
706 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
710 if (staterr & IXGBE_RXD_STAT_EOP) {
711 rx_ring->stats.packets++;
712 rx_ring->stats.bytes += skb->len;
714 rx_buffer_info->skb = next_buffer->skb;
715 rx_buffer_info->dma = next_buffer->dma;
716 next_buffer->skb = skb;
717 next_buffer->dma = 0;
718 adapter->non_eop_descs++;
722 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
723 dev_kfree_skb_irq(skb);
727 ixgbe_rx_checksum(adapter, staterr, skb);
729 /* probably a little skewed due to removing CRC */
730 total_rx_bytes += skb->len;
733 skb->protocol = eth_type_trans(skb, adapter->netdev);
734 ixgbe_receive_skb(q_vector, skb, staterr, rx_desc);
737 rx_desc->wb.upper.status_error = 0;
739 /* return some buffers to hardware, one at a time is too slow */
740 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
741 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
745 /* use prefetched values */
747 rx_buffer_info = next_buffer;
749 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
752 rx_ring->next_to_clean = i;
753 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
756 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
758 rx_ring->total_packets += total_rx_packets;
759 rx_ring->total_bytes += total_rx_bytes;
760 adapter->net_stats.rx_bytes += total_rx_bytes;
761 adapter->net_stats.rx_packets += total_rx_packets;
766 static int ixgbe_clean_rxonly(struct napi_struct *, int);
768 * ixgbe_configure_msix - Configure MSI-X hardware
769 * @adapter: board private structure
771 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
774 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
776 struct ixgbe_q_vector *q_vector;
777 int i, j, q_vectors, v_idx, r_idx;
780 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
782 /* Populate the IVAR table and set the ITR values to the
783 * corresponding register.
785 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
786 q_vector = &adapter->q_vector[v_idx];
787 /* XXX for_each_bit(...) */
788 r_idx = find_first_bit(q_vector->rxr_idx,
789 adapter->num_rx_queues);
791 for (i = 0; i < q_vector->rxr_count; i++) {
792 j = adapter->rx_ring[r_idx].reg_idx;
793 ixgbe_set_ivar(adapter, 0, j, v_idx);
794 r_idx = find_next_bit(q_vector->rxr_idx,
795 adapter->num_rx_queues,
798 r_idx = find_first_bit(q_vector->txr_idx,
799 adapter->num_tx_queues);
801 for (i = 0; i < q_vector->txr_count; i++) {
802 j = adapter->tx_ring[r_idx].reg_idx;
803 ixgbe_set_ivar(adapter, 1, j, v_idx);
804 r_idx = find_next_bit(q_vector->txr_idx,
805 adapter->num_tx_queues,
809 /* if this is a tx only vector halve the interrupt rate */
810 if (q_vector->txr_count && !q_vector->rxr_count)
811 q_vector->eitr = (adapter->eitr_param >> 1);
812 else if (q_vector->rxr_count)
814 q_vector->eitr = adapter->eitr_param;
817 * since ths is initial set up don't need to call
818 * ixgbe_write_eitr helper
820 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
821 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
824 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
825 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
827 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
828 ixgbe_set_ivar(adapter, -1, 1, v_idx);
829 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
831 /* set up to autoclear timer, and the vectors */
832 mask = IXGBE_EIMS_ENABLE_MASK;
833 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
834 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
841 latency_invalid = 255
845 * ixgbe_update_itr - update the dynamic ITR value based on statistics
846 * @adapter: pointer to adapter
847 * @eitr: eitr setting (ints per sec) to give last timeslice
848 * @itr_setting: current throttle rate in ints/second
849 * @packets: the number of packets during this measurement interval
850 * @bytes: the number of bytes during this measurement interval
852 * Stores a new ITR value based on packets and byte
853 * counts during the last interrupt. The advantage of per interrupt
854 * computation is faster updates and more accurate ITR for the current
855 * traffic pattern. Constants in this function were computed
856 * based on theoretical maximum wire speed and thresholds were set based
857 * on testing data as well as attempting to minimize response time
858 * while increasing bulk throughput.
859 * this functionality is controlled by the InterruptThrottleRate module
860 * parameter (see ixgbe_param.c)
862 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
863 u32 eitr, u8 itr_setting,
864 int packets, int bytes)
866 unsigned int retval = itr_setting;
871 goto update_itr_done;
874 /* simple throttlerate management
875 * 0-20MB/s lowest (100000 ints/s)
876 * 20-100MB/s low (20000 ints/s)
877 * 100-1249MB/s bulk (8000 ints/s)
879 /* what was last interrupt timeslice? */
880 timepassed_us = 1000000/eitr;
881 bytes_perint = bytes / timepassed_us; /* bytes/usec */
883 switch (itr_setting) {
885 if (bytes_perint > adapter->eitr_low)
886 retval = low_latency;
889 if (bytes_perint > adapter->eitr_high)
890 retval = bulk_latency;
891 else if (bytes_perint <= adapter->eitr_low)
892 retval = lowest_latency;
895 if (bytes_perint <= adapter->eitr_high)
896 retval = low_latency;
905 * ixgbe_write_eitr - write EITR register in hardware specific way
906 * @adapter: pointer to adapter struct
907 * @v_idx: vector index into q_vector array
908 * @itr_reg: new value to be written in *register* format, not ints/s
910 * This function is made to be called by ethtool and by the driver
911 * when it needs to update EITR registers at runtime. Hardware
912 * specific quirks/differences are taken care of here.
914 void ixgbe_write_eitr(struct ixgbe_adapter *adapter, int v_idx, u32 itr_reg)
916 struct ixgbe_hw *hw = &adapter->hw;
917 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
918 /* must write high and low 16 bits to reset counter */
919 itr_reg |= (itr_reg << 16);
920 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
922 * set the WDIS bit to not clear the timer bits and cause an
923 * immediate assertion of the interrupt
925 itr_reg |= IXGBE_EITR_CNT_WDIS;
927 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
930 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
932 struct ixgbe_adapter *adapter = q_vector->adapter;
934 u8 current_itr, ret_itr;
935 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
936 sizeof(struct ixgbe_q_vector);
937 struct ixgbe_ring *rx_ring, *tx_ring;
939 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
940 for (i = 0; i < q_vector->txr_count; i++) {
941 tx_ring = &(adapter->tx_ring[r_idx]);
942 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
944 tx_ring->total_packets,
945 tx_ring->total_bytes);
946 /* if the result for this queue would decrease interrupt
947 * rate for this vector then use that result */
948 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
949 q_vector->tx_itr - 1 : ret_itr);
950 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
954 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
955 for (i = 0; i < q_vector->rxr_count; i++) {
956 rx_ring = &(adapter->rx_ring[r_idx]);
957 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
959 rx_ring->total_packets,
960 rx_ring->total_bytes);
961 /* if the result for this queue would decrease interrupt
962 * rate for this vector then use that result */
963 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
964 q_vector->rx_itr - 1 : ret_itr);
965 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
969 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
971 switch (current_itr) {
972 /* counts and packets in update_itr are dependent on these numbers */
977 new_itr = 20000; /* aka hwitr = ~200 */
985 if (new_itr != q_vector->eitr) {
988 /* save the algorithm value here, not the smoothed one */
989 q_vector->eitr = new_itr;
990 /* do an exponential smoothing */
991 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
992 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
993 ixgbe_write_eitr(adapter, v_idx, itr_reg);
999 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
1001 struct ixgbe_hw *hw = &adapter->hw;
1003 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
1004 (eicr & IXGBE_EICR_GPI_SDP1)) {
1005 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
1006 /* write to clear the interrupt */
1007 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1011 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
1013 struct ixgbe_hw *hw = &adapter->hw;
1015 if (eicr & IXGBE_EICR_GPI_SDP1) {
1016 /* Clear the interrupt */
1017 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1018 schedule_work(&adapter->multispeed_fiber_task);
1019 } else if (eicr & IXGBE_EICR_GPI_SDP2) {
1020 /* Clear the interrupt */
1021 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
1022 schedule_work(&adapter->sfp_config_module_task);
1024 /* Interrupt isn't for us... */
1029 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
1031 struct ixgbe_hw *hw = &adapter->hw;
1034 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1035 adapter->link_check_timeout = jiffies;
1036 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1037 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
1038 schedule_work(&adapter->watchdog_task);
1042 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
1044 struct net_device *netdev = data;
1045 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1046 struct ixgbe_hw *hw = &adapter->hw;
1050 * Workaround for Silicon errata. Use clear-by-write instead
1051 * of clear-by-read. Reading with EICS will return the
1052 * interrupt causes without clearing, which later be done
1053 * with the write to EICR.
1055 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
1056 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
1058 if (eicr & IXGBE_EICR_LSC)
1059 ixgbe_check_lsc(adapter);
1061 if (hw->mac.type == ixgbe_mac_82598EB)
1062 ixgbe_check_fan_failure(adapter, eicr);
1064 if (hw->mac.type == ixgbe_mac_82599EB)
1065 ixgbe_check_sfp_event(adapter, eicr);
1066 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1067 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
1072 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
1074 struct ixgbe_q_vector *q_vector = data;
1075 struct ixgbe_adapter *adapter = q_vector->adapter;
1076 struct ixgbe_ring *tx_ring;
1079 if (!q_vector->txr_count)
1082 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1083 for (i = 0; i < q_vector->txr_count; i++) {
1084 tx_ring = &(adapter->tx_ring[r_idx]);
1085 #ifdef CONFIG_IXGBE_DCA
1086 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1087 ixgbe_update_tx_dca(adapter, tx_ring);
1089 tx_ring->total_bytes = 0;
1090 tx_ring->total_packets = 0;
1091 ixgbe_clean_tx_irq(adapter, tx_ring);
1092 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1100 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1102 * @data: pointer to our q_vector struct for this interrupt vector
1104 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
1106 struct ixgbe_q_vector *q_vector = data;
1107 struct ixgbe_adapter *adapter = q_vector->adapter;
1108 struct ixgbe_ring *rx_ring;
1112 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1113 for (i = 0; i < q_vector->rxr_count; i++) {
1114 rx_ring = &(adapter->rx_ring[r_idx]);
1115 rx_ring->total_bytes = 0;
1116 rx_ring->total_packets = 0;
1117 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1121 if (!q_vector->rxr_count)
1124 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1125 rx_ring = &(adapter->rx_ring[r_idx]);
1126 /* disable interrupts on this vector only */
1127 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1128 napi_schedule(&q_vector->napi);
1133 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1135 ixgbe_msix_clean_rx(irq, data);
1136 ixgbe_msix_clean_tx(irq, data);
1142 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1143 * @napi: napi struct with our devices info in it
1144 * @budget: amount of work driver is allowed to do this pass, in packets
1146 * This function is optimized for cleaning one queue only on a single
1149 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1151 struct ixgbe_q_vector *q_vector =
1152 container_of(napi, struct ixgbe_q_vector, napi);
1153 struct ixgbe_adapter *adapter = q_vector->adapter;
1154 struct ixgbe_ring *rx_ring = NULL;
1158 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1159 rx_ring = &(adapter->rx_ring[r_idx]);
1160 #ifdef CONFIG_IXGBE_DCA
1161 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1162 ixgbe_update_rx_dca(adapter, rx_ring);
1165 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1167 /* If all Rx work done, exit the polling mode */
1168 if (work_done < budget) {
1169 napi_complete(napi);
1170 if (adapter->itr_setting & 1)
1171 ixgbe_set_itr_msix(q_vector);
1172 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1173 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1180 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1181 * @napi: napi struct with our devices info in it
1182 * @budget: amount of work driver is allowed to do this pass, in packets
1184 * This function will clean more than one rx queue associated with a
1187 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1189 struct ixgbe_q_vector *q_vector =
1190 container_of(napi, struct ixgbe_q_vector, napi);
1191 struct ixgbe_adapter *adapter = q_vector->adapter;
1192 struct ixgbe_ring *rx_ring = NULL;
1193 int work_done = 0, i;
1195 u16 enable_mask = 0;
1197 /* attempt to distribute budget to each queue fairly, but don't allow
1198 * the budget to go below 1 because we'll exit polling */
1199 budget /= (q_vector->rxr_count ?: 1);
1200 budget = max(budget, 1);
1201 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1202 for (i = 0; i < q_vector->rxr_count; i++) {
1203 rx_ring = &(adapter->rx_ring[r_idx]);
1204 #ifdef CONFIG_IXGBE_DCA
1205 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1206 ixgbe_update_rx_dca(adapter, rx_ring);
1208 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1209 enable_mask |= rx_ring->v_idx;
1210 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1214 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1215 rx_ring = &(adapter->rx_ring[r_idx]);
1216 /* If all Rx work done, exit the polling mode */
1217 if (work_done < budget) {
1218 napi_complete(napi);
1219 if (adapter->itr_setting & 1)
1220 ixgbe_set_itr_msix(q_vector);
1221 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1222 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1228 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1231 a->q_vector[v_idx].adapter = a;
1232 set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1233 a->q_vector[v_idx].rxr_count++;
1234 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1237 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1240 a->q_vector[v_idx].adapter = a;
1241 set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1242 a->q_vector[v_idx].txr_count++;
1243 a->tx_ring[r_idx].v_idx = 1 << v_idx;
1247 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1248 * @adapter: board private structure to initialize
1249 * @vectors: allotted vector count for descriptor rings
1251 * This function maps descriptor rings to the queue-specific vectors
1252 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1253 * one vector per ring/queue, but on a constrained vector budget, we
1254 * group the rings as "efficiently" as possible. You would add new
1255 * mapping configurations in here.
1257 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1261 int rxr_idx = 0, txr_idx = 0;
1262 int rxr_remaining = adapter->num_rx_queues;
1263 int txr_remaining = adapter->num_tx_queues;
1268 /* No mapping required if MSI-X is disabled. */
1269 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1273 * The ideal configuration...
1274 * We have enough vectors to map one per queue.
1276 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1277 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1278 map_vector_to_rxq(adapter, v_start, rxr_idx);
1280 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1281 map_vector_to_txq(adapter, v_start, txr_idx);
1287 * If we don't have enough vectors for a 1-to-1
1288 * mapping, we'll have to group them so there are
1289 * multiple queues per vector.
1291 /* Re-adjusting *qpv takes care of the remainder. */
1292 for (i = v_start; i < vectors; i++) {
1293 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1294 for (j = 0; j < rqpv; j++) {
1295 map_vector_to_rxq(adapter, i, rxr_idx);
1300 for (i = v_start; i < vectors; i++) {
1301 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1302 for (j = 0; j < tqpv; j++) {
1303 map_vector_to_txq(adapter, i, txr_idx);
1314 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1315 * @adapter: board private structure
1317 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1318 * interrupts from the kernel.
1320 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1322 struct net_device *netdev = adapter->netdev;
1323 irqreturn_t (*handler)(int, void *);
1324 int i, vector, q_vectors, err;
1327 /* Decrement for Other and TCP Timer vectors */
1328 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1330 /* Map the Tx/Rx rings to the vectors we were allotted. */
1331 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1335 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1336 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1337 &ixgbe_msix_clean_many)
1338 for (vector = 0; vector < q_vectors; vector++) {
1339 handler = SET_HANDLER(&adapter->q_vector[vector]);
1341 if(handler == &ixgbe_msix_clean_rx) {
1342 sprintf(adapter->name[vector], "%s-%s-%d",
1343 netdev->name, "rx", ri++);
1345 else if(handler == &ixgbe_msix_clean_tx) {
1346 sprintf(adapter->name[vector], "%s-%s-%d",
1347 netdev->name, "tx", ti++);
1350 sprintf(adapter->name[vector], "%s-%s-%d",
1351 netdev->name, "TxRx", vector);
1353 err = request_irq(adapter->msix_entries[vector].vector,
1354 handler, 0, adapter->name[vector],
1355 &(adapter->q_vector[vector]));
1358 "request_irq failed for MSIX interrupt "
1359 "Error: %d\n", err);
1360 goto free_queue_irqs;
1364 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1365 err = request_irq(adapter->msix_entries[vector].vector,
1366 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1369 "request_irq for msix_lsc failed: %d\n", err);
1370 goto free_queue_irqs;
1376 for (i = vector - 1; i >= 0; i--)
1377 free_irq(adapter->msix_entries[--vector].vector,
1378 &(adapter->q_vector[i]));
1379 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1380 pci_disable_msix(adapter->pdev);
1381 kfree(adapter->msix_entries);
1382 adapter->msix_entries = NULL;
1387 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1389 struct ixgbe_q_vector *q_vector = adapter->q_vector;
1391 u32 new_itr = q_vector->eitr;
1392 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1393 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1395 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1397 tx_ring->total_packets,
1398 tx_ring->total_bytes);
1399 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1401 rx_ring->total_packets,
1402 rx_ring->total_bytes);
1404 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1406 switch (current_itr) {
1407 /* counts and packets in update_itr are dependent on these numbers */
1408 case lowest_latency:
1412 new_itr = 20000; /* aka hwitr = ~200 */
1421 if (new_itr != q_vector->eitr) {
1424 /* save the algorithm value here, not the smoothed one */
1425 q_vector->eitr = new_itr;
1426 /* do an exponential smoothing */
1427 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1428 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1429 ixgbe_write_eitr(adapter, 0, itr_reg);
1436 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1437 * @adapter: board private structure
1439 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1441 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1442 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1443 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
1444 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(2), ~0);
1446 IXGBE_WRITE_FLUSH(&adapter->hw);
1447 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1449 for (i = 0; i < adapter->num_msix_vectors; i++)
1450 synchronize_irq(adapter->msix_entries[i].vector);
1452 synchronize_irq(adapter->pdev->irq);
1457 * ixgbe_irq_enable - Enable default interrupt generation settings
1458 * @adapter: board private structure
1460 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1463 mask = IXGBE_EIMS_ENABLE_MASK;
1464 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1465 mask |= IXGBE_EIMS_GPI_SDP1;
1466 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1467 mask |= IXGBE_EIMS_ECC;
1468 mask |= IXGBE_EIMS_GPI_SDP1;
1469 mask |= IXGBE_EIMS_GPI_SDP2;
1472 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1473 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1474 /* enable the rest of the queue vectors */
1475 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1),
1476 (IXGBE_EIMS_RTX_QUEUE << 16));
1477 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(2),
1478 ((IXGBE_EIMS_RTX_QUEUE << 16) |
1479 IXGBE_EIMS_RTX_QUEUE));
1481 IXGBE_WRITE_FLUSH(&adapter->hw);
1485 * ixgbe_intr - legacy mode Interrupt Handler
1486 * @irq: interrupt number
1487 * @data: pointer to a network interface device structure
1489 static irqreturn_t ixgbe_intr(int irq, void *data)
1491 struct net_device *netdev = data;
1492 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1493 struct ixgbe_hw *hw = &adapter->hw;
1497 * Workaround for silicon errata. Mask the interrupts
1498 * before the read of EICR.
1500 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
1502 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1503 * therefore no explict interrupt disable is necessary */
1504 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1506 /* shared interrupt alert!
1507 * make sure interrupts are enabled because the read will
1508 * have disabled interrupts due to EIAM */
1509 ixgbe_irq_enable(adapter);
1510 return IRQ_NONE; /* Not our interrupt */
1513 if (eicr & IXGBE_EICR_LSC)
1514 ixgbe_check_lsc(adapter);
1516 if (hw->mac.type == ixgbe_mac_82599EB)
1517 ixgbe_check_sfp_event(adapter, eicr);
1519 ixgbe_check_fan_failure(adapter, eicr);
1521 if (napi_schedule_prep(&adapter->q_vector[0].napi)) {
1522 adapter->tx_ring[0].total_packets = 0;
1523 adapter->tx_ring[0].total_bytes = 0;
1524 adapter->rx_ring[0].total_packets = 0;
1525 adapter->rx_ring[0].total_bytes = 0;
1526 /* would disable interrupts here but EIAM disabled it */
1527 __napi_schedule(&adapter->q_vector[0].napi);
1533 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1535 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1537 for (i = 0; i < q_vectors; i++) {
1538 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1539 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1540 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1541 q_vector->rxr_count = 0;
1542 q_vector->txr_count = 0;
1547 * ixgbe_request_irq - initialize interrupts
1548 * @adapter: board private structure
1550 * Attempts to configure interrupts using the best available
1551 * capabilities of the hardware and kernel.
1553 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1555 struct net_device *netdev = adapter->netdev;
1558 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1559 err = ixgbe_request_msix_irqs(adapter);
1560 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1561 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1562 netdev->name, netdev);
1564 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1565 netdev->name, netdev);
1569 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1574 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1576 struct net_device *netdev = adapter->netdev;
1578 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1581 q_vectors = adapter->num_msix_vectors;
1584 free_irq(adapter->msix_entries[i].vector, netdev);
1587 for (; i >= 0; i--) {
1588 free_irq(adapter->msix_entries[i].vector,
1589 &(adapter->q_vector[i]));
1592 ixgbe_reset_q_vectors(adapter);
1594 free_irq(adapter->pdev->irq, netdev);
1599 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1602 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1604 struct ixgbe_hw *hw = &adapter->hw;
1606 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1607 EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1609 ixgbe_set_ivar(adapter, 0, 0, 0);
1610 ixgbe_set_ivar(adapter, 1, 0, 0);
1612 map_vector_to_rxq(adapter, 0, 0);
1613 map_vector_to_txq(adapter, 0, 0);
1615 DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1619 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1620 * @adapter: board private structure
1622 * Configure the Tx unit of the MAC after a reset.
1624 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1627 struct ixgbe_hw *hw = &adapter->hw;
1628 u32 i, j, tdlen, txctrl;
1630 /* Setup the HW Tx Head and Tail descriptor pointers */
1631 for (i = 0; i < adapter->num_tx_queues; i++) {
1632 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1635 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1636 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1637 (tdba & DMA_32BIT_MASK));
1638 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1639 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1640 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1641 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1642 adapter->tx_ring[i].head = IXGBE_TDH(j);
1643 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1644 /* Disable Tx Head Writeback RO bit, since this hoses
1645 * bookkeeping if things aren't delivered in order.
1647 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1648 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1649 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1651 if (hw->mac.type == ixgbe_mac_82599EB) {
1652 /* We enable 8 traffic classes, DCB only */
1653 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
1654 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA |
1655 IXGBE_MTQC_8TC_8TQ));
1659 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1661 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1663 struct ixgbe_ring *rx_ring;
1668 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1671 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1672 queue0 = index & mask;
1673 index = index & mask;
1676 rx_ring = &adapter->rx_ring[queue0];
1678 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1680 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1681 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1683 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1684 u16 bufsz = IXGBE_RXBUFFER_2048;
1685 /* grow the amount we can receive on large page machines */
1686 if (bufsz < (PAGE_SIZE / 2))
1687 bufsz = (PAGE_SIZE / 2);
1688 /* cap the bufsz at our largest descriptor size */
1689 bufsz = min((u16)IXGBE_MAX_RXBUFFER, bufsz);
1691 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1692 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1693 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1694 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1695 IXGBE_SRRCTL_BSIZEHDR_MASK);
1697 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1699 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1700 srrctl |= IXGBE_RXBUFFER_2048 >>
1701 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1703 srrctl |= rx_ring->rx_buf_len >>
1704 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1707 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1711 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1712 * @adapter: board private structure
1714 * Configure the Rx unit of the MAC after a reset.
1716 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1719 struct ixgbe_hw *hw = &adapter->hw;
1720 struct net_device *netdev = adapter->netdev;
1721 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1723 u32 rdlen, rxctrl, rxcsum;
1724 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1725 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1726 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1728 u32 reta = 0, mrqc = 0;
1732 /* Decide whether to use packet split mode or not */
1733 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1735 /* Set the RX buffer length according to the mode */
1736 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1737 rx_buf_len = IXGBE_RX_HDR_SIZE;
1738 if (hw->mac.type == ixgbe_mac_82599EB) {
1739 /* PSRTYPE must be initialized in 82599 */
1740 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1741 IXGBE_PSRTYPE_UDPHDR |
1742 IXGBE_PSRTYPE_IPV4HDR |
1743 IXGBE_PSRTYPE_IPV6HDR;
1744 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
1747 if (netdev->mtu <= ETH_DATA_LEN)
1748 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1750 rx_buf_len = ALIGN(max_frame, 1024);
1753 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1754 fctrl |= IXGBE_FCTRL_BAM;
1755 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1756 fctrl |= IXGBE_FCTRL_PMCF;
1757 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1759 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1760 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1761 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1763 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1764 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1766 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1767 /* disable receives while setting up the descriptors */
1768 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1769 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1771 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1772 * the Base and Length of the Rx Descriptor Ring */
1773 for (i = 0; i < adapter->num_rx_queues; i++) {
1774 rdba = adapter->rx_ring[i].dma;
1775 j = adapter->rx_ring[i].reg_idx;
1776 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1777 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1778 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1779 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1780 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1781 adapter->rx_ring[i].head = IXGBE_RDH(j);
1782 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1783 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1785 ixgbe_configure_srrctl(adapter, j);
1788 if (hw->mac.type == ixgbe_mac_82598EB) {
1790 * For VMDq support of different descriptor types or
1791 * buffer sizes through the use of multiple SRRCTL
1792 * registers, RDRXCTL.MVMEN must be set to 1
1794 * also, the manual doesn't mention it clearly but DCA hints
1795 * will only use queue 0's tags unless this bit is set. Side
1796 * effects of setting this bit are only that SRRCTL must be
1797 * fully programmed [0..15]
1799 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1800 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1801 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1804 /* Program MRQC for the distribution of queues */
1805 if (hw->mac.type == ixgbe_mac_82599EB) {
1806 int mask = adapter->flags & (
1807 IXGBE_FLAG_RSS_ENABLED
1808 | IXGBE_FLAG_DCB_ENABLED
1812 case (IXGBE_FLAG_RSS_ENABLED):
1813 mrqc = IXGBE_MRQC_RSSEN;
1815 case (IXGBE_FLAG_DCB_ENABLED):
1816 mrqc = IXGBE_MRQC_RT8TCEN;
1822 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1823 /* Fill out redirection table */
1824 for (i = 0, j = 0; i < 128; i++, j++) {
1825 if (j == adapter->ring_feature[RING_F_RSS].indices)
1827 /* reta = 4-byte sliding window of
1828 * 0x00..(indices-1)(indices-1)00..etc. */
1829 reta = (reta << 8) | (j * 0x11);
1831 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1834 /* Fill out hash function seeds */
1835 for (i = 0; i < 10; i++)
1836 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1838 if (hw->mac.type == ixgbe_mac_82598EB)
1839 mrqc |= IXGBE_MRQC_RSSEN;
1840 /* Perform hash on these packet types */
1841 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
1842 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1843 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1844 | IXGBE_MRQC_RSS_FIELD_IPV6
1845 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1846 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
1848 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1850 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1852 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1853 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1854 /* Disable indicating checksum in descriptor, enables
1856 rxcsum |= IXGBE_RXCSUM_PCSD;
1858 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1859 /* Enable IPv4 payload checksum for UDP fragments
1860 * if PCSD is not set */
1861 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1864 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1866 if (hw->mac.type == ixgbe_mac_82599EB) {
1867 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1868 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
1869 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1873 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1875 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1876 struct ixgbe_hw *hw = &adapter->hw;
1878 /* add VID to filter table */
1879 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1882 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1884 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1885 struct ixgbe_hw *hw = &adapter->hw;
1887 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1888 ixgbe_irq_disable(adapter);
1890 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1892 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1893 ixgbe_irq_enable(adapter);
1895 /* remove VID from filter table */
1896 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1899 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1900 struct vlan_group *grp)
1902 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1906 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1907 ixgbe_irq_disable(adapter);
1908 adapter->vlgrp = grp;
1911 * For a DCB driver, always enable VLAN tag stripping so we can
1912 * still receive traffic from a DCB-enabled host even if we're
1915 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1916 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1917 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1918 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1919 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1920 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1921 ctrl |= IXGBE_VLNCTRL_VFE;
1922 /* enable VLAN tag insert/strip */
1923 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1924 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1925 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1926 for (i = 0; i < adapter->num_rx_queues; i++) {
1927 j = adapter->rx_ring[i].reg_idx;
1928 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(j));
1929 ctrl |= IXGBE_RXDCTL_VME;
1930 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(j), ctrl);
1933 ixgbe_vlan_rx_add_vid(netdev, 0);
1935 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1936 ixgbe_irq_enable(adapter);
1939 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1941 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1943 if (adapter->vlgrp) {
1945 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1946 if (!vlan_group_get_device(adapter->vlgrp, vid))
1948 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1953 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1955 struct dev_mc_list *mc_ptr;
1956 u8 *addr = *mc_addr_ptr;
1959 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1961 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1963 *mc_addr_ptr = NULL;
1969 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1970 * @netdev: network interface device structure
1972 * The set_rx_method entry point is called whenever the unicast/multicast
1973 * address list or the network interface flags are updated. This routine is
1974 * responsible for configuring the hardware for proper unicast, multicast and
1977 static void ixgbe_set_rx_mode(struct net_device *netdev)
1979 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1980 struct ixgbe_hw *hw = &adapter->hw;
1982 u8 *addr_list = NULL;
1985 /* Check for Promiscuous and All Multicast modes */
1987 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1988 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1990 if (netdev->flags & IFF_PROMISC) {
1991 hw->addr_ctrl.user_set_promisc = 1;
1992 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1993 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1995 if (netdev->flags & IFF_ALLMULTI) {
1996 fctrl |= IXGBE_FCTRL_MPE;
1997 fctrl &= ~IXGBE_FCTRL_UPE;
1999 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2001 vlnctrl |= IXGBE_VLNCTRL_VFE;
2002 hw->addr_ctrl.user_set_promisc = 0;
2005 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
2006 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2008 /* reprogram secondary unicast list */
2009 addr_count = netdev->uc_count;
2011 addr_list = netdev->uc_list->dmi_addr;
2012 hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
2013 ixgbe_addr_list_itr);
2015 /* reprogram multicast list */
2016 addr_count = netdev->mc_count;
2018 addr_list = netdev->mc_list->dmi_addr;
2019 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
2020 ixgbe_addr_list_itr);
2023 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
2026 struct ixgbe_q_vector *q_vector;
2027 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2029 /* legacy and MSI only use one vector */
2030 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2033 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2034 struct napi_struct *napi;
2035 q_vector = &adapter->q_vector[q_idx];
2036 if (!q_vector->rxr_count)
2038 napi = &q_vector->napi;
2039 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
2040 (q_vector->rxr_count > 1))
2041 napi->poll = &ixgbe_clean_rxonly_many;
2047 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
2050 struct ixgbe_q_vector *q_vector;
2051 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2053 /* legacy and MSI only use one vector */
2054 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2057 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2058 q_vector = &adapter->q_vector[q_idx];
2059 if (!q_vector->rxr_count)
2061 napi_disable(&q_vector->napi);
2065 #ifdef CONFIG_IXGBE_DCB
2067 * ixgbe_configure_dcb - Configure DCB hardware
2068 * @adapter: ixgbe adapter struct
2070 * This is called by the driver on open to configure the DCB hardware.
2071 * This is also called by the gennetlink interface when reconfiguring
2074 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
2076 struct ixgbe_hw *hw = &adapter->hw;
2077 u32 txdctl, vlnctrl;
2080 ixgbe_dcb_check_config(&adapter->dcb_cfg);
2081 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
2082 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
2084 /* reconfigure the hardware */
2085 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
2087 for (i = 0; i < adapter->num_tx_queues; i++) {
2088 j = adapter->tx_ring[i].reg_idx;
2089 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2090 /* PThresh workaround for Tx hang with DFP enabled. */
2092 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2094 /* Enable VLAN tag insert/strip */
2095 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2096 if (hw->mac.type == ixgbe_mac_82598EB) {
2097 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
2098 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2099 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2100 } else if (hw->mac.type == ixgbe_mac_82599EB) {
2101 vlnctrl |= IXGBE_VLNCTRL_VFE;
2102 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2103 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2104 for (i = 0; i < adapter->num_rx_queues; i++) {
2105 j = adapter->rx_ring[i].reg_idx;
2106 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2107 vlnctrl |= IXGBE_RXDCTL_VME;
2108 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
2111 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
2115 static void ixgbe_configure(struct ixgbe_adapter *adapter)
2117 struct net_device *netdev = adapter->netdev;
2120 ixgbe_set_rx_mode(netdev);
2122 ixgbe_restore_vlan(adapter);
2123 #ifdef CONFIG_IXGBE_DCB
2124 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2125 netif_set_gso_max_size(netdev, 32768);
2126 ixgbe_configure_dcb(adapter);
2128 netif_set_gso_max_size(netdev, 65536);
2131 netif_set_gso_max_size(netdev, 65536);
2134 ixgbe_configure_tx(adapter);
2135 ixgbe_configure_rx(adapter);
2136 for (i = 0; i < adapter->num_rx_queues; i++)
2137 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
2138 (adapter->rx_ring[i].count - 1));
2141 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2143 switch (hw->phy.type) {
2144 case ixgbe_phy_sfp_avago:
2145 case ixgbe_phy_sfp_ftl:
2146 case ixgbe_phy_sfp_intel:
2147 case ixgbe_phy_sfp_unknown:
2148 case ixgbe_phy_tw_tyco:
2149 case ixgbe_phy_tw_unknown:
2157 * ixgbe_sfp_link_config - set up SFP+ link
2158 * @adapter: pointer to private adapter struct
2160 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
2162 struct ixgbe_hw *hw = &adapter->hw;
2164 if (hw->phy.multispeed_fiber) {
2166 * In multispeed fiber setups, the device may not have
2167 * had a physical connection when the driver loaded.
2168 * If that's the case, the initial link configuration
2169 * couldn't get the MAC into 10G or 1G mode, so we'll
2170 * never have a link status change interrupt fire.
2171 * We need to try and force an autonegotiation
2172 * session, then bring up link.
2174 hw->mac.ops.setup_sfp(hw);
2175 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
2176 schedule_work(&adapter->multispeed_fiber_task);
2179 * Direct Attach Cu and non-multispeed fiber modules
2180 * still need to be configured properly prior to
2183 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_MOD_TASK))
2184 schedule_work(&adapter->sfp_config_module_task);
2189 * ixgbe_non_sfp_link_config - set up non-SFP+ link
2190 * @hw: pointer to private hardware struct
2192 * Returns 0 on success, negative on failure
2194 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
2197 bool link_up = false;
2198 u32 ret = IXGBE_ERR_LINK_SETUP;
2200 if (hw->mac.ops.check_link)
2201 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2206 if (hw->mac.ops.get_link_capabilities)
2207 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
2212 if (hw->mac.ops.setup_link_speed)
2213 ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, link_up);
2218 #define IXGBE_MAX_RX_DESC_POLL 10
2219 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2222 int j = adapter->rx_ring[rxr].reg_idx;
2225 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
2226 if (IXGBE_READ_REG(&adapter->hw,
2227 IXGBE_RXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
2232 if (k >= IXGBE_MAX_RX_DESC_POLL) {
2233 DPRINTK(DRV, ERR, "RXDCTL.ENABLE on Rx queue %d "
2234 "not set within the polling period\n", rxr);
2236 ixgbe_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
2237 (adapter->rx_ring[rxr].count - 1));
2240 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
2242 struct net_device *netdev = adapter->netdev;
2243 struct ixgbe_hw *hw = &adapter->hw;
2245 int num_rx_rings = adapter->num_rx_queues;
2247 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2248 u32 txdctl, rxdctl, mhadd;
2252 ixgbe_get_hw_control(adapter);
2254 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2255 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
2256 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2257 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
2258 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
2263 /* XXX: to interrupt immediately for EICS writes, enable this */
2264 /* gpie |= IXGBE_GPIE_EIMEN; */
2265 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2268 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2269 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2270 * specifically only auto mask tx and rx interrupts */
2271 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2274 /* Enable fan failure interrupt if media type is copper */
2275 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2276 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2277 gpie |= IXGBE_SDP1_GPIEN;
2278 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2281 if (hw->mac.type == ixgbe_mac_82599EB) {
2282 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2283 gpie |= IXGBE_SDP1_GPIEN;
2284 gpie |= IXGBE_SDP2_GPIEN;
2285 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2288 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2289 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2290 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2291 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2293 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2296 for (i = 0; i < adapter->num_tx_queues; i++) {
2297 j = adapter->tx_ring[i].reg_idx;
2298 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2299 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2300 txdctl |= (8 << 16);
2301 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2304 if (hw->mac.type == ixgbe_mac_82599EB) {
2305 /* DMATXCTL.EN must be set after all Tx queue config is done */
2306 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2307 dmatxctl |= IXGBE_DMATXCTL_TE;
2308 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2310 for (i = 0; i < adapter->num_tx_queues; i++) {
2311 j = adapter->tx_ring[i].reg_idx;
2312 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2313 txdctl |= IXGBE_TXDCTL_ENABLE;
2314 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2317 for (i = 0; i < num_rx_rings; i++) {
2318 j = adapter->rx_ring[i].reg_idx;
2319 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2320 /* enable PTHRESH=32 descriptors (half the internal cache)
2321 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2322 * this also removes a pesky rx_no_buffer_count increment */
2324 rxdctl |= IXGBE_RXDCTL_ENABLE;
2325 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2326 if (hw->mac.type == ixgbe_mac_82599EB)
2327 ixgbe_rx_desc_queue_enable(adapter, i);
2329 /* enable all receives */
2330 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2331 if (hw->mac.type == ixgbe_mac_82598EB)
2332 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2334 rxdctl |= IXGBE_RXCTRL_RXEN;
2335 hw->mac.ops.enable_rx_dma(hw, rxdctl);
2337 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2338 ixgbe_configure_msix(adapter);
2340 ixgbe_configure_msi_and_legacy(adapter);
2342 clear_bit(__IXGBE_DOWN, &adapter->state);
2343 ixgbe_napi_enable_all(adapter);
2345 /* clear any pending interrupts, may auto mask */
2346 IXGBE_READ_REG(hw, IXGBE_EICR);
2348 ixgbe_irq_enable(adapter);
2351 * For hot-pluggable SFP+ devices, a new SFP+ module may have
2352 * arrived before interrupts were enabled. We need to kick off
2353 * the SFP+ module setup first, then try to bring up link.
2354 * If we're not hot-pluggable SFP+, we just need to configure link
2357 err = hw->phy.ops.identify(hw);
2358 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2359 DPRINTK(PROBE, ERR, "PHY not supported on this NIC %d\n", err);
2360 ixgbe_down(adapter);
2364 if (ixgbe_is_sfp(hw)) {
2365 ixgbe_sfp_link_config(adapter);
2367 err = ixgbe_non_sfp_link_config(hw);
2369 DPRINTK(PROBE, ERR, "link_config FAILED %d\n", err);
2372 /* enable transmits */
2373 netif_tx_start_all_queues(netdev);
2375 /* bring the link up in the watchdog, this could race with our first
2376 * link up interrupt but shouldn't be a problem */
2377 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2378 adapter->link_check_timeout = jiffies;
2379 mod_timer(&adapter->watchdog_timer, jiffies);
2383 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2385 WARN_ON(in_interrupt());
2386 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2388 ixgbe_down(adapter);
2390 clear_bit(__IXGBE_RESETTING, &adapter->state);
2393 int ixgbe_up(struct ixgbe_adapter *adapter)
2395 /* hardware has been reset, we need to reload some things */
2396 ixgbe_configure(adapter);
2398 ixgbe_napi_add_all(adapter);
2400 return ixgbe_up_complete(adapter);
2403 void ixgbe_reset(struct ixgbe_adapter *adapter)
2405 struct ixgbe_hw *hw = &adapter->hw;
2406 if (hw->mac.ops.init_hw(hw))
2407 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2409 /* reprogram the RAR[0] in case user changed it. */
2410 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2415 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2416 * @adapter: board private structure
2417 * @rx_ring: ring to free buffers from
2419 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2420 struct ixgbe_ring *rx_ring)
2422 struct pci_dev *pdev = adapter->pdev;
2426 /* Free all the Rx ring sk_buffs */
2428 for (i = 0; i < rx_ring->count; i++) {
2429 struct ixgbe_rx_buffer *rx_buffer_info;
2431 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2432 if (rx_buffer_info->dma) {
2433 pci_unmap_single(pdev, rx_buffer_info->dma,
2434 rx_ring->rx_buf_len,
2435 PCI_DMA_FROMDEVICE);
2436 rx_buffer_info->dma = 0;
2438 if (rx_buffer_info->skb) {
2439 dev_kfree_skb(rx_buffer_info->skb);
2440 rx_buffer_info->skb = NULL;
2442 if (!rx_buffer_info->page)
2444 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2445 PCI_DMA_FROMDEVICE);
2446 rx_buffer_info->page_dma = 0;
2447 put_page(rx_buffer_info->page);
2448 rx_buffer_info->page = NULL;
2449 rx_buffer_info->page_offset = 0;
2452 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2453 memset(rx_ring->rx_buffer_info, 0, size);
2455 /* Zero out the descriptor ring */
2456 memset(rx_ring->desc, 0, rx_ring->size);
2458 rx_ring->next_to_clean = 0;
2459 rx_ring->next_to_use = 0;
2462 writel(0, adapter->hw.hw_addr + rx_ring->head);
2464 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2468 * ixgbe_clean_tx_ring - Free Tx Buffers
2469 * @adapter: board private structure
2470 * @tx_ring: ring to be cleaned
2472 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2473 struct ixgbe_ring *tx_ring)
2475 struct ixgbe_tx_buffer *tx_buffer_info;
2479 /* Free all the Tx ring sk_buffs */
2481 for (i = 0; i < tx_ring->count; i++) {
2482 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2483 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2486 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2487 memset(tx_ring->tx_buffer_info, 0, size);
2489 /* Zero out the descriptor ring */
2490 memset(tx_ring->desc, 0, tx_ring->size);
2492 tx_ring->next_to_use = 0;
2493 tx_ring->next_to_clean = 0;
2496 writel(0, adapter->hw.hw_addr + tx_ring->head);
2498 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2502 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2503 * @adapter: board private structure
2505 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2509 for (i = 0; i < adapter->num_rx_queues; i++)
2510 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2514 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2515 * @adapter: board private structure
2517 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2521 for (i = 0; i < adapter->num_tx_queues; i++)
2522 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2525 void ixgbe_down(struct ixgbe_adapter *adapter)
2527 struct net_device *netdev = adapter->netdev;
2528 struct ixgbe_hw *hw = &adapter->hw;
2533 /* signal that we are down to the interrupt handler */
2534 set_bit(__IXGBE_DOWN, &adapter->state);
2536 /* disable receives */
2537 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2538 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2540 netif_tx_disable(netdev);
2542 IXGBE_WRITE_FLUSH(hw);
2545 netif_tx_stop_all_queues(netdev);
2547 ixgbe_irq_disable(adapter);
2549 ixgbe_napi_disable_all(adapter);
2551 del_timer_sync(&adapter->watchdog_timer);
2552 cancel_work_sync(&adapter->watchdog_task);
2554 /* disable transmits in the hardware now that interrupts are off */
2555 for (i = 0; i < adapter->num_tx_queues; i++) {
2556 j = adapter->tx_ring[i].reg_idx;
2557 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2558 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2559 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2561 /* Disable the Tx DMA engine on 82599 */
2562 if (hw->mac.type == ixgbe_mac_82599EB)
2563 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
2564 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
2565 ~IXGBE_DMATXCTL_TE));
2567 netif_carrier_off(netdev);
2569 #ifdef CONFIG_IXGBE_DCA
2570 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2571 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2572 dca_remove_requester(&adapter->pdev->dev);
2576 if (!pci_channel_offline(adapter->pdev))
2577 ixgbe_reset(adapter);
2578 ixgbe_clean_all_tx_rings(adapter);
2579 ixgbe_clean_all_rx_rings(adapter);
2581 #ifdef CONFIG_IXGBE_DCA
2582 /* since we reset the hardware DCA settings were cleared */
2583 if (dca_add_requester(&adapter->pdev->dev) == 0) {
2584 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2585 /* always use CB2 mode, difference is masked
2586 * in the CB driver */
2587 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2588 ixgbe_setup_dca(adapter);
2594 * ixgbe_poll - NAPI Rx polling callback
2595 * @napi: structure for representing this polling device
2596 * @budget: how many packets driver is allowed to clean
2598 * This function is used for legacy and MSI, NAPI mode
2600 static int ixgbe_poll(struct napi_struct *napi, int budget)
2602 struct ixgbe_q_vector *q_vector =
2603 container_of(napi, struct ixgbe_q_vector, napi);
2604 struct ixgbe_adapter *adapter = q_vector->adapter;
2605 int tx_clean_complete, work_done = 0;
2607 #ifdef CONFIG_IXGBE_DCA
2608 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2609 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2610 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2614 tx_clean_complete = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2615 ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
2617 if (!tx_clean_complete)
2620 /* If budget not fully consumed, exit the polling mode */
2621 if (work_done < budget) {
2622 napi_complete(napi);
2623 if (adapter->itr_setting & 1)
2624 ixgbe_set_itr(adapter);
2625 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2626 ixgbe_irq_enable(adapter);
2632 * ixgbe_tx_timeout - Respond to a Tx Hang
2633 * @netdev: network interface device structure
2635 static void ixgbe_tx_timeout(struct net_device *netdev)
2637 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2639 /* Do the reset outside of interrupt context */
2640 schedule_work(&adapter->reset_task);
2643 static void ixgbe_reset_task(struct work_struct *work)
2645 struct ixgbe_adapter *adapter;
2646 adapter = container_of(work, struct ixgbe_adapter, reset_task);
2648 /* If we're already down or resetting, just bail */
2649 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2650 test_bit(__IXGBE_RESETTING, &adapter->state))
2653 adapter->tx_timeout_count++;
2655 ixgbe_reinit_locked(adapter);
2658 #ifdef CONFIG_IXGBE_DCB
2659 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
2663 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2664 adapter->ring_feature[RING_F_DCB].mask = 0x7 << 3;
2665 adapter->num_rx_queues =
2666 adapter->ring_feature[RING_F_DCB].indices;
2667 adapter->num_tx_queues =
2668 adapter->ring_feature[RING_F_DCB].indices;
2678 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
2682 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2683 adapter->ring_feature[RING_F_RSS].mask = 0xF;
2684 adapter->num_rx_queues =
2685 adapter->ring_feature[RING_F_RSS].indices;
2686 adapter->num_tx_queues =
2687 adapter->ring_feature[RING_F_RSS].indices;
2696 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2698 /* Start with base case */
2699 adapter->num_rx_queues = 1;
2700 adapter->num_tx_queues = 1;
2702 #ifdef CONFIG_IXGBE_DCB
2703 if (ixgbe_set_dcb_queues(adapter))
2707 if (ixgbe_set_rss_queues(adapter))
2711 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2714 int err, vector_threshold;
2716 /* We'll want at least 3 (vector_threshold):
2719 * 3) Other (Link Status Change, etc.)
2720 * 4) TCP Timer (optional)
2722 vector_threshold = MIN_MSIX_COUNT;
2724 /* The more we get, the more we will assign to Tx/Rx Cleanup
2725 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2726 * Right now, we simply care about how many we'll get; we'll
2727 * set them up later while requesting irq's.
2729 while (vectors >= vector_threshold) {
2730 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2732 if (!err) /* Success in acquiring all requested vectors. */
2735 vectors = 0; /* Nasty failure, quit now */
2736 else /* err == number of vectors we should try again with */
2740 if (vectors < vector_threshold) {
2741 /* Can't allocate enough MSI-X interrupts? Oh well.
2742 * This just means we'll go with either a single MSI
2743 * vector or fall back to legacy interrupts.
2745 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2746 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2747 kfree(adapter->msix_entries);
2748 adapter->msix_entries = NULL;
2749 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2750 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2751 ixgbe_set_num_queues(adapter);
2753 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2755 * Adjust for only the vectors we'll use, which is minimum
2756 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2757 * vectors we were allocated.
2759 adapter->num_msix_vectors = min(vectors,
2760 adapter->max_msix_q_vectors + NON_Q_VECTORS);
2765 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
2766 * @adapter: board private structure to initialize
2768 * Cache the descriptor ring offsets for RSS to the assigned rings.
2771 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
2776 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2777 for (i = 0; i < adapter->num_rx_queues; i++)
2778 adapter->rx_ring[i].reg_idx = i;
2779 for (i = 0; i < adapter->num_tx_queues; i++)
2780 adapter->tx_ring[i].reg_idx = i;
2789 #ifdef CONFIG_IXGBE_DCB
2791 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
2792 * @adapter: board private structure to initialize
2794 * Cache the descriptor ring offsets for DCB to the assigned rings.
2797 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
2801 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2803 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2804 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2805 /* the number of queues is assumed to be symmetric */
2806 for (i = 0; i < dcb_i; i++) {
2807 adapter->rx_ring[i].reg_idx = i << 3;
2808 adapter->tx_ring[i].reg_idx = i << 2;
2811 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
2812 for (i = 0; i < dcb_i; i++) {
2813 adapter->rx_ring[i].reg_idx = i << 4;
2814 adapter->tx_ring[i].reg_idx = i << 4;
2829 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2830 * @adapter: board private structure to initialize
2832 * Once we know the feature-set enabled for the device, we'll cache
2833 * the register offset the descriptor ring is assigned to.
2835 * Note, the order the various feature calls is important. It must start with
2836 * the "most" features enabled at the same time, then trickle down to the
2837 * least amount of features turned on at once.
2839 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2841 /* start with default case */
2842 adapter->rx_ring[0].reg_idx = 0;
2843 adapter->tx_ring[0].reg_idx = 0;
2845 #ifdef CONFIG_IXGBE_DCB
2846 if (ixgbe_cache_ring_dcb(adapter))
2850 if (ixgbe_cache_ring_rss(adapter))
2855 * ixgbe_alloc_queues - Allocate memory for all rings
2856 * @adapter: board private structure to initialize
2858 * We allocate one ring per queue at run-time since we don't know the
2859 * number of queues at compile-time.
2861 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2865 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2866 sizeof(struct ixgbe_ring), GFP_KERNEL);
2867 if (!adapter->tx_ring)
2868 goto err_tx_ring_allocation;
2870 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2871 sizeof(struct ixgbe_ring), GFP_KERNEL);
2872 if (!adapter->rx_ring)
2873 goto err_rx_ring_allocation;
2875 for (i = 0; i < adapter->num_tx_queues; i++) {
2876 adapter->tx_ring[i].count = adapter->tx_ring_count;
2877 adapter->tx_ring[i].queue_index = i;
2880 for (i = 0; i < adapter->num_rx_queues; i++) {
2881 adapter->rx_ring[i].count = adapter->rx_ring_count;
2882 adapter->rx_ring[i].queue_index = i;
2885 ixgbe_cache_ring_register(adapter);
2889 err_rx_ring_allocation:
2890 kfree(adapter->tx_ring);
2891 err_tx_ring_allocation:
2896 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2897 * @adapter: board private structure to initialize
2899 * Attempt to configure the interrupts using the best available
2900 * capabilities of the hardware and the kernel.
2902 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2905 int vector, v_budget;
2908 * It's easy to be greedy for MSI-X vectors, but it really
2909 * doesn't do us much good if we have a lot more vectors
2910 * than CPU's. So let's be conservative and only ask for
2911 * (roughly) twice the number of vectors as there are CPU's.
2913 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2914 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2917 * At the same time, hardware can only support a maximum of
2918 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2919 * we can easily reach upwards of 64 Rx descriptor queues and
2920 * 32 Tx queues. Thus, we cap it off in those rare cases where
2921 * the cpu count also exceeds our vector limit.
2923 v_budget = min(v_budget, MAX_MSIX_COUNT);
2925 /* A failure in MSI-X entry allocation isn't fatal, but it does
2926 * mean we disable MSI-X capabilities of the adapter. */
2927 adapter->msix_entries = kcalloc(v_budget,
2928 sizeof(struct msix_entry), GFP_KERNEL);
2929 if (!adapter->msix_entries) {
2930 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2931 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2932 ixgbe_set_num_queues(adapter);
2933 kfree(adapter->tx_ring);
2934 kfree(adapter->rx_ring);
2935 err = ixgbe_alloc_queues(adapter);
2937 DPRINTK(PROBE, ERR, "Unable to allocate memory "
2945 for (vector = 0; vector < v_budget; vector++)
2946 adapter->msix_entries[vector].entry = vector;
2948 ixgbe_acquire_msix_vectors(adapter, v_budget);
2950 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2954 err = pci_enable_msi(adapter->pdev);
2956 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2958 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2959 "falling back to legacy. Error: %d\n", err);
2965 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2966 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2971 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2973 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2974 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2975 pci_disable_msix(adapter->pdev);
2976 kfree(adapter->msix_entries);
2977 adapter->msix_entries = NULL;
2978 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2979 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2980 pci_disable_msi(adapter->pdev);
2986 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2987 * @adapter: board private structure to initialize
2989 * We determine which interrupt scheme to use based on...
2990 * - Kernel support (MSI, MSI-X)
2991 * - which can be user-defined (via MODULE_PARAM)
2992 * - Hardware queue count (num_*_queues)
2993 * - defined by miscellaneous hardware support/features (RSS, etc.)
2995 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2999 /* Number of supported queues */
3000 ixgbe_set_num_queues(adapter);
3002 err = ixgbe_alloc_queues(adapter);
3004 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
3005 goto err_alloc_queues;
3008 err = ixgbe_set_interrupt_capability(adapter);
3010 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
3011 goto err_set_interrupt;
3014 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
3015 "Tx Queue count = %u\n",
3016 (adapter->num_rx_queues > 1) ? "Enabled" :
3017 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
3019 set_bit(__IXGBE_DOWN, &adapter->state);
3024 kfree(adapter->tx_ring);
3025 kfree(adapter->rx_ring);
3031 * ixgbe_sfp_timer - worker thread to find a missing module
3032 * @data: pointer to our adapter struct
3034 static void ixgbe_sfp_timer(unsigned long data)
3036 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3038 /* Do the sfp_timer outside of interrupt context due to the
3039 * delays that sfp+ detection requires
3041 schedule_work(&adapter->sfp_task);
3045 * ixgbe_sfp_task - worker thread to find a missing module
3046 * @work: pointer to work_struct containing our data
3048 static void ixgbe_sfp_task(struct work_struct *work)
3050 struct ixgbe_adapter *adapter = container_of(work,
3051 struct ixgbe_adapter,
3053 struct ixgbe_hw *hw = &adapter->hw;
3055 if ((hw->phy.type == ixgbe_phy_nl) &&
3056 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
3057 s32 ret = hw->phy.ops.identify_sfp(hw);
3060 ret = hw->phy.ops.reset(hw);
3061 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3062 DPRINTK(PROBE, ERR, "failed to initialize because an "
3063 "unsupported SFP+ module type was detected.\n"
3064 "Reload the driver after installing a "
3065 "supported module.\n");
3066 unregister_netdev(adapter->netdev);
3068 DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
3071 /* don't need this routine any more */
3072 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
3076 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
3077 mod_timer(&adapter->sfp_timer,
3078 round_jiffies(jiffies + (2 * HZ)));
3082 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
3083 * @adapter: board private structure to initialize
3085 * ixgbe_sw_init initializes the Adapter private data structure.
3086 * Fields are initialized based on PCI device information and
3087 * OS network device settings (MTU size).
3089 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
3091 struct ixgbe_hw *hw = &adapter->hw;
3092 struct pci_dev *pdev = adapter->pdev;
3094 #ifdef CONFIG_IXGBE_DCB
3096 struct tc_configuration *tc;
3099 /* PCI config space info */
3101 hw->vendor_id = pdev->vendor;
3102 hw->device_id = pdev->device;
3103 hw->revision_id = pdev->revision;
3104 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3105 hw->subsystem_device_id = pdev->subsystem_device;
3107 /* Set capability flags */
3108 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
3109 adapter->ring_feature[RING_F_RSS].indices = rss;
3110 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
3111 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
3112 if (hw->mac.type == ixgbe_mac_82598EB)
3113 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
3114 else if (hw->mac.type == ixgbe_mac_82599EB)
3115 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
3117 #ifdef CONFIG_IXGBE_DCB
3118 /* Configure DCB traffic classes */
3119 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
3120 tc = &adapter->dcb_cfg.tc_config[j];
3121 tc->path[DCB_TX_CONFIG].bwg_id = 0;
3122 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
3123 tc->path[DCB_RX_CONFIG].bwg_id = 0;
3124 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
3125 tc->dcb_pfc = pfc_disabled;
3127 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
3128 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
3129 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
3130 adapter->dcb_cfg.round_robin_enable = false;
3131 adapter->dcb_set_bitmap = 0x00;
3132 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
3133 adapter->ring_feature[RING_F_DCB].indices);
3137 /* default flow control settings */
3138 hw->fc.requested_mode = ixgbe_fc_none;
3139 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3140 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3141 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
3142 hw->fc.send_xon = true;
3144 /* enable itr by default in dynamic mode */
3145 adapter->itr_setting = 1;
3146 adapter->eitr_param = 20000;
3148 /* set defaults for eitr in MegaBytes */
3149 adapter->eitr_low = 10;
3150 adapter->eitr_high = 20;
3152 /* set default ring sizes */
3153 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
3154 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
3156 /* initialize eeprom parameters */
3157 if (ixgbe_init_eeprom_params_generic(hw)) {
3158 dev_err(&pdev->dev, "EEPROM initialization failed\n");
3162 /* enable rx csum by default */
3163 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
3165 set_bit(__IXGBE_DOWN, &adapter->state);
3171 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
3172 * @adapter: board private structure
3173 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3175 * Return 0 on success, negative on failure
3177 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
3178 struct ixgbe_ring *tx_ring)
3180 struct pci_dev *pdev = adapter->pdev;
3183 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
3184 tx_ring->tx_buffer_info = vmalloc(size);
3185 if (!tx_ring->tx_buffer_info)
3187 memset(tx_ring->tx_buffer_info, 0, size);
3189 /* round up to nearest 4K */
3190 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
3191 tx_ring->size = ALIGN(tx_ring->size, 4096);
3193 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
3198 tx_ring->next_to_use = 0;
3199 tx_ring->next_to_clean = 0;
3200 tx_ring->work_limit = tx_ring->count;
3204 vfree(tx_ring->tx_buffer_info);
3205 tx_ring->tx_buffer_info = NULL;
3206 DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
3207 "descriptor ring\n");
3212 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
3213 * @adapter: board private structure
3215 * If this function returns with an error, then it's possible one or
3216 * more of the rings is populated (while the rest are not). It is the
3217 * callers duty to clean those orphaned rings.
3219 * Return 0 on success, negative on failure
3221 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
3225 for (i = 0; i < adapter->num_tx_queues; i++) {
3226 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
3229 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
3237 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
3238 * @adapter: board private structure
3239 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3241 * Returns 0 on success, negative on failure
3243 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
3244 struct ixgbe_ring *rx_ring)
3246 struct pci_dev *pdev = adapter->pdev;
3249 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
3250 rx_ring->rx_buffer_info = vmalloc(size);
3251 if (!rx_ring->rx_buffer_info) {
3253 "vmalloc allocation failed for the rx desc ring\n");
3256 memset(rx_ring->rx_buffer_info, 0, size);
3258 /* Round up to nearest 4K */
3259 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3260 rx_ring->size = ALIGN(rx_ring->size, 4096);
3262 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
3264 if (!rx_ring->desc) {
3266 "Memory allocation failed for the rx desc ring\n");
3267 vfree(rx_ring->rx_buffer_info);
3271 rx_ring->next_to_clean = 0;
3272 rx_ring->next_to_use = 0;
3281 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
3282 * @adapter: board private structure
3284 * If this function returns with an error, then it's possible one or
3285 * more of the rings is populated (while the rest are not). It is the
3286 * callers duty to clean those orphaned rings.
3288 * Return 0 on success, negative on failure
3291 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
3295 for (i = 0; i < adapter->num_rx_queues; i++) {
3296 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
3299 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
3307 * ixgbe_free_tx_resources - Free Tx Resources per Queue
3308 * @adapter: board private structure
3309 * @tx_ring: Tx descriptor ring for a specific queue
3311 * Free all transmit software resources
3313 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
3314 struct ixgbe_ring *tx_ring)
3316 struct pci_dev *pdev = adapter->pdev;
3318 ixgbe_clean_tx_ring(adapter, tx_ring);
3320 vfree(tx_ring->tx_buffer_info);
3321 tx_ring->tx_buffer_info = NULL;
3323 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
3325 tx_ring->desc = NULL;
3329 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3330 * @adapter: board private structure
3332 * Free all transmit software resources
3334 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
3338 for (i = 0; i < adapter->num_tx_queues; i++)
3339 if (adapter->tx_ring[i].desc)
3340 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
3344 * ixgbe_free_rx_resources - Free Rx Resources
3345 * @adapter: board private structure
3346 * @rx_ring: ring to clean the resources from
3348 * Free all receive software resources
3350 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
3351 struct ixgbe_ring *rx_ring)
3353 struct pci_dev *pdev = adapter->pdev;
3355 ixgbe_clean_rx_ring(adapter, rx_ring);
3357 vfree(rx_ring->rx_buffer_info);
3358 rx_ring->rx_buffer_info = NULL;
3360 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3362 rx_ring->desc = NULL;
3366 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3367 * @adapter: board private structure
3369 * Free all receive software resources
3371 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3375 for (i = 0; i < adapter->num_rx_queues; i++)
3376 if (adapter->rx_ring[i].desc)
3377 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3381 * ixgbe_change_mtu - Change the Maximum Transfer Unit
3382 * @netdev: network interface device structure
3383 * @new_mtu: new value for maximum frame size
3385 * Returns 0 on success, negative on failure
3387 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3389 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3390 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3392 /* MTU < 68 is an error and causes problems on some kernels */
3393 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3396 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3397 netdev->mtu, new_mtu);
3398 /* must set new MTU before calling down or up */
3399 netdev->mtu = new_mtu;
3401 if (netif_running(netdev))
3402 ixgbe_reinit_locked(adapter);
3408 * ixgbe_open - Called when a network interface is made active
3409 * @netdev: network interface device structure
3411 * Returns 0 on success, negative value on failure
3413 * The open entry point is called when a network interface is made
3414 * active by the system (IFF_UP). At this point all resources needed
3415 * for transmit and receive operations are allocated, the interrupt
3416 * handler is registered with the OS, the watchdog timer is started,
3417 * and the stack is notified that the interface is ready.
3419 static int ixgbe_open(struct net_device *netdev)
3421 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3424 /* disallow open during test */
3425 if (test_bit(__IXGBE_TESTING, &adapter->state))
3428 /* allocate transmit descriptors */
3429 err = ixgbe_setup_all_tx_resources(adapter);
3433 /* allocate receive descriptors */
3434 err = ixgbe_setup_all_rx_resources(adapter);
3438 ixgbe_configure(adapter);
3440 ixgbe_napi_add_all(adapter);
3442 err = ixgbe_request_irq(adapter);
3446 err = ixgbe_up_complete(adapter);
3450 netif_tx_start_all_queues(netdev);
3455 ixgbe_release_hw_control(adapter);
3456 ixgbe_free_irq(adapter);
3458 ixgbe_free_all_rx_resources(adapter);
3460 ixgbe_free_all_tx_resources(adapter);
3462 ixgbe_reset(adapter);
3468 * ixgbe_close - Disables a network interface
3469 * @netdev: network interface device structure
3471 * Returns 0, this is not allowed to fail
3473 * The close entry point is called when an interface is de-activated
3474 * by the OS. The hardware is still under the drivers control, but
3475 * needs to be disabled. A global MAC reset is issued to stop the
3476 * hardware, and all transmit and receive resources are freed.
3478 static int ixgbe_close(struct net_device *netdev)
3480 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3482 ixgbe_down(adapter);
3483 ixgbe_free_irq(adapter);
3485 ixgbe_free_all_tx_resources(adapter);
3486 ixgbe_free_all_rx_resources(adapter);
3488 ixgbe_release_hw_control(adapter);
3494 * ixgbe_napi_add_all - prep napi structs for use
3495 * @adapter: private struct
3497 * helper function to napi_add each possible q_vector->napi
3499 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3501 int q_idx, q_vectors;
3502 struct net_device *netdev = adapter->netdev;
3503 int (*poll)(struct napi_struct *, int);
3505 /* check if we already have our netdev->napi_list populated */
3506 if (&netdev->napi_list != netdev->napi_list.next)
3509 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3510 poll = &ixgbe_clean_rxonly;
3511 /* Only enable as many vectors as we have rx queues. */
3512 q_vectors = adapter->num_rx_queues;
3515 /* only one q_vector for legacy modes */
3519 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3520 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3521 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3525 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3528 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3530 /* legacy and MSI only use one vector */
3531 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3534 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3535 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3536 if (!q_vector->rxr_count)
3538 netif_napi_del(&q_vector->napi);
3543 static int ixgbe_resume(struct pci_dev *pdev)
3545 struct net_device *netdev = pci_get_drvdata(pdev);
3546 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3549 pci_set_power_state(pdev, PCI_D0);
3550 pci_restore_state(pdev);
3551 err = pci_enable_device(pdev);
3553 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3557 pci_set_master(pdev);
3559 pci_enable_wake(pdev, PCI_D3hot, 0);
3560 pci_enable_wake(pdev, PCI_D3cold, 0);
3562 err = ixgbe_init_interrupt_scheme(adapter);
3564 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3569 ixgbe_reset(adapter);
3571 if (netif_running(netdev)) {
3572 err = ixgbe_open(adapter->netdev);
3577 netif_device_attach(netdev);
3582 #endif /* CONFIG_PM */
3583 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3585 struct net_device *netdev = pci_get_drvdata(pdev);
3586 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3587 struct ixgbe_hw *hw = &adapter->hw;
3589 u32 wufc = adapter->wol;
3594 netif_device_detach(netdev);
3596 if (netif_running(netdev)) {
3597 ixgbe_down(adapter);
3598 ixgbe_free_irq(adapter);
3599 ixgbe_free_all_tx_resources(adapter);
3600 ixgbe_free_all_rx_resources(adapter);
3602 ixgbe_reset_interrupt_capability(adapter);
3603 ixgbe_napi_del_all(adapter);
3604 INIT_LIST_HEAD(&netdev->napi_list);
3605 kfree(adapter->tx_ring);
3606 kfree(adapter->rx_ring);
3609 retval = pci_save_state(pdev);
3614 ixgbe_set_rx_mode(netdev);
3616 /* turn on all-multi mode if wake on multicast is enabled */
3617 if (wufc & IXGBE_WUFC_MC) {
3618 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3619 fctrl |= IXGBE_FCTRL_MPE;
3620 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3623 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
3624 ctrl |= IXGBE_CTRL_GIO_DIS;
3625 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
3627 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
3629 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
3630 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3633 if (wufc && hw->mac.type == ixgbe_mac_82599EB) {
3634 pci_enable_wake(pdev, PCI_D3hot, 1);
3635 pci_enable_wake(pdev, PCI_D3cold, 1);
3637 pci_enable_wake(pdev, PCI_D3hot, 0);
3638 pci_enable_wake(pdev, PCI_D3cold, 0);
3641 ixgbe_release_hw_control(adapter);
3643 pci_disable_device(pdev);
3645 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3650 static void ixgbe_shutdown(struct pci_dev *pdev)
3652 ixgbe_suspend(pdev, PMSG_SUSPEND);
3656 * ixgbe_update_stats - Update the board statistics counters.
3657 * @adapter: board private structure
3659 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3661 struct ixgbe_hw *hw = &adapter->hw;
3663 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3665 if (hw->mac.type == ixgbe_mac_82599EB) {
3666 for (i = 0; i < 16; i++)
3667 adapter->hw_rx_no_dma_resources +=
3668 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
3671 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3672 for (i = 0; i < 8; i++) {
3673 /* for packet buffers not used, the register should read 0 */
3674 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3676 adapter->stats.mpc[i] += mpc;
3677 total_mpc += adapter->stats.mpc[i];
3678 if (hw->mac.type == ixgbe_mac_82598EB)
3679 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3680 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3681 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3682 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3683 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3684 if (hw->mac.type == ixgbe_mac_82599EB) {
3685 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3686 IXGBE_PXONRXCNT(i));
3687 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3688 IXGBE_PXOFFRXCNT(i));
3689 adapter->stats.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
3691 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3693 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3696 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3698 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3701 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3702 /* work around hardware counting issue */
3703 adapter->stats.gprc -= missed_rx;
3705 /* 82598 hardware only has a 32 bit counter in the high register */
3706 if (hw->mac.type == ixgbe_mac_82599EB) {
3707 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
3708 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
3709 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
3710 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
3711 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL);
3712 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
3713 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
3714 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
3716 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3717 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3718 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3719 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3720 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3722 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3723 adapter->stats.bprc += bprc;
3724 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3725 if (hw->mac.type == ixgbe_mac_82598EB)
3726 adapter->stats.mprc -= bprc;
3727 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3728 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3729 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3730 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3731 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3732 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3733 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3734 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3735 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3736 adapter->stats.lxontxc += lxon;
3737 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3738 adapter->stats.lxofftxc += lxoff;
3739 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3740 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3741 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3743 * 82598 errata - tx of flow control packets is included in tx counters
3745 xon_off_tot = lxon + lxoff;
3746 adapter->stats.gptc -= xon_off_tot;
3747 adapter->stats.mptc -= xon_off_tot;
3748 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3749 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3750 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3751 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3752 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3753 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3754 adapter->stats.ptc64 -= xon_off_tot;
3755 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3756 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3757 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3758 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3759 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3760 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3762 /* Fill out the OS statistics structure */
3763 adapter->net_stats.multicast = adapter->stats.mprc;
3766 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3767 adapter->stats.rlec;
3768 adapter->net_stats.rx_dropped = 0;
3769 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3770 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3771 adapter->net_stats.rx_missed_errors = total_mpc;
3775 * ixgbe_watchdog - Timer Call-back
3776 * @data: pointer to adapter cast into an unsigned long
3778 static void ixgbe_watchdog(unsigned long data)
3780 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3781 struct ixgbe_hw *hw = &adapter->hw;
3783 /* Do the watchdog outside of interrupt context due to the lovely
3784 * delays that some of the newer hardware requires */
3785 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3786 /* Cause software interrupt to ensure rx rings are cleaned */
3787 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3789 (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3790 IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3792 /* For legacy and MSI interrupts don't set any bits that
3793 * are enabled for EIAM, because this operation would
3794 * set *both* EIMS and EICS for any bit in EIAM */
3795 IXGBE_WRITE_REG(hw, IXGBE_EICS,
3796 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3798 /* Reset the timer */
3799 mod_timer(&adapter->watchdog_timer,
3800 round_jiffies(jiffies + 2 * HZ));
3803 schedule_work(&adapter->watchdog_task);
3807 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
3808 * @work: pointer to work_struct containing our data
3810 static void ixgbe_multispeed_fiber_task(struct work_struct *work)
3812 struct ixgbe_adapter *adapter = container_of(work,
3813 struct ixgbe_adapter,
3814 multispeed_fiber_task);
3815 struct ixgbe_hw *hw = &adapter->hw;
3818 adapter->flags |= IXGBE_FLAG_IN_SFP_LINK_TASK;
3819 if (hw->mac.ops.get_link_capabilities)
3820 hw->mac.ops.get_link_capabilities(hw, &autoneg,
3822 if (hw->mac.ops.setup_link_speed)
3823 hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3824 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
3825 adapter->flags &= ~IXGBE_FLAG_IN_SFP_LINK_TASK;
3829 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
3830 * @work: pointer to work_struct containing our data
3832 static void ixgbe_sfp_config_module_task(struct work_struct *work)
3834 struct ixgbe_adapter *adapter = container_of(work,
3835 struct ixgbe_adapter,
3836 sfp_config_module_task);
3837 struct ixgbe_hw *hw = &adapter->hw;
3840 adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK;
3841 err = hw->phy.ops.identify_sfp(hw);
3842 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3843 DPRINTK(PROBE, ERR, "PHY not supported on this NIC %d\n", err);
3844 ixgbe_down(adapter);
3847 hw->mac.ops.setup_sfp(hw);
3849 if (!adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK)
3850 /* This will also work for DA Twinax connections */
3851 schedule_work(&adapter->multispeed_fiber_task);
3852 adapter->flags &= ~IXGBE_FLAG_IN_SFP_MOD_TASK;
3856 * ixgbe_watchdog_task - worker thread to bring link up
3857 * @work: pointer to work_struct containing our data
3859 static void ixgbe_watchdog_task(struct work_struct *work)
3861 struct ixgbe_adapter *adapter = container_of(work,
3862 struct ixgbe_adapter,
3864 struct net_device *netdev = adapter->netdev;
3865 struct ixgbe_hw *hw = &adapter->hw;
3866 u32 link_speed = adapter->link_speed;
3867 bool link_up = adapter->link_up;
3869 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3871 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3872 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3874 time_after(jiffies, (adapter->link_check_timeout +
3875 IXGBE_TRY_LINK_TIMEOUT))) {
3876 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3877 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3879 adapter->link_up = link_up;
3880 adapter->link_speed = link_speed;
3884 if (!netif_carrier_ok(netdev)) {
3885 bool flow_rx, flow_tx;
3887 if (hw->mac.type == ixgbe_mac_82599EB) {
3888 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
3889 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
3890 flow_rx = (mflcn & IXGBE_MFLCN_RFCE);
3891 flow_tx = (fccfg & IXGBE_FCCFG_TFCE_802_3X);
3893 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3894 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3895 flow_rx = (frctl & IXGBE_FCTRL_RFCE);
3896 flow_tx = (rmcs & IXGBE_RMCS_TFCE_802_3X);
3899 printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3900 "Flow Control: %s\n",
3902 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3904 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3905 "1 Gbps" : "unknown speed")),
3906 ((flow_rx && flow_tx) ? "RX/TX" :
3908 (flow_tx ? "TX" : "None"))));
3910 netif_carrier_on(netdev);
3912 /* Force detection of hung controller */
3913 adapter->detect_tx_hung = true;
3916 adapter->link_up = false;
3917 adapter->link_speed = 0;
3918 if (netif_carrier_ok(netdev)) {
3919 printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3921 netif_carrier_off(netdev);
3925 ixgbe_update_stats(adapter);
3926 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3929 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3930 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3931 u32 tx_flags, u8 *hdr_len)
3933 struct ixgbe_adv_tx_context_desc *context_desc;
3936 struct ixgbe_tx_buffer *tx_buffer_info;
3937 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3938 u32 mss_l4len_idx, l4len;
3940 if (skb_is_gso(skb)) {
3941 if (skb_header_cloned(skb)) {
3942 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3946 l4len = tcp_hdrlen(skb);
3949 if (skb->protocol == htons(ETH_P_IP)) {
3950 struct iphdr *iph = ip_hdr(skb);
3953 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3957 adapter->hw_tso_ctxt++;
3958 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3959 ipv6_hdr(skb)->payload_len = 0;
3960 tcp_hdr(skb)->check =
3961 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3962 &ipv6_hdr(skb)->daddr,
3964 adapter->hw_tso6_ctxt++;
3967 i = tx_ring->next_to_use;
3969 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3970 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3972 /* VLAN MACLEN IPLEN */
3973 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3975 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3976 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3977 IXGBE_ADVTXD_MACLEN_SHIFT);
3978 *hdr_len += skb_network_offset(skb);
3980 (skb_transport_header(skb) - skb_network_header(skb));
3982 (skb_transport_header(skb) - skb_network_header(skb));
3983 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3984 context_desc->seqnum_seed = 0;
3986 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3987 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3988 IXGBE_ADVTXD_DTYP_CTXT);
3990 if (skb->protocol == htons(ETH_P_IP))
3991 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3992 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3993 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3997 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3998 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3999 /* use index 1 for TSO */
4000 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
4001 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
4003 tx_buffer_info->time_stamp = jiffies;
4004 tx_buffer_info->next_to_watch = i;
4007 if (i == tx_ring->count)
4009 tx_ring->next_to_use = i;
4016 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
4017 struct ixgbe_ring *tx_ring,
4018 struct sk_buff *skb, u32 tx_flags)
4020 struct ixgbe_adv_tx_context_desc *context_desc;
4022 struct ixgbe_tx_buffer *tx_buffer_info;
4023 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
4025 if (skb->ip_summed == CHECKSUM_PARTIAL ||
4026 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
4027 i = tx_ring->next_to_use;
4028 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4029 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
4031 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
4033 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
4034 vlan_macip_lens |= (skb_network_offset(skb) <<
4035 IXGBE_ADVTXD_MACLEN_SHIFT);
4036 if (skb->ip_summed == CHECKSUM_PARTIAL)
4037 vlan_macip_lens |= (skb_transport_header(skb) -
4038 skb_network_header(skb));
4040 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4041 context_desc->seqnum_seed = 0;
4043 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
4044 IXGBE_ADVTXD_DTYP_CTXT);
4046 if (skb->ip_summed == CHECKSUM_PARTIAL) {
4047 switch (skb->protocol) {
4048 case cpu_to_be16(ETH_P_IP):
4049 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
4050 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4052 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4054 case cpu_to_be16(ETH_P_IPV6):
4055 /* XXX what about other V6 headers?? */
4056 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4058 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4061 if (unlikely(net_ratelimit())) {
4062 DPRINTK(PROBE, WARNING,
4063 "partial checksum but proto=%x!\n",
4070 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
4071 /* use index zero for tx checksum offload */
4072 context_desc->mss_l4len_idx = 0;
4074 tx_buffer_info->time_stamp = jiffies;
4075 tx_buffer_info->next_to_watch = i;
4077 adapter->hw_csum_tx_good++;
4079 if (i == tx_ring->count)
4081 tx_ring->next_to_use = i;
4089 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4090 struct ixgbe_ring *tx_ring,
4091 struct sk_buff *skb, unsigned int first)
4093 struct ixgbe_tx_buffer *tx_buffer_info;
4094 unsigned int len = skb->len;
4095 unsigned int offset = 0, size, count = 0, i;
4096 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
4099 len -= skb->data_len;
4101 i = tx_ring->next_to_use;
4104 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4105 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
4107 tx_buffer_info->length = size;
4108 tx_buffer_info->dma = pci_map_single(adapter->pdev,
4110 size, PCI_DMA_TODEVICE);
4111 tx_buffer_info->time_stamp = jiffies;
4112 tx_buffer_info->next_to_watch = i;
4118 if (i == tx_ring->count)
4122 for (f = 0; f < nr_frags; f++) {
4123 struct skb_frag_struct *frag;
4125 frag = &skb_shinfo(skb)->frags[f];
4127 offset = frag->page_offset;
4130 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4131 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
4133 tx_buffer_info->length = size;
4134 tx_buffer_info->dma = pci_map_page(adapter->pdev,
4139 tx_buffer_info->time_stamp = jiffies;
4140 tx_buffer_info->next_to_watch = i;
4146 if (i == tx_ring->count)
4151 i = tx_ring->count - 1;
4154 tx_ring->tx_buffer_info[i].skb = skb;
4155 tx_ring->tx_buffer_info[first].next_to_watch = i;
4160 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
4161 struct ixgbe_ring *tx_ring,
4162 int tx_flags, int count, u32 paylen, u8 hdr_len)
4164 union ixgbe_adv_tx_desc *tx_desc = NULL;
4165 struct ixgbe_tx_buffer *tx_buffer_info;
4166 u32 olinfo_status = 0, cmd_type_len = 0;
4168 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
4170 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
4172 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
4174 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
4175 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
4177 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
4178 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
4180 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
4181 IXGBE_ADVTXD_POPTS_SHIFT;
4183 /* use index 1 context for tso */
4184 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
4185 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
4186 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
4187 IXGBE_ADVTXD_POPTS_SHIFT;
4189 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
4190 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
4191 IXGBE_ADVTXD_POPTS_SHIFT;
4193 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
4195 i = tx_ring->next_to_use;
4197 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4198 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
4199 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
4200 tx_desc->read.cmd_type_len =
4201 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
4202 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4204 if (i == tx_ring->count)
4208 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
4211 * Force memory writes to complete before letting h/w
4212 * know there are new descriptors to fetch. (Only
4213 * applicable for weak-ordered memory model archs,
4218 tx_ring->next_to_use = i;
4219 writel(i, adapter->hw.hw_addr + tx_ring->tail);
4222 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
4223 struct ixgbe_ring *tx_ring, int size)
4225 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4227 netif_stop_subqueue(netdev, tx_ring->queue_index);
4228 /* Herbert's original patch had:
4229 * smp_mb__after_netif_stop_queue();
4230 * but since that doesn't exist yet, just open code it. */
4233 /* We need to check again in a case another CPU has just
4234 * made room available. */
4235 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
4238 /* A reprieve! - use start_queue because it doesn't call schedule */
4239 netif_start_subqueue(netdev, tx_ring->queue_index);
4240 ++adapter->restart_queue;
4244 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
4245 struct ixgbe_ring *tx_ring, int size)
4247 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
4249 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
4252 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4254 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4255 struct ixgbe_ring *tx_ring;
4257 unsigned int tx_flags = 0;
4263 r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
4264 tx_ring = &adapter->tx_ring[r_idx];
4266 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4267 tx_flags |= vlan_tx_tag_get(skb);
4268 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4269 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
4270 tx_flags |= (skb->queue_mapping << 13);
4272 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4273 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4274 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4275 tx_flags |= (skb->queue_mapping << 13);
4276 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4277 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4279 /* three things can cause us to need a context descriptor */
4280 if (skb_is_gso(skb) ||
4281 (skb->ip_summed == CHECKSUM_PARTIAL) ||
4282 (tx_flags & IXGBE_TX_FLAGS_VLAN))
4285 count += TXD_USE_COUNT(skb_headlen(skb));
4286 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4287 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4289 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
4291 return NETDEV_TX_BUSY;
4294 if (skb->protocol == htons(ETH_P_IP))
4295 tx_flags |= IXGBE_TX_FLAGS_IPV4;
4296 first = tx_ring->next_to_use;
4297 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
4299 dev_kfree_skb_any(skb);
4300 return NETDEV_TX_OK;
4304 tx_flags |= IXGBE_TX_FLAGS_TSO;
4305 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
4306 (skb->ip_summed == CHECKSUM_PARTIAL))
4307 tx_flags |= IXGBE_TX_FLAGS_CSUM;
4309 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
4310 ixgbe_tx_map(adapter, tx_ring, skb, first),
4313 netdev->trans_start = jiffies;
4315 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
4317 return NETDEV_TX_OK;
4321 * ixgbe_get_stats - Get System Network Statistics
4322 * @netdev: network interface device structure
4324 * Returns the address of the device statistics structure.
4325 * The statistics are actually updated from the timer callback.
4327 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
4329 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4331 /* only return the current stats */
4332 return &adapter->net_stats;
4336 * ixgbe_set_mac - Change the Ethernet Address of the NIC
4337 * @netdev: network interface device structure
4338 * @p: pointer to an address structure
4340 * Returns 0 on success, negative on failure
4342 static int ixgbe_set_mac(struct net_device *netdev, void *p)
4344 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4345 struct ixgbe_hw *hw = &adapter->hw;
4346 struct sockaddr *addr = p;
4348 if (!is_valid_ether_addr(addr->sa_data))
4349 return -EADDRNOTAVAIL;
4351 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4352 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4354 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
4359 #ifdef CONFIG_NET_POLL_CONTROLLER
4361 * Polling 'interrupt' - used by things like netconsole to send skbs
4362 * without having to re-enable interrupts. It's not called while
4363 * the interrupt routine is executing.
4365 static void ixgbe_netpoll(struct net_device *netdev)
4367 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4369 disable_irq(adapter->pdev->irq);
4370 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
4371 ixgbe_intr(adapter->pdev->irq, netdev);
4372 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
4373 enable_irq(adapter->pdev->irq);
4377 static const struct net_device_ops ixgbe_netdev_ops = {
4378 .ndo_open = ixgbe_open,
4379 .ndo_stop = ixgbe_close,
4380 .ndo_start_xmit = ixgbe_xmit_frame,
4381 .ndo_get_stats = ixgbe_get_stats,
4382 .ndo_set_multicast_list = ixgbe_set_rx_mode,
4383 .ndo_validate_addr = eth_validate_addr,
4384 .ndo_set_mac_address = ixgbe_set_mac,
4385 .ndo_change_mtu = ixgbe_change_mtu,
4386 .ndo_tx_timeout = ixgbe_tx_timeout,
4387 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
4388 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
4389 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
4390 #ifdef CONFIG_NET_POLL_CONTROLLER
4391 .ndo_poll_controller = ixgbe_netpoll,
4396 * ixgbe_probe - Device Initialization Routine
4397 * @pdev: PCI device information struct
4398 * @ent: entry in ixgbe_pci_tbl
4400 * Returns 0 on success, negative on failure
4402 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
4403 * The OS initialization, configuring of the adapter private structure,
4404 * and a hardware reset occur.
4406 static int __devinit ixgbe_probe(struct pci_dev *pdev,
4407 const struct pci_device_id *ent)
4409 struct net_device *netdev;
4410 struct ixgbe_adapter *adapter = NULL;
4411 struct ixgbe_hw *hw;
4412 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
4413 static int cards_found;
4414 int i, err, pci_using_dac;
4418 err = pci_enable_device(pdev);
4422 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
4423 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
4426 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4428 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4430 dev_err(&pdev->dev, "No usable DMA "
4431 "configuration, aborting\n");
4438 err = pci_request_regions(pdev, ixgbe_driver_name);
4440 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4444 err = pci_enable_pcie_error_reporting(pdev);
4446 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4448 /* non-fatal, continue */
4451 pci_set_master(pdev);
4452 pci_save_state(pdev);
4454 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4457 goto err_alloc_etherdev;
4460 SET_NETDEV_DEV(netdev, &pdev->dev);
4462 pci_set_drvdata(pdev, netdev);
4463 adapter = netdev_priv(netdev);
4465 adapter->netdev = netdev;
4466 adapter->pdev = pdev;
4469 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4471 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4472 pci_resource_len(pdev, 0));
4478 for (i = 1; i <= 5; i++) {
4479 if (pci_resource_len(pdev, i) == 0)
4483 netdev->netdev_ops = &ixgbe_netdev_ops;
4484 ixgbe_set_ethtool_ops(netdev);
4485 netdev->watchdog_timeo = 5 * HZ;
4486 strcpy(netdev->name, pci_name(pdev));
4488 adapter->bd_number = cards_found;
4491 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4492 hw->mac.type = ii->mac;
4495 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4496 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4497 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4498 if (!(eec & (1 << 8)))
4499 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4502 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4503 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4505 /* set up this timer and work struct before calling get_invariants
4506 * which might start the timer
4508 init_timer(&adapter->sfp_timer);
4509 adapter->sfp_timer.function = &ixgbe_sfp_timer;
4510 adapter->sfp_timer.data = (unsigned long) adapter;
4512 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4514 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
4515 INIT_WORK(&adapter->multispeed_fiber_task, ixgbe_multispeed_fiber_task);
4517 /* a new SFP+ module arrival, called from GPI SDP2 context */
4518 INIT_WORK(&adapter->sfp_config_module_task,
4519 ixgbe_sfp_config_module_task);
4521 err = ii->get_invariants(hw);
4522 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4523 /* start a kernel thread to watch for a module to arrive */
4524 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4525 mod_timer(&adapter->sfp_timer,
4526 round_jiffies(jiffies + (2 * HZ)));
4528 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4529 DPRINTK(PROBE, ERR, "failed to load because an "
4530 "unsupported SFP+ module type was detected.\n");
4536 /* setup the private structure */
4537 err = ixgbe_sw_init(adapter);
4541 /* reset_hw fills in the perm_addr as well */
4542 err = hw->mac.ops.reset_hw(hw);
4544 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4548 netdev->features = NETIF_F_SG |
4550 NETIF_F_HW_VLAN_TX |
4551 NETIF_F_HW_VLAN_RX |
4552 NETIF_F_HW_VLAN_FILTER;
4554 netdev->features |= NETIF_F_IPV6_CSUM;
4555 netdev->features |= NETIF_F_TSO;
4556 netdev->features |= NETIF_F_TSO6;
4557 netdev->features |= NETIF_F_GRO;
4559 netdev->vlan_features |= NETIF_F_TSO;
4560 netdev->vlan_features |= NETIF_F_TSO6;
4561 netdev->vlan_features |= NETIF_F_IP_CSUM;
4562 netdev->vlan_features |= NETIF_F_SG;
4564 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4565 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4567 #ifdef CONFIG_IXGBE_DCB
4568 netdev->dcbnl_ops = &dcbnl_ops;
4572 netdev->features |= NETIF_F_HIGHDMA;
4574 /* make sure the EEPROM is good */
4575 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4576 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4581 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4582 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4584 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4585 dev_err(&pdev->dev, "invalid MAC address\n");
4590 init_timer(&adapter->watchdog_timer);
4591 adapter->watchdog_timer.function = &ixgbe_watchdog;
4592 adapter->watchdog_timer.data = (unsigned long)adapter;
4594 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4595 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4597 err = ixgbe_init_interrupt_scheme(adapter);
4601 switch (pdev->device) {
4602 case IXGBE_DEV_ID_82599_KX4:
4603 #define IXGBE_PCIE_PMCSR 0x44
4604 adapter->wol = IXGBE_WUFC_MAG;
4605 pci_read_config_word(pdev, IXGBE_PCIE_PMCSR, &pm_value);
4606 pci_write_config_word(pdev, IXGBE_PCIE_PMCSR,
4607 (pm_value | (1 << 8)));
4613 device_init_wakeup(&adapter->pdev->dev, true);
4614 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
4616 /* print bus type/speed/width info */
4617 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4618 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s":
4619 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"),
4620 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" :
4621 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" :
4622 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" :
4625 ixgbe_read_pba_num_generic(hw, &part_num);
4626 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
4627 dev_info(&pdev->dev, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
4628 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
4629 (part_num >> 8), (part_num & 0xff));
4631 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4632 hw->mac.type, hw->phy.type,
4633 (part_num >> 8), (part_num & 0xff));
4635 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
4636 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4637 "this card is not sufficient for optimal "
4639 dev_warn(&pdev->dev, "For optimal performance a x8 "
4640 "PCI-Express slot is required.\n");
4643 /* save off EEPROM version number */
4644 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
4646 /* reset the hardware with the new settings */
4647 hw->mac.ops.start_hw(hw);
4649 netif_carrier_off(netdev);
4651 strcpy(netdev->name, "eth%d");
4652 err = register_netdev(netdev);
4656 #ifdef CONFIG_IXGBE_DCA
4657 if (dca_add_requester(&pdev->dev) == 0) {
4658 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4659 /* always use CB2 mode, difference is masked
4660 * in the CB driver */
4661 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4662 ixgbe_setup_dca(adapter);
4666 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4671 ixgbe_release_hw_control(adapter);
4674 ixgbe_reset_interrupt_capability(adapter);
4676 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4677 del_timer_sync(&adapter->sfp_timer);
4678 cancel_work_sync(&adapter->sfp_task);
4679 cancel_work_sync(&adapter->multispeed_fiber_task);
4680 cancel_work_sync(&adapter->sfp_config_module_task);
4681 iounmap(hw->hw_addr);
4683 free_netdev(netdev);
4685 pci_release_regions(pdev);
4688 pci_disable_device(pdev);
4693 * ixgbe_remove - Device Removal Routine
4694 * @pdev: PCI device information struct
4696 * ixgbe_remove is called by the PCI subsystem to alert the driver
4697 * that it should release a PCI device. The could be caused by a
4698 * Hot-Plug event, or because the driver is going to be removed from
4701 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4703 struct net_device *netdev = pci_get_drvdata(pdev);
4704 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4707 set_bit(__IXGBE_DOWN, &adapter->state);
4708 /* clear the module not found bit to make sure the worker won't
4711 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4712 del_timer_sync(&adapter->watchdog_timer);
4714 del_timer_sync(&adapter->sfp_timer);
4715 cancel_work_sync(&adapter->watchdog_task);
4716 cancel_work_sync(&adapter->sfp_task);
4717 cancel_work_sync(&adapter->multispeed_fiber_task);
4718 cancel_work_sync(&adapter->sfp_config_module_task);
4719 flush_scheduled_work();
4721 #ifdef CONFIG_IXGBE_DCA
4722 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4723 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4724 dca_remove_requester(&pdev->dev);
4725 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4729 if (netdev->reg_state == NETREG_REGISTERED)
4730 unregister_netdev(netdev);
4732 ixgbe_reset_interrupt_capability(adapter);
4734 ixgbe_release_hw_control(adapter);
4736 iounmap(adapter->hw.hw_addr);
4737 pci_release_regions(pdev);
4739 DPRINTK(PROBE, INFO, "complete\n");
4740 kfree(adapter->tx_ring);
4741 kfree(adapter->rx_ring);
4743 free_netdev(netdev);
4745 err = pci_disable_pcie_error_reporting(pdev);
4748 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4750 pci_disable_device(pdev);
4754 * ixgbe_io_error_detected - called when PCI error is detected
4755 * @pdev: Pointer to PCI device
4756 * @state: The current pci connection state
4758 * This function is called after a PCI bus error affecting
4759 * this device has been detected.
4761 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4762 pci_channel_state_t state)
4764 struct net_device *netdev = pci_get_drvdata(pdev);
4765 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4767 netif_device_detach(netdev);
4769 if (netif_running(netdev))
4770 ixgbe_down(adapter);
4771 pci_disable_device(pdev);
4773 /* Request a slot reset. */
4774 return PCI_ERS_RESULT_NEED_RESET;
4778 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4779 * @pdev: Pointer to PCI device
4781 * Restart the card from scratch, as if from a cold-boot.
4783 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4785 struct net_device *netdev = pci_get_drvdata(pdev);
4786 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4787 pci_ers_result_t result;
4790 if (pci_enable_device(pdev)) {
4792 "Cannot re-enable PCI device after reset.\n");
4793 result = PCI_ERS_RESULT_DISCONNECT;
4795 pci_set_master(pdev);
4796 pci_restore_state(pdev);
4798 pci_enable_wake(pdev, PCI_D3hot, 0);
4799 pci_enable_wake(pdev, PCI_D3cold, 0);
4801 ixgbe_reset(adapter);
4802 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4803 result = PCI_ERS_RESULT_RECOVERED;
4806 err = pci_cleanup_aer_uncorrect_error_status(pdev);
4809 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4810 /* non-fatal, continue */
4817 * ixgbe_io_resume - called when traffic can start flowing again.
4818 * @pdev: Pointer to PCI device
4820 * This callback is called when the error recovery driver tells us that
4821 * its OK to resume normal operation.
4823 static void ixgbe_io_resume(struct pci_dev *pdev)
4825 struct net_device *netdev = pci_get_drvdata(pdev);
4826 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4828 if (netif_running(netdev)) {
4829 if (ixgbe_up(adapter)) {
4830 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4835 netif_device_attach(netdev);
4838 static struct pci_error_handlers ixgbe_err_handler = {
4839 .error_detected = ixgbe_io_error_detected,
4840 .slot_reset = ixgbe_io_slot_reset,
4841 .resume = ixgbe_io_resume,
4844 static struct pci_driver ixgbe_driver = {
4845 .name = ixgbe_driver_name,
4846 .id_table = ixgbe_pci_tbl,
4847 .probe = ixgbe_probe,
4848 .remove = __devexit_p(ixgbe_remove),
4850 .suspend = ixgbe_suspend,
4851 .resume = ixgbe_resume,
4853 .shutdown = ixgbe_shutdown,
4854 .err_handler = &ixgbe_err_handler
4858 * ixgbe_init_module - Driver Registration Routine
4860 * ixgbe_init_module is the first routine called when the driver is
4861 * loaded. All it does is register with the PCI subsystem.
4863 static int __init ixgbe_init_module(void)
4866 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4867 ixgbe_driver_string, ixgbe_driver_version);
4869 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4871 #ifdef CONFIG_IXGBE_DCA
4872 dca_register_notify(&dca_notifier);
4875 ret = pci_register_driver(&ixgbe_driver);
4879 module_init(ixgbe_init_module);
4882 * ixgbe_exit_module - Driver Exit Cleanup Routine
4884 * ixgbe_exit_module is called just before the driver is removed
4887 static void __exit ixgbe_exit_module(void)
4889 #ifdef CONFIG_IXGBE_DCA
4890 dca_unregister_notify(&dca_notifier);
4892 pci_unregister_driver(&ixgbe_driver);
4895 #ifdef CONFIG_IXGBE_DCA
4896 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4901 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4902 __ixgbe_notify_dca);
4904 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4906 #endif /* CONFIG_IXGBE_DCA */
4908 module_exit(ixgbe_exit_module);