git.oblomov.eu Git - linux-2.6/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include <linux/module.h>
  21 #include <linux/kernel.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/profile.h>
  25 #include <linux/sched.h>
  26 #include <asm/io.h>
  27 #include <asm/desc.h>
  28
  29 #include "segment_descriptor.h"
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static int init_rmode_tss(struct kvm *kvm);
  35
  36 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  37 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  38
  39 static struct page *vmx_io_bitmap_a;
  40 static struct page *vmx_io_bitmap_b;
  41
  42 #ifdef CONFIG_X86_64
  43 #define HOST_IS_64 1
  44 #else
  45 #define HOST_IS_64 0
  46 #endif
  47 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  48
  49 static struct vmcs_descriptor {
  50         int size;
  51         int order;
  52         u32 revision_id;
  53 } vmcs_descriptor;
  54
  55 #define VMX_SEGMENT_FIELD(seg)                                  \
  56         [VCPU_SREG_##seg] = {                                   \
  57                 .selector = GUEST_##seg##_SELECTOR,             \
  58                 .base = GUEST_##seg##_BASE,                     \
  59                 .limit = GUEST_##seg##_LIMIT,                   \
  60                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  61         }
  62
  63 static struct kvm_vmx_segment_field {
  64         unsigned selector;
  65         unsigned base;
  66         unsigned limit;
  67         unsigned ar_bytes;
  68 } kvm_vmx_segment_fields[] = {
  69         VMX_SEGMENT_FIELD(CS),
  70         VMX_SEGMENT_FIELD(DS),
  71         VMX_SEGMENT_FIELD(ES),
  72         VMX_SEGMENT_FIELD(FS),
  73         VMX_SEGMENT_FIELD(GS),
  74         VMX_SEGMENT_FIELD(SS),
  75         VMX_SEGMENT_FIELD(TR),
  76         VMX_SEGMENT_FIELD(LDTR),
  77 };
  78
  79 /*
  80  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
  81  * away by decrementing the array size.
  82  */
  83 static const u32 vmx_msr_index[] = {
  84 #ifdef CONFIG_X86_64
  85         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  86 #endif
  87         MSR_EFER, MSR_K6_STAR,
  88 };
  89 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
  90
  91 static inline u64 msr_efer_save_restore_bits(struct vmx_msr_entry msr)
  92 {
  93         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
  94 }
  95
  96 static inline int msr_efer_need_save_restore(struct kvm_vcpu *vcpu)
  97 {
  98         int efer_offset = vcpu->msr_offset_efer;
  99         return msr_efer_save_restore_bits(vcpu->host_msrs[efer_offset]) !=
 100                 msr_efer_save_restore_bits(vcpu->guest_msrs[efer_offset]);
 101 }
 102
 103 static inline int is_page_fault(u32 intr_info)
 104 {
 105         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 106                              INTR_INFO_VALID_MASK)) ==
 107                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 108 }
 109
 110 static inline int is_no_device(u32 intr_info)
 111 {
 112         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 113                              INTR_INFO_VALID_MASK)) ==
 114                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 115 }
 116
 117 static inline int is_external_interrupt(u32 intr_info)
 118 {
 119         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 120                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 121 }
 122
 123 static int __find_msr_index(struct kvm_vcpu *vcpu, u32 msr)
 124 {
 125         int i;
 126
 127         for (i = 0; i < vcpu->nmsrs; ++i)
 128                 if (vcpu->guest_msrs[i].index == msr)
 129                         return i;
 130         return -1;
 131 }
 132
 133 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
 134 {
 135         int i;
 136
 137         i = __find_msr_index(vcpu, msr);
 138         if (i >= 0)
 139                 return &vcpu->guest_msrs[i];
 140         return NULL;
 141 }
 142
 143 static void vmcs_clear(struct vmcs *vmcs)
 144 {
 145         u64 phys_addr = __pa(vmcs);
 146         u8 error;
 147
 148         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 149                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 150                       : "cc", "memory");
 151         if (error)
 152                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 153                        vmcs, phys_addr);
 154 }
 155
 156 static void __vcpu_clear(void *arg)
 157 {
 158         struct kvm_vcpu *vcpu = arg;
 159         int cpu = raw_smp_processor_id();
 160
 161         if (vcpu->cpu == cpu)
 162                 vmcs_clear(vcpu->vmcs);
 163         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 164                 per_cpu(current_vmcs, cpu) = NULL;
 165         rdtscll(vcpu->host_tsc);
 166 }
 167
 168 static void vcpu_clear(struct kvm_vcpu *vcpu)
 169 {
 170         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 171                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 172         else
 173                 __vcpu_clear(vcpu);
 174         vcpu->launched = 0;
 175 }
 176
 177 static unsigned long vmcs_readl(unsigned long field)
 178 {
 179         unsigned long value;
 180
 181         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 182                       : "=a"(value) : "d"(field) : "cc");
 183         return value;
 184 }
 185
 186 static u16 vmcs_read16(unsigned long field)
 187 {
 188         return vmcs_readl(field);
 189 }
 190
 191 static u32 vmcs_read32(unsigned long field)
 192 {
 193         return vmcs_readl(field);
 194 }
 195
 196 static u64 vmcs_read64(unsigned long field)
 197 {
 198 #ifdef CONFIG_X86_64
 199         return vmcs_readl(field);
 200 #else
 201         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 202 #endif
 203 }
 204
 205 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 206 {
 207         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 208                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 209         dump_stack();
 210 }
 211
 212 static void vmcs_writel(unsigned long field, unsigned long value)
 213 {
 214         u8 error;
 215
 216         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 217                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 218         if (unlikely(error))
 219                 vmwrite_error(field, value);
 220 }
 221
 222 static void vmcs_write16(unsigned long field, u16 value)
 223 {
 224         vmcs_writel(field, value);
 225 }
 226
 227 static void vmcs_write32(unsigned long field, u32 value)
 228 {
 229         vmcs_writel(field, value);
 230 }
 231
 232 static void vmcs_write64(unsigned long field, u64 value)
 233 {
 234 #ifdef CONFIG_X86_64
 235         vmcs_writel(field, value);
 236 #else
 237         vmcs_writel(field, value);
 238         asm volatile ("");
 239         vmcs_writel(field+1, value >> 32);
 240 #endif
 241 }
 242
 243 static void vmcs_clear_bits(unsigned long field, u32 mask)
 244 {
 245         vmcs_writel(field, vmcs_readl(field) & ~mask);
 246 }
 247
 248 static void vmcs_set_bits(unsigned long field, u32 mask)
 249 {
 250         vmcs_writel(field, vmcs_readl(field) | mask);
 251 }
 252
 253 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 254 {
 255         u32 eb;
 256
 257         eb = 1u << PF_VECTOR;
 258         if (!vcpu->fpu_active)
 259                 eb |= 1u << NM_VECTOR;
 260         if (vcpu->guest_debug.enabled)
 261                 eb |= 1u << 1;
 262         if (vcpu->rmode.active)
 263                 eb = ~0;
 264         vmcs_write32(EXCEPTION_BITMAP, eb);
 265 }
 266
 267 static void reload_tss(void)
 268 {
 269 #ifndef CONFIG_X86_64
 270
 271         /*
 272          * VT restores TR but not its size.  Useless.
 273          */
 274         struct descriptor_table gdt;
 275         struct segment_descriptor *descs;
 276
 277         get_gdt(&gdt);
 278         descs = (void *)gdt.base;
 279         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 280         load_TR_desc();
 281 #endif
 282 }
 283
 284 static void load_transition_efer(struct kvm_vcpu *vcpu)
 285 {
 286         u64 trans_efer;
 287         int efer_offset = vcpu->msr_offset_efer;
 288
 289         trans_efer = vcpu->host_msrs[efer_offset].data;
 290         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 291         trans_efer |= msr_efer_save_restore_bits(
 292                                 vcpu->guest_msrs[efer_offset]);
 293         wrmsrl(MSR_EFER, trans_efer);
 294         vcpu->stat.efer_reload++;
 295 }
 296
 297 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
 298 {
 299         struct vmx_host_state *hs = &vcpu->vmx_host_state;
 300
 301         if (hs->loaded)
 302                 return;
 303
 304         hs->loaded = 1;
 305         /*
 306          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 307          * allow segment selectors with cpl > 0 or ti == 1.
 308          */
 309         hs->ldt_sel = read_ldt();
 310         hs->fs_gs_ldt_reload_needed = hs->ldt_sel;
 311         hs->fs_sel = read_fs();
 312         if (!(hs->fs_sel & 7))
 313                 vmcs_write16(HOST_FS_SELECTOR, hs->fs_sel);
 314         else {
 315                 vmcs_write16(HOST_FS_SELECTOR, 0);
 316                 hs->fs_gs_ldt_reload_needed = 1;
 317         }
 318         hs->gs_sel = read_gs();
 319         if (!(hs->gs_sel & 7))
 320                 vmcs_write16(HOST_GS_SELECTOR, hs->gs_sel);
 321         else {
 322                 vmcs_write16(HOST_GS_SELECTOR, 0);
 323                 hs->fs_gs_ldt_reload_needed = 1;
 324         }
 325
 326 #ifdef CONFIG_X86_64
 327         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 328         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 329 #else
 330         vmcs_writel(HOST_FS_BASE, segment_base(hs->fs_sel));
 331         vmcs_writel(HOST_GS_BASE, segment_base(hs->gs_sel));
 332 #endif
 333
 334 #ifdef CONFIG_X86_64
 335         if (is_long_mode(vcpu)) {
 336                 save_msrs(vcpu->host_msrs + vcpu->msr_offset_kernel_gs_base, 1);
 337         }
 338 #endif
 339         load_msrs(vcpu->guest_msrs, vcpu->save_nmsrs);
 340         if (msr_efer_need_save_restore(vcpu))
 341                 load_transition_efer(vcpu);
 342 }
 343
 344 static void vmx_load_host_state(struct kvm_vcpu *vcpu)
 345 {
 346         struct vmx_host_state *hs = &vcpu->vmx_host_state;
 347
 348         if (!hs->loaded)
 349                 return;
 350
 351         hs->loaded = 0;
 352         if (hs->fs_gs_ldt_reload_needed) {
 353                 load_ldt(hs->ldt_sel);
 354                 load_fs(hs->fs_sel);
 355                 /*
 356                  * If we have to reload gs, we must take care to
 357                  * preserve our gs base.
 358                  */
 359                 local_irq_disable();
 360                 load_gs(hs->gs_sel);
 361 #ifdef CONFIG_X86_64
 362                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 363 #endif
 364                 local_irq_enable();
 365
 366                 reload_tss();
 367         }
 368         save_msrs(vcpu->guest_msrs, vcpu->save_nmsrs);
 369         load_msrs(vcpu->host_msrs, vcpu->save_nmsrs);
 370         if (msr_efer_need_save_restore(vcpu))
 371                 load_msrs(vcpu->host_msrs + vcpu->msr_offset_efer, 1);
 372 }
 373
 374 /*
 375  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 376  * vcpu mutex is already taken.
 377  */
 378 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
 379 {
 380         u64 phys_addr = __pa(vcpu->vmcs);
 381         int cpu;
 382         u64 tsc_this, delta;
 383
 384         cpu = get_cpu();
 385
 386         if (vcpu->cpu != cpu)
 387                 vcpu_clear(vcpu);
 388
 389         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 390                 u8 error;
 391
 392                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 393                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 394                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 395                               : "cc");
 396                 if (error)
 397                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 398                                vcpu->vmcs, phys_addr);
 399         }
 400
 401         if (vcpu->cpu != cpu) {
 402                 struct descriptor_table dt;
 403                 unsigned long sysenter_esp;
 404
 405                 vcpu->cpu = cpu;
 406                 /*
 407                  * Linux uses per-cpu TSS and GDT, so set these when switching
 408                  * processors.
 409                  */
 410                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 411                 get_gdt(&dt);
 412                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 413
 414                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 415                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 416
 417                 /*
 418                  * Make sure the time stamp counter is monotonous.
 419                  */
 420                 rdtscll(tsc_this);
 421                 delta = vcpu->host_tsc - tsc_this;
 422                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 423         }
 424 }
 425
 426 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 427 {
 428         vmx_load_host_state(vcpu);
 429         kvm_put_guest_fpu(vcpu);
 430         put_cpu();
 431 }
 432
 433 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 434 {
 435         if (vcpu->fpu_active)
 436                 return;
 437         vcpu->fpu_active = 1;
 438         vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
 439         if (vcpu->cr0 & CR0_TS_MASK)
 440                 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 441         update_exception_bitmap(vcpu);
 442 }
 443
 444 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 445 {
 446         if (!vcpu->fpu_active)
 447                 return;
 448         vcpu->fpu_active = 0;
 449         vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 450         update_exception_bitmap(vcpu);
 451 }
 452
 453 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 454 {
 455         vcpu_clear(vcpu);
 456 }
 457
 458 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 459 {
 460         return vmcs_readl(GUEST_RFLAGS);
 461 }
 462
 463 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 464 {
 465         vmcs_writel(GUEST_RFLAGS, rflags);
 466 }
 467
 468 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 469 {
 470         unsigned long rip;
 471         u32 interruptibility;
 472
 473         rip = vmcs_readl(GUEST_RIP);
 474         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 475         vmcs_writel(GUEST_RIP, rip);
 476
 477         /*
 478          * We emulated an instruction, so temporary interrupt blocking
 479          * should be removed, if set.
 480          */
 481         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 482         if (interruptibility & 3)
 483                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 484                              interruptibility & ~3);
 485         vcpu->interrupt_window_open = 1;
 486 }
 487
 488 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 489 {
 490         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 491                vmcs_readl(GUEST_RIP));
 492         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 493         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 494                      GP_VECTOR |
 495                      INTR_TYPE_EXCEPTION |
 496                      INTR_INFO_DELIEVER_CODE_MASK |
 497                      INTR_INFO_VALID_MASK);
 498 }
 499
 500 /*
 501  * Swap MSR entry in host/guest MSR entry array.
 502  */
 503 void move_msr_up(struct kvm_vcpu *vcpu, int from, int to)
 504 {
 505         struct vmx_msr_entry tmp;
 506         tmp = vcpu->guest_msrs[to];
 507         vcpu->guest_msrs[to] = vcpu->guest_msrs[from];
 508         vcpu->guest_msrs[from] = tmp;
 509         tmp = vcpu->host_msrs[to];
 510         vcpu->host_msrs[to] = vcpu->host_msrs[from];
 511         vcpu->host_msrs[from] = tmp;
 512 }
 513
 514 /*
 515  * Set up the vmcs to automatically save and restore system
 516  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 517  * mode, as fiddling with msrs is very expensive.
 518  */
 519 static void setup_msrs(struct kvm_vcpu *vcpu)
 520 {
 521         int save_nmsrs;
 522
 523         save_nmsrs = 0;
 524 #ifdef CONFIG_X86_64
 525         if (is_long_mode(vcpu)) {
 526                 int index;
 527
 528                 index = __find_msr_index(vcpu, MSR_SYSCALL_MASK);
 529                 if (index >= 0)
 530                         move_msr_up(vcpu, index, save_nmsrs++);
 531                 index = __find_msr_index(vcpu, MSR_LSTAR);
 532                 if (index >= 0)
 533                         move_msr_up(vcpu, index, save_nmsrs++);
 534                 index = __find_msr_index(vcpu, MSR_CSTAR);
 535                 if (index >= 0)
 536                         move_msr_up(vcpu, index, save_nmsrs++);
 537                 index = __find_msr_index(vcpu, MSR_KERNEL_GS_BASE);
 538                 if (index >= 0)
 539                         move_msr_up(vcpu, index, save_nmsrs++);
 540                 /*
 541                  * MSR_K6_STAR is only needed on long mode guests, and only
 542                  * if efer.sce is enabled.
 543                  */
 544                 index = __find_msr_index(vcpu, MSR_K6_STAR);
 545                 if ((index >= 0) && (vcpu->shadow_efer & EFER_SCE))
 546                         move_msr_up(vcpu, index, save_nmsrs++);
 547         }
 548 #endif
 549         vcpu->save_nmsrs = save_nmsrs;
 550
 551 #ifdef CONFIG_X86_64
 552         vcpu->msr_offset_kernel_gs_base =
 553                 __find_msr_index(vcpu, MSR_KERNEL_GS_BASE);
 554 #endif
 555         vcpu->msr_offset_efer = __find_msr_index(vcpu, MSR_EFER);
 556 }
 557
 558 /*
 559  * reads and returns guest's timestamp counter "register"
 560  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 561  */
 562 static u64 guest_read_tsc(void)
 563 {
 564         u64 host_tsc, tsc_offset;
 565
 566         rdtscll(host_tsc);
 567         tsc_offset = vmcs_read64(TSC_OFFSET);
 568         return host_tsc + tsc_offset;
 569 }
 570
 571 /*
 572  * writes 'guest_tsc' into guest's timestamp counter "register"
 573  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 574  */
 575 static void guest_write_tsc(u64 guest_tsc)
 576 {
 577         u64 host_tsc;
 578
 579         rdtscll(host_tsc);
 580         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 581 }
 582
 583 /*
 584  * Reads an msr value (of 'msr_index') into 'pdata'.
 585  * Returns 0 on success, non-0 otherwise.
 586  * Assumes vcpu_load() was already called.
 587  */
 588 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 589 {
 590         u64 data;
 591         struct vmx_msr_entry *msr;
 592
 593         if (!pdata) {
 594                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 595                 return -EINVAL;
 596         }
 597
 598         switch (msr_index) {
 599 #ifdef CONFIG_X86_64
 600         case MSR_FS_BASE:
 601                 data = vmcs_readl(GUEST_FS_BASE);
 602                 break;
 603         case MSR_GS_BASE:
 604                 data = vmcs_readl(GUEST_GS_BASE);
 605                 break;
 606         case MSR_EFER:
 607                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 608 #endif
 609         case MSR_IA32_TIME_STAMP_COUNTER:
 610                 data = guest_read_tsc();
 611                 break;
 612         case MSR_IA32_SYSENTER_CS:
 613                 data = vmcs_read32(GUEST_SYSENTER_CS);
 614                 break;
 615         case MSR_IA32_SYSENTER_EIP:
 616                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 617                 break;
 618         case MSR_IA32_SYSENTER_ESP:
 619                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 620                 break;
 621         default:
 622                 msr = find_msr_entry(vcpu, msr_index);
 623                 if (msr) {
 624                         data = msr->data;
 625                         break;
 626                 }
 627                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 628         }
 629
 630         *pdata = data;
 631         return 0;
 632 }
 633
 634 /*
 635  * Writes msr value into into the appropriate "register".
 636  * Returns 0 on success, non-0 otherwise.
 637  * Assumes vcpu_load() was already called.
 638  */
 639 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 640 {
 641         struct vmx_msr_entry *msr;
 642         int ret = 0;
 643
 644         switch (msr_index) {
 645 #ifdef CONFIG_X86_64
 646         case MSR_EFER:
 647                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 648                 if (vcpu->vmx_host_state.loaded)
 649                         load_transition_efer(vcpu);
 650                 break;
 651         case MSR_FS_BASE:
 652                 vmcs_writel(GUEST_FS_BASE, data);
 653                 break;
 654         case MSR_GS_BASE:
 655                 vmcs_writel(GUEST_GS_BASE, data);
 656                 break;
 657 #endif
 658         case MSR_IA32_SYSENTER_CS:
 659                 vmcs_write32(GUEST_SYSENTER_CS, data);
 660                 break;
 661         case MSR_IA32_SYSENTER_EIP:
 662                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 663                 break;
 664         case MSR_IA32_SYSENTER_ESP:
 665                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 666                 break;
 667         case MSR_IA32_TIME_STAMP_COUNTER:
 668                 guest_write_tsc(data);
 669                 break;
 670         default:
 671                 msr = find_msr_entry(vcpu, msr_index);
 672                 if (msr) {
 673                         msr->data = data;
 674                         if (vcpu->vmx_host_state.loaded)
 675                                 load_msrs(vcpu->guest_msrs, vcpu->save_nmsrs);
 676                         break;
 677                 }
 678                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 679         }
 680
 681         return ret;
 682 }
 683
 684 /*
 685  * Sync the rsp and rip registers into the vcpu structure.  This allows
 686  * registers to be accessed by indexing vcpu->regs.
 687  */
 688 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 689 {
 690         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 691         vcpu->rip = vmcs_readl(GUEST_RIP);
 692 }
 693
 694 /*
 695  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 696  * modification.
 697  */
 698 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 699 {
 700         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 701         vmcs_writel(GUEST_RIP, vcpu->rip);
 702 }
 703
 704 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 705 {
 706         unsigned long dr7 = 0x400;
 707         int old_singlestep;
 708
 709         old_singlestep = vcpu->guest_debug.singlestep;
 710
 711         vcpu->guest_debug.enabled = dbg->enabled;
 712         if (vcpu->guest_debug.enabled) {
 713                 int i;
 714
 715                 dr7 |= 0x200;  /* exact */
 716                 for (i = 0; i < 4; ++i) {
 717                         if (!dbg->breakpoints[i].enabled)
 718                                 continue;
 719                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 720                         dr7 |= 2 << (i*2);    /* global enable */
 721                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 722                 }
 723
 724                 vcpu->guest_debug.singlestep = dbg->singlestep;
 725         } else
 726                 vcpu->guest_debug.singlestep = 0;
 727
 728         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 729                 unsigned long flags;
 730
 731                 flags = vmcs_readl(GUEST_RFLAGS);
 732                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 733                 vmcs_writel(GUEST_RFLAGS, flags);
 734         }
 735
 736         update_exception_bitmap(vcpu);
 737         vmcs_writel(GUEST_DR7, dr7);
 738
 739         return 0;
 740 }
 741
 742 static __init int cpu_has_kvm_support(void)
 743 {
 744         unsigned long ecx = cpuid_ecx(1);
 745         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 746 }
 747
 748 static __init int vmx_disabled_by_bios(void)
 749 {
 750         u64 msr;
 751
 752         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 753         return (msr & 5) == 1; /* locked but not enabled */
 754 }
 755
 756 static void hardware_enable(void *garbage)
 757 {
 758         int cpu = raw_smp_processor_id();
 759         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 760         u64 old;
 761
 762         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 763         if ((old & 5) != 5)
 764                 /* enable and lock */
 765                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 766         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 767         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 768                       : "memory", "cc");
 769 }
 770
 771 static void hardware_disable(void *garbage)
 772 {
 773         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 774 }
 775
 776 static __init void setup_vmcs_descriptor(void)
 777 {
 778         u32 vmx_msr_low, vmx_msr_high;
 779
 780         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 781         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 782         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 783         vmcs_descriptor.revision_id = vmx_msr_low;
 784 }
 785
 786 static struct vmcs *alloc_vmcs_cpu(int cpu)
 787 {
 788         int node = cpu_to_node(cpu);
 789         struct page *pages;
 790         struct vmcs *vmcs;
 791
 792         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 793         if (!pages)
 794                 return NULL;
 795         vmcs = page_address(pages);
 796         memset(vmcs, 0, vmcs_descriptor.size);
 797         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 798         return vmcs;
 799 }
 800
 801 static struct vmcs *alloc_vmcs(void)
 802 {
 803         return alloc_vmcs_cpu(raw_smp_processor_id());
 804 }
 805
 806 static void free_vmcs(struct vmcs *vmcs)
 807 {
 808         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 809 }
 810
 811 static void free_kvm_area(void)
 812 {
 813         int cpu;
 814
 815         for_each_online_cpu(cpu)
 816                 free_vmcs(per_cpu(vmxarea, cpu));
 817 }
 818
 819 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 820
 821 static __init int alloc_kvm_area(void)
 822 {
 823         int cpu;
 824
 825         for_each_online_cpu(cpu) {
 826                 struct vmcs *vmcs;
 827
 828                 vmcs = alloc_vmcs_cpu(cpu);
 829                 if (!vmcs) {
 830                         free_kvm_area();
 831                         return -ENOMEM;
 832                 }
 833
 834                 per_cpu(vmxarea, cpu) = vmcs;
 835         }
 836         return 0;
 837 }
 838
 839 static __init int hardware_setup(void)
 840 {
 841         setup_vmcs_descriptor();
 842         return alloc_kvm_area();
 843 }
 844
 845 static __exit void hardware_unsetup(void)
 846 {
 847         free_kvm_area();
 848 }
 849
 850 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 851 {
 852         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 853
 854         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 855                 vmcs_write16(sf->selector, save->selector);
 856                 vmcs_writel(sf->base, save->base);
 857                 vmcs_write32(sf->limit, save->limit);
 858                 vmcs_write32(sf->ar_bytes, save->ar);
 859         } else {
 860                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 861                         << AR_DPL_SHIFT;
 862                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 863         }
 864 }
 865
 866 static void enter_pmode(struct kvm_vcpu *vcpu)
 867 {
 868         unsigned long flags;
 869
 870         vcpu->rmode.active = 0;
 871
 872         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 873         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 874         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 875
 876         flags = vmcs_readl(GUEST_RFLAGS);
 877         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 878         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 879         vmcs_writel(GUEST_RFLAGS, flags);
 880
 881         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 882                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 883
 884         update_exception_bitmap(vcpu);
 885
 886         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 887         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 888         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 889         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 890
 891         vmcs_write16(GUEST_SS_SELECTOR, 0);
 892         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 893
 894         vmcs_write16(GUEST_CS_SELECTOR,
 895                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 896         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 897 }
 898
 899 static int rmode_tss_base(struct kvm* kvm)
 900 {
 901         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 902         return base_gfn << PAGE_SHIFT;
 903 }
 904
 905 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 906 {
 907         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 908
 909         save->selector = vmcs_read16(sf->selector);
 910         save->base = vmcs_readl(sf->base);
 911         save->limit = vmcs_read32(sf->limit);
 912         save->ar = vmcs_read32(sf->ar_bytes);
 913         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 914         vmcs_write32(sf->limit, 0xffff);
 915         vmcs_write32(sf->ar_bytes, 0xf3);
 916 }
 917
 918 static void enter_rmode(struct kvm_vcpu *vcpu)
 919 {
 920         unsigned long flags;
 921
 922         vcpu->rmode.active = 1;
 923
 924         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 925         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 926
 927         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 928         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 929
 930         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 931         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 932
 933         flags = vmcs_readl(GUEST_RFLAGS);
 934         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 935
 936         flags |= IOPL_MASK | X86_EFLAGS_VM;
 937
 938         vmcs_writel(GUEST_RFLAGS, flags);
 939         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 940         update_exception_bitmap(vcpu);
 941
 942         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 943         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 944         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 945
 946         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 947         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 948         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
 949                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
 950         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 951
 952         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 953         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 954         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 955         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 956
 957         init_rmode_tss(vcpu->kvm);
 958 }
 959
 960 #ifdef CONFIG_X86_64
 961
 962 static void enter_lmode(struct kvm_vcpu *vcpu)
 963 {
 964         u32 guest_tr_ar;
 965
 966         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 967         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 968                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 969                        __FUNCTION__);
 970                 vmcs_write32(GUEST_TR_AR_BYTES,
 971                              (guest_tr_ar & ~AR_TYPE_MASK)
 972                              | AR_TYPE_BUSY_64_TSS);
 973         }
 974
 975         vcpu->shadow_efer |= EFER_LMA;
 976
 977         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 978         vmcs_write32(VM_ENTRY_CONTROLS,
 979                      vmcs_read32(VM_ENTRY_CONTROLS)
 980                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 981 }
 982
 983 static void exit_lmode(struct kvm_vcpu *vcpu)
 984 {
 985         vcpu->shadow_efer &= ~EFER_LMA;
 986
 987         vmcs_write32(VM_ENTRY_CONTROLS,
 988                      vmcs_read32(VM_ENTRY_CONTROLS)
 989                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 990 }
 991
 992 #endif
 993
 994 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 995 {
 996         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 997         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 998 }
 999
1000 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1001 {
1002         vmx_fpu_deactivate(vcpu);
1003
1004         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
1005                 enter_pmode(vcpu);
1006
1007         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
1008                 enter_rmode(vcpu);
1009
1010 #ifdef CONFIG_X86_64
1011         if (vcpu->shadow_efer & EFER_LME) {
1012                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
1013                         enter_lmode(vcpu);
1014                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
1015                         exit_lmode(vcpu);
1016         }
1017 #endif
1018
1019         vmcs_writel(CR0_READ_SHADOW, cr0);
1020         vmcs_writel(GUEST_CR0,
1021                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1022         vcpu->cr0 = cr0;
1023
1024         if (!(cr0 & CR0_TS_MASK) || !(cr0 & CR0_PE_MASK))
1025                 vmx_fpu_activate(vcpu);
1026 }
1027
1028 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1029 {
1030         vmcs_writel(GUEST_CR3, cr3);
1031         if (vcpu->cr0 & CR0_PE_MASK)
1032                 vmx_fpu_deactivate(vcpu);
1033 }
1034
1035 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1036 {
1037         vmcs_writel(CR4_READ_SHADOW, cr4);
1038         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1039                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1040         vcpu->cr4 = cr4;
1041 }
1042
1043 #ifdef CONFIG_X86_64
1044
1045 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1046 {
1047         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
1048
1049         vcpu->shadow_efer = efer;
1050         if (efer & EFER_LMA) {
1051                 vmcs_write32(VM_ENTRY_CONTROLS,
1052                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1053                                      VM_ENTRY_CONTROLS_IA32E_MASK);
1054                 msr->data = efer;
1055
1056         } else {
1057                 vmcs_write32(VM_ENTRY_CONTROLS,
1058                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1059                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
1060
1061                 msr->data = efer & ~EFER_LME;
1062         }
1063         setup_msrs(vcpu);
1064 }
1065
1066 #endif
1067
1068 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1069 {
1070         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1071
1072         return vmcs_readl(sf->base);
1073 }
1074
1075 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1076                             struct kvm_segment *var, int seg)
1077 {
1078         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1079         u32 ar;
1080
1081         var->base = vmcs_readl(sf->base);
1082         var->limit = vmcs_read32(sf->limit);
1083         var->selector = vmcs_read16(sf->selector);
1084         ar = vmcs_read32(sf->ar_bytes);
1085         if (ar & AR_UNUSABLE_MASK)
1086                 ar = 0;
1087         var->type = ar & 15;
1088         var->s = (ar >> 4) & 1;
1089         var->dpl = (ar >> 5) & 3;
1090         var->present = (ar >> 7) & 1;
1091         var->avl = (ar >> 12) & 1;
1092         var->l = (ar >> 13) & 1;
1093         var->db = (ar >> 14) & 1;
1094         var->g = (ar >> 15) & 1;
1095         var->unusable = (ar >> 16) & 1;
1096 }
1097
1098 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1099 {
1100         u32 ar;
1101
1102         if (var->unusable)
1103                 ar = 1 << 16;
1104         else {
1105                 ar = var->type & 15;
1106                 ar |= (var->s & 1) << 4;
1107                 ar |= (var->dpl & 3) << 5;
1108                 ar |= (var->present & 1) << 7;
1109                 ar |= (var->avl & 1) << 12;
1110                 ar |= (var->l & 1) << 13;
1111                 ar |= (var->db & 1) << 14;
1112                 ar |= (var->g & 1) << 15;
1113         }
1114         if (ar == 0) /* a 0 value means unusable */
1115                 ar = AR_UNUSABLE_MASK;
1116
1117         return ar;
1118 }
1119
1120 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1121                             struct kvm_segment *var, int seg)
1122 {
1123         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1124         u32 ar;
1125
1126         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1127                 vcpu->rmode.tr.selector = var->selector;
1128                 vcpu->rmode.tr.base = var->base;
1129                 vcpu->rmode.tr.limit = var->limit;
1130                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1131                 return;
1132         }
1133         vmcs_writel(sf->base, var->base);
1134         vmcs_write32(sf->limit, var->limit);
1135         vmcs_write16(sf->selector, var->selector);
1136         if (vcpu->rmode.active && var->s) {
1137                 /*
1138                  * Hack real-mode segments into vm86 compatibility.
1139                  */
1140                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1141                         vmcs_writel(sf->base, 0xf0000);
1142                 ar = 0xf3;
1143         } else
1144                 ar = vmx_segment_access_rights(var);
1145         vmcs_write32(sf->ar_bytes, ar);
1146 }
1147
1148 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1149 {
1150         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1151
1152         *db = (ar >> 14) & 1;
1153         *l = (ar >> 13) & 1;
1154 }
1155
1156 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1157 {
1158         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1159         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1160 }
1161
1162 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1163 {
1164         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1165         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1166 }
1167
1168 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1169 {
1170         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1171         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1172 }
1173
1174 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1175 {
1176         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1177         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1178 }
1179
1180 static int init_rmode_tss(struct kvm* kvm)
1181 {
1182         struct page *p1, *p2, *p3;
1183         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1184         char *page;
1185
1186         p1 = gfn_to_page(kvm, fn++);
1187         p2 = gfn_to_page(kvm, fn++);
1188         p3 = gfn_to_page(kvm, fn);
1189
1190         if (!p1 || !p2 || !p3) {
1191                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1192                 return 0;
1193         }
1194
1195         page = kmap_atomic(p1, KM_USER0);
1196         clear_page(page);
1197         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1198         kunmap_atomic(page, KM_USER0);
1199
1200         page = kmap_atomic(p2, KM_USER0);
1201         clear_page(page);
1202         kunmap_atomic(page, KM_USER0);
1203
1204         page = kmap_atomic(p3, KM_USER0);
1205         clear_page(page);
1206         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1207         kunmap_atomic(page, KM_USER0);
1208
1209         return 1;
1210 }
1211
1212 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1213 {
1214         u32 msr_high, msr_low;
1215
1216         rdmsr(msr, msr_low, msr_high);
1217
1218         val &= msr_high;
1219         val |= msr_low;
1220         vmcs_write32(vmcs_field, val);
1221 }
1222
1223 static void seg_setup(int seg)
1224 {
1225         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1226
1227         vmcs_write16(sf->selector, 0);
1228         vmcs_writel(sf->base, 0);
1229         vmcs_write32(sf->limit, 0xffff);
1230         vmcs_write32(sf->ar_bytes, 0x93);
1231 }
1232
1233 /*
1234  * Sets up the vmcs for emulated real mode.
1235  */
1236 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1237 {
1238         u32 host_sysenter_cs;
1239         u32 junk;
1240         unsigned long a;
1241         struct descriptor_table dt;
1242         int i;
1243         int ret = 0;
1244         unsigned long kvm_vmx_return;
1245
1246         if (!init_rmode_tss(vcpu->kvm)) {
1247                 ret = -ENOMEM;
1248                 goto out;
1249         }
1250
1251         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1252         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1253         vcpu->cr8 = 0;
1254         vcpu->apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1255         if (vcpu == &vcpu->kvm->vcpus[0])
1256                 vcpu->apic_base |= MSR_IA32_APICBASE_BSP;
1257
1258         fx_init(vcpu);
1259
1260         /*
1261          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1262          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1263          */
1264         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1265         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1266         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1267         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1268
1269         seg_setup(VCPU_SREG_DS);
1270         seg_setup(VCPU_SREG_ES);
1271         seg_setup(VCPU_SREG_FS);
1272         seg_setup(VCPU_SREG_GS);
1273         seg_setup(VCPU_SREG_SS);
1274
1275         vmcs_write16(GUEST_TR_SELECTOR, 0);
1276         vmcs_writel(GUEST_TR_BASE, 0);
1277         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1278         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1279
1280         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1281         vmcs_writel(GUEST_LDTR_BASE, 0);
1282         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1283         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1284
1285         vmcs_write32(GUEST_SYSENTER_CS, 0);
1286         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1287         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1288
1289         vmcs_writel(GUEST_RFLAGS, 0x02);
1290         vmcs_writel(GUEST_RIP, 0xfff0);
1291         vmcs_writel(GUEST_RSP, 0);
1292
1293         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1294         vmcs_writel(GUEST_DR7, 0x400);
1295
1296         vmcs_writel(GUEST_GDTR_BASE, 0);
1297         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1298
1299         vmcs_writel(GUEST_IDTR_BASE, 0);
1300         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1301
1302         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1303         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1304         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1305
1306         /* I/O */
1307         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1308         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1309
1310         guest_write_tsc(0);
1311
1312         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1313
1314         /* Special registers */
1315         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1316
1317         /* Control */
1318         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1319                                PIN_BASED_VM_EXEC_CONTROL,
1320                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1321                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1322                         );
1323         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1324                                CPU_BASED_VM_EXEC_CONTROL,
1325                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1326                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1327                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1328                                | CPU_BASED_ACTIVATE_IO_BITMAP  /* 20.6.2 */
1329                                | CPU_BASED_MOV_DR_EXITING
1330                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1331                         );
1332
1333         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1334         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1335         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1336
1337         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1338         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1339         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1340
1341         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1342         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1343         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1344         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1345         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1346         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1347 #ifdef CONFIG_X86_64
1348         rdmsrl(MSR_FS_BASE, a);
1349         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1350         rdmsrl(MSR_GS_BASE, a);
1351         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1352 #else
1353         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1354         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1355 #endif
1356
1357         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1358
1359         get_idt(&dt);
1360         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1361
1362         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1363         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1364         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1365         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1366         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1367
1368         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1369         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1370         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1371         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1372         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1373         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1374
1375         for (i = 0; i < NR_VMX_MSR; ++i) {
1376                 u32 index = vmx_msr_index[i];
1377                 u32 data_low, data_high;
1378                 u64 data;
1379                 int j = vcpu->nmsrs;
1380
1381                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1382                         continue;
1383                 if (wrmsr_safe(index, data_low, data_high) < 0)
1384                         continue;
1385                 data = data_low | ((u64)data_high << 32);
1386                 vcpu->host_msrs[j].index = index;
1387                 vcpu->host_msrs[j].reserved = 0;
1388                 vcpu->host_msrs[j].data = data;
1389                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1390                 ++vcpu->nmsrs;
1391         }
1392
1393         setup_msrs(vcpu);
1394
1395         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1396                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1397
1398         /* 22.2.1, 20.8.1 */
1399         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1400                                VM_ENTRY_CONTROLS, 0);
1401         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1402
1403 #ifdef CONFIG_X86_64
1404         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1405         vmcs_writel(TPR_THRESHOLD, 0);
1406 #endif
1407
1408         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1409         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1410
1411         vcpu->cr0 = 0x60000010;
1412         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1413         vmx_set_cr4(vcpu, 0);
1414 #ifdef CONFIG_X86_64
1415         vmx_set_efer(vcpu, 0);
1416 #endif
1417         vmx_fpu_activate(vcpu);
1418         update_exception_bitmap(vcpu);
1419
1420         return 0;
1421
1422 out:
1423         return ret;
1424 }
1425
1426 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1427 {
1428         u16 ent[2];
1429         u16 cs;
1430         u16 ip;
1431         unsigned long flags;
1432         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1433         u16 sp =  vmcs_readl(GUEST_RSP);
1434         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1435
1436         if (sp > ss_limit || sp < 6 ) {
1437                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1438                             __FUNCTION__,
1439                             vmcs_readl(GUEST_RSP),
1440                             vmcs_readl(GUEST_SS_BASE),
1441                             vmcs_read32(GUEST_SS_LIMIT));
1442                 return;
1443         }
1444
1445         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1446                                                                 sizeof(ent)) {
1447                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1448                 return;
1449         }
1450
1451         flags =  vmcs_readl(GUEST_RFLAGS);
1452         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1453         ip =  vmcs_readl(GUEST_RIP);
1454
1455
1456         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1457             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1458             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1459                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1460                 return;
1461         }
1462
1463         vmcs_writel(GUEST_RFLAGS, flags &
1464                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1465         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1466         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1467         vmcs_writel(GUEST_RIP, ent[0]);
1468         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1469 }
1470
1471 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1472 {
1473         int word_index = __ffs(vcpu->irq_summary);
1474         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1475         int irq = word_index * BITS_PER_LONG + bit_index;
1476
1477         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1478         if (!vcpu->irq_pending[word_index])
1479                 clear_bit(word_index, &vcpu->irq_summary);
1480
1481         if (vcpu->rmode.active) {
1482                 inject_rmode_irq(vcpu, irq);
1483                 return;
1484         }
1485         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1486                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1487 }
1488
1489
1490 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1491                                        struct kvm_run *kvm_run)
1492 {
1493         u32 cpu_based_vm_exec_control;
1494
1495         vcpu->interrupt_window_open =
1496                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1497                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1498
1499         if (vcpu->interrupt_window_open &&
1500             vcpu->irq_summary &&
1501             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1502                 /*
1503                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1504                  */
1505                 kvm_do_inject_irq(vcpu);
1506
1507         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1508         if (!vcpu->interrupt_window_open &&
1509             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1510                 /*
1511                  * Interrupts blocked.  Wait for unblock.
1512                  */
1513                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1514         else
1515                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1516         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1517 }
1518
1519 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1520 {
1521         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1522
1523         set_debugreg(dbg->bp[0], 0);
1524         set_debugreg(dbg->bp[1], 1);
1525         set_debugreg(dbg->bp[2], 2);
1526         set_debugreg(dbg->bp[3], 3);
1527
1528         if (dbg->singlestep) {
1529                 unsigned long flags;
1530
1531                 flags = vmcs_readl(GUEST_RFLAGS);
1532                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1533                 vmcs_writel(GUEST_RFLAGS, flags);
1534         }
1535 }
1536
1537 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1538                                   int vec, u32 err_code)
1539 {
1540         if (!vcpu->rmode.active)
1541                 return 0;
1542
1543         /*
1544          * Instruction with address size override prefix opcode 0x67
1545          * Cause the #SS fault with 0 error code in VM86 mode.
1546          */
1547         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1548                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1549                         return 1;
1550         return 0;
1551 }
1552
1553 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1554 {
1555         u32 intr_info, error_code;
1556         unsigned long cr2, rip;
1557         u32 vect_info;
1558         enum emulation_result er;
1559         int r;
1560
1561         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1562         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1563
1564         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1565                                                 !is_page_fault(intr_info)) {
1566                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1567                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1568         }
1569
1570         if (is_external_interrupt(vect_info)) {
1571                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1572                 set_bit(irq, vcpu->irq_pending);
1573                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1574         }
1575
1576         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1577                 asm ("int $2");
1578                 return 1;
1579         }
1580
1581         if (is_no_device(intr_info)) {
1582                 vmx_fpu_activate(vcpu);
1583                 return 1;
1584         }
1585
1586         error_code = 0;
1587         rip = vmcs_readl(GUEST_RIP);
1588         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1589                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1590         if (is_page_fault(intr_info)) {
1591                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1592
1593                 spin_lock(&vcpu->kvm->lock);
1594                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1595                 if (r < 0) {
1596                         spin_unlock(&vcpu->kvm->lock);
1597                         return r;
1598                 }
1599                 if (!r) {
1600                         spin_unlock(&vcpu->kvm->lock);
1601                         return 1;
1602                 }
1603
1604                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1605                 spin_unlock(&vcpu->kvm->lock);
1606
1607                 switch (er) {
1608                 case EMULATE_DONE:
1609                         return 1;
1610                 case EMULATE_DO_MMIO:
1611                         ++vcpu->stat.mmio_exits;
1612                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1613                         return 0;
1614                  case EMULATE_FAIL:
1615                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1616                         break;
1617                 default:
1618                         BUG();
1619                 }
1620         }
1621
1622         if (vcpu->rmode.active &&
1623             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1624                                                                 error_code)) {
1625                 if (vcpu->halt_request) {
1626                         vcpu->halt_request = 0;
1627                         return kvm_emulate_halt(vcpu);
1628                 }
1629                 return 1;
1630         }
1631
1632         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1633                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1634                 return 0;
1635         }
1636         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1637         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1638         kvm_run->ex.error_code = error_code;
1639         return 0;
1640 }
1641
1642 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1643                                      struct kvm_run *kvm_run)
1644 {
1645         ++vcpu->stat.irq_exits;
1646         return 1;
1647 }
1648
1649 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1650 {
1651         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1652         return 0;
1653 }
1654
1655 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1656 {
1657         u64 inst;
1658         gva_t rip;
1659         int countr_size;
1660         int i, n;
1661
1662         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1663                 countr_size = 2;
1664         } else {
1665                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1666
1667                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1668                               (cs_ar & AR_DB_MASK) ? 4: 2;
1669         }
1670
1671         rip =  vmcs_readl(GUEST_RIP);
1672         if (countr_size != 8)
1673                 rip += vmcs_readl(GUEST_CS_BASE);
1674
1675         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1676
1677         for (i = 0; i < n; i++) {
1678                 switch (((u8*)&inst)[i]) {
1679                 case 0xf0:
1680                 case 0xf2:
1681                 case 0xf3:
1682                 case 0x2e:
1683                 case 0x36:
1684                 case 0x3e:
1685                 case 0x26:
1686                 case 0x64:
1687                 case 0x65:
1688                 case 0x66:
1689                         break;
1690                 case 0x67:
1691                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1692                 default:
1693                         goto done;
1694                 }
1695         }
1696         return 0;
1697 done:
1698         countr_size *= 8;
1699         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1700         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1701         return 1;
1702 }
1703
1704 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1705 {
1706         u64 exit_qualification;
1707         int size, down, in, string, rep;
1708         unsigned port;
1709         unsigned long count;
1710         gva_t address;
1711
1712         ++vcpu->stat.io_exits;
1713         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1714         in = (exit_qualification & 8) != 0;
1715         size = (exit_qualification & 7) + 1;
1716         string = (exit_qualification & 16) != 0;
1717         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1718         count = 1;
1719         rep = (exit_qualification & 32) != 0;
1720         port = exit_qualification >> 16;
1721         address = 0;
1722         if (string) {
1723                 if (rep && !get_io_count(vcpu, &count))
1724                         return 1;
1725                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1726         }
1727         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1728                              address, rep, port);
1729 }
1730
1731 static void
1732 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1733 {
1734         /*
1735          * Patch in the VMCALL instruction:
1736          */
1737         hypercall[0] = 0x0f;
1738         hypercall[1] = 0x01;
1739         hypercall[2] = 0xc1;
1740         hypercall[3] = 0xc3;
1741 }
1742
1743 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1744 {
1745         u64 exit_qualification;
1746         int cr;
1747         int reg;
1748
1749         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1750         cr = exit_qualification & 15;
1751         reg = (exit_qualification >> 8) & 15;
1752         switch ((exit_qualification >> 4) & 3) {
1753         case 0: /* mov to cr */
1754                 switch (cr) {
1755                 case 0:
1756                         vcpu_load_rsp_rip(vcpu);
1757                         set_cr0(vcpu, vcpu->regs[reg]);
1758                         skip_emulated_instruction(vcpu);
1759                         return 1;
1760                 case 3:
1761                         vcpu_load_rsp_rip(vcpu);
1762                         set_cr3(vcpu, vcpu->regs[reg]);
1763                         skip_emulated_instruction(vcpu);
1764                         return 1;
1765                 case 4:
1766                         vcpu_load_rsp_rip(vcpu);
1767                         set_cr4(vcpu, vcpu->regs[reg]);
1768                         skip_emulated_instruction(vcpu);
1769                         return 1;
1770                 case 8:
1771                         vcpu_load_rsp_rip(vcpu);
1772                         set_cr8(vcpu, vcpu->regs[reg]);
1773                         skip_emulated_instruction(vcpu);
1774                         return 1;
1775                 };
1776                 break;
1777         case 2: /* clts */
1778                 vcpu_load_rsp_rip(vcpu);
1779                 vmx_fpu_deactivate(vcpu);
1780                 vcpu->cr0 &= ~CR0_TS_MASK;
1781                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1782                 vmx_fpu_activate(vcpu);
1783                 skip_emulated_instruction(vcpu);
1784                 return 1;
1785         case 1: /*mov from cr*/
1786                 switch (cr) {
1787                 case 3:
1788                         vcpu_load_rsp_rip(vcpu);
1789                         vcpu->regs[reg] = vcpu->cr3;
1790                         vcpu_put_rsp_rip(vcpu);
1791                         skip_emulated_instruction(vcpu);
1792                         return 1;
1793                 case 8:
1794                         vcpu_load_rsp_rip(vcpu);
1795                         vcpu->regs[reg] = vcpu->cr8;
1796                         vcpu_put_rsp_rip(vcpu);
1797                         skip_emulated_instruction(vcpu);
1798                         return 1;
1799                 }
1800                 break;
1801         case 3: /* lmsw */
1802                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1803
1804                 skip_emulated_instruction(vcpu);
1805                 return 1;
1806         default:
1807                 break;
1808         }
1809         kvm_run->exit_reason = 0;
1810         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1811                (int)(exit_qualification >> 4) & 3, cr);
1812         return 0;
1813 }
1814
1815 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1816 {
1817         u64 exit_qualification;
1818         unsigned long val;
1819         int dr, reg;
1820
1821         /*
1822          * FIXME: this code assumes the host is debugging the guest.
1823          *        need to deal with guest debugging itself too.
1824          */
1825         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1826         dr = exit_qualification & 7;
1827         reg = (exit_qualification >> 8) & 15;
1828         vcpu_load_rsp_rip(vcpu);
1829         if (exit_qualification & 16) {
1830                 /* mov from dr */
1831                 switch (dr) {
1832                 case 6:
1833                         val = 0xffff0ff0;
1834                         break;
1835                 case 7:
1836                         val = 0x400;
1837                         break;
1838                 default:
1839                         val = 0;
1840                 }
1841                 vcpu->regs[reg] = val;
1842         } else {
1843                 /* mov to dr */
1844         }
1845         vcpu_put_rsp_rip(vcpu);
1846         skip_emulated_instruction(vcpu);
1847         return 1;
1848 }
1849
1850 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1851 {
1852         kvm_emulate_cpuid(vcpu);
1853         return 1;
1854 }
1855
1856 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1857 {
1858         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1859         u64 data;
1860
1861         if (vmx_get_msr(vcpu, ecx, &data)) {
1862                 vmx_inject_gp(vcpu, 0);
1863                 return 1;
1864         }
1865
1866         /* FIXME: handling of bits 32:63 of rax, rdx */
1867         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1868         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1869         skip_emulated_instruction(vcpu);
1870         return 1;
1871 }
1872
1873 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1874 {
1875         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1876         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1877                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1878
1879         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1880                 vmx_inject_gp(vcpu, 0);
1881                 return 1;
1882         }
1883
1884         skip_emulated_instruction(vcpu);
1885         return 1;
1886 }
1887
1888 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1889                               struct kvm_run *kvm_run)
1890 {
1891         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1892         kvm_run->cr8 = vcpu->cr8;
1893         kvm_run->apic_base = vcpu->apic_base;
1894         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1895                                                   vcpu->irq_summary == 0);
1896 }
1897
1898 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1899                                    struct kvm_run *kvm_run)
1900 {
1901         /*
1902          * If the user space waits to inject interrupts, exit as soon as
1903          * possible
1904          */
1905         if (kvm_run->request_interrupt_window &&
1906             !vcpu->irq_summary) {
1907                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1908                 ++vcpu->stat.irq_window_exits;
1909                 return 0;
1910         }
1911         return 1;
1912 }
1913
1914 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1915 {
1916         skip_emulated_instruction(vcpu);
1917         return kvm_emulate_halt(vcpu);
1918 }
1919
1920 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1921 {
1922         skip_emulated_instruction(vcpu);
1923         return kvm_hypercall(vcpu, kvm_run);
1924 }
1925
1926 /*
1927  * The exit handlers return 1 if the exit was handled fully and guest execution
1928  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1929  * to be done to userspace and return 0.
1930  */
1931 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1932                                       struct kvm_run *kvm_run) = {
1933         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1934         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1935         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1936         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1937         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1938         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1939         [EXIT_REASON_CPUID]                   = handle_cpuid,
1940         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1941         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1942         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1943         [EXIT_REASON_HLT]                     = handle_halt,
1944         [EXIT_REASON_VMCALL]                  = handle_vmcall,
1945 };
1946
1947 static const int kvm_vmx_max_exit_handlers =
1948         ARRAY_SIZE(kvm_vmx_exit_handlers);
1949
1950 /*
1951  * The guest has exited.  See if we can fix it or if we need userspace
1952  * assistance.
1953  */
1954 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1955 {
1956         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1957         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1958
1959         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1960                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1961                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1962                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1963         if (exit_reason < kvm_vmx_max_exit_handlers
1964             && kvm_vmx_exit_handlers[exit_reason])
1965                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1966         else {
1967                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1968                 kvm_run->hw.hardware_exit_reason = exit_reason;
1969         }
1970         return 0;
1971 }
1972
1973 /*
1974  * Check if userspace requested an interrupt window, and that the
1975  * interrupt window is open.
1976  *
1977  * No need to exit to userspace if we already have an interrupt queued.
1978  */
1979 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1980                                           struct kvm_run *kvm_run)
1981 {
1982         return (!vcpu->irq_summary &&
1983                 kvm_run->request_interrupt_window &&
1984                 vcpu->interrupt_window_open &&
1985                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1986 }
1987
1988 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1989 {
1990         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1991 }
1992
1993 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1994 {
1995         u8 fail;
1996         int r;
1997
1998 preempted:
1999         if (vcpu->guest_debug.enabled)
2000                 kvm_guest_debug_pre(vcpu);
2001
2002 again:
2003         if (!vcpu->mmio_read_completed)
2004                 do_interrupt_requests(vcpu, kvm_run);
2005
2006         vmx_save_host_state(vcpu);
2007         kvm_load_guest_fpu(vcpu);
2008
2009         r = kvm_mmu_reload(vcpu);
2010         if (unlikely(r))
2011                 goto out;
2012
2013         /*
2014          * Loading guest fpu may have cleared host cr0.ts
2015          */
2016         vmcs_writel(HOST_CR0, read_cr0());
2017
2018         local_irq_disable();
2019
2020         vcpu->guest_mode = 1;
2021         if (vcpu->requests)
2022                 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
2023                     vmx_flush_tlb(vcpu);
2024
2025         asm (
2026                 /* Store host registers */
2027 #ifdef CONFIG_X86_64
2028                 "push %%rax; push %%rbx; push %%rdx;"
2029                 "push %%rsi; push %%rdi; push %%rbp;"
2030                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2031                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2032                 "push %%rcx \n\t"
2033                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2034 #else
2035                 "pusha; push %%ecx \n\t"
2036                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2037 #endif
2038                 /* Check if vmlaunch of vmresume is needed */
2039                 "cmp $0, %1 \n\t"
2040                 /* Load guest registers.  Don't clobber flags. */
2041 #ifdef CONFIG_X86_64
2042                 "mov %c[cr2](%3), %%rax \n\t"
2043                 "mov %%rax, %%cr2 \n\t"
2044                 "mov %c[rax](%3), %%rax \n\t"
2045                 "mov %c[rbx](%3), %%rbx \n\t"
2046                 "mov %c[rdx](%3), %%rdx \n\t"
2047                 "mov %c[rsi](%3), %%rsi \n\t"
2048                 "mov %c[rdi](%3), %%rdi \n\t"
2049                 "mov %c[rbp](%3), %%rbp \n\t"
2050                 "mov %c[r8](%3),  %%r8  \n\t"
2051                 "mov %c[r9](%3),  %%r9  \n\t"
2052                 "mov %c[r10](%3), %%r10 \n\t"
2053                 "mov %c[r11](%3), %%r11 \n\t"
2054                 "mov %c[r12](%3), %%r12 \n\t"
2055                 "mov %c[r13](%3), %%r13 \n\t"
2056                 "mov %c[r14](%3), %%r14 \n\t"
2057                 "mov %c[r15](%3), %%r15 \n\t"
2058                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2059 #else
2060                 "mov %c[cr2](%3), %%eax \n\t"
2061                 "mov %%eax,   %%cr2 \n\t"
2062                 "mov %c[rax](%3), %%eax \n\t"
2063                 "mov %c[rbx](%3), %%ebx \n\t"
2064                 "mov %c[rdx](%3), %%edx \n\t"
2065                 "mov %c[rsi](%3), %%esi \n\t"
2066                 "mov %c[rdi](%3), %%edi \n\t"
2067                 "mov %c[rbp](%3), %%ebp \n\t"
2068                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2069 #endif
2070                 /* Enter guest mode */
2071                 "jne .Llaunched \n\t"
2072                 ASM_VMX_VMLAUNCH "\n\t"
2073                 "jmp .Lkvm_vmx_return \n\t"
2074                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2075                 ".Lkvm_vmx_return: "
2076                 /* Save guest registers, load host registers, keep flags */
2077 #ifdef CONFIG_X86_64
2078                 "xchg %3,     (%%rsp) \n\t"
2079                 "mov %%rax, %c[rax](%3) \n\t"
2080                 "mov %%rbx, %c[rbx](%3) \n\t"
2081                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2082                 "mov %%rdx, %c[rdx](%3) \n\t"
2083                 "mov %%rsi, %c[rsi](%3) \n\t"
2084                 "mov %%rdi, %c[rdi](%3) \n\t"
2085                 "mov %%rbp, %c[rbp](%3) \n\t"
2086                 "mov %%r8,  %c[r8](%3) \n\t"
2087                 "mov %%r9,  %c[r9](%3) \n\t"
2088                 "mov %%r10, %c[r10](%3) \n\t"
2089                 "mov %%r11, %c[r11](%3) \n\t"
2090                 "mov %%r12, %c[r12](%3) \n\t"
2091                 "mov %%r13, %c[r13](%3) \n\t"
2092                 "mov %%r14, %c[r14](%3) \n\t"
2093                 "mov %%r15, %c[r15](%3) \n\t"
2094                 "mov %%cr2, %%rax   \n\t"
2095                 "mov %%rax, %c[cr2](%3) \n\t"
2096                 "mov (%%rsp), %3 \n\t"
2097
2098                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2099                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2100                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2101                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2102 #else
2103                 "xchg %3, (%%esp) \n\t"
2104                 "mov %%eax, %c[rax](%3) \n\t"
2105                 "mov %%ebx, %c[rbx](%3) \n\t"
2106                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2107                 "mov %%edx, %c[rdx](%3) \n\t"
2108                 "mov %%esi, %c[rsi](%3) \n\t"
2109                 "mov %%edi, %c[rdi](%3) \n\t"
2110                 "mov %%ebp, %c[rbp](%3) \n\t"
2111                 "mov %%cr2, %%eax  \n\t"
2112                 "mov %%eax, %c[cr2](%3) \n\t"
2113                 "mov (%%esp), %3 \n\t"
2114
2115                 "pop %%ecx; popa \n\t"
2116 #endif
2117                 "setbe %0 \n\t"
2118               : "=q" (fail)
2119               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
2120                 "c"(vcpu),
2121                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2122                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2123                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2124                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2125                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2126                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2127                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2128 #ifdef CONFIG_X86_64
2129                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2130                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2131                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2132                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2133                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2134                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2135                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2136                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2137 #endif
2138                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2139               : "cc", "memory" );
2140
2141         vcpu->guest_mode = 0;
2142         local_irq_enable();
2143
2144         ++vcpu->stat.exits;
2145
2146         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2147
2148         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2149
2150         if (unlikely(fail)) {
2151                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2152                 kvm_run->fail_entry.hardware_entry_failure_reason
2153                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2154                 r = 0;
2155                 goto out;
2156         }
2157         /*
2158          * Profile KVM exit RIPs:
2159          */
2160         if (unlikely(prof_on == KVM_PROFILING))
2161                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2162
2163         vcpu->launched = 1;
2164         r = kvm_handle_exit(kvm_run, vcpu);
2165         if (r > 0) {
2166                 /* Give scheduler a change to reschedule. */
2167                 if (signal_pending(current)) {
2168                         r = -EINTR;
2169                         kvm_run->exit_reason = KVM_EXIT_INTR;
2170                         ++vcpu->stat.signal_exits;
2171                         goto out;
2172                 }
2173
2174                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2175                         r = -EINTR;
2176                         kvm_run->exit_reason = KVM_EXIT_INTR;
2177                         ++vcpu->stat.request_irq_exits;
2178                         goto out;
2179                 }
2180                 if (!need_resched()) {
2181                         ++vcpu->stat.light_exits;
2182                         goto again;
2183                 }
2184         }
2185
2186 out:
2187         if (r > 0) {
2188                 kvm_resched(vcpu);
2189                 goto preempted;
2190         }
2191
2192         post_kvm_run_save(vcpu, kvm_run);
2193         return r;
2194 }
2195
2196 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2197                                   unsigned long addr,
2198                                   u32 err_code)
2199 {
2200         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2201
2202         ++vcpu->stat.pf_guest;
2203
2204         if (is_page_fault(vect_info)) {
2205                 printk(KERN_DEBUG "inject_page_fault: "
2206                        "double fault 0x%lx @ 0x%lx\n",
2207                        addr, vmcs_readl(GUEST_RIP));
2208                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2209                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2210                              DF_VECTOR |
2211                              INTR_TYPE_EXCEPTION |
2212                              INTR_INFO_DELIEVER_CODE_MASK |
2213                              INTR_INFO_VALID_MASK);
2214                 return;
2215         }
2216         vcpu->cr2 = addr;
2217         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2218         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2219                      PF_VECTOR |
2220                      INTR_TYPE_EXCEPTION |
2221                      INTR_INFO_DELIEVER_CODE_MASK |
2222                      INTR_INFO_VALID_MASK);
2223
2224 }
2225
2226 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2227 {
2228         if (vcpu->vmcs) {
2229                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2230                 free_vmcs(vcpu->vmcs);
2231                 vcpu->vmcs = NULL;
2232         }
2233 }
2234
2235 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2236 {
2237         vmx_free_vmcs(vcpu);
2238 }
2239
2240 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2241 {
2242         struct vmcs *vmcs;
2243
2244         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2245         if (!vcpu->guest_msrs)
2246                 return -ENOMEM;
2247
2248         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2249         if (!vcpu->host_msrs)
2250                 goto out_free_guest_msrs;
2251
2252         vmcs = alloc_vmcs();
2253         if (!vmcs)
2254                 goto out_free_msrs;
2255
2256         vmcs_clear(vmcs);
2257         vcpu->vmcs = vmcs;
2258         vcpu->launched = 0;
2259
2260         return 0;
2261
2262 out_free_msrs:
2263         kfree(vcpu->host_msrs);
2264         vcpu->host_msrs = NULL;
2265
2266 out_free_guest_msrs:
2267         kfree(vcpu->guest_msrs);
2268         vcpu->guest_msrs = NULL;
2269
2270         return -ENOMEM;
2271 }
2272
2273 static struct kvm_arch_ops vmx_arch_ops = {
2274         .cpu_has_kvm_support = cpu_has_kvm_support,
2275         .disabled_by_bios = vmx_disabled_by_bios,
2276         .hardware_setup = hardware_setup,
2277         .hardware_unsetup = hardware_unsetup,
2278         .hardware_enable = hardware_enable,
2279         .hardware_disable = hardware_disable,
2280
2281         .vcpu_create = vmx_create_vcpu,
2282         .vcpu_free = vmx_free_vcpu,
2283
2284         .vcpu_load = vmx_vcpu_load,
2285         .vcpu_put = vmx_vcpu_put,
2286         .vcpu_decache = vmx_vcpu_decache,
2287
2288         .set_guest_debug = set_guest_debug,
2289         .get_msr = vmx_get_msr,
2290         .set_msr = vmx_set_msr,
2291         .get_segment_base = vmx_get_segment_base,
2292         .get_segment = vmx_get_segment,
2293         .set_segment = vmx_set_segment,
2294         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2295         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2296         .set_cr0 = vmx_set_cr0,
2297         .set_cr3 = vmx_set_cr3,
2298         .set_cr4 = vmx_set_cr4,
2299 #ifdef CONFIG_X86_64
2300         .set_efer = vmx_set_efer,
2301 #endif
2302         .get_idt = vmx_get_idt,
2303         .set_idt = vmx_set_idt,
2304         .get_gdt = vmx_get_gdt,
2305         .set_gdt = vmx_set_gdt,
2306         .cache_regs = vcpu_load_rsp_rip,
2307         .decache_regs = vcpu_put_rsp_rip,
2308         .get_rflags = vmx_get_rflags,
2309         .set_rflags = vmx_set_rflags,
2310
2311         .tlb_flush = vmx_flush_tlb,
2312         .inject_page_fault = vmx_inject_page_fault,
2313
2314         .inject_gp = vmx_inject_gp,
2315
2316         .run = vmx_vcpu_run,
2317         .skip_emulated_instruction = skip_emulated_instruction,
2318         .vcpu_setup = vmx_vcpu_setup,
2319         .patch_hypercall = vmx_patch_hypercall,
2320 };
2321
2322 static int __init vmx_init(void)
2323 {
2324         void *iova;
2325         int r;
2326
2327         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2328         if (!vmx_io_bitmap_a)
2329                 return -ENOMEM;
2330
2331         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2332         if (!vmx_io_bitmap_b) {
2333                 r = -ENOMEM;
2334                 goto out;
2335         }
2336
2337         /*
2338          * Allow direct access to the PC debug port (it is often used for I/O
2339          * delays, but the vmexits simply slow things down).
2340          */
2341         iova = kmap(vmx_io_bitmap_a);
2342         memset(iova, 0xff, PAGE_SIZE);
2343         clear_bit(0x80, iova);
2344         kunmap(vmx_io_bitmap_a);
2345
2346         iova = kmap(vmx_io_bitmap_b);
2347         memset(iova, 0xff, PAGE_SIZE);
2348         kunmap(vmx_io_bitmap_b);
2349
2350         r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2351         if (r)
2352                 goto out1;
2353
2354         return 0;
2355
2356 out1:
2357         __free_page(vmx_io_bitmap_b);
2358 out:
2359         __free_page(vmx_io_bitmap_a);
2360         return r;
2361 }
2362
2363 static void __exit vmx_exit(void)
2364 {
2365         __free_page(vmx_io_bitmap_b);
2366         __free_page(vmx_io_bitmap_a);
2367
2368         kvm_exit_arch();
2369 }
2370
2371 module_init(vmx_init)
2372 module_exit(vmx_exit)