2 * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
5 * MPC832xE MDS board specific routines.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/reboot.h>
18 #include <linux/pci.h>
19 #include <linux/kdev_t.h>
20 #include <linux/major.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/seq_file.h>
24 #include <linux/root_dev.h>
25 #include <linux/initrd.h>
27 #include <asm/of_device.h>
28 #include <asm/system.h>
29 #include <asm/atomic.h>
32 #include <asm/machdep.h>
34 #include <asm/bootinfo.h>
38 #include <sysdev/fsl_soc.h>
40 #include <asm/qe_ic.h>
43 #include "mpc832x_mds.h"
47 #define DBG(fmt...) udbg_printf(fmt)
53 unsigned long isa_io_base = 0;
54 unsigned long isa_mem_base = 0;
57 static u8 *bcsr_regs = NULL;
64 /* ************************************************************************
66 * Setup the architecture
69 static void __init mpc832x_sys_setup_arch(void)
71 struct device_node *np;
74 ppc_md.progress("mpc832x_sys_setup_arch()", 0);
76 np = of_find_node_by_type(NULL, "cpu");
79 (int *)get_property(np, "clock-frequency", NULL);
81 loops_per_jiffy = *fp / HZ;
83 loops_per_jiffy = 50000000 / HZ;
88 np = of_find_node_by_name(NULL, "bcsr");
92 of_address_to_resource(np, 0, &res);
93 bcsr_regs = ioremap(res.start, res.end - res.start +1);
98 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
100 ppc_md.pci_exclude_device = mpc83xx_exclude_device;
103 #ifdef CONFIG_QUICC_ENGINE
106 if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
110 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
111 par_io_of_config(np);
114 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
116 /* Reset the Ethernet PHY */
117 bcsr_regs[9] &= ~0x20;
119 bcsr_regs[9] |= 0x20;
124 #endif /* CONFIG_QUICC_ENGINE */
126 #ifdef CONFIG_BLK_DEV_INITRD
128 ROOT_DEV = Root_RAM0;
131 #ifdef CONFIG_ROOT_NFS
134 ROOT_DEV = Root_HDA1;
138 static int __init mpc832x_declare_of_platform_devices(void)
140 struct device_node *np;
142 for (np = NULL; (np = of_find_compatible_node(np, "network",
143 "ucc_geth")) != NULL;) {
145 char bus_id[BUS_ID_SIZE];
147 ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
148 snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
149 of_platform_device_create(np, bus_id, NULL);
154 device_initcall(mpc832x_declare_of_platform_devices);
156 void __init mpc832x_sys_init_IRQ(void)
159 struct device_node *np;
161 np = of_find_node_by_type(NULL, "ipic");
167 /* Initialize the default interrupt mapping priorities,
168 * in case the boot rom changed something on us.
170 ipic_set_default_priority();
173 #ifdef CONFIG_QUICC_ENGINE
174 np = of_find_node_by_type(NULL, "qeic");
180 #endif /* CONFIG_QUICC_ENGINE */
183 #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
184 extern ulong ds1374_get_rtc_time(void);
185 extern int ds1374_set_rtc_time(ulong);
187 static int __init mpc832x_rtc_hookup(void)
191 ppc_md.get_rtc_time = ds1374_get_rtc_time;
192 ppc_md.set_rtc_time = ds1374_set_rtc_time;
195 tv.tv_sec = (ppc_md.get_rtc_time) ();
196 do_settimeofday(&tv);
201 late_initcall(mpc832x_rtc_hookup);
205 * Called very early, MMU is off, device-tree isn't unflattened
207 static int __init mpc832x_sys_probe(void)
209 char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
214 if (strcmp(model, "MPC8323EMDS"))
217 DBG("%s found\n", model);
222 define_machine(mpc832x_mds) {
223 .name = "MPC832x MDS",
224 .probe = mpc832x_sys_probe,
225 .setup_arch = mpc832x_sys_setup_arch,
226 .init_IRQ = mpc832x_sys_init_IRQ,
227 .get_irq = ipic_get_irq,
228 .restart = mpc83xx_restart,
229 .time_init = mpc83xx_time_init,
230 .calibrate_decr = generic_calibrate_decr,
231 .progress = udbg_progress,