2 * arch/ppc/platforms/85xx/mpc85xx_devices.c
4 * MPC85xx Device descriptions
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
8 * Copyright 2005 Freescale Semiconductor Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/device.h>
19 #include <linux/serial_8250.h>
20 #include <linux/fsl_devices.h>
21 #include <asm/mpc85xx.h>
23 #include <asm/ppc_sys.h>
25 /* We use offsets for IORESOURCE_MEM since we do not know at compile time
26 * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
29 static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
30 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
31 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
32 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
33 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
36 static struct gianfar_platform_data mpc85xx_tsec2_pdata = {
37 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
38 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
39 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
40 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
43 static struct gianfar_platform_data mpc85xx_fec_pdata = {
44 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
47 static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = {
48 .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
51 static struct plat_serial8250_port serial_platform_data[] = {
54 .irq = MPC85xx_IRQ_DUART,
56 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
60 .irq = MPC85xx_IRQ_DUART,
62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
67 struct platform_device ppc_sys_platform_devices[] = {
69 .name = "fsl-gianfar",
71 .dev.platform_data = &mpc85xx_tsec1_pdata,
73 .resource = (struct resource[]) {
75 .start = MPC85xx_ENET1_OFFSET,
76 .end = MPC85xx_ENET1_OFFSET +
77 MPC85xx_ENET1_SIZE - 1,
78 .flags = IORESOURCE_MEM,
82 .start = MPC85xx_IRQ_TSEC1_TX,
83 .end = MPC85xx_IRQ_TSEC1_TX,
84 .flags = IORESOURCE_IRQ,
88 .start = MPC85xx_IRQ_TSEC1_RX,
89 .end = MPC85xx_IRQ_TSEC1_RX,
90 .flags = IORESOURCE_IRQ,
94 .start = MPC85xx_IRQ_TSEC1_ERROR,
95 .end = MPC85xx_IRQ_TSEC1_ERROR,
96 .flags = IORESOURCE_IRQ,
101 .name = "fsl-gianfar",
103 .dev.platform_data = &mpc85xx_tsec2_pdata,
105 .resource = (struct resource[]) {
107 .start = MPC85xx_ENET2_OFFSET,
108 .end = MPC85xx_ENET2_OFFSET +
109 MPC85xx_ENET2_SIZE - 1,
110 .flags = IORESOURCE_MEM,
114 .start = MPC85xx_IRQ_TSEC2_TX,
115 .end = MPC85xx_IRQ_TSEC2_TX,
116 .flags = IORESOURCE_IRQ,
120 .start = MPC85xx_IRQ_TSEC2_RX,
121 .end = MPC85xx_IRQ_TSEC2_RX,
122 .flags = IORESOURCE_IRQ,
126 .start = MPC85xx_IRQ_TSEC2_ERROR,
127 .end = MPC85xx_IRQ_TSEC2_ERROR,
128 .flags = IORESOURCE_IRQ,
133 .name = "fsl-gianfar",
135 .dev.platform_data = &mpc85xx_fec_pdata,
137 .resource = (struct resource[]) {
139 .start = MPC85xx_ENET3_OFFSET,
140 .end = MPC85xx_ENET3_OFFSET +
141 MPC85xx_ENET3_SIZE - 1,
142 .flags = IORESOURCE_MEM,
146 .start = MPC85xx_IRQ_FEC,
147 .end = MPC85xx_IRQ_FEC,
148 .flags = IORESOURCE_IRQ,
155 .dev.platform_data = &mpc85xx_fsl_i2c_pdata,
157 .resource = (struct resource[]) {
159 .start = MPC85xx_IIC1_OFFSET,
160 .end = MPC85xx_IIC1_OFFSET +
161 MPC85xx_IIC1_SIZE - 1,
162 .flags = IORESOURCE_MEM,
165 .start = MPC85xx_IRQ_IIC1,
166 .end = MPC85xx_IRQ_IIC1,
167 .flags = IORESOURCE_IRQ,
175 .resource = (struct resource[]) {
177 .start = MPC85xx_DMA0_OFFSET,
178 .end = MPC85xx_DMA0_OFFSET +
179 MPC85xx_DMA0_SIZE - 1,
180 .flags = IORESOURCE_MEM,
183 .start = MPC85xx_IRQ_DMA0,
184 .end = MPC85xx_IRQ_DMA0,
185 .flags = IORESOURCE_IRQ,
193 .resource = (struct resource[]) {
195 .start = MPC85xx_DMA1_OFFSET,
196 .end = MPC85xx_DMA1_OFFSET +
197 MPC85xx_DMA1_SIZE - 1,
198 .flags = IORESOURCE_MEM,
201 .start = MPC85xx_IRQ_DMA1,
202 .end = MPC85xx_IRQ_DMA1,
203 .flags = IORESOURCE_IRQ,
211 .resource = (struct resource[]) {
213 .start = MPC85xx_DMA2_OFFSET,
214 .end = MPC85xx_DMA2_OFFSET +
215 MPC85xx_DMA2_SIZE - 1,
216 .flags = IORESOURCE_MEM,
219 .start = MPC85xx_IRQ_DMA2,
220 .end = MPC85xx_IRQ_DMA2,
221 .flags = IORESOURCE_IRQ,
229 .resource = (struct resource[]) {
231 .start = MPC85xx_DMA3_OFFSET,
232 .end = MPC85xx_DMA3_OFFSET +
233 MPC85xx_DMA3_SIZE - 1,
234 .flags = IORESOURCE_MEM,
237 .start = MPC85xx_IRQ_DMA3,
238 .end = MPC85xx_IRQ_DMA3,
239 .flags = IORESOURCE_IRQ,
244 .name = "serial8250",
246 .dev.platform_data = serial_platform_data,
248 [MPC85xx_PERFMON] = {
249 .name = "fsl-perfmon",
252 .resource = (struct resource[]) {
254 .start = MPC85xx_PERFMON_OFFSET,
255 .end = MPC85xx_PERFMON_OFFSET +
256 MPC85xx_PERFMON_SIZE - 1,
257 .flags = IORESOURCE_MEM,
260 .start = MPC85xx_IRQ_PERFMON,
261 .end = MPC85xx_IRQ_PERFMON,
262 .flags = IORESOURCE_IRQ,
270 .resource = (struct resource[]) {
272 .start = MPC85xx_SEC2_OFFSET,
273 .end = MPC85xx_SEC2_OFFSET +
274 MPC85xx_SEC2_SIZE - 1,
275 .flags = IORESOURCE_MEM,
278 .start = MPC85xx_IRQ_SEC2,
279 .end = MPC85xx_IRQ_SEC2,
280 .flags = IORESOURCE_IRQ,
285 [MPC85xx_CPM_FCC1] = {
286 .name = "fsl-cpm-fcc",
289 .resource = (struct resource[]) {
293 .flags = IORESOURCE_MEM,
298 .flags = IORESOURCE_MEM,
301 .start = SIU_INT_FCC1,
303 .flags = IORESOURCE_IRQ,
307 [MPC85xx_CPM_FCC2] = {
308 .name = "fsl-cpm-fcc",
311 .resource = (struct resource[]) {
315 .flags = IORESOURCE_MEM,
320 .flags = IORESOURCE_MEM,
323 .start = SIU_INT_FCC2,
325 .flags = IORESOURCE_IRQ,
329 [MPC85xx_CPM_FCC3] = {
330 .name = "fsl-cpm-fcc",
333 .resource = (struct resource[]) {
337 .flags = IORESOURCE_MEM,
342 .flags = IORESOURCE_MEM,
345 .start = SIU_INT_FCC3,
347 .flags = IORESOURCE_IRQ,
351 [MPC85xx_CPM_I2C] = {
352 .name = "fsl-cpm-i2c",
355 .resource = (struct resource[]) {
359 .flags = IORESOURCE_MEM,
362 .start = SIU_INT_I2C,
364 .flags = IORESOURCE_IRQ,
368 [MPC85xx_CPM_SCC1] = {
369 .name = "fsl-cpm-scc",
372 .resource = (struct resource[]) {
376 .flags = IORESOURCE_MEM,
379 .start = SIU_INT_SCC1,
381 .flags = IORESOURCE_IRQ,
385 [MPC85xx_CPM_SCC2] = {
386 .name = "fsl-cpm-scc",
389 .resource = (struct resource[]) {
393 .flags = IORESOURCE_MEM,
396 .start = SIU_INT_SCC2,
398 .flags = IORESOURCE_IRQ,
402 [MPC85xx_CPM_SCC3] = {
403 .name = "fsl-cpm-scc",
406 .resource = (struct resource[]) {
410 .flags = IORESOURCE_MEM,
413 .start = SIU_INT_SCC3,
415 .flags = IORESOURCE_IRQ,
419 [MPC85xx_CPM_SCC4] = {
420 .name = "fsl-cpm-scc",
423 .resource = (struct resource[]) {
427 .flags = IORESOURCE_MEM,
430 .start = SIU_INT_SCC4,
432 .flags = IORESOURCE_IRQ,
436 [MPC85xx_CPM_SPI] = {
437 .name = "fsl-cpm-spi",
440 .resource = (struct resource[]) {
444 .flags = IORESOURCE_MEM,
447 .start = SIU_INT_SPI,
449 .flags = IORESOURCE_IRQ,
453 [MPC85xx_CPM_MCC1] = {
454 .name = "fsl-cpm-mcc",
457 .resource = (struct resource[]) {
461 .flags = IORESOURCE_MEM,
464 .start = SIU_INT_MCC1,
466 .flags = IORESOURCE_IRQ,
470 [MPC85xx_CPM_MCC2] = {
471 .name = "fsl-cpm-mcc",
474 .resource = (struct resource[]) {
478 .flags = IORESOURCE_MEM,
481 .start = SIU_INT_MCC2,
483 .flags = IORESOURCE_IRQ,
487 [MPC85xx_CPM_SMC1] = {
488 .name = "fsl-cpm-smc",
491 .resource = (struct resource[]) {
495 .flags = IORESOURCE_MEM,
498 .start = SIU_INT_SMC1,
500 .flags = IORESOURCE_IRQ,
504 [MPC85xx_CPM_SMC2] = {
505 .name = "fsl-cpm-smc",
508 .resource = (struct resource[]) {
512 .flags = IORESOURCE_MEM,
515 .start = SIU_INT_SMC2,
517 .flags = IORESOURCE_IRQ,
521 [MPC85xx_CPM_USB] = {
522 .name = "fsl-cpm-usb",
525 .resource = (struct resource[]) {
529 .flags = IORESOURCE_MEM,
532 .start = SIU_INT_USB,
534 .flags = IORESOURCE_IRQ,
538 #endif /* CONFIG_CPM2 */
541 static int __init mach_mpc85xx_fixup(struct platform_device *pdev)
543 ppc_sys_fixup_mem_resource(pdev, CCSRBAR);
547 static int __init mach_mpc85xx_init(void)
549 ppc_sys_device_fixup = mach_mpc85xx_fixup;
553 postcore_initcall(mach_mpc85xx_init);