2 * linux/arch/powerpc/platforms/cell/qpace_setup.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
9 * Modified by Benjamin Krill <ben@codiert.org>, IBM Corp.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/irq.h>
22 #include <linux/console.h>
23 #include <linux/of_platform.h>
26 #include <asm/processor.h>
28 #include <asm/kexec.h>
29 #include <asm/pgtable.h>
33 #include <asm/machdep.h>
35 #include <asm/cputable.h>
38 #include <asm/spu_priv1.h>
40 #include <asm/cell-regs.h>
42 #include "interrupt.h"
43 #include "pervasive.h"
45 #include "io-workarounds.h"
47 static void qpace_show_cpuinfo(struct seq_file *m)
49 struct device_node *root;
50 const char *model = "";
52 root = of_find_node_by_path("/");
54 model = of_get_property(root, "model", NULL);
55 seq_printf(m, "machine\t\t: CHRP %s\n", model);
59 static void qpace_progress(char *s, unsigned short hex)
61 printk("*** %04x : %s\n", hex, s ? s : "");
64 static int __init qpace_publish_devices(void)
68 /* Publish OF platform devices for southbridge IOs */
69 of_platform_bus_probe(NULL, NULL, NULL);
71 /* There is no device for the MIC memory controller, thus we create
72 * a platform device for it to attach the EDAC driver to.
74 for_each_online_node(node) {
75 if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
77 platform_device_register_simple("cbe-mic", node, NULL, 0);
82 machine_subsys_initcall(qpace, qpace_publish_devices);
84 static void __init qpace_setup_arch(void)
86 #ifdef CONFIG_SPU_BASE
87 spu_priv1_ops = &spu_priv1_mmio_ops;
88 spu_management_ops = &spu_management_of_ops;
101 /* init to some ~sane value until calibrate_delay() runs */
102 loops_per_jiffy = 50000000;
104 cbe_pervasive_init();
105 #ifdef CONFIG_DUMMY_CONSOLE
106 conswitchp = &dummy_con;
110 static int __init qpace_probe(void)
112 unsigned long root = of_get_flat_dt_root();
114 if (!of_flat_dt_is_compatible(root, "IBM,QPACE"))
122 define_machine(qpace) {
124 .probe = qpace_probe,
125 .setup_arch = qpace_setup_arch,
126 .show_cpuinfo = qpace_show_cpuinfo,
127 .restart = rtas_restart,
128 .power_off = rtas_power_off,
130 .get_boot_time = rtas_get_boot_time,
131 .get_rtc_time = rtas_get_rtc_time,
132 .set_rtc_time = rtas_set_rtc_time,
133 .calibrate_decr = generic_calibrate_decr,
134 .progress = qpace_progress,
135 .init_IRQ = iic_init_IRQ,
137 .machine_kexec = default_machine_kexec,
138 .machine_kexec_prepare = default_machine_kexec_prepare,
139 .machine_crash_shutdown = default_machine_crash_shutdown,