2 * NAND flash simulator.
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
6 * Copyright (C) 2004 Nokia Corporation
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <asm/div64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/partitions.h>
38 #include <linux/delay.h>
39 #include <linux/list.h>
40 #include <linux/random.h>
41 #include <linux/sched.h>
43 #include <linux/pagemap.h>
45 /* Default simulator parameters values */
46 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
47 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
48 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
49 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
50 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
51 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
52 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
53 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
56 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
57 #define CONFIG_NANDSIM_ACCESS_DELAY 25
59 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
60 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
62 #ifndef CONFIG_NANDSIM_ERASE_DELAY
63 #define CONFIG_NANDSIM_ERASE_DELAY 2
65 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
66 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
68 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
69 #define CONFIG_NANDSIM_INPUT_CYCLE 50
71 #ifndef CONFIG_NANDSIM_BUS_WIDTH
72 #define CONFIG_NANDSIM_BUS_WIDTH 8
74 #ifndef CONFIG_NANDSIM_DO_DELAYS
75 #define CONFIG_NANDSIM_DO_DELAYS 0
77 #ifndef CONFIG_NANDSIM_LOG
78 #define CONFIG_NANDSIM_LOG 0
80 #ifndef CONFIG_NANDSIM_DBG
81 #define CONFIG_NANDSIM_DBG 0
84 static uint first_id_byte = CONFIG_NANDSIM_FIRST_ID_BYTE;
85 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
86 static uint third_id_byte = CONFIG_NANDSIM_THIRD_ID_BYTE;
87 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
88 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
89 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
90 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
91 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
92 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
93 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
94 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
95 static uint log = CONFIG_NANDSIM_LOG;
96 static uint dbg = CONFIG_NANDSIM_DBG;
97 static unsigned long parts[MAX_MTD_DEVICES];
98 static unsigned int parts_num;
99 static char *badblocks = NULL;
100 static char *weakblocks = NULL;
101 static char *weakpages = NULL;
102 static unsigned int bitflips = 0;
103 static char *gravepages = NULL;
104 static unsigned int rptwear = 0;
105 static unsigned int overridesize = 0;
106 static char *cache_file = NULL;
108 module_param(first_id_byte, uint, 0400);
109 module_param(second_id_byte, uint, 0400);
110 module_param(third_id_byte, uint, 0400);
111 module_param(fourth_id_byte, uint, 0400);
112 module_param(access_delay, uint, 0400);
113 module_param(programm_delay, uint, 0400);
114 module_param(erase_delay, uint, 0400);
115 module_param(output_cycle, uint, 0400);
116 module_param(input_cycle, uint, 0400);
117 module_param(bus_width, uint, 0400);
118 module_param(do_delays, uint, 0400);
119 module_param(log, uint, 0400);
120 module_param(dbg, uint, 0400);
121 module_param_array(parts, ulong, &parts_num, 0400);
122 module_param(badblocks, charp, 0400);
123 module_param(weakblocks, charp, 0400);
124 module_param(weakpages, charp, 0400);
125 module_param(bitflips, uint, 0400);
126 module_param(gravepages, charp, 0400);
127 module_param(rptwear, uint, 0400);
128 module_param(overridesize, uint, 0400);
129 module_param(cache_file, charp, 0400);
131 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
132 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
133 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command");
134 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
135 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
136 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
137 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
138 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanodeconds)");
139 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanodeconds)");
140 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
141 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
142 MODULE_PARM_DESC(log, "Perform logging if not zero");
143 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
144 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
145 /* Page and erase block positions for the following parameters are independent of any partitions */
146 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
147 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
148 " separated by commas e.g. 113:2 means eb 113"
149 " can be erased only twice before failing");
150 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
151 " separated by commas e.g. 1401:2 means page 1401"
152 " can be written only twice before failing");
153 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
154 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
155 " separated by commas e.g. 1401:2 means page 1401"
156 " can be read only twice before failing");
157 MODULE_PARM_DESC(rptwear, "Number of erases inbetween reporting wear, if not zero");
158 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
159 "The size is specified in erase blocks and as the exponent of a power of two"
160 " e.g. 5 means a size of 32 erase blocks");
161 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
163 /* The largest possible page size */
164 #define NS_LARGEST_PAGE_SIZE 2048
166 /* The prefix for simulator output */
167 #define NS_OUTPUT_PREFIX "[nandsim]"
169 /* Simulator's output macros (logging, debugging, warning, error) */
170 #define NS_LOG(args...) \
171 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
172 #define NS_DBG(args...) \
173 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
174 #define NS_WARN(args...) \
175 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
176 #define NS_ERR(args...) \
177 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
178 #define NS_INFO(args...) \
179 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
181 /* Busy-wait delay macros (microseconds, milliseconds) */
182 #define NS_UDELAY(us) \
183 do { if (do_delays) udelay(us); } while(0)
184 #define NS_MDELAY(us) \
185 do { if (do_delays) mdelay(us); } while(0)
187 /* Is the nandsim structure initialized ? */
188 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
190 /* Good operation completion status */
191 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
193 /* Operation failed completion status */
194 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
196 /* Calculate the page offset in flash RAM image by (row, column) address */
197 #define NS_RAW_OFFSET(ns) \
198 (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
200 /* Calculate the OOB offset in flash RAM image by (row, column) address */
201 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
203 /* After a command is input, the simulator goes to one of the following states */
204 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
205 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
206 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
207 #define STATE_CMD_PAGEPROG 0x00000004 /* start page programm */
208 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
209 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
210 #define STATE_CMD_STATUS 0x00000007 /* read status */
211 #define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */
212 #define STATE_CMD_SEQIN 0x00000009 /* sequential data imput */
213 #define STATE_CMD_READID 0x0000000A /* read ID */
214 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
215 #define STATE_CMD_RESET 0x0000000C /* reset */
216 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
217 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
218 #define STATE_CMD_MASK 0x0000000F /* command states mask */
220 /* After an address is input, the simulator goes to one of these states */
221 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
222 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
223 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
224 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
225 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
227 /* Durind data input/output the simulator is in these states */
228 #define STATE_DATAIN 0x00000100 /* waiting for data input */
229 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
231 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
232 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
233 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
234 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
235 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
237 /* Previous operation is done, ready to accept new requests */
238 #define STATE_READY 0x00000000
240 /* This state is used to mark that the next state isn't known yet */
241 #define STATE_UNKNOWN 0x10000000
243 /* Simulator's actions bit masks */
244 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
245 #define ACTION_PRGPAGE 0x00200000 /* programm the internal buffer to flash */
246 #define ACTION_SECERASE 0x00300000 /* erase sector */
247 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
248 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
249 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
250 #define ACTION_MASK 0x00700000 /* action mask */
252 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
253 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
255 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
256 #define OPT_PAGE256 0x00000001 /* 256-byte page chips */
257 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
258 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
259 #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
260 #define OPT_AUTOINCR 0x00000020 /* page number auto inctimentation is possible */
261 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
262 #define OPT_LARGEPAGE (OPT_PAGE2048) /* 2048-byte page chips */
263 #define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */
265 /* Remove action bits ftom state */
266 #define NS_STATE(x) ((x) & ~ACTION_MASK)
269 * Maximum previous states which need to be saved. Currently saving is
270 * only needed for page programm operation with preceeded read command
271 * (which is only valid for 512-byte pages).
273 #define NS_MAX_PREVSTATES 1
275 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
276 #define NS_MAX_HELD_PAGES 16
279 * A union to represent flash memory contents and flash buffer.
282 u_char *byte; /* for byte access */
283 uint16_t *word; /* for 16-bit word access */
287 * The structure which describes all the internal simulator data.
290 struct mtd_partition partitions[MAX_MTD_DEVICES];
291 unsigned int nbparts;
293 uint busw; /* flash chip bus width (8 or 16) */
294 u_char ids[4]; /* chip's ID bytes */
295 uint32_t options; /* chip's characteristic bits */
296 uint32_t state; /* current chip state */
297 uint32_t nxstate; /* next expected state */
299 uint32_t *op; /* current operation, NULL operations isn't known yet */
300 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
301 uint16_t npstates; /* number of previous states saved */
302 uint16_t stateidx; /* current state index */
304 /* The simulated NAND flash pages array */
307 /* Slab allocator for nand pages */
308 struct kmem_cache *nand_pages_slab;
310 /* Internal buffer of page + OOB size bytes */
313 /* NAND flash "geometry" */
314 struct nandsin_geometry {
315 uint64_t totsz; /* total flash size, bytes */
316 uint32_t secsz; /* flash sector (erase block) size, bytes */
317 uint pgsz; /* NAND flash page size, bytes */
318 uint oobsz; /* page OOB area size, bytes */
319 uint64_t totszoob; /* total flash size including OOB, bytes */
320 uint pgszoob; /* page size including OOB , bytes*/
321 uint secszoob; /* sector size including OOB, bytes */
322 uint pgnum; /* total number of pages */
323 uint pgsec; /* number of pages per sector */
324 uint secshift; /* bits number in sector size */
325 uint pgshift; /* bits number in page size */
326 uint oobshift; /* bits number in OOB size */
327 uint pgaddrbytes; /* bytes per page address */
328 uint secaddrbytes; /* bytes per sector address */
329 uint idbytes; /* the number ID bytes that this chip outputs */
332 /* NAND flash internal registers */
333 struct nandsim_regs {
334 unsigned command; /* the command register */
335 u_char status; /* the status register */
336 uint row; /* the page number */
337 uint column; /* the offset within page */
338 uint count; /* internal counter */
339 uint num; /* number of bytes which must be processed */
340 uint off; /* fixed page offset */
343 /* NAND flash lines state */
344 struct ns_lines_status {
345 int ce; /* chip Enable */
346 int cle; /* command Latch Enable */
347 int ale; /* address Latch Enable */
348 int wp; /* write Protect */
351 /* Fields needed when using a cache file */
352 struct file *cfile; /* Open file */
353 unsigned char *pages_written; /* Which pages have been written */
355 struct page *held_pages[NS_MAX_HELD_PAGES];
360 * Operations array. To perform any operation the simulator must pass
361 * through the correspondent states chain.
363 static struct nandsim_operations {
364 uint32_t reqopts; /* options which are required to perform the operation */
365 uint32_t states[NS_OPER_STATES]; /* operation's states */
366 } ops[NS_OPER_NUM] = {
367 /* Read page + OOB from the beginning */
368 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
369 STATE_DATAOUT, STATE_READY}},
370 /* Read page + OOB from the second half */
371 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
372 STATE_DATAOUT, STATE_READY}},
374 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
375 STATE_DATAOUT, STATE_READY}},
376 /* Programm page starting from the beginning */
377 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
378 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
379 /* Programm page starting from the beginning */
380 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
381 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
382 /* Programm page starting from the second half */
383 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
384 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
386 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
387 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
389 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
391 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
392 /* Read multi-plane status */
393 {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
395 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
396 /* Large page devices read page */
397 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
398 STATE_DATAOUT, STATE_READY}},
399 /* Large page devices random page read */
400 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
401 STATE_DATAOUT, STATE_READY}},
405 struct list_head list;
406 unsigned int erase_block_no;
407 unsigned int max_erases;
408 unsigned int erases_done;
411 static LIST_HEAD(weak_blocks);
414 struct list_head list;
415 unsigned int page_no;
416 unsigned int max_writes;
417 unsigned int writes_done;
420 static LIST_HEAD(weak_pages);
423 struct list_head list;
424 unsigned int page_no;
425 unsigned int max_reads;
426 unsigned int reads_done;
429 static LIST_HEAD(grave_pages);
431 static unsigned long *erase_block_wear = NULL;
432 static unsigned int wear_eb_count = 0;
433 static unsigned long total_wear = 0;
434 static unsigned int rptwear_cnt = 0;
436 /* MTD structure for NAND controller */
437 static struct mtd_info *nsmtd;
439 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
442 * Allocate array of page pointers, create slab allocation for an array
443 * and initialize the array by NULL pointers.
445 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
447 static int alloc_device(struct nandsim *ns)
453 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
455 return PTR_ERR(cfile);
456 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
457 NS_ERR("alloc_device: cache file not readable\n");
461 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
462 NS_ERR("alloc_device: cache file not writeable\n");
466 ns->pages_written = vmalloc(ns->geom.pgnum);
467 if (!ns->pages_written) {
468 NS_ERR("alloc_device: unable to allocate pages written array\n");
472 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
474 NS_ERR("alloc_device: unable to allocate file buf\n");
479 memset(ns->pages_written, 0, ns->geom.pgnum);
483 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
485 NS_ERR("alloc_device: unable to allocate page array\n");
488 for (i = 0; i < ns->geom.pgnum; i++) {
489 ns->pages[i].byte = NULL;
491 ns->nand_pages_slab = kmem_cache_create("nandsim",
492 ns->geom.pgszoob, 0, 0, NULL);
493 if (!ns->nand_pages_slab) {
494 NS_ERR("cache_create: unable to create kmem_cache\n");
501 vfree(ns->pages_written);
503 filp_close(cfile, NULL);
508 * Free any allocated pages, and free the array of page pointers.
510 static void free_device(struct nandsim *ns)
516 vfree(ns->pages_written);
517 filp_close(ns->cfile, NULL);
522 for (i = 0; i < ns->geom.pgnum; i++) {
523 if (ns->pages[i].byte)
524 kmem_cache_free(ns->nand_pages_slab,
527 kmem_cache_destroy(ns->nand_pages_slab);
532 static char *get_partition_name(int i)
535 sprintf(buf, "NAND simulator partition %d", i);
536 return kstrdup(buf, GFP_KERNEL);
539 static uint64_t divide(uint64_t n, uint32_t d)
546 * Initialize the nandsim structure.
548 * RETURNS: 0 if success, -ERRNO if failure.
550 static int init_nandsim(struct mtd_info *mtd)
552 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
553 struct nandsim *ns = (struct nandsim *)(chip->priv);
556 uint64_t next_offset;
558 if (NS_IS_INITIALIZED(ns)) {
559 NS_ERR("init_nandsim: nandsim is already initialized\n");
563 /* Force mtd to not do delays */
564 chip->chip_delay = 0;
566 /* Initialize the NAND flash parameters */
567 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
568 ns->geom.totsz = mtd->size;
569 ns->geom.pgsz = mtd->writesize;
570 ns->geom.oobsz = mtd->oobsize;
571 ns->geom.secsz = mtd->erasesize;
572 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
573 ns->geom.pgnum = divide(ns->geom.totsz, ns->geom.pgsz);
574 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
575 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
576 ns->geom.pgshift = chip->page_shift;
577 ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
578 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
579 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
582 if (ns->geom.pgsz == 256) {
583 ns->options |= OPT_PAGE256;
585 else if (ns->geom.pgsz == 512) {
586 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
588 ns->options |= OPT_PAGE512_8BIT;
589 } else if (ns->geom.pgsz == 2048) {
590 ns->options |= OPT_PAGE2048;
592 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
596 if (ns->options & OPT_SMALLPAGE) {
597 if (ns->geom.totsz <= (32 << 20)) {
598 ns->geom.pgaddrbytes = 3;
599 ns->geom.secaddrbytes = 2;
601 ns->geom.pgaddrbytes = 4;
602 ns->geom.secaddrbytes = 3;
605 if (ns->geom.totsz <= (128 << 20)) {
606 ns->geom.pgaddrbytes = 4;
607 ns->geom.secaddrbytes = 2;
609 ns->geom.pgaddrbytes = 5;
610 ns->geom.secaddrbytes = 3;
614 /* Fill the partition_info structure */
615 if (parts_num > ARRAY_SIZE(ns->partitions)) {
616 NS_ERR("too many partitions.\n");
620 remains = ns->geom.totsz;
622 for (i = 0; i < parts_num; ++i) {
623 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
625 if (!part_sz || part_sz > remains) {
626 NS_ERR("bad partition size.\n");
630 ns->partitions[i].name = get_partition_name(i);
631 ns->partitions[i].offset = next_offset;
632 ns->partitions[i].size = part_sz;
633 next_offset += ns->partitions[i].size;
634 remains -= ns->partitions[i].size;
636 ns->nbparts = parts_num;
638 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
639 NS_ERR("too many partitions.\n");
643 ns->partitions[i].name = get_partition_name(i);
644 ns->partitions[i].offset = next_offset;
645 ns->partitions[i].size = remains;
649 /* Detect how many ID bytes the NAND chip outputs */
650 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
651 if (second_id_byte != nand_flash_ids[i].id)
653 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
654 ns->options |= OPT_AUTOINCR;
658 NS_WARN("16-bit flashes support wasn't tested\n");
660 printk("flash size: %llu MiB\n",
661 (unsigned long long)ns->geom.totsz >> 20);
662 printk("page size: %u bytes\n", ns->geom.pgsz);
663 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
664 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
665 printk("pages number: %u\n", ns->geom.pgnum);
666 printk("pages per sector: %u\n", ns->geom.pgsec);
667 printk("bus width: %u\n", ns->busw);
668 printk("bits in sector size: %u\n", ns->geom.secshift);
669 printk("bits in page size: %u\n", ns->geom.pgshift);
670 printk("bits in OOB size: %u\n", ns->geom.oobshift);
671 printk("flash size with OOB: %llu KiB\n",
672 (unsigned long long)ns->geom.totszoob >> 10);
673 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
674 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
675 printk("options: %#x\n", ns->options);
677 if ((ret = alloc_device(ns)) != 0)
680 /* Allocate / initialize the internal buffer */
681 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
683 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
688 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
699 * Free the nandsim structure.
701 static void free_nandsim(struct nandsim *ns)
709 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
713 unsigned int erase_block_no;
720 zero_ok = (*w == '0' ? 1 : 0);
721 erase_block_no = simple_strtoul(w, &w, 0);
722 if (!zero_ok && !erase_block_no) {
723 NS_ERR("invalid badblocks.\n");
726 offset = erase_block_no * ns->geom.secsz;
727 if (mtd->block_markbad(mtd, offset)) {
728 NS_ERR("invalid badblocks.\n");
737 static int parse_weakblocks(void)
741 unsigned int erase_block_no;
742 unsigned int max_erases;
743 struct weak_block *wb;
749 zero_ok = (*w == '0' ? 1 : 0);
750 erase_block_no = simple_strtoul(w, &w, 0);
751 if (!zero_ok && !erase_block_no) {
752 NS_ERR("invalid weakblocks.\n");
758 max_erases = simple_strtoul(w, &w, 0);
762 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
764 NS_ERR("unable to allocate memory.\n");
767 wb->erase_block_no = erase_block_no;
768 wb->max_erases = max_erases;
769 list_add(&wb->list, &weak_blocks);
774 static int erase_error(unsigned int erase_block_no)
776 struct weak_block *wb;
778 list_for_each_entry(wb, &weak_blocks, list)
779 if (wb->erase_block_no == erase_block_no) {
780 if (wb->erases_done >= wb->max_erases)
782 wb->erases_done += 1;
788 static int parse_weakpages(void)
792 unsigned int page_no;
793 unsigned int max_writes;
794 struct weak_page *wp;
800 zero_ok = (*w == '0' ? 1 : 0);
801 page_no = simple_strtoul(w, &w, 0);
802 if (!zero_ok && !page_no) {
803 NS_ERR("invalid weakpagess.\n");
809 max_writes = simple_strtoul(w, &w, 0);
813 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
815 NS_ERR("unable to allocate memory.\n");
818 wp->page_no = page_no;
819 wp->max_writes = max_writes;
820 list_add(&wp->list, &weak_pages);
825 static int write_error(unsigned int page_no)
827 struct weak_page *wp;
829 list_for_each_entry(wp, &weak_pages, list)
830 if (wp->page_no == page_no) {
831 if (wp->writes_done >= wp->max_writes)
833 wp->writes_done += 1;
839 static int parse_gravepages(void)
843 unsigned int page_no;
844 unsigned int max_reads;
845 struct grave_page *gp;
851 zero_ok = (*g == '0' ? 1 : 0);
852 page_no = simple_strtoul(g, &g, 0);
853 if (!zero_ok && !page_no) {
854 NS_ERR("invalid gravepagess.\n");
860 max_reads = simple_strtoul(g, &g, 0);
864 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
866 NS_ERR("unable to allocate memory.\n");
869 gp->page_no = page_no;
870 gp->max_reads = max_reads;
871 list_add(&gp->list, &grave_pages);
876 static int read_error(unsigned int page_no)
878 struct grave_page *gp;
880 list_for_each_entry(gp, &grave_pages, list)
881 if (gp->page_no == page_no) {
882 if (gp->reads_done >= gp->max_reads)
890 static void free_lists(void)
892 struct list_head *pos, *n;
893 list_for_each_safe(pos, n, &weak_blocks) {
895 kfree(list_entry(pos, struct weak_block, list));
897 list_for_each_safe(pos, n, &weak_pages) {
899 kfree(list_entry(pos, struct weak_page, list));
901 list_for_each_safe(pos, n, &grave_pages) {
903 kfree(list_entry(pos, struct grave_page, list));
905 kfree(erase_block_wear);
908 static int setup_wear_reporting(struct mtd_info *mtd)
914 wear_eb_count = divide(mtd->size, mtd->erasesize);
915 mem = wear_eb_count * sizeof(unsigned long);
916 if (mem / sizeof(unsigned long) != wear_eb_count) {
917 NS_ERR("Too many erase blocks for wear reporting\n");
920 erase_block_wear = kzalloc(mem, GFP_KERNEL);
921 if (!erase_block_wear) {
922 NS_ERR("Too many erase blocks for wear reporting\n");
928 static void update_wear(unsigned int erase_block_no)
930 unsigned long wmin = -1, wmax = 0, avg;
931 unsigned long deciles[10], decile_max[10], tot = 0;
934 if (!erase_block_wear)
938 NS_ERR("Erase counter total overflow\n");
939 erase_block_wear[erase_block_no] += 1;
940 if (erase_block_wear[erase_block_no] == 0)
941 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
943 if (rptwear_cnt < rptwear)
946 /* Calc wear stats */
947 for (i = 0; i < wear_eb_count; ++i) {
948 unsigned long wear = erase_block_wear[i];
955 for (i = 0; i < 9; ++i) {
957 decile_max[i] = (wmax * (i + 1) + 5) / 10;
960 decile_max[9] = wmax;
961 for (i = 0; i < wear_eb_count; ++i) {
963 unsigned long wear = erase_block_wear[i];
964 for (d = 0; d < 10; ++d)
965 if (wear <= decile_max[d]) {
970 avg = tot / wear_eb_count;
971 /* Output wear report */
972 NS_INFO("*** Wear Report ***\n");
973 NS_INFO("Total numbers of erases: %lu\n", tot);
974 NS_INFO("Number of erase blocks: %u\n", wear_eb_count);
975 NS_INFO("Average number of erases: %lu\n", avg);
976 NS_INFO("Maximum number of erases: %lu\n", wmax);
977 NS_INFO("Minimum number of erases: %lu\n", wmin);
978 for (i = 0; i < 10; ++i) {
979 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
980 if (from > decile_max[i])
982 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
987 NS_INFO("*** End of Wear Report ***\n");
991 * Returns the string representation of 'state' state.
993 static char *get_state_name(uint32_t state)
995 switch (NS_STATE(state)) {
996 case STATE_CMD_READ0:
997 return "STATE_CMD_READ0";
998 case STATE_CMD_READ1:
999 return "STATE_CMD_READ1";
1000 case STATE_CMD_PAGEPROG:
1001 return "STATE_CMD_PAGEPROG";
1002 case STATE_CMD_READOOB:
1003 return "STATE_CMD_READOOB";
1004 case STATE_CMD_READSTART:
1005 return "STATE_CMD_READSTART";
1006 case STATE_CMD_ERASE1:
1007 return "STATE_CMD_ERASE1";
1008 case STATE_CMD_STATUS:
1009 return "STATE_CMD_STATUS";
1010 case STATE_CMD_STATUS_M:
1011 return "STATE_CMD_STATUS_M";
1012 case STATE_CMD_SEQIN:
1013 return "STATE_CMD_SEQIN";
1014 case STATE_CMD_READID:
1015 return "STATE_CMD_READID";
1016 case STATE_CMD_ERASE2:
1017 return "STATE_CMD_ERASE2";
1018 case STATE_CMD_RESET:
1019 return "STATE_CMD_RESET";
1020 case STATE_CMD_RNDOUT:
1021 return "STATE_CMD_RNDOUT";
1022 case STATE_CMD_RNDOUTSTART:
1023 return "STATE_CMD_RNDOUTSTART";
1024 case STATE_ADDR_PAGE:
1025 return "STATE_ADDR_PAGE";
1026 case STATE_ADDR_SEC:
1027 return "STATE_ADDR_SEC";
1028 case STATE_ADDR_ZERO:
1029 return "STATE_ADDR_ZERO";
1030 case STATE_ADDR_COLUMN:
1031 return "STATE_ADDR_COLUMN";
1033 return "STATE_DATAIN";
1035 return "STATE_DATAOUT";
1036 case STATE_DATAOUT_ID:
1037 return "STATE_DATAOUT_ID";
1038 case STATE_DATAOUT_STATUS:
1039 return "STATE_DATAOUT_STATUS";
1040 case STATE_DATAOUT_STATUS_M:
1041 return "STATE_DATAOUT_STATUS_M";
1043 return "STATE_READY";
1045 return "STATE_UNKNOWN";
1048 NS_ERR("get_state_name: unknown state, BUG\n");
1053 * Check if command is valid.
1055 * RETURNS: 1 if wrong command, 0 if right.
1057 static int check_command(int cmd)
1061 case NAND_CMD_READ0:
1062 case NAND_CMD_READ1:
1063 case NAND_CMD_READSTART:
1064 case NAND_CMD_PAGEPROG:
1065 case NAND_CMD_READOOB:
1066 case NAND_CMD_ERASE1:
1067 case NAND_CMD_STATUS:
1068 case NAND_CMD_SEQIN:
1069 case NAND_CMD_READID:
1070 case NAND_CMD_ERASE2:
1071 case NAND_CMD_RESET:
1072 case NAND_CMD_RNDOUT:
1073 case NAND_CMD_RNDOUTSTART:
1076 case NAND_CMD_STATUS_MULTI:
1083 * Returns state after command is accepted by command number.
1085 static uint32_t get_state_by_command(unsigned command)
1088 case NAND_CMD_READ0:
1089 return STATE_CMD_READ0;
1090 case NAND_CMD_READ1:
1091 return STATE_CMD_READ1;
1092 case NAND_CMD_PAGEPROG:
1093 return STATE_CMD_PAGEPROG;
1094 case NAND_CMD_READSTART:
1095 return STATE_CMD_READSTART;
1096 case NAND_CMD_READOOB:
1097 return STATE_CMD_READOOB;
1098 case NAND_CMD_ERASE1:
1099 return STATE_CMD_ERASE1;
1100 case NAND_CMD_STATUS:
1101 return STATE_CMD_STATUS;
1102 case NAND_CMD_STATUS_MULTI:
1103 return STATE_CMD_STATUS_M;
1104 case NAND_CMD_SEQIN:
1105 return STATE_CMD_SEQIN;
1106 case NAND_CMD_READID:
1107 return STATE_CMD_READID;
1108 case NAND_CMD_ERASE2:
1109 return STATE_CMD_ERASE2;
1110 case NAND_CMD_RESET:
1111 return STATE_CMD_RESET;
1112 case NAND_CMD_RNDOUT:
1113 return STATE_CMD_RNDOUT;
1114 case NAND_CMD_RNDOUTSTART:
1115 return STATE_CMD_RNDOUTSTART;
1118 NS_ERR("get_state_by_command: unknown command, BUG\n");
1123 * Move an address byte to the correspondent internal register.
1125 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1127 uint byte = (uint)bt;
1129 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1130 ns->regs.column |= (byte << 8 * ns->regs.count);
1132 ns->regs.row |= (byte << 8 * (ns->regs.count -
1133 ns->geom.pgaddrbytes +
1134 ns->geom.secaddrbytes));
1141 * Switch to STATE_READY state.
1143 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1145 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1147 ns->state = STATE_READY;
1148 ns->nxstate = STATE_UNKNOWN;
1156 ns->regs.column = 0;
1157 ns->regs.status = status;
1161 * If the operation isn't known yet, try to find it in the global array
1162 * of supported operations.
1164 * Operation can be unknown because of the following.
1165 * 1. New command was accepted and this is the firs call to find the
1166 * correspondent states chain. In this case ns->npstates = 0;
1167 * 2. There is several operations which begin with the same command(s)
1168 * (for example program from the second half and read from the
1169 * second half operations both begin with the READ1 command). In this
1170 * case the ns->pstates[] array contains previous states.
1172 * Thus, the function tries to find operation containing the following
1173 * states (if the 'flag' parameter is 0):
1174 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1176 * If (one and only one) matching operation is found, it is accepted (
1177 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1180 * If there are several maches, the current state is pushed to the
1183 * The operation can be unknown only while commands are input to the chip.
1184 * As soon as address command is accepted, the operation must be known.
1185 * In such situation the function is called with 'flag' != 0, and the
1186 * operation is searched using the following pattern:
1187 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1189 * It is supposed that this pattern must either match one operation on
1190 * none. There can't be ambiguity in that case.
1192 * If no matches found, the functions does the following:
1193 * 1. if there are saved states present, try to ignore them and search
1194 * again only using the last command. If nothing was found, switch
1195 * to the STATE_READY state.
1196 * 2. if there are no saved states, switch to the STATE_READY state.
1198 * RETURNS: -2 - no matched operations found.
1199 * -1 - several matches.
1200 * 0 - operation is found.
1202 static int find_operation(struct nandsim *ns, uint32_t flag)
1207 for (i = 0; i < NS_OPER_NUM; i++) {
1211 if (!(ns->options & ops[i].reqopts))
1212 /* Ignore operations we can't perform */
1216 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1219 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1223 for (j = 0; j < ns->npstates; j++)
1224 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1225 && (ns->options & ops[idx].reqopts)) {
1236 if (opsfound == 1) {
1238 ns->op = &ops[idx].states[0];
1241 * In this case the find_operation function was
1242 * called when address has just began input. But it isn't
1243 * yet fully input and the current state must
1244 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1245 * state must be the next state (ns->nxstate).
1247 ns->stateidx = ns->npstates - 1;
1249 ns->stateidx = ns->npstates;
1252 ns->state = ns->op[ns->stateidx];
1253 ns->nxstate = ns->op[ns->stateidx + 1];
1254 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1255 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1259 if (opsfound == 0) {
1260 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1261 if (ns->npstates != 0) {
1262 NS_DBG("find_operation: no operation found, try again with state %s\n",
1263 get_state_name(ns->state));
1265 return find_operation(ns, 0);
1268 NS_DBG("find_operation: no operations found\n");
1269 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1274 /* This shouldn't happen */
1275 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1279 NS_DBG("find_operation: there is still ambiguity\n");
1281 ns->pstates[ns->npstates++] = ns->state;
1286 static void put_pages(struct nandsim *ns)
1290 for (i = 0; i < ns->held_cnt; i++)
1291 page_cache_release(ns->held_pages[i]);
1294 /* Get page cache pages in advance to provide NOFS memory allocation */
1295 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1297 pgoff_t index, start_index, end_index;
1299 struct address_space *mapping = file->f_mapping;
1301 start_index = pos >> PAGE_CACHE_SHIFT;
1302 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1303 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1306 for (index = start_index; index <= end_index; index++) {
1307 page = find_get_page(mapping, index);
1309 page = find_or_create_page(mapping, index, GFP_NOFS);
1311 write_inode_now(mapping->host, 1);
1312 page = find_or_create_page(mapping, index, GFP_NOFS);
1320 ns->held_pages[ns->held_cnt++] = page;
1325 static int set_memalloc(void)
1327 if (current->flags & PF_MEMALLOC)
1329 current->flags |= PF_MEMALLOC;
1333 static void clear_memalloc(int memalloc)
1336 current->flags &= ~PF_MEMALLOC;
1339 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1341 mm_segment_t old_fs;
1345 err = get_pages(ns, file, count, *pos);
1350 memalloc = set_memalloc();
1351 tx = vfs_read(file, (char __user *)buf, count, pos);
1352 clear_memalloc(memalloc);
1358 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1360 mm_segment_t old_fs;
1364 err = get_pages(ns, file, count, *pos);
1369 memalloc = set_memalloc();
1370 tx = vfs_write(file, (char __user *)buf, count, pos);
1371 clear_memalloc(memalloc);
1378 * Returns a pointer to the current page.
1380 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1382 return &(ns->pages[ns->regs.row]);
1386 * Retuns a pointer to the current byte, within the current page.
1388 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1390 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1393 int do_read_error(struct nandsim *ns, int num)
1395 unsigned int page_no = ns->regs.row;
1397 if (read_error(page_no)) {
1399 memset(ns->buf.byte, 0xFF, num);
1400 for (i = 0; i < num; ++i)
1401 ns->buf.byte[i] = random32();
1402 NS_WARN("simulating read error in page %u\n", page_no);
1408 void do_bit_flips(struct nandsim *ns, int num)
1410 if (bitflips && random32() < (1 << 22)) {
1413 flips = (random32() % (int) bitflips) + 1;
1415 int pos = random32() % (num * 8);
1416 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1417 NS_WARN("read_page: flipping bit %d in page %d "
1418 "reading from %d ecc: corrected=%u failed=%u\n",
1419 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1420 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1426 * Fill the NAND buffer with data read from the specified page.
1428 static void read_page(struct nandsim *ns, int num)
1430 union ns_mem *mypage;
1433 if (!ns->pages_written[ns->regs.row]) {
1434 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1435 memset(ns->buf.byte, 0xFF, num);
1440 NS_DBG("read_page: page %d written, reading from %d\n",
1441 ns->regs.row, ns->regs.column + ns->regs.off);
1442 if (do_read_error(ns, num))
1444 pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1445 tx = read_file(ns, ns->cfile, ns->buf.byte, num, &pos);
1447 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1450 do_bit_flips(ns, num);
1455 mypage = NS_GET_PAGE(ns);
1456 if (mypage->byte == NULL) {
1457 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1458 memset(ns->buf.byte, 0xFF, num);
1460 NS_DBG("read_page: page %d allocated, reading from %d\n",
1461 ns->regs.row, ns->regs.column + ns->regs.off);
1462 if (do_read_error(ns, num))
1464 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1465 do_bit_flips(ns, num);
1470 * Erase all pages in the specified sector.
1472 static void erase_sector(struct nandsim *ns)
1474 union ns_mem *mypage;
1478 for (i = 0; i < ns->geom.pgsec; i++)
1479 if (ns->pages_written[ns->regs.row + i]) {
1480 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1481 ns->pages_written[ns->regs.row + i] = 0;
1486 mypage = NS_GET_PAGE(ns);
1487 for (i = 0; i < ns->geom.pgsec; i++) {
1488 if (mypage->byte != NULL) {
1489 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1490 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1491 mypage->byte = NULL;
1498 * Program the specified page with the contents from the NAND buffer.
1500 static int prog_page(struct nandsim *ns, int num)
1503 union ns_mem *mypage;
1511 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1512 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1513 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1514 if (!ns->pages_written[ns->regs.row]) {
1516 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1520 tx = read_file(ns, ns->cfile, pg_off, num, &pos);
1522 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1526 for (i = 0; i < num; i++)
1527 pg_off[i] &= ns->buf.byte[i];
1529 pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1530 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, &pos);
1531 if (tx != ns->geom.pgszoob) {
1532 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1535 ns->pages_written[ns->regs.row] = 1;
1538 tx = write_file(ns, ns->cfile, pg_off, num, &pos);
1540 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1547 mypage = NS_GET_PAGE(ns);
1548 if (mypage->byte == NULL) {
1549 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1551 * We allocate memory with GFP_NOFS because a flash FS may
1552 * utilize this. If it is holding an FS lock, then gets here,
1553 * then kernel memory alloc runs writeback which goes to the FS
1554 * again and deadlocks. This was seen in practice.
1556 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1557 if (mypage->byte == NULL) {
1558 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1561 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1564 pg_off = NS_PAGE_BYTE_OFF(ns);
1565 for (i = 0; i < num; i++)
1566 pg_off[i] &= ns->buf.byte[i];
1572 * If state has any action bit, perform this action.
1574 * RETURNS: 0 if success, -1 if error.
1576 static int do_state_action(struct nandsim *ns, uint32_t action)
1579 int busdiv = ns->busw == 8 ? 1 : 2;
1580 unsigned int erase_block_no, page_no;
1582 action &= ACTION_MASK;
1584 /* Check that page address input is correct */
1585 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1586 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1594 * Copy page data to the internal buffer.
1597 /* Column shouldn't be very large */
1598 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1599 NS_ERR("do_state_action: column number is too large\n");
1602 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1605 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1606 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1608 if (ns->regs.off == 0)
1609 NS_LOG("read page %d\n", ns->regs.row);
1610 else if (ns->regs.off < ns->geom.pgsz)
1611 NS_LOG("read page %d (second half)\n", ns->regs.row);
1613 NS_LOG("read OOB of page %d\n", ns->regs.row);
1615 NS_UDELAY(access_delay);
1616 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1620 case ACTION_SECERASE:
1626 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1630 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1631 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1632 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1636 ns->regs.row = (ns->regs.row <<
1637 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1638 ns->regs.column = 0;
1640 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1642 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1643 ns->regs.row, NS_RAW_OFFSET(ns));
1644 NS_LOG("erase sector %u\n", erase_block_no);
1648 NS_MDELAY(erase_delay);
1650 if (erase_block_wear)
1651 update_wear(erase_block_no);
1653 if (erase_error(erase_block_no)) {
1654 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1660 case ACTION_PRGPAGE:
1662 * Programm page - move internal buffer data to the page.
1666 NS_WARN("do_state_action: device is write-protected, programm\n");
1670 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1671 if (num != ns->regs.count) {
1672 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1673 ns->regs.count, num);
1677 if (prog_page(ns, num) == -1)
1680 page_no = ns->regs.row;
1682 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1683 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1684 NS_LOG("programm page %d\n", ns->regs.row);
1686 NS_UDELAY(programm_delay);
1687 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1689 if (write_error(page_no)) {
1690 NS_WARN("simulating write failure in page %u\n", page_no);
1696 case ACTION_ZEROOFF:
1697 NS_DBG("do_state_action: set internal offset to 0\n");
1701 case ACTION_HALFOFF:
1702 if (!(ns->options & OPT_PAGE512_8BIT)) {
1703 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1704 "byte page size 8x chips\n");
1707 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1708 ns->regs.off = ns->geom.pgsz/2;
1712 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1713 ns->regs.off = ns->geom.pgsz;
1717 NS_DBG("do_state_action: BUG! unknown action\n");
1724 * Switch simulator's state.
1726 static void switch_state(struct nandsim *ns)
1730 * The current operation have already been identified.
1731 * Just follow the states chain.
1735 ns->state = ns->nxstate;
1736 ns->nxstate = ns->op[ns->stateidx + 1];
1738 NS_DBG("switch_state: operation is known, switch to the next state, "
1739 "state: %s, nxstate: %s\n",
1740 get_state_name(ns->state), get_state_name(ns->nxstate));
1742 /* See, whether we need to do some action */
1743 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1744 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1750 * We don't yet know which operation we perform.
1751 * Try to identify it.
1755 * The only event causing the switch_state function to
1756 * be called with yet unknown operation is new command.
1758 ns->state = get_state_by_command(ns->regs.command);
1760 NS_DBG("switch_state: operation is unknown, try to find it\n");
1762 if (find_operation(ns, 0) != 0)
1765 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1766 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1771 /* For 16x devices column means the page offset in words */
1772 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1773 NS_DBG("switch_state: double the column number for 16x device\n");
1774 ns->regs.column <<= 1;
1777 if (NS_STATE(ns->nxstate) == STATE_READY) {
1779 * The current state is the last. Return to STATE_READY
1782 u_char status = NS_STATUS_OK(ns);
1784 /* In case of data states, see if all bytes were input/output */
1785 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1786 && ns->regs.count != ns->regs.num) {
1787 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1788 ns->regs.num - ns->regs.count);
1789 status = NS_STATUS_FAILED(ns);
1792 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1794 switch_to_ready_state(ns, status);
1797 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1799 * If the next state is data input/output, switch to it now
1802 ns->state = ns->nxstate;
1803 ns->nxstate = ns->op[++ns->stateidx + 1];
1804 ns->regs.num = ns->regs.count = 0;
1806 NS_DBG("switch_state: the next state is data I/O, switch, "
1807 "state: %s, nxstate: %s\n",
1808 get_state_name(ns->state), get_state_name(ns->nxstate));
1811 * Set the internal register to the count of bytes which
1812 * are expected to be input or output
1814 switch (NS_STATE(ns->state)) {
1817 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1820 case STATE_DATAOUT_ID:
1821 ns->regs.num = ns->geom.idbytes;
1824 case STATE_DATAOUT_STATUS:
1825 case STATE_DATAOUT_STATUS_M:
1826 ns->regs.count = ns->regs.num = 0;
1830 NS_ERR("switch_state: BUG! unknown data state\n");
1833 } else if (ns->nxstate & STATE_ADDR_MASK) {
1835 * If the next state is address input, set the internal
1836 * register to the number of expected address bytes
1841 switch (NS_STATE(ns->nxstate)) {
1842 case STATE_ADDR_PAGE:
1843 ns->regs.num = ns->geom.pgaddrbytes;
1846 case STATE_ADDR_SEC:
1847 ns->regs.num = ns->geom.secaddrbytes;
1850 case STATE_ADDR_ZERO:
1854 case STATE_ADDR_COLUMN:
1855 /* Column address is always 2 bytes */
1856 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1860 NS_ERR("switch_state: BUG! unknown address state\n");
1864 * Just reset internal counters.
1872 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1874 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1877 /* Sanity and correctness checks */
1878 if (!ns->lines.ce) {
1879 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1882 if (ns->lines.ale || ns->lines.cle) {
1883 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1886 if (!(ns->state & STATE_DATAOUT_MASK)) {
1887 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1888 "return %#x\n", get_state_name(ns->state), (uint)outb);
1892 /* Status register may be read as many times as it is wanted */
1893 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1894 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1895 return ns->regs.status;
1898 /* Check if there is any data in the internal buffer which may be read */
1899 if (ns->regs.count == ns->regs.num) {
1900 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1904 switch (NS_STATE(ns->state)) {
1906 if (ns->busw == 8) {
1907 outb = ns->buf.byte[ns->regs.count];
1908 ns->regs.count += 1;
1910 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1911 ns->regs.count += 2;
1914 case STATE_DATAOUT_ID:
1915 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1916 outb = ns->ids[ns->regs.count];
1917 ns->regs.count += 1;
1923 if (ns->regs.count == ns->regs.num) {
1924 NS_DBG("read_byte: all bytes were read\n");
1927 * The OPT_AUTOINCR allows to read next conseqitive pages without
1928 * new read operation cycle.
1930 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1932 if (ns->regs.row + 1 < ns->geom.pgnum)
1934 NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1935 do_state_action(ns, ACTION_CPY);
1937 else if (NS_STATE(ns->nxstate) == STATE_READY)
1945 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1947 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1949 /* Sanity and correctness checks */
1950 if (!ns->lines.ce) {
1951 NS_ERR("write_byte: chip is disabled, ignore write\n");
1954 if (ns->lines.ale && ns->lines.cle) {
1955 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1959 if (ns->lines.cle == 1) {
1961 * The byte written is a command.
1964 if (byte == NAND_CMD_RESET) {
1965 NS_LOG("reset chip\n");
1966 switch_to_ready_state(ns, NS_STATUS_OK(ns));
1970 /* Check that the command byte is correct */
1971 if (check_command(byte)) {
1972 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1976 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1977 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1978 || NS_STATE(ns->state) == STATE_DATAOUT) {
1979 int row = ns->regs.row;
1982 if (byte == NAND_CMD_RNDOUT)
1986 /* Check if chip is expecting command */
1987 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1988 /* Do not warn if only 2 id bytes are read */
1989 if (!(ns->regs.command == NAND_CMD_READID &&
1990 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
1992 * We are in situation when something else (not command)
1993 * was expected but command was input. In this case ignore
1994 * previous command(s)/state(s) and accept the last one.
1996 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1997 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1999 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2002 NS_DBG("command byte corresponding to %s state accepted\n",
2003 get_state_name(get_state_by_command(byte)));
2004 ns->regs.command = byte;
2007 } else if (ns->lines.ale == 1) {
2009 * The byte written is an address.
2012 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2014 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2016 if (find_operation(ns, 1) < 0)
2019 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2020 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2025 switch (NS_STATE(ns->nxstate)) {
2026 case STATE_ADDR_PAGE:
2027 ns->regs.num = ns->geom.pgaddrbytes;
2029 case STATE_ADDR_SEC:
2030 ns->regs.num = ns->geom.secaddrbytes;
2032 case STATE_ADDR_ZERO:
2040 /* Check that chip is expecting address */
2041 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2042 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2043 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2044 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2048 /* Check if this is expected byte */
2049 if (ns->regs.count == ns->regs.num) {
2050 NS_ERR("write_byte: no more address bytes expected\n");
2051 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2055 accept_addr_byte(ns, byte);
2057 ns->regs.count += 1;
2059 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2060 (uint)byte, ns->regs.count, ns->regs.num);
2062 if (ns->regs.count == ns->regs.num) {
2063 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2069 * The byte written is an input data.
2072 /* Check that chip is expecting data input */
2073 if (!(ns->state & STATE_DATAIN_MASK)) {
2074 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2075 "switch to %s\n", (uint)byte,
2076 get_state_name(ns->state), get_state_name(STATE_READY));
2077 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2081 /* Check if this is expected byte */
2082 if (ns->regs.count == ns->regs.num) {
2083 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2088 if (ns->busw == 8) {
2089 ns->buf.byte[ns->regs.count] = byte;
2090 ns->regs.count += 1;
2092 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2093 ns->regs.count += 2;
2100 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2102 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2104 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2105 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2106 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2108 if (cmd != NAND_CMD_NONE)
2109 ns_nand_write_byte(mtd, cmd);
2112 static int ns_device_ready(struct mtd_info *mtd)
2114 NS_DBG("device_ready\n");
2118 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2120 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2122 NS_DBG("read_word\n");
2124 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2127 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2129 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
2131 /* Check that chip is expecting data input */
2132 if (!(ns->state & STATE_DATAIN_MASK)) {
2133 NS_ERR("write_buf: data input isn't expected, state is %s, "
2134 "switch to STATE_READY\n", get_state_name(ns->state));
2135 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2139 /* Check if these are expected bytes */
2140 if (ns->regs.count + len > ns->regs.num) {
2141 NS_ERR("write_buf: too many input bytes\n");
2142 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2146 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2147 ns->regs.count += len;
2149 if (ns->regs.count == ns->regs.num) {
2150 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2154 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2156 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
2158 /* Sanity and correctness checks */
2159 if (!ns->lines.ce) {
2160 NS_ERR("read_buf: chip is disabled\n");
2163 if (ns->lines.ale || ns->lines.cle) {
2164 NS_ERR("read_buf: ALE or CLE pin is high\n");
2167 if (!(ns->state & STATE_DATAOUT_MASK)) {
2168 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2169 get_state_name(ns->state));
2173 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2176 for (i = 0; i < len; i++)
2177 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2182 /* Check if these are expected bytes */
2183 if (ns->regs.count + len > ns->regs.num) {
2184 NS_ERR("read_buf: too many bytes to read\n");
2185 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2189 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2190 ns->regs.count += len;
2192 if (ns->regs.count == ns->regs.num) {
2193 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
2195 if (ns->regs.row + 1 < ns->geom.pgnum)
2197 NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
2198 do_state_action(ns, ACTION_CPY);
2200 else if (NS_STATE(ns->nxstate) == STATE_READY)
2207 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
2209 ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
2211 if (!memcmp(buf, &ns_verify_buf[0], len)) {
2212 NS_DBG("verify_buf: the buffer is OK\n");
2215 NS_DBG("verify_buf: the buffer is wrong\n");
2221 * Module initialization function
2223 static int __init ns_init_module(void)
2225 struct nand_chip *chip;
2226 struct nandsim *nand;
2227 int retval = -ENOMEM, i;
2229 if (bus_width != 8 && bus_width != 16) {
2230 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2234 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2235 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2236 + sizeof(struct nandsim), GFP_KERNEL);
2238 NS_ERR("unable to allocate core structures.\n");
2241 chip = (struct nand_chip *)(nsmtd + 1);
2242 nsmtd->priv = (void *)chip;
2243 nand = (struct nandsim *)(chip + 1);
2244 chip->priv = (void *)nand;
2247 * Register simulator's callbacks.
2249 chip->cmd_ctrl = ns_hwcontrol;
2250 chip->read_byte = ns_nand_read_byte;
2251 chip->dev_ready = ns_device_ready;
2252 chip->write_buf = ns_nand_write_buf;
2253 chip->read_buf = ns_nand_read_buf;
2254 chip->verify_buf = ns_nand_verify_buf;
2255 chip->read_word = ns_nand_read_word;
2256 chip->ecc.mode = NAND_ECC_SOFT;
2257 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2258 /* and 'badblocks' parameters to work */
2259 chip->options |= NAND_SKIP_BBTSCAN;
2262 * Perform minimum nandsim structure initialization to handle
2263 * the initial ID read command correctly
2265 if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2266 nand->geom.idbytes = 4;
2268 nand->geom.idbytes = 2;
2269 nand->regs.status = NS_STATUS_OK(nand);
2270 nand->nxstate = STATE_UNKNOWN;
2271 nand->options |= OPT_PAGE256; /* temporary value */
2272 nand->ids[0] = first_id_byte;
2273 nand->ids[1] = second_id_byte;
2274 nand->ids[2] = third_id_byte;
2275 nand->ids[3] = fourth_id_byte;
2276 if (bus_width == 16) {
2278 chip->options |= NAND_BUSWIDTH_16;
2281 nsmtd->owner = THIS_MODULE;
2283 if ((retval = parse_weakblocks()) != 0)
2286 if ((retval = parse_weakpages()) != 0)
2289 if ((retval = parse_gravepages()) != 0)
2292 if ((retval = nand_scan(nsmtd, 1)) != 0) {
2293 NS_ERR("can't register NAND Simulator\n");
2300 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2301 if (new_size >> overridesize != nsmtd->erasesize) {
2302 NS_ERR("overridesize is too big\n");
2305 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2306 nsmtd->size = new_size;
2307 chip->chipsize = new_size;
2308 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2309 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2312 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2315 if ((retval = init_nandsim(nsmtd)) != 0)
2318 if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2321 if ((retval = nand_default_bbt(nsmtd)) != 0)
2324 /* Register NAND partitions */
2325 if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
2332 nand_release(nsmtd);
2333 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2334 kfree(nand->partitions[i].name);
2342 module_init(ns_init_module);
2345 * Module clean-up function
2347 static void __exit ns_cleanup_module(void)
2349 struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv);
2352 free_nandsim(ns); /* Free nandsim private resources */
2353 nand_release(nsmtd); /* Unregister driver */
2354 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2355 kfree(ns->partitions[i].name);
2356 kfree(nsmtd); /* Free other structures */
2360 module_exit(ns_cleanup_module);
2362 MODULE_LICENSE ("GPL");
2363 MODULE_AUTHOR ("Artem B. Bityuckiy");
2364 MODULE_DESCRIPTION ("The NAND flash simulator");