/spare/repo/netdev-2.6 branch 'sis190'
[linux-2.6] / drivers / net / tulip / media.c
1 /*
2         drivers/net/tulip/media.c
3
4         Maintained by Jeff Garzik <jgarzik@pobox.com>
5         Copyright 2000,2001  The Linux Kernel Team
6         Written/copyright 1994-2001 by Donald Becker.
7
8         This software may be used and distributed according to the terms
9         of the GNU General Public License, incorporated herein by reference.
10
11         Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
12         for more information on this driver, or visit the project
13         Web page at http://sourceforge.net/projects/tulip/
14
15 */
16
17 #include <linux/kernel.h>
18 #include <linux/mii.h>
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/pci.h>
22 #include "tulip.h"
23
24
25 /* The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
26    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
27    "overclocking" issues or future 66Mhz PCI. */
28 #define mdio_delay() ioread32(mdio_addr)
29
30 /* Read and write the MII registers using software-generated serial
31    MDIO protocol.  It is just different enough from the EEPROM protocol
32    to not share code.  The maxium data clock rate is 2.5 Mhz. */
33 #define MDIO_SHIFT_CLK          0x10000
34 #define MDIO_DATA_WRITE0        0x00000
35 #define MDIO_DATA_WRITE1        0x20000
36 #define MDIO_ENB                0x00000 /* Ignore the 0x02000 databook setting. */
37 #define MDIO_ENB_IN             0x40000
38 #define MDIO_DATA_READ          0x80000
39
40 static const unsigned char comet_miireg2offset[32] = {
41         0xB4, 0xB8, 0xBC, 0xC0,  0xC4, 0xC8, 0xCC, 0,  0,0,0,0,  0,0,0,0,
42         0,0xD0,0,0,  0,0,0,0,  0,0,0,0, 0, 0xD4, 0xD8, 0xDC, };
43
44
45 /* MII transceiver control section.
46    Read and write the MII registers using software-generated serial
47    MDIO protocol.  See the MII specifications or DP83840A data sheet
48    for details. */
49
50 int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
51 {
52         struct tulip_private *tp = netdev_priv(dev);
53         int i;
54         int read_cmd = (0xf6 << 10) | ((phy_id & 0x1f) << 5) | location;
55         int retval = 0;
56         void __iomem *ioaddr = tp->base_addr;
57         void __iomem *mdio_addr = ioaddr + CSR9;
58         unsigned long flags;
59
60         if (location & ~0x1f)
61                 return 0xffff;
62
63         if (tp->chip_id == COMET  &&  phy_id == 30) {
64                 if (comet_miireg2offset[location])
65                         return ioread32(ioaddr + comet_miireg2offset[location]);
66                 return 0xffff;
67         }
68
69         spin_lock_irqsave(&tp->mii_lock, flags);
70         if (tp->chip_id == LC82C168) {
71                 int i = 1000;
72                 iowrite32(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
73                 ioread32(ioaddr + 0xA0);
74                 ioread32(ioaddr + 0xA0);
75                 while (--i > 0) {
76                         barrier();
77                         if ( ! ((retval = ioread32(ioaddr + 0xA0)) & 0x80000000))
78                                 break;
79                 }
80                 spin_unlock_irqrestore(&tp->mii_lock, flags);
81                 return retval & 0xffff;
82         }
83
84         /* Establish sync by sending at least 32 logic ones. */
85         for (i = 32; i >= 0; i--) {
86                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
87                 mdio_delay();
88                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
89                 mdio_delay();
90         }
91         /* Shift the read command bits out. */
92         for (i = 15; i >= 0; i--) {
93                 int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
94
95                 iowrite32(MDIO_ENB | dataval, mdio_addr);
96                 mdio_delay();
97                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
98                 mdio_delay();
99         }
100         /* Read the two transition, 16 data, and wire-idle bits. */
101         for (i = 19; i > 0; i--) {
102                 iowrite32(MDIO_ENB_IN, mdio_addr);
103                 mdio_delay();
104                 retval = (retval << 1) | ((ioread32(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
105                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
106                 mdio_delay();
107         }
108
109         spin_unlock_irqrestore(&tp->mii_lock, flags);
110         return (retval>>1) & 0xffff;
111 }
112
113 void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val)
114 {
115         struct tulip_private *tp = netdev_priv(dev);
116         int i;
117         int cmd = (0x5002 << 16) | ((phy_id & 0x1f) << 23) | (location<<18) | (val & 0xffff);
118         void __iomem *ioaddr = tp->base_addr;
119         void __iomem *mdio_addr = ioaddr + CSR9;
120         unsigned long flags;
121
122         if (location & ~0x1f)
123                 return;
124
125         if (tp->chip_id == COMET && phy_id == 30) {
126                 if (comet_miireg2offset[location])
127                         iowrite32(val, ioaddr + comet_miireg2offset[location]);
128                 return;
129         }
130
131         spin_lock_irqsave(&tp->mii_lock, flags);
132         if (tp->chip_id == LC82C168) {
133                 int i = 1000;
134                 iowrite32(cmd, ioaddr + 0xA0);
135                 do {
136                         barrier();
137                         if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000))
138                                 break;
139                 } while (--i > 0);
140                 spin_unlock_irqrestore(&tp->mii_lock, flags);
141                 return;
142         }
143                 
144         /* Establish sync by sending 32 logic ones. */
145         for (i = 32; i >= 0; i--) {
146                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
147                 mdio_delay();
148                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
149                 mdio_delay();
150         }
151         /* Shift the command bits out. */
152         for (i = 31; i >= 0; i--) {
153                 int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
154                 iowrite32(MDIO_ENB | dataval, mdio_addr);
155                 mdio_delay();
156                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
157                 mdio_delay();
158         }
159         /* Clear out extra bits. */
160         for (i = 2; i > 0; i--) {
161                 iowrite32(MDIO_ENB_IN, mdio_addr);
162                 mdio_delay();
163                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
164                 mdio_delay();
165         }
166
167         spin_unlock_irqrestore(&tp->mii_lock, flags);
168 }
169
170
171 /* Set up the transceiver control registers for the selected media type. */
172 void tulip_select_media(struct net_device *dev, int startup)
173 {
174         struct tulip_private *tp = netdev_priv(dev);
175         void __iomem *ioaddr = tp->base_addr;
176         struct mediatable *mtable = tp->mtable;
177         u32 new_csr6;
178         int i;
179
180         if (mtable) {
181                 struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index];
182                 unsigned char *p = mleaf->leafdata;
183                 switch (mleaf->type) {
184                 case 0:                                 /* 21140 non-MII xcvr. */
185                         if (tulip_debug > 1)
186                                 printk(KERN_DEBUG "%s: Using a 21140 non-MII transceiver"
187                                            " with control setting %2.2x.\n",
188                                            dev->name, p[1]);
189                         dev->if_port = p[0];
190                         if (startup)
191                                 iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
192                         iowrite32(p[1], ioaddr + CSR12);
193                         new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18);
194                         break;
195                 case 2: case 4: {
196                         u16 setup[5];
197                         u32 csr13val, csr14val, csr15dir, csr15val;
198                         for (i = 0; i < 5; i++)
199                                 setup[i] = get_u16(&p[i*2 + 1]);
200
201                         dev->if_port = p[0] & MEDIA_MASK;
202                         if (tulip_media_cap[dev->if_port] & MediaAlwaysFD)
203                                 tp->full_duplex = 1;
204
205                         if (startup && mtable->has_reset) {
206                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
207                                 unsigned char *rst = rleaf->leafdata;
208                                 if (tulip_debug > 1)
209                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
210                                                    dev->name);
211                                 for (i = 0; i < rst[0]; i++)
212                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
213                         }
214                         if (tulip_debug > 1)
215                                 printk(KERN_DEBUG "%s: 21143 non-MII %s transceiver control "
216                                            "%4.4x/%4.4x.\n",
217                                            dev->name, medianame[dev->if_port], setup[0], setup[1]);
218                         if (p[0] & 0x40) {      /* SIA (CSR13-15) setup values are provided. */
219                                 csr13val = setup[0];
220                                 csr14val = setup[1];
221                                 csr15dir = (setup[3]<<16) | setup[2];
222                                 csr15val = (setup[4]<<16) | setup[2];
223                                 iowrite32(0, ioaddr + CSR13);
224                                 iowrite32(csr14val, ioaddr + CSR14);
225                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
226                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
227                                 iowrite32(csr13val, ioaddr + CSR13);
228                         } else {
229                                 csr13val = 1;
230                                 csr14val = 0;
231                                 csr15dir = (setup[0]<<16) | 0x0008;
232                                 csr15val = (setup[1]<<16) | 0x0008;
233                                 if (dev->if_port <= 4)
234                                         csr14val = t21142_csr14[dev->if_port];
235                                 if (startup) {
236                                         iowrite32(0, ioaddr + CSR13);
237                                         iowrite32(csr14val, ioaddr + CSR14);
238                                 }
239                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
240                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
241                                 if (startup) iowrite32(csr13val, ioaddr + CSR13);
242                         }
243                         if (tulip_debug > 1)
244                                 printk(KERN_DEBUG "%s:  Setting CSR15 to %8.8x/%8.8x.\n",
245                                            dev->name, csr15dir, csr15val);
246                         if (mleaf->type == 4)
247                                 new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18);
248                         else
249                                 new_csr6 = 0x82420000;
250                         break;
251                 }
252                 case 1: case 3: {
253                         int phy_num = p[0];
254                         int init_length = p[1];
255                         u16 *misc_info, tmp_info;
256
257                         dev->if_port = 11;
258                         new_csr6 = 0x020E0000;
259                         if (mleaf->type == 3) { /* 21142 */
260                                 u16 *init_sequence = (u16*)(p+2);
261                                 u16 *reset_sequence = &((u16*)(p+3))[init_length];
262                                 int reset_length = p[2 + init_length*2];
263                                 misc_info = reset_sequence + reset_length;
264                                 if (startup)
265                                         for (i = 0; i < reset_length; i++)
266                                                 iowrite32(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
267                                 for (i = 0; i < init_length; i++)
268                                         iowrite32(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
269                         } else {
270                                 u8 *init_sequence = p + 2;
271                                 u8 *reset_sequence = p + 3 + init_length;
272                                 int reset_length = p[2 + init_length];
273                                 misc_info = (u16*)(reset_sequence + reset_length);
274                                 if (startup) {
275                                         iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
276                                         for (i = 0; i < reset_length; i++)
277                                                 iowrite32(reset_sequence[i], ioaddr + CSR12);
278                                 }
279                                 for (i = 0; i < init_length; i++)
280                                         iowrite32(init_sequence[i], ioaddr + CSR12);
281                         }
282                         tmp_info = get_u16(&misc_info[1]);
283                         if (tmp_info)
284                                 tp->advertising[phy_num] = tmp_info | 1;
285                         if (tmp_info && startup < 2) {
286                                 if (tp->mii_advertise == 0)
287                                         tp->mii_advertise = tp->advertising[phy_num];
288                                 if (tulip_debug > 1)
289                                         printk(KERN_DEBUG "%s:  Advertising %4.4x on MII %d.\n",
290                                                dev->name, tp->mii_advertise, tp->phys[phy_num]);
291                                 tulip_mdio_write(dev, tp->phys[phy_num], 4, tp->mii_advertise);
292                         }
293                         break;
294                 }
295                 case 5: case 6: {
296                         u16 setup[5];
297
298                         new_csr6 = 0; /* FIXME */
299
300                         for (i = 0; i < 5; i++)
301                                 setup[i] = get_u16(&p[i*2 + 1]);
302
303                         if (startup && mtable->has_reset) {
304                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
305                                 unsigned char *rst = rleaf->leafdata;
306                                 if (tulip_debug > 1)
307                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
308                                                    dev->name);
309                                 for (i = 0; i < rst[0]; i++)
310                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
311                         }
312
313                         break;
314                 }
315                 default:
316                         printk(KERN_DEBUG "%s:  Invalid media table selection %d.\n",
317                                            dev->name, mleaf->type);
318                         new_csr6 = 0x020E0000;
319                 }
320                 if (tulip_debug > 1)
321                         printk(KERN_DEBUG "%s: Using media type %s, CSR12 is %2.2x.\n",
322                                    dev->name, medianame[dev->if_port],
323                                    ioread32(ioaddr + CSR12) & 0xff);
324         } else if (tp->chip_id == LC82C168) {
325                 if (startup && ! tp->medialock)
326                         dev->if_port = tp->mii_cnt ? 11 : 0;
327                 if (tulip_debug > 1)
328                         printk(KERN_DEBUG "%s: PNIC PHY status is %3.3x, media %s.\n",
329                                    dev->name, ioread32(ioaddr + 0xB8), medianame[dev->if_port]);
330                 if (tp->mii_cnt) {
331                         new_csr6 = 0x810C0000;
332                         iowrite32(0x0001, ioaddr + CSR15);
333                         iowrite32(0x0201B07A, ioaddr + 0xB8);
334                 } else if (startup) {
335                         /* Start with 10mbps to do autonegotiation. */
336                         iowrite32(0x32, ioaddr + CSR12);
337                         new_csr6 = 0x00420000;
338                         iowrite32(0x0001B078, ioaddr + 0xB8);
339                         iowrite32(0x0201B078, ioaddr + 0xB8);
340                 } else if (dev->if_port == 3  ||  dev->if_port == 5) {
341                         iowrite32(0x33, ioaddr + CSR12);
342                         new_csr6 = 0x01860000;
343                         /* Trigger autonegotiation. */
344                         iowrite32(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8);
345                 } else {
346                         iowrite32(0x32, ioaddr + CSR12);
347                         new_csr6 = 0x00420000;
348                         iowrite32(0x1F078, ioaddr + 0xB8);
349                 }
350         } else {                                        /* Unknown chip type with no media table. */
351                 if (tp->default_port == 0)
352                         dev->if_port = tp->mii_cnt ? 11 : 3;
353                 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
354                         new_csr6 = 0x020E0000;
355                 } else if (tulip_media_cap[dev->if_port] & MediaIsFx) {
356                         new_csr6 = 0x02860000;
357                 } else
358                         new_csr6 = 0x03860000;
359                 if (tulip_debug > 1)
360                         printk(KERN_DEBUG "%s: No media description table, assuming "
361                                    "%s transceiver, CSR12 %2.2x.\n",
362                                    dev->name, medianame[dev->if_port],
363                                    ioread32(ioaddr + CSR12));
364         }
365
366         tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
367
368         mdelay(1);
369
370         return;
371 }
372
373 /*
374   Check the MII negotiated duplex and change the CSR6 setting if
375   required.
376   Return 0 if everything is OK.
377   Return < 0 if the transceiver is missing or has no link beat.
378   */
379 int tulip_check_duplex(struct net_device *dev)
380 {
381         struct tulip_private *tp = netdev_priv(dev);
382         unsigned int bmsr, lpa, negotiated, new_csr6;
383
384         bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
385         lpa = tulip_mdio_read(dev, tp->phys[0], MII_LPA);
386         if (tulip_debug > 1)
387                 printk(KERN_INFO "%s: MII status %4.4x, Link partner report "
388                            "%4.4x.\n", dev->name, bmsr, lpa);
389         if (bmsr == 0xffff)
390                 return -2;
391         if ((bmsr & BMSR_LSTATUS) == 0) {
392                 int new_bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
393                 if ((new_bmsr & BMSR_LSTATUS) == 0) {
394                         if (tulip_debug  > 1)
395                                 printk(KERN_INFO "%s: No link beat on the MII interface,"
396                                            " status %4.4x.\n", dev->name, new_bmsr);
397                         return -1;
398                 }
399         }
400         negotiated = lpa & tp->advertising[0];
401         tp->full_duplex = mii_duplex(tp->full_duplex_lock, negotiated);
402
403         new_csr6 = tp->csr6;
404
405         if (negotiated & LPA_100) new_csr6 &= ~TxThreshold;
406         else                      new_csr6 |= TxThreshold;
407         if (tp->full_duplex) new_csr6 |= FullDuplex;
408         else                 new_csr6 &= ~FullDuplex;
409
410         if (new_csr6 != tp->csr6) {
411                 tp->csr6 = new_csr6;
412                 tulip_restart_rxtx(tp);
413
414                 if (tulip_debug > 0)
415                         printk(KERN_INFO "%s: Setting %s-duplex based on MII"
416                                    "#%d link partner capability of %4.4x.\n",
417                                    dev->name, tp->full_duplex ? "full" : "half",
418                                    tp->phys[0], lpa);
419                 return 1;
420         }
421
422         return 0;
423 }
424
425 void __devinit tulip_find_mii (struct net_device *dev, int board_idx)
426 {
427         struct tulip_private *tp = netdev_priv(dev);
428         int phyn, phy_idx = 0;
429         int mii_reg0;
430         int mii_advert;
431         unsigned int to_advert, new_bmcr, ane_switch;
432
433         /* Find the connected MII xcvrs.
434            Doing this in open() would allow detecting external xcvrs later,
435            but takes much time. */
436         for (phyn = 1; phyn <= 32 && phy_idx < sizeof (tp->phys); phyn++) {
437                 int phy = phyn & 0x1f;
438                 int mii_status = tulip_mdio_read (dev, phy, MII_BMSR);
439                 if ((mii_status & 0x8301) == 0x8001 ||
440                     ((mii_status & BMSR_100BASE4) == 0
441                      && (mii_status & 0x7800) != 0)) {
442                         /* preserve Becker logic, gain indentation level */
443                 } else {
444                         continue;
445                 }
446
447                 mii_reg0 = tulip_mdio_read (dev, phy, MII_BMCR);
448                 mii_advert = tulip_mdio_read (dev, phy, MII_ADVERTISE);
449                 ane_switch = 0;
450
451                 /* if not advertising at all, gen an
452                  * advertising value from the capability
453                  * bits in BMSR
454                  */
455                 if ((mii_advert & ADVERTISE_ALL) == 0) {
456                         unsigned int tmpadv = tulip_mdio_read (dev, phy, MII_BMSR);
457                         mii_advert = ((tmpadv >> 6) & 0x3e0) | 1;
458                 }
459
460                 if (tp->mii_advertise) {
461                         tp->advertising[phy_idx] =
462                         to_advert = tp->mii_advertise;
463                 } else if (tp->advertising[phy_idx]) {
464                         to_advert = tp->advertising[phy_idx];
465                 } else {
466                         tp->advertising[phy_idx] =
467                         tp->mii_advertise =
468                         to_advert = mii_advert;
469                 }
470
471                 tp->phys[phy_idx++] = phy;
472
473                 printk (KERN_INFO "tulip%d:  MII transceiver #%d "
474                         "config %4.4x status %4.4x advertising %4.4x.\n",
475                         board_idx, phy, mii_reg0, mii_status, mii_advert);
476
477                 /* Fixup for DLink with miswired PHY. */
478                 if (mii_advert != to_advert) {
479                         printk (KERN_DEBUG "tulip%d:  Advertising %4.4x on PHY %d,"
480                                 " previously advertising %4.4x.\n",
481                                 board_idx, to_advert, phy, mii_advert);
482                         tulip_mdio_write (dev, phy, 4, to_advert);
483                 }
484
485                 /* Enable autonegotiation: some boards default to off. */
486                 if (tp->default_port == 0) {
487                         new_bmcr = mii_reg0 | BMCR_ANENABLE;
488                         if (new_bmcr != mii_reg0) {
489                                 new_bmcr |= BMCR_ANRESTART;
490                                 ane_switch = 1;
491                         }
492                 }
493                 /* ...or disable nway, if forcing media */
494                 else {
495                         new_bmcr = mii_reg0 & ~BMCR_ANENABLE;
496                         if (new_bmcr != mii_reg0)
497                                 ane_switch = 1;
498                 }
499
500                 /* clear out bits we never want at this point */
501                 new_bmcr &= ~(BMCR_CTST | BMCR_FULLDPLX | BMCR_ISOLATE |
502                               BMCR_PDOWN | BMCR_SPEED100 | BMCR_LOOPBACK |
503                               BMCR_RESET);
504
505                 if (tp->full_duplex)
506                         new_bmcr |= BMCR_FULLDPLX;
507                 if (tulip_media_cap[tp->default_port] & MediaIs100)
508                         new_bmcr |= BMCR_SPEED100;
509
510                 if (new_bmcr != mii_reg0) {
511                         /* some phys need the ANE switch to
512                          * happen before forced media settings
513                          * will "take."  However, we write the
514                          * same value twice in order not to
515                          * confuse the sane phys.
516                          */
517                         if (ane_switch) {
518                                 tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
519                                 udelay (10);
520                         }
521                         tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
522                 }
523         }
524         tp->mii_cnt = phy_idx;
525         if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) {
526                 printk (KERN_INFO "tulip%d: ***WARNING***: No MII transceiver found!\n",
527                         board_idx);
528                 tp->phys[0] = 1;
529         }
530 }