10 The driver uses a 512 byte (1 page) ECC code for this setup. The
11 ECC code is not directly compatible with the default kernel ECC
12 code, so the driver enforces its own OOB layout and ECC parameters
17 The driver is capable of handling NAND flash with a 2KiB page
18 size, with support for hardware ECC generation and correction.
20 Unlike the 512byte page mode, the driver generates ECC data for
21 each 256 byte block in an 2KiB page. This means that more than
22 one error in a page can be rectified. It also means that the
23 OOB layout remains the default kernel layout for these flashes.
29 Ben Dooks, Copyright 2007 Simtec Electronics