2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* mac80211 and PCI callbacks */
19 #include <linux/nl80211.h>
22 #define ATH_PCI_VERSION "0.1"
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
26 static char *dev_info = "ath9k";
28 MODULE_AUTHOR("Atheros Communications");
29 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31 MODULE_LICENSE("Dual BSD/GPL");
33 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
42 static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
55 static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
93 static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
109 if (!sc->sc_splitmic) {
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
135 static int ath_key_config(struct ath_softc *sc,
137 struct ieee80211_key_conf *key)
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
143 enum nl80211_iftype opmode;
145 memset(&hk, 0, sizeof(hk));
149 hk.kv_type = ATH9K_CIPHER_WEP;
152 hk.kv_type = ATH9K_CIPHER_TKIP;
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
167 vif = sc->sc_vaps[0]->av_if_data;
172 * For _M_STA mc tx, we will not setup a key at all since we never
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
180 if (is_broadcast_ether_addr(addr)) {
182 case NL80211_IFTYPE_STATION:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
187 case NL80211_IFTYPE_ADHOC:
189 case NL80211_IFTYPE_AP:
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
210 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
214 freeslot = (key->keyidx >= 4) ? 1 : 0;
215 ath_key_reset(sc, key->keyidx, freeslot);
218 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
220 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
221 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
223 ht_info->ht_supported = true;
224 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
225 IEEE80211_HT_CAP_SM_PS |
226 IEEE80211_HT_CAP_SGI_40 |
227 IEEE80211_HT_CAP_DSSSCCK40;
229 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
230 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
231 /* set up supported mcs set */
232 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
233 ht_info->mcs.rx_mask[0] = 0xff;
234 ht_info->mcs.rx_mask[1] = 0xff;
235 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
238 static int ath_rate2idx(struct ath_softc *sc, int rate)
240 int i = 0, cur_band, n_rates;
241 struct ieee80211_hw *hw = sc->hw;
243 cur_band = hw->conf.channel->band;
244 n_rates = sc->sbands[cur_band].n_bitrates;
246 for (i = 0; i < n_rates; i++) {
247 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
252 * NB:mac80211 validates rx rate index against the supported legacy rate
253 * index only (should be done against ht rates also), return the highest
254 * legacy rate index for rx rate which does not match any one of the
255 * supported basic and extended rates to make mac80211 happy.
256 * The following hack will be cleaned up once the issue with
257 * the rx rate index validation in mac80211 is fixed.
264 static void ath9k_rx_prepare(struct ath_softc *sc,
266 struct ath_recv_status *status,
267 struct ieee80211_rx_status *rx_status)
269 struct ieee80211_hw *hw = sc->hw;
270 struct ieee80211_channel *curchan = hw->conf.channel;
272 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
274 rx_status->mactime = status->tsf;
275 rx_status->band = curchan->band;
276 rx_status->freq = curchan->center_freq;
277 rx_status->noise = sc->sc_ani.sc_noise_floor;
278 rx_status->signal = rx_status->noise + status->rssi;
279 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
280 rx_status->antenna = status->antenna;
282 /* at 45 you will be able to use MCS 15 reliably. A more elaborate
283 * scheme can be used here but it requires tables of SNR/throughput for
284 * each possible mode used. */
285 rx_status->qual = status->rssi * 100 / 45;
287 /* rssi can be more than 45 though, anything above that
288 * should be considered at 100% */
289 if (rx_status->qual > 100)
290 rx_status->qual = 100;
292 if (status->flags & ATH_RX_MIC_ERROR)
293 rx_status->flag |= RX_FLAG_MMIC_ERROR;
294 if (status->flags & ATH_RX_FCS_ERROR)
295 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
297 rx_status->flag |= RX_FLAG_TSFT;
300 static u8 parse_mpdudensity(u8 mpdudensity)
303 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
304 * 0 for no restriction
313 switch (mpdudensity) {
319 /* Our lower layer calculations limit our precision to
335 static void ath9k_ht_conf(struct ath_softc *sc,
336 struct ieee80211_bss_conf *bss_conf)
338 struct ath_ht_info *ht_info = &sc->sc_ht_info;
340 if (sc->hw->conf.ht.enabled) {
341 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
343 if (bss_conf->ht.width_40_ok)
344 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
346 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
348 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
352 static void ath9k_bss_assoc_info(struct ath_softc *sc,
353 struct ieee80211_bss_conf *bss_conf)
355 struct ieee80211_hw *hw = sc->hw;
356 struct ieee80211_channel *curchan = hw->conf.channel;
360 if (bss_conf->assoc) {
361 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
365 avp = sc->sc_vaps[0];
367 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
372 /* New association, store aid */
373 if (avp->av_opmode == ATH9K_M_STA) {
374 sc->sc_curaid = bss_conf->aid;
375 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
379 /* Configure the beacon */
380 ath_beacon_config(sc, 0);
381 sc->sc_flags |= SC_OP_BEACONS;
383 /* Reset rssi stats */
384 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
385 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
386 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
387 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
389 /* Update chainmask */
390 ath_update_chainmask(sc, hw->conf.ht.enabled);
392 DPRINTF(sc, ATH_DBG_CONFIG,
393 "%s: bssid %pM aid 0x%x\n",
395 sc->sc_curbssid, sc->sc_curaid);
397 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
399 curchan->center_freq);
401 pos = ath_get_channel(sc, curchan);
403 DPRINTF(sc, ATH_DBG_FATAL,
404 "%s: Invalid channel\n", __func__);
408 if (hw->conf.ht.enabled)
409 sc->sc_ah->ah_channels[pos].chanmode =
410 ath_get_extchanmode(sc, curchan);
412 sc->sc_ah->ah_channels[pos].chanmode =
413 (curchan->band == IEEE80211_BAND_2GHZ) ?
414 CHANNEL_G : CHANNEL_A;
416 /* set h/w channel */
417 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
418 DPRINTF(sc, ATH_DBG_FATAL,
419 "%s: Unable to set channel\n",
422 ath_rate_newstate(sc, avp);
423 /* Update ratectrl about the new state */
424 ath_rc_node_update(hw, avp->rc_node);
427 mod_timer(&sc->sc_ani.timer,
428 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
431 DPRINTF(sc, ATH_DBG_CONFIG,
432 "%s: Bss Info DISSOC\n", __func__);
437 void ath_get_beaconconfig(struct ath_softc *sc,
439 struct ath_beacon_config *conf)
441 struct ieee80211_hw *hw = sc->hw;
443 /* fill in beacon config data */
445 conf->beacon_interval = hw->conf.beacon_int;
446 conf->listen_interval = 100;
447 conf->dtim_count = 1;
448 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
451 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
452 struct ath_xmit_status *tx_status, struct ath_node *an)
454 struct ieee80211_hw *hw = sc->hw;
455 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
457 DPRINTF(sc, ATH_DBG_XMIT,
458 "%s: TX complete: skb: %p\n", __func__, skb);
460 ieee80211_tx_info_clear_status(tx_info);
461 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
462 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
463 /* free driver's private data area of tx_info, XXX: HACK! */
464 if (tx_info->control.vif != NULL)
465 kfree(tx_info->control.vif);
466 tx_info->control.vif = NULL;
469 if (tx_status->flags & ATH_TX_BAR) {
470 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
471 tx_status->flags &= ~ATH_TX_BAR;
474 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
475 /* Frame was ACKed */
476 tx_info->flags |= IEEE80211_TX_STAT_ACK;
479 tx_info->status.rates[0].count = tx_status->retries + 1;
481 ieee80211_tx_status(hw, skb);
483 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
486 int _ath_rx_indicate(struct ath_softc *sc,
488 struct ath_recv_status *status,
491 struct ieee80211_hw *hw = sc->hw;
492 struct ath_node *an = NULL;
493 struct ieee80211_rx_status rx_status;
494 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
495 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
499 /* see if any padding is done by the hw and remove it */
501 padsize = hdrlen % 4;
502 memmove(skb->data + padsize, skb->data, hdrlen);
503 skb_pull(skb, padsize);
506 /* Prepare rx status */
507 ath9k_rx_prepare(sc, skb, status, &rx_status);
509 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
510 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
511 rx_status.flag |= RX_FLAG_DECRYPTED;
512 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
513 && !(status->flags & ATH_RX_DECRYPT_ERROR)
514 && skb->len >= hdrlen + 4) {
515 keyix = skb->data[hdrlen + 3] >> 6;
517 if (test_bit(keyix, sc->sc_keymap))
518 rx_status.flag |= RX_FLAG_DECRYPTED;
521 spin_lock_bh(&sc->node_lock);
522 an = ath_node_find(sc, hdr->addr2);
523 spin_unlock_bh(&sc->node_lock);
529 if (!an || (st != ATH_RX_CONSUMED))
530 __ieee80211_rx(hw, skb, &rx_status);
535 int ath_rx_subframe(struct ath_node *an,
537 struct ath_recv_status *status)
539 struct ath_softc *sc = an->an_sc;
540 struct ieee80211_hw *hw = sc->hw;
541 struct ieee80211_rx_status rx_status;
543 /* Prepare rx status */
544 ath9k_rx_prepare(sc, skb, status, &rx_status);
545 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
546 rx_status.flag |= RX_FLAG_DECRYPTED;
548 __ieee80211_rx(hw, skb, &rx_status);
553 /********************************/
555 /********************************/
557 static void ath_led_brightness(struct led_classdev *led_cdev,
558 enum led_brightness brightness)
560 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
561 struct ath_softc *sc = led->sc;
563 switch (brightness) {
565 if (led->led_type == ATH_LED_ASSOC ||
566 led->led_type == ATH_LED_RADIO)
567 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
568 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
569 (led->led_type == ATH_LED_RADIO) ? 1 :
570 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
573 if (led->led_type == ATH_LED_ASSOC)
574 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
575 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
582 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
588 led->led_cdev.name = led->name;
589 led->led_cdev.default_trigger = trigger;
590 led->led_cdev.brightness_set = ath_led_brightness;
592 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
594 DPRINTF(sc, ATH_DBG_FATAL,
595 "Failed to register led:%s", led->name);
601 static void ath_unregister_led(struct ath_led *led)
603 if (led->registered) {
604 led_classdev_unregister(&led->led_cdev);
609 static void ath_deinit_leds(struct ath_softc *sc)
611 ath_unregister_led(&sc->assoc_led);
612 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
613 ath_unregister_led(&sc->tx_led);
614 ath_unregister_led(&sc->rx_led);
615 ath_unregister_led(&sc->radio_led);
616 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
619 static void ath_init_leds(struct ath_softc *sc)
624 /* Configure gpio 1 for output */
625 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
626 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
627 /* LED off, active low */
628 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
630 trigger = ieee80211_get_radio_led_name(sc->hw);
631 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
632 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
633 ret = ath_register_led(sc, &sc->radio_led, trigger);
634 sc->radio_led.led_type = ATH_LED_RADIO;
638 trigger = ieee80211_get_assoc_led_name(sc->hw);
639 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
640 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
641 ret = ath_register_led(sc, &sc->assoc_led, trigger);
642 sc->assoc_led.led_type = ATH_LED_ASSOC;
646 trigger = ieee80211_get_tx_led_name(sc->hw);
647 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
648 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
649 ret = ath_register_led(sc, &sc->tx_led, trigger);
650 sc->tx_led.led_type = ATH_LED_TX;
654 trigger = ieee80211_get_rx_led_name(sc->hw);
655 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
656 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
657 ret = ath_register_led(sc, &sc->rx_led, trigger);
658 sc->rx_led.led_type = ATH_LED_RX;
669 /*******************/
671 /*******************/
673 static void ath_radio_enable(struct ath_softc *sc)
675 struct ath_hal *ah = sc->sc_ah;
678 spin_lock_bh(&sc->sc_resetlock);
679 if (!ath9k_hw_reset(ah, ah->ah_curchan,
680 sc->sc_ht_info.tx_chan_width,
683 sc->sc_ht_extprotspacing,
685 DPRINTF(sc, ATH_DBG_FATAL,
686 "%s: unable to reset channel %u (%uMhz) "
687 "flags 0x%x hal status %u\n", __func__,
688 ath9k_hw_mhz2ieee(ah,
689 ah->ah_curchan->channel,
690 ah->ah_curchan->channelFlags),
691 ah->ah_curchan->channel,
692 ah->ah_curchan->channelFlags, status);
694 spin_unlock_bh(&sc->sc_resetlock);
696 ath_update_txpow(sc);
697 if (ath_startrecv(sc) != 0) {
698 DPRINTF(sc, ATH_DBG_FATAL,
699 "%s: unable to restart recv logic\n", __func__);
703 if (sc->sc_flags & SC_OP_BEACONS)
704 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
706 /* Re-Enable interrupts */
707 ath9k_hw_set_interrupts(ah, sc->sc_imask);
710 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
711 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
712 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
714 ieee80211_wake_queues(sc->hw);
717 static void ath_radio_disable(struct ath_softc *sc)
719 struct ath_hal *ah = sc->sc_ah;
723 ieee80211_stop_queues(sc->hw);
726 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
727 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
729 /* Disable interrupts */
730 ath9k_hw_set_interrupts(ah, 0);
732 ath_draintxq(sc, false); /* clear pending tx frames */
733 ath_stoprecv(sc); /* turn off frame recv */
734 ath_flushrecv(sc); /* flush recv queue */
736 spin_lock_bh(&sc->sc_resetlock);
737 if (!ath9k_hw_reset(ah, ah->ah_curchan,
738 sc->sc_ht_info.tx_chan_width,
741 sc->sc_ht_extprotspacing,
743 DPRINTF(sc, ATH_DBG_FATAL,
744 "%s: unable to reset channel %u (%uMhz) "
745 "flags 0x%x hal status %u\n", __func__,
746 ath9k_hw_mhz2ieee(ah,
747 ah->ah_curchan->channel,
748 ah->ah_curchan->channelFlags),
749 ah->ah_curchan->channel,
750 ah->ah_curchan->channelFlags, status);
752 spin_unlock_bh(&sc->sc_resetlock);
754 ath9k_hw_phy_disable(ah);
755 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
758 static bool ath_is_rfkill_set(struct ath_softc *sc)
760 struct ath_hal *ah = sc->sc_ah;
762 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
763 ah->ah_rfkill_polarity;
766 /* h/w rfkill poll function */
767 static void ath_rfkill_poll(struct work_struct *work)
769 struct ath_softc *sc = container_of(work, struct ath_softc,
770 rf_kill.rfkill_poll.work);
773 if (sc->sc_flags & SC_OP_INVALID)
776 radio_on = !ath_is_rfkill_set(sc);
779 * enable/disable radio only when there is a
780 * state change in RF switch
782 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
783 enum rfkill_state state;
785 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
786 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
787 : RFKILL_STATE_HARD_BLOCKED;
788 } else if (radio_on) {
789 ath_radio_enable(sc);
790 state = RFKILL_STATE_UNBLOCKED;
792 ath_radio_disable(sc);
793 state = RFKILL_STATE_HARD_BLOCKED;
796 if (state == RFKILL_STATE_HARD_BLOCKED)
797 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
799 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
801 rfkill_force_state(sc->rf_kill.rfkill, state);
804 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
805 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
808 /* s/w rfkill handler */
809 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
811 struct ath_softc *sc = data;
814 case RFKILL_STATE_SOFT_BLOCKED:
815 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
816 SC_OP_RFKILL_SW_BLOCKED)))
817 ath_radio_disable(sc);
818 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
820 case RFKILL_STATE_UNBLOCKED:
821 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
822 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
823 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
824 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
825 "radio as it is disabled by h/w \n");
828 ath_radio_enable(sc);
836 /* Init s/w rfkill */
837 static int ath_init_sw_rfkill(struct ath_softc *sc)
839 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
841 if (!sc->rf_kill.rfkill) {
842 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
846 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
847 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
848 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
849 sc->rf_kill.rfkill->data = sc;
850 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
851 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
852 sc->rf_kill.rfkill->user_claim_unsupported = 1;
857 /* Deinitialize rfkill */
858 static void ath_deinit_rfkill(struct ath_softc *sc)
860 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
861 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
863 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
864 rfkill_unregister(sc->rf_kill.rfkill);
865 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
866 sc->rf_kill.rfkill = NULL;
869 #endif /* CONFIG_RFKILL */
871 static int ath_detach(struct ath_softc *sc)
873 struct ieee80211_hw *hw = sc->hw;
875 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
877 /* Deinit LED control */
882 ath_deinit_rfkill(sc);
887 ieee80211_unregister_hw(hw);
889 /* unregister Rate control */
890 ath_rate_control_unregister();
904 static int ath_attach(u16 devid,
905 struct ath_softc *sc)
907 struct ieee80211_hw *hw = sc->hw;
910 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
912 error = ath_init(devid, sc);
918 INIT_LIST_HEAD(&sc->node_list);
919 spin_lock_init(&sc->node_lock);
921 /* get mac address from hardware and set in mac80211 */
923 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
925 /* setup channels and rates */
927 sc->sbands[IEEE80211_BAND_2GHZ].channels =
928 sc->channels[IEEE80211_BAND_2GHZ];
929 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
930 sc->rates[IEEE80211_BAND_2GHZ];
931 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
933 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
934 /* Setup HT capabilities for 2.4Ghz*/
935 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
937 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
938 &sc->sbands[IEEE80211_BAND_2GHZ];
940 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
941 sc->sbands[IEEE80211_BAND_5GHZ].channels =
942 sc->channels[IEEE80211_BAND_5GHZ];
943 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
944 sc->rates[IEEE80211_BAND_5GHZ];
945 sc->sbands[IEEE80211_BAND_5GHZ].band =
948 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
949 /* Setup HT capabilities for 5Ghz*/
950 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
952 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
953 &sc->sbands[IEEE80211_BAND_5GHZ];
958 /* Register rate control */
959 hw->rate_control_algorithm = "ath9k_rate_control";
960 error = ath_rate_control_register();
962 DPRINTF(sc, ATH_DBG_FATAL,
963 "%s: Unable to register rate control "
964 "algorithm:%d\n", __func__, error);
965 ath_rate_control_unregister();
969 error = ieee80211_register_hw(hw);
971 ath_rate_control_unregister();
975 /* Initialize LED control */
979 /* Initialze h/w Rfkill */
980 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
981 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
983 /* Initialize s/w rfkill */
984 if (ath_init_sw_rfkill(sc))
988 /* initialize tx/rx engine */
990 error = ath_tx_init(sc, ATH_TXBUF);
994 error = ath_rx_init(sc, ATH_RXBUF);
1005 static int ath9k_start(struct ieee80211_hw *hw)
1007 struct ath_softc *sc = hw->priv;
1008 struct ieee80211_channel *curchan = hw->conf.channel;
1011 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
1012 "initial channel: %d MHz\n", __func__, curchan->center_freq);
1014 /* setup initial channel */
1016 pos = ath_get_channel(sc, curchan);
1018 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1022 sc->sc_ah->ah_channels[pos].chanmode =
1023 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
1026 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
1028 DPRINTF(sc, ATH_DBG_FATAL,
1029 "%s: Unable to complete ath_open\n", __func__);
1033 #ifdef CONFIG_RFKILL
1034 /* Start rfkill polling */
1035 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1036 queue_delayed_work(sc->hw->workqueue,
1037 &sc->rf_kill.rfkill_poll, 0);
1039 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
1040 if (rfkill_register(sc->rf_kill.rfkill)) {
1041 DPRINTF(sc, ATH_DBG_FATAL,
1042 "Unable to register rfkill\n");
1043 rfkill_free(sc->rf_kill.rfkill);
1045 /* Deinitialize the device */
1047 free_irq(sc->pdev->irq, sc);
1049 pci_iounmap(sc->pdev, sc->mem);
1050 pci_release_region(sc->pdev, 0);
1051 pci_disable_device(sc->pdev);
1052 ieee80211_free_hw(hw);
1055 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1060 ieee80211_wake_queues(hw);
1064 static int ath9k_tx(struct ieee80211_hw *hw,
1065 struct sk_buff *skb)
1067 struct ath_softc *sc = hw->priv;
1068 int hdrlen, padsize;
1069 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1072 * As a temporary workaround, assign seq# here; this will likely need
1073 * to be cleaned up to work better with Beacon transmission and virtual
1076 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1077 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1078 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1080 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1081 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1084 /* Add the padding after the header if this is not already done */
1085 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1087 padsize = hdrlen % 4;
1088 if (skb_headroom(skb) < padsize)
1090 skb_push(skb, padsize);
1091 memmove(skb->data, skb->data + padsize, hdrlen);
1094 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1098 if (ath_tx_start(sc, skb) != 0) {
1099 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1100 dev_kfree_skb_any(skb);
1101 /* FIXME: Check for proper return value from ATH_DEV */
1108 static void ath9k_stop(struct ieee80211_hw *hw)
1110 struct ath_softc *sc = hw->priv;
1113 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1115 error = ath_suspend(sc);
1117 DPRINTF(sc, ATH_DBG_CONFIG,
1118 "%s: Device is no longer present\n", __func__);
1120 ieee80211_stop_queues(hw);
1122 #ifdef CONFIG_RFKILL
1123 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1124 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1128 static int ath9k_add_interface(struct ieee80211_hw *hw,
1129 struct ieee80211_if_init_conf *conf)
1131 struct ath_softc *sc = hw->priv;
1132 int error, ic_opmode = 0;
1134 /* Support only vap for now */
1139 switch (conf->type) {
1140 case NL80211_IFTYPE_STATION:
1141 ic_opmode = ATH9K_M_STA;
1143 case NL80211_IFTYPE_ADHOC:
1144 ic_opmode = ATH9K_M_IBSS;
1146 case NL80211_IFTYPE_AP:
1147 ic_opmode = ATH9K_M_HOSTAP;
1150 DPRINTF(sc, ATH_DBG_FATAL,
1151 "%s: Interface type %d not yet supported\n",
1152 __func__, conf->type);
1156 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1160 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1162 DPRINTF(sc, ATH_DBG_FATAL,
1163 "%s: Unable to attach vap, error: %d\n",
1168 if (conf->type == NL80211_IFTYPE_AP) {
1169 /* TODO: is this a suitable place to start ANI for AP mode? */
1171 mod_timer(&sc->sc_ani.timer,
1172 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1178 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1179 struct ieee80211_if_init_conf *conf)
1181 struct ath_softc *sc = hw->priv;
1182 struct ath_vap *avp;
1185 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1187 avp = sc->sc_vaps[0];
1189 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1194 #ifdef CONFIG_SLOW_ANT_DIV
1195 ath_slow_ant_div_stop(&sc->sc_antdiv);
1198 del_timer_sync(&sc->sc_ani.timer);
1200 /* Update ratectrl */
1201 ath_rate_newstate(sc, avp);
1203 /* Reclaim beacon resources */
1204 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1205 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1206 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1207 ath_beacon_return(sc, avp);
1210 /* Set interrupt mask */
1211 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1212 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
1213 sc->sc_flags &= ~SC_OP_BEACONS;
1215 error = ath_vap_detach(sc, 0);
1217 DPRINTF(sc, ATH_DBG_FATAL,
1218 "%s: Unable to detach vap, error: %d\n",
1222 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1224 struct ath_softc *sc = hw->priv;
1225 struct ieee80211_channel *curchan = hw->conf.channel;
1226 struct ieee80211_conf *conf = &hw->conf;
1229 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1231 curchan->center_freq);
1233 /* Update chainmask */
1234 ath_update_chainmask(sc, conf->ht.enabled);
1236 pos = ath_get_channel(sc, curchan);
1238 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1242 sc->sc_ah->ah_channels[pos].chanmode =
1243 (curchan->band == IEEE80211_BAND_2GHZ) ?
1244 CHANNEL_G : CHANNEL_A;
1246 if (sc->sc_curaid && hw->conf.ht.enabled)
1247 sc->sc_ah->ah_channels[pos].chanmode =
1248 ath_get_extchanmode(sc, curchan);
1250 if (changed & IEEE80211_CONF_CHANGE_POWER)
1251 sc->sc_config.txpowlimit = 2 * conf->power_level;
1253 /* set h/w channel */
1254 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1255 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1261 static int ath9k_config_interface(struct ieee80211_hw *hw,
1262 struct ieee80211_vif *vif,
1263 struct ieee80211_if_conf *conf)
1265 struct ath_softc *sc = hw->priv;
1266 struct ath_hal *ah = sc->sc_ah;
1267 struct ath_vap *avp;
1271 avp = sc->sc_vaps[0];
1273 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1278 /* TODO: Need to decide which hw opmode to use for multi-interface
1280 if (vif->type == NL80211_IFTYPE_AP &&
1281 ah->ah_opmode != ATH9K_M_HOSTAP) {
1282 ah->ah_opmode = ATH9K_M_HOSTAP;
1283 ath9k_hw_setopmode(ah);
1284 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1285 /* Request full reset to get hw opmode changed properly */
1286 sc->sc_flags |= SC_OP_FULL_RESET;
1289 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1290 !is_zero_ether_addr(conf->bssid)) {
1291 switch (vif->type) {
1292 case NL80211_IFTYPE_STATION:
1293 case NL80211_IFTYPE_ADHOC:
1294 /* Update ratectrl about the new state */
1295 ath_rate_newstate(sc, avp);
1298 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1300 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1303 /* Set aggregation protection mode parameters */
1304 sc->sc_config.ath_aggr_prot = 0;
1307 * Reset our TSF so that its value is lower than the
1308 * beacon that we are trying to catch.
1309 * Only then hw will update its TSF register with the
1310 * new beacon. Reset the TSF before setting the BSSID
1311 * to avoid allowing in any frames that would update
1312 * our TSF only to have us clear it
1313 * immediately thereafter.
1315 ath9k_hw_reset_tsf(sc->sc_ah);
1317 /* Disable BMISS interrupt when we're not associated */
1318 ath9k_hw_set_interrupts(sc->sc_ah,
1320 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1321 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1323 DPRINTF(sc, ATH_DBG_CONFIG,
1324 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1326 sc->sc_curbssid, sc->sc_curaid);
1328 /* need to reconfigure the beacon */
1329 sc->sc_flags &= ~SC_OP_BEACONS ;
1337 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1338 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1339 (vif->type == NL80211_IFTYPE_AP))) {
1341 * Allocate and setup the beacon frame.
1343 * Stop any previous beacon DMA. This may be
1344 * necessary, for example, when an ibss merge
1345 * causes reconfiguration; we may be called
1346 * with beacon transmission active.
1348 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1350 error = ath_beacon_alloc(sc, 0);
1354 ath_beacon_sync(sc, 0);
1357 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1358 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
1359 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1360 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1361 ath9k_hw_keysetmac(sc->sc_ah,
1366 /* Only legacy IBSS for now */
1367 if (vif->type == NL80211_IFTYPE_ADHOC)
1368 ath_update_chainmask(sc, 0);
1373 #define SUPPORTED_FILTERS \
1374 (FIF_PROMISC_IN_BSS | \
1378 FIF_BCN_PRBRESP_PROMISC | \
1381 /* FIXME: sc->sc_full_reset ? */
1382 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1383 unsigned int changed_flags,
1384 unsigned int *total_flags,
1386 struct dev_mc_list *mclist)
1388 struct ath_softc *sc = hw->priv;
1391 changed_flags &= SUPPORTED_FILTERS;
1392 *total_flags &= SUPPORTED_FILTERS;
1394 sc->rx_filter = *total_flags;
1395 rfilt = ath_calcrxfilter(sc);
1396 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1398 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1399 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1400 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1403 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1404 __func__, sc->rx_filter);
1407 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1408 struct ieee80211_vif *vif,
1409 enum sta_notify_cmd cmd,
1410 struct ieee80211_sta *sta)
1412 struct ath_softc *sc = hw->priv;
1413 struct ath_node *an;
1414 unsigned long flags;
1416 spin_lock_irqsave(&sc->node_lock, flags);
1417 an = ath_node_find(sc, sta->addr);
1418 spin_unlock_irqrestore(&sc->node_lock, flags);
1421 case STA_NOTIFY_ADD:
1422 spin_lock_irqsave(&sc->node_lock, flags);
1424 ath_node_attach(sc, sta->addr, 0);
1425 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %pM\n",
1426 __func__, sta->addr);
1428 ath_node_get(sc, sta->addr);
1431 /* XXX: Is this right? Can the capabilities change? */
1432 an = ath_node_find(sc, sta->addr);
1433 an->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
1434 sta->ht_cap.ampdu_factor);
1436 parse_mpdudensity(sta->ht_cap.ampdu_density);
1438 spin_unlock_irqrestore(&sc->node_lock, flags);
1440 case STA_NOTIFY_REMOVE:
1442 DPRINTF(sc, ATH_DBG_FATAL,
1443 "%s: Removal of a non-existent node\n",
1446 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
1447 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %pM\n",
1457 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1459 const struct ieee80211_tx_queue_params *params)
1461 struct ath_softc *sc = hw->priv;
1462 struct ath9k_tx_queue_info qi;
1465 if (queue >= WME_NUM_AC)
1468 qi.tqi_aifs = params->aifs;
1469 qi.tqi_cwmin = params->cw_min;
1470 qi.tqi_cwmax = params->cw_max;
1471 qi.tqi_burstTime = params->txop;
1472 qnum = ath_get_hal_qnum(queue, sc);
1474 DPRINTF(sc, ATH_DBG_CONFIG,
1475 "%s: Configure tx [queue/halq] [%d/%d], "
1476 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1485 ret = ath_txq_update(sc, qnum, &qi);
1487 DPRINTF(sc, ATH_DBG_FATAL,
1488 "%s: TXQ Update failed\n", __func__);
1493 static int ath9k_set_key(struct ieee80211_hw *hw,
1494 enum set_key_cmd cmd,
1495 const u8 *local_addr,
1497 struct ieee80211_key_conf *key)
1499 struct ath_softc *sc = hw->priv;
1502 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1506 ret = ath_key_config(sc, addr, key);
1508 set_bit(key->keyidx, sc->sc_keymap);
1509 key->hw_key_idx = key->keyidx;
1510 /* push IV and Michael MIC generation to stack */
1511 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1512 if (key->alg == ALG_TKIP)
1513 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1517 ath_key_delete(sc, key);
1518 clear_bit(key->keyidx, sc->sc_keymap);
1527 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1528 struct ieee80211_vif *vif,
1529 struct ieee80211_bss_conf *bss_conf,
1532 struct ath_softc *sc = hw->priv;
1534 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1535 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1537 bss_conf->use_short_preamble);
1538 if (bss_conf->use_short_preamble)
1539 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1541 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1544 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1545 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1547 bss_conf->use_cts_prot);
1548 if (bss_conf->use_cts_prot &&
1549 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1550 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1552 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1555 if (changed & BSS_CHANGED_HT) {
1556 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1558 ath9k_ht_conf(sc, bss_conf);
1561 if (changed & BSS_CHANGED_ASSOC) {
1562 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1565 ath9k_bss_assoc_info(sc, bss_conf);
1569 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1572 struct ath_softc *sc = hw->priv;
1573 struct ath_hal *ah = sc->sc_ah;
1575 tsf = ath9k_hw_gettsf64(ah);
1580 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1582 struct ath_softc *sc = hw->priv;
1583 struct ath_hal *ah = sc->sc_ah;
1585 ath9k_hw_reset_tsf(ah);
1588 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1589 enum ieee80211_ampdu_mlme_action action,
1590 struct ieee80211_sta *sta,
1593 struct ath_softc *sc = hw->priv;
1597 case IEEE80211_AMPDU_RX_START:
1598 ret = ath_rx_aggr_start(sc, sta->addr, tid, ssn);
1600 DPRINTF(sc, ATH_DBG_FATAL,
1601 "%s: Unable to start RX aggregation\n",
1604 case IEEE80211_AMPDU_RX_STOP:
1605 ret = ath_rx_aggr_stop(sc, sta->addr, tid);
1607 DPRINTF(sc, ATH_DBG_FATAL,
1608 "%s: Unable to stop RX aggregation\n",
1611 case IEEE80211_AMPDU_TX_START:
1612 ret = ath_tx_aggr_start(sc, sta->addr, tid, ssn);
1614 DPRINTF(sc, ATH_DBG_FATAL,
1615 "%s: Unable to start TX aggregation\n",
1618 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1620 case IEEE80211_AMPDU_TX_STOP:
1621 ret = ath_tx_aggr_stop(sc, sta->addr, tid);
1623 DPRINTF(sc, ATH_DBG_FATAL,
1624 "%s: Unable to stop TX aggregation\n",
1627 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1630 DPRINTF(sc, ATH_DBG_FATAL,
1631 "%s: Unknown AMPDU action\n", __func__);
1637 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1642 static struct ieee80211_ops ath9k_ops = {
1644 .start = ath9k_start,
1646 .add_interface = ath9k_add_interface,
1647 .remove_interface = ath9k_remove_interface,
1648 .config = ath9k_config,
1649 .config_interface = ath9k_config_interface,
1650 .configure_filter = ath9k_configure_filter,
1652 .sta_notify = ath9k_sta_notify,
1653 .conf_tx = ath9k_conf_tx,
1654 .get_tx_stats = NULL,
1655 .bss_info_changed = ath9k_bss_info_changed,
1657 .set_key = ath9k_set_key,
1659 .get_tkip_seq = NULL,
1660 .set_rts_threshold = NULL,
1661 .set_frag_threshold = NULL,
1662 .get_tsf = ath9k_get_tsf,
1663 .reset_tsf = ath9k_reset_tsf,
1664 .tx_last_beacon = NULL,
1665 .ampdu_action = ath9k_ampdu_action,
1666 .set_frag_threshold = ath9k_no_fragmentation,
1669 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1672 struct ath_softc *sc;
1673 struct ieee80211_hw *hw;
1674 const char *athname;
1679 if (pci_enable_device(pdev))
1682 /* XXX 32-bit addressing only */
1683 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1684 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1690 * Cache line size is used to size and align various
1691 * structures used to communicate with the hardware.
1693 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1696 * Linux 2.4.18 (at least) writes the cache line size
1697 * register as a 16-bit wide register which is wrong.
1698 * We must have this setup properly for rx buffer
1699 * DMA to work so force a reasonable value here if it
1702 csz = L1_CACHE_BYTES / sizeof(u32);
1703 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1706 * The default setting of latency timer yields poor results,
1707 * set it to the value used by other systems. It may be worth
1708 * tweaking this setting more.
1710 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1712 pci_set_master(pdev);
1715 * Disable the RETRY_TIMEOUT register (0x41) to keep
1716 * PCI Tx retries from interfering with C3 CPU state.
1718 pci_read_config_dword(pdev, 0x40, &val);
1719 if ((val & 0x0000ff00) != 0)
1720 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1722 ret = pci_request_region(pdev, 0, "ath9k");
1724 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1729 mem = pci_iomap(pdev, 0, 0);
1731 printk(KERN_ERR "PCI memory map error\n") ;
1736 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1738 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1742 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1743 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1744 IEEE80211_HW_SIGNAL_DBM |
1745 IEEE80211_HW_NOISE_DBM |
1746 IEEE80211_HW_AMPDU_AGGREGATION;
1748 hw->wiphy->interface_modes =
1749 BIT(NL80211_IFTYPE_AP) |
1750 BIT(NL80211_IFTYPE_STATION) |
1751 BIT(NL80211_IFTYPE_ADHOC);
1753 SET_IEEE80211_DEV(hw, &pdev->dev);
1754 pci_set_drvdata(pdev, hw);
1761 if (ath_attach(id->device, sc) != 0) {
1766 /* setup interrupt service routine */
1768 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1769 printk(KERN_ERR "%s: request_irq failed\n",
1770 wiphy_name(hw->wiphy));
1775 athname = ath9k_hw_probe(id->vendor, id->device);
1777 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1778 wiphy_name(hw->wiphy),
1779 athname ? athname : "Atheros ???",
1780 (unsigned long)mem, pdev->irq);
1786 ieee80211_free_hw(hw);
1788 pci_iounmap(pdev, mem);
1790 pci_release_region(pdev, 0);
1792 pci_disable_device(pdev);
1796 static void ath_pci_remove(struct pci_dev *pdev)
1798 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1799 struct ath_softc *sc = hw->priv;
1800 enum ath9k_int status;
1803 ath9k_hw_set_interrupts(sc->sc_ah, 0);
1805 ath9k_hw_getisr(sc->sc_ah, &status);
1806 sc->sc_flags |= SC_OP_INVALID;
1807 free_irq(pdev->irq, sc);
1811 pci_iounmap(pdev, sc->mem);
1812 pci_release_region(pdev, 0);
1813 pci_disable_device(pdev);
1814 ieee80211_free_hw(hw);
1819 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1821 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1822 struct ath_softc *sc = hw->priv;
1824 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1826 #ifdef CONFIG_RFKILL
1827 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1828 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1831 pci_save_state(pdev);
1832 pci_disable_device(pdev);
1833 pci_set_power_state(pdev, 3);
1838 static int ath_pci_resume(struct pci_dev *pdev)
1840 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1841 struct ath_softc *sc = hw->priv;
1845 err = pci_enable_device(pdev);
1848 pci_restore_state(pdev);
1850 * Suspend/Resume resets the PCI configuration space, so we have to
1851 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1852 * PCI Tx retries from interfering with C3 CPU state
1854 pci_read_config_dword(pdev, 0x40, &val);
1855 if ((val & 0x0000ff00) != 0)
1856 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1859 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1860 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1861 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1863 #ifdef CONFIG_RFKILL
1865 * check the h/w rfkill state on resume
1866 * and start the rfkill poll timer
1868 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1869 queue_delayed_work(sc->hw->workqueue,
1870 &sc->rf_kill.rfkill_poll, 0);
1876 #endif /* CONFIG_PM */
1878 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1880 static struct pci_driver ath_pci_driver = {
1882 .id_table = ath_pci_id_table,
1883 .probe = ath_pci_probe,
1884 .remove = ath_pci_remove,
1886 .suspend = ath_pci_suspend,
1887 .resume = ath_pci_resume,
1888 #endif /* CONFIG_PM */
1891 static int __init init_ath_pci(void)
1893 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1895 if (pci_register_driver(&ath_pci_driver) < 0) {
1897 "ath_pci: No devices found, driver not installed.\n");
1898 pci_unregister_driver(&ath_pci_driver);
1904 module_init(init_ath_pci);
1906 static void __exit exit_ath_pci(void)
1908 pci_unregister_driver(&ath_pci_driver);
1909 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1911 module_exit(exit_ath_pci);