git.oblomov.eu Git - linux-2.6/blob - arch/ia64/kernel/smpboot.c

   1 /*
   2  * SMP boot-related support
   3  *
   4  * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
   5  *      David Mosberger-Tang <davidm@hpl.hp.com>
   6  * Copyright (C) 2001, 2004-2005 Intel Corp
   7  *      Rohit Seth <rohit.seth@intel.com>
   8  *      Suresh Siddha <suresh.b.siddha@intel.com>
   9  *      Gordon Jin <gordon.jin@intel.com>
  10  *      Ashok Raj  <ashok.raj@intel.com>
  11  *
  12  * 01/05/16 Rohit Seth <rohit.seth@intel.com>   Moved SMP booting functions from smp.c to here.
  13  * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
  14  * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
  15  *                                              smp_boot_cpus()/smp_commence() is replaced by
  16  *                                              smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
  17  * 04/06/21 Ashok Raj           <ashok.raj@intel.com> Added CPU Hotplug Support
  18  * 04/12/26 Jin Gordon <gordon.jin@intel.com>
  19  * 04/12/26 Rohit Seth <rohit.seth@intel.com>
  20  *                                              Add multi-threading and multi-core detection
  21  * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
  22  *                                              Setup cpu_sibling_map and cpu_core_map
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/acpi.h>
  27 #include <linux/bootmem.h>
  28 #include <linux/cpu.h>
  29 #include <linux/delay.h>
  30 #include <linux/init.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/irq.h>
  33 #include <linux/kernel.h>
  34 #include <linux/kernel_stat.h>
  35 #include <linux/mm.h>
  36 #include <linux/notifier.h>
  37 #include <linux/smp.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/efi.h>
  40 #include <linux/percpu.h>
  41 #include <linux/bitops.h>
  42
  43 #include <asm/atomic.h>
  44 #include <asm/cache.h>
  45 #include <asm/current.h>
  46 #include <asm/delay.h>
  47 #include <asm/ia32.h>
  48 #include <asm/io.h>
  49 #include <asm/irq.h>
  50 #include <asm/machvec.h>
  51 #include <asm/mca.h>
  52 #include <asm/page.h>
  53 #include <asm/paravirt.h>
  54 #include <asm/pgalloc.h>
  55 #include <asm/pgtable.h>
  56 #include <asm/processor.h>
  57 #include <asm/ptrace.h>
  58 #include <asm/sal.h>
  59 #include <asm/system.h>
  60 #include <asm/tlbflush.h>
  61 #include <asm/unistd.h>
  62 #include <asm/sn/arch.h>
  63
  64 #define SMP_DEBUG 0
  65
  66 #if SMP_DEBUG
  67 #define Dprintk(x...)  printk(x)
  68 #else
  69 #define Dprintk(x...)
  70 #endif
  71
  72 #ifdef CONFIG_HOTPLUG_CPU
  73 #ifdef CONFIG_PERMIT_BSP_REMOVE
  74 #define bsp_remove_ok   1
  75 #else
  76 #define bsp_remove_ok   0
  77 #endif
  78
  79 /*
  80  * Store all idle threads, this can be reused instead of creating
  81  * a new thread. Also avoids complicated thread destroy functionality
  82  * for idle threads.
  83  */
  84 struct task_struct *idle_thread_array[NR_CPUS];
  85
  86 /*
  87  * Global array allocated for NR_CPUS at boot time
  88  */
  89 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
  90
  91 /*
  92  * start_ap in head.S uses this to store current booting cpu
  93  * info.
  94  */
  95 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
  96
  97 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
  98
  99 #define get_idle_for_cpu(x)             (idle_thread_array[(x)])
 100 #define set_idle_for_cpu(x,p)   (idle_thread_array[(x)] = (p))
 101
 102 #else
 103
 104 #define get_idle_for_cpu(x)             (NULL)
 105 #define set_idle_for_cpu(x,p)
 106 #define set_brendez_area(x)
 107 #endif
 108
 109
 110 /*
 111  * ITC synchronization related stuff:
 112  */
 113 #define MASTER  (0)
 114 #define SLAVE   (SMP_CACHE_BYTES/8)
 115
 116 #define NUM_ROUNDS      64      /* magic value */
 117 #define NUM_ITERS       5       /* likewise */
 118
 119 static DEFINE_SPINLOCK(itc_sync_lock);
 120 static volatile unsigned long go[SLAVE + 1];
 121
 122 #define DEBUG_ITC_SYNC  0
 123
 124 extern void start_ap (void);
 125 extern unsigned long ia64_iobase;
 126
 127 struct task_struct *task_for_booting_cpu;
 128
 129 /*
 130  * State for each CPU
 131  */
 132 DEFINE_PER_CPU(int, cpu_state);
 133
 134 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
 135 EXPORT_SYMBOL(cpu_core_map);
 136 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
 137 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
 138
 139 int smp_num_siblings = 1;
 140
 141 /* which logical CPU number maps to which CPU (physical APIC ID) */
 142 volatile int ia64_cpu_to_sapicid[NR_CPUS];
 143 EXPORT_SYMBOL(ia64_cpu_to_sapicid);
 144
 145 static volatile cpumask_t cpu_callin_map;
 146
 147 struct smp_boot_data smp_boot_data __initdata;
 148
 149 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
 150
 151 char __initdata no_int_routing;
 152
 153 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
 154
 155 #ifdef CONFIG_FORCE_CPEI_RETARGET
 156 #define CPEI_OVERRIDE_DEFAULT   (1)
 157 #else
 158 #define CPEI_OVERRIDE_DEFAULT   (0)
 159 #endif
 160
 161 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
 162
 163 static int __init
 164 cmdl_force_cpei(char *str)
 165 {
 166         int value=0;
 167
 168         get_option (&str, &value);
 169         force_cpei_retarget = value;
 170
 171         return 1;
 172 }
 173
 174 __setup("force_cpei=", cmdl_force_cpei);
 175
 176 static int __init
 177 nointroute (char *str)
 178 {
 179         no_int_routing = 1;
 180         printk ("no_int_routing on\n");
 181         return 1;
 182 }
 183
 184 __setup("nointroute", nointroute);
 185
 186 static void fix_b0_for_bsp(void)
 187 {
 188 #ifdef CONFIG_HOTPLUG_CPU
 189         int cpuid;
 190         static int fix_bsp_b0 = 1;
 191
 192         cpuid = smp_processor_id();
 193
 194         /*
 195          * Cache the b0 value on the first AP that comes up
 196          */
 197         if (!(fix_bsp_b0 && cpuid))
 198                 return;
 199
 200         sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
 201         printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
 202
 203         fix_bsp_b0 = 0;
 204 #endif
 205 }
 206
 207 void
 208 sync_master (void *arg)
 209 {
 210         unsigned long flags, i;
 211
 212         go[MASTER] = 0;
 213
 214         local_irq_save(flags);
 215         {
 216                 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
 217                         while (!go[MASTER])
 218                                 cpu_relax();
 219                         go[MASTER] = 0;
 220                         go[SLAVE] = ia64_get_itc();
 221                 }
 222         }
 223         local_irq_restore(flags);
 224 }
 225
 226 /*
 227  * Return the number of cycles by which our itc differs from the itc on the master
 228  * (time-keeper) CPU.  A positive number indicates our itc is ahead of the master,
 229  * negative that it is behind.
 230  */
 231 static inline long
 232 get_delta (long *rt, long *master)
 233 {
 234         unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
 235         unsigned long tcenter, t0, t1, tm;
 236         long i;
 237
 238         for (i = 0; i < NUM_ITERS; ++i) {
 239                 t0 = ia64_get_itc();
 240                 go[MASTER] = 1;
 241                 while (!(tm = go[SLAVE]))
 242                         cpu_relax();
 243                 go[SLAVE] = 0;
 244                 t1 = ia64_get_itc();
 245
 246                 if (t1 - t0 < best_t1 - best_t0)
 247                         best_t0 = t0, best_t1 = t1, best_tm = tm;
 248         }
 249
 250         *rt = best_t1 - best_t0;
 251         *master = best_tm - best_t0;
 252
 253         /* average best_t0 and best_t1 without overflow: */
 254         tcenter = (best_t0/2 + best_t1/2);
 255         if (best_t0 % 2 + best_t1 % 2 == 2)
 256                 ++tcenter;
 257         return tcenter - best_tm;
 258 }
 259
 260 /*
 261  * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
 262  * (normally the time-keeper CPU).  We use a closed loop to eliminate the possibility of
 263  * unaccounted-for errors (such as getting a machine check in the middle of a calibration
 264  * step).  The basic idea is for the slave to ask the master what itc value it has and to
 265  * read its own itc before and after the master responds.  Each iteration gives us three
 266  * timestamps:
 267  *
 268  *      slave           master
 269  *
 270  *      t0 ---\
 271  *             ---\
 272  *                 --->
 273  *                      tm
 274  *                 /---
 275  *             /---
 276  *      t1 <---
 277  *
 278  *
 279  * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
 280  * and t1.  If we achieve this, the clocks are synchronized provided the interconnect
 281  * between the slave and the master is symmetric.  Even if the interconnect were
 282  * asymmetric, we would still know that the synchronization error is smaller than the
 283  * roundtrip latency (t0 - t1).
 284  *
 285  * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
 286  * within one or two cycles.  However, we can only *guarantee* that the synchronization is
 287  * accurate to within a round-trip time, which is typically in the range of several
 288  * hundred cycles (e.g., ~500 cycles).  In practice, this means that the itc's are usually
 289  * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
 290  * than half a micro second or so.
 291  */
 292 void
 293 ia64_sync_itc (unsigned int master)
 294 {
 295         long i, delta, adj, adjust_latency = 0, done = 0;
 296         unsigned long flags, rt, master_time_stamp, bound;
 297 #if DEBUG_ITC_SYNC
 298         struct {
 299                 long rt;        /* roundtrip time */
 300                 long master;    /* master's timestamp */
 301                 long diff;      /* difference between midpoint and master's timestamp */
 302                 long lat;       /* estimate of itc adjustment latency */
 303         } t[NUM_ROUNDS];
 304 #endif
 305
 306         /*
 307          * Make sure local timer ticks are disabled while we sync.  If
 308          * they were enabled, we'd have to worry about nasty issues
 309          * like setting the ITC ahead of (or a long time before) the
 310          * next scheduled tick.
 311          */
 312         BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
 313
 314         go[MASTER] = 1;
 315
 316         if (smp_call_function_single(master, sync_master, NULL, 0) < 0) {
 317                 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
 318                 return;
 319         }
 320
 321         while (go[MASTER])
 322                 cpu_relax();    /* wait for master to be ready */
 323
 324         spin_lock_irqsave(&itc_sync_lock, flags);
 325         {
 326                 for (i = 0; i < NUM_ROUNDS; ++i) {
 327                         delta = get_delta(&rt, &master_time_stamp);
 328                         if (delta == 0) {
 329                                 done = 1;       /* let's lock on to this... */
 330                                 bound = rt;
 331                         }
 332
 333                         if (!done) {
 334                                 if (i > 0) {
 335                                         adjust_latency += -delta;
 336                                         adj = -delta + adjust_latency/4;
 337                                 } else
 338                                         adj = -delta;
 339
 340                                 ia64_set_itc(ia64_get_itc() + adj);
 341                         }
 342 #if DEBUG_ITC_SYNC
 343                         t[i].rt = rt;
 344                         t[i].master = master_time_stamp;
 345                         t[i].diff = delta;
 346                         t[i].lat = adjust_latency/4;
 347 #endif
 348                 }
 349         }
 350         spin_unlock_irqrestore(&itc_sync_lock, flags);
 351
 352 #if DEBUG_ITC_SYNC
 353         for (i = 0; i < NUM_ROUNDS; ++i)
 354                 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
 355                        t[i].rt, t[i].master, t[i].diff, t[i].lat);
 356 #endif
 357
 358         printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
 359                "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
 360 }
 361
 362 /*
 363  * Ideally sets up per-cpu profiling hooks.  Doesn't do much now...
 364  */
 365 static inline void __devinit
 366 smp_setup_percpu_timer (void)
 367 {
 368 }
 369
 370 static void __cpuinit
 371 smp_callin (void)
 372 {
 373         int cpuid, phys_id, itc_master;
 374         struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo;
 375         extern void ia64_init_itm(void);
 376         extern volatile int time_keeper_id;
 377
 378 #ifdef CONFIG_PERFMON
 379         extern void pfm_init_percpu(void);
 380 #endif
 381
 382         cpuid = smp_processor_id();
 383         phys_id = hard_smp_processor_id();
 384         itc_master = time_keeper_id;
 385
 386         if (cpu_online(cpuid)) {
 387                 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
 388                        phys_id, cpuid);
 389                 BUG();
 390         }
 391
 392         fix_b0_for_bsp();
 393
 394         ipi_call_lock_irq();
 395         spin_lock(&vector_lock);
 396         /* Setup the per cpu irq handling data structures */
 397         __setup_vector_irq(cpuid);
 398         notify_cpu_starting(cpuid);
 399         cpu_set(cpuid, cpu_online_map);
 400         per_cpu(cpu_state, cpuid) = CPU_ONLINE;
 401         spin_unlock(&vector_lock);
 402         ipi_call_unlock_irq();
 403
 404         smp_setup_percpu_timer();
 405
 406         ia64_mca_cmc_vector_setup();    /* Setup vector on AP */
 407
 408 #ifdef CONFIG_PERFMON
 409         pfm_init_percpu();
 410 #endif
 411
 412         local_irq_enable();
 413
 414         if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
 415                 /*
 416                  * Synchronize the ITC with the BP.  Need to do this after irqs are
 417                  * enabled because ia64_sync_itc() calls smp_call_function_single(), which
 418                  * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
 419                  * local_bh_enable(), which bugs out if irqs are not enabled...
 420                  */
 421                 Dprintk("Going to syncup ITC with ITC Master.\n");
 422                 ia64_sync_itc(itc_master);
 423         }
 424
 425         /*
 426          * Get our bogomips.
 427          */
 428         ia64_init_itm();
 429
 430         /*
 431          * Delay calibration can be skipped if new processor is identical to the
 432          * previous processor.
 433          */
 434         last_cpuinfo = cpu_data(cpuid - 1);
 435         this_cpuinfo = local_cpu_data;
 436         if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq ||
 437             last_cpuinfo->proc_freq != this_cpuinfo->proc_freq ||
 438             last_cpuinfo->features != this_cpuinfo->features ||
 439             last_cpuinfo->revision != this_cpuinfo->revision ||
 440             last_cpuinfo->family != this_cpuinfo->family ||
 441             last_cpuinfo->archrev != this_cpuinfo->archrev ||
 442             last_cpuinfo->model != this_cpuinfo->model)
 443                 calibrate_delay();
 444         local_cpu_data->loops_per_jiffy = loops_per_jiffy;
 445
 446 #ifdef CONFIG_IA32_SUPPORT
 447         ia32_gdt_init();
 448 #endif
 449
 450         /*
 451          * Allow the master to continue.
 452          */
 453         cpu_set(cpuid, cpu_callin_map);
 454         Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
 455 }
 456
 457
 458 /*
 459  * Activate a secondary processor.  head.S calls this.
 460  */
 461 int __cpuinit
 462 start_secondary (void *unused)
 463 {
 464         /* Early console may use I/O ports */
 465         ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
 466 #ifndef CONFIG_PRINTK_TIME
 467         Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
 468 #endif
 469         efi_map_pal_code();
 470         cpu_init();
 471         preempt_disable();
 472         smp_callin();
 473
 474         cpu_idle();
 475         return 0;
 476 }
 477
 478 struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
 479 {
 480         return NULL;
 481 }
 482
 483 struct create_idle {
 484         struct work_struct work;
 485         struct task_struct *idle;
 486         struct completion done;
 487         int cpu;
 488 };
 489
 490 void __cpuinit
 491 do_fork_idle(struct work_struct *work)
 492 {
 493         struct create_idle *c_idle =
 494                 container_of(work, struct create_idle, work);
 495
 496         c_idle->idle = fork_idle(c_idle->cpu);
 497         complete(&c_idle->done);
 498 }
 499
 500 static int __cpuinit
 501 do_boot_cpu (int sapicid, int cpu)
 502 {
 503         int timeout;
 504         struct create_idle c_idle = {
 505                 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),
 506                 .cpu    = cpu,
 507                 .done   = COMPLETION_INITIALIZER(c_idle.done),
 508         };
 509
 510         c_idle.idle = get_idle_for_cpu(cpu);
 511         if (c_idle.idle) {
 512                 init_idle(c_idle.idle, cpu);
 513                 goto do_rest;
 514         }
 515
 516         /*
 517          * We can't use kernel_thread since we must avoid to reschedule the child.
 518          */
 519         if (!keventd_up() || current_is_keventd())
 520                 c_idle.work.func(&c_idle.work);
 521         else {
 522                 schedule_work(&c_idle.work);
 523                 wait_for_completion(&c_idle.done);
 524         }
 525
 526         if (IS_ERR(c_idle.idle))
 527                 panic("failed fork for CPU %d", cpu);
 528
 529         set_idle_for_cpu(cpu, c_idle.idle);
 530
 531 do_rest:
 532         task_for_booting_cpu = c_idle.idle;
 533
 534         Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
 535
 536         set_brendez_area(cpu);
 537         platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
 538
 539         /*
 540          * Wait 10s total for the AP to start
 541          */
 542         Dprintk("Waiting on callin_map ...");
 543         for (timeout = 0; timeout < 100000; timeout++) {
 544                 if (cpu_isset(cpu, cpu_callin_map))
 545                         break;  /* It has booted */
 546                 udelay(100);
 547         }
 548         Dprintk("\n");
 549
 550         if (!cpu_isset(cpu, cpu_callin_map)) {
 551                 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
 552                 ia64_cpu_to_sapicid[cpu] = -1;
 553                 cpu_clear(cpu, cpu_online_map);  /* was set in smp_callin() */
 554                 return -EINVAL;
 555         }
 556         return 0;
 557 }
 558
 559 static int __init
 560 decay (char *str)
 561 {
 562         int ticks;
 563         get_option (&str, &ticks);
 564         return 1;
 565 }
 566
 567 __setup("decay=", decay);
 568
 569 /*
 570  * Initialize the logical CPU number to SAPICID mapping
 571  */
 572 void __init
 573 smp_build_cpu_map (void)
 574 {
 575         int sapicid, cpu, i;
 576         int boot_cpu_id = hard_smp_processor_id();
 577
 578         for (cpu = 0; cpu < NR_CPUS; cpu++) {
 579                 ia64_cpu_to_sapicid[cpu] = -1;
 580         }
 581
 582         ia64_cpu_to_sapicid[0] = boot_cpu_id;
 583         cpus_clear(cpu_present_map);
 584         cpu_set(0, cpu_present_map);
 585         cpu_set(0, cpu_possible_map);
 586         for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
 587                 sapicid = smp_boot_data.cpu_phys_id[i];
 588                 if (sapicid == boot_cpu_id)
 589                         continue;
 590                 cpu_set(cpu, cpu_present_map);
 591                 cpu_set(cpu, cpu_possible_map);
 592                 ia64_cpu_to_sapicid[cpu] = sapicid;
 593                 cpu++;
 594         }
 595 }
 596
 597 /*
 598  * Cycle through the APs sending Wakeup IPIs to boot each.
 599  */
 600 void __init
 601 smp_prepare_cpus (unsigned int max_cpus)
 602 {
 603         int boot_cpu_id = hard_smp_processor_id();
 604
 605         /*
 606          * Initialize the per-CPU profiling counter/multiplier
 607          */
 608
 609         smp_setup_percpu_timer();
 610
 611         /*
 612          * We have the boot CPU online for sure.
 613          */
 614         cpu_set(0, cpu_online_map);
 615         cpu_set(0, cpu_callin_map);
 616
 617         local_cpu_data->loops_per_jiffy = loops_per_jiffy;
 618         ia64_cpu_to_sapicid[0] = boot_cpu_id;
 619
 620         printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
 621
 622         current_thread_info()->cpu = 0;
 623
 624         /*
 625          * If SMP should be disabled, then really disable it!
 626          */
 627         if (!max_cpus) {
 628                 printk(KERN_INFO "SMP mode deactivated.\n");
 629                 cpus_clear(cpu_online_map);
 630                 cpus_clear(cpu_present_map);
 631                 cpus_clear(cpu_possible_map);
 632                 cpu_set(0, cpu_online_map);
 633                 cpu_set(0, cpu_present_map);
 634                 cpu_set(0, cpu_possible_map);
 635                 return;
 636         }
 637 }
 638
 639 void __devinit smp_prepare_boot_cpu(void)
 640 {
 641         cpu_set(smp_processor_id(), cpu_online_map);
 642         cpu_set(smp_processor_id(), cpu_callin_map);
 643         per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
 644         paravirt_post_smp_prepare_boot_cpu();
 645 }
 646
 647 #ifdef CONFIG_HOTPLUG_CPU
 648 static inline void
 649 clear_cpu_sibling_map(int cpu)
 650 {
 651         int i;
 652
 653         for_each_cpu_mask(i, per_cpu(cpu_sibling_map, cpu))
 654                 cpu_clear(cpu, per_cpu(cpu_sibling_map, i));
 655         for_each_cpu_mask(i, cpu_core_map[cpu])
 656                 cpu_clear(cpu, cpu_core_map[i]);
 657
 658         per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE;
 659 }
 660
 661 static void
 662 remove_siblinginfo(int cpu)
 663 {
 664         int last = 0;
 665
 666         if (cpu_data(cpu)->threads_per_core == 1 &&
 667             cpu_data(cpu)->cores_per_socket == 1) {
 668                 cpu_clear(cpu, cpu_core_map[cpu]);
 669                 cpu_clear(cpu, per_cpu(cpu_sibling_map, cpu));
 670                 return;
 671         }
 672
 673         last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0);
 674
 675         /* remove it from all sibling map's */
 676         clear_cpu_sibling_map(cpu);
 677 }
 678
 679 extern void fixup_irqs(void);
 680
 681 int migrate_platform_irqs(unsigned int cpu)
 682 {
 683         int new_cpei_cpu;
 684         irq_desc_t *desc = NULL;
 685         const struct cpumask *mask;
 686         int             retval = 0;
 687
 688         /*
 689          * dont permit CPEI target to removed.
 690          */
 691         if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
 692                 printk ("CPU (%d) is CPEI Target\n", cpu);
 693                 if (can_cpei_retarget()) {
 694                         /*
 695                          * Now re-target the CPEI to a different processor
 696                          */
 697                         new_cpei_cpu = any_online_cpu(cpu_online_map);
 698                         mask = cpumask_of(new_cpei_cpu);
 699                         set_cpei_target_cpu(new_cpei_cpu);
 700                         desc = irq_desc + ia64_cpe_irq;
 701                         /*
 702                          * Switch for now, immediately, we need to do fake intr
 703                          * as other interrupts, but need to study CPEI behaviour with
 704                          * polling before making changes.
 705                          */
 706                         if (desc) {
 707                                 desc->chip->disable(ia64_cpe_irq);
 708                                 desc->chip->set_affinity(ia64_cpe_irq, mask);
 709                                 desc->chip->enable(ia64_cpe_irq);
 710                                 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
 711                         }
 712                 }
 713                 if (!desc) {
 714                         printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
 715                         retval = -EBUSY;
 716                 }
 717         }
 718         return retval;
 719 }
 720
 721 /* must be called with cpucontrol mutex held */
 722 int __cpu_disable(void)
 723 {
 724         int cpu = smp_processor_id();
 725
 726         /*
 727          * dont permit boot processor for now
 728          */
 729         if (cpu == 0 && !bsp_remove_ok) {
 730                 printk ("Your platform does not support removal of BSP\n");
 731                 return (-EBUSY);
 732         }
 733
 734         if (ia64_platform_is("sn2")) {
 735                 if (!sn_cpu_disable_allowed(cpu))
 736                         return -EBUSY;
 737         }
 738
 739         if (migrate_platform_irqs(cpu)) {
 740                 cpu_set(cpu, cpu_online_map);
 741                 return (-EBUSY);
 742         }
 743
 744         remove_siblinginfo(cpu);
 745         fixup_irqs();
 746         cpu_clear(cpu, cpu_online_map);
 747         local_flush_tlb_all();
 748         cpu_clear(cpu, cpu_callin_map);
 749         return 0;
 750 }
 751
 752 void __cpu_die(unsigned int cpu)
 753 {
 754         unsigned int i;
 755
 756         for (i = 0; i < 100; i++) {
 757                 /* They ack this in play_dead by setting CPU_DEAD */
 758                 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
 759                 {
 760                         printk ("CPU %d is now offline\n", cpu);
 761                         return;
 762                 }
 763                 msleep(100);
 764         }
 765         printk(KERN_ERR "CPU %u didn't die...\n", cpu);
 766 }
 767 #endif /* CONFIG_HOTPLUG_CPU */
 768
 769 void
 770 smp_cpus_done (unsigned int dummy)
 771 {
 772         int cpu;
 773         unsigned long bogosum = 0;
 774
 775         /*
 776          * Allow the user to impress friends.
 777          */
 778
 779         for_each_online_cpu(cpu) {
 780                 bogosum += cpu_data(cpu)->loops_per_jiffy;
 781         }
 782
 783         printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
 784                (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
 785 }
 786
 787 static inline void __devinit
 788 set_cpu_sibling_map(int cpu)
 789 {
 790         int i;
 791
 792         for_each_online_cpu(i) {
 793                 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
 794                         cpu_set(i, cpu_core_map[cpu]);
 795                         cpu_set(cpu, cpu_core_map[i]);
 796                         if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
 797                                 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
 798                                 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
 799                         }
 800                 }
 801         }
 802 }
 803
 804 int __cpuinit
 805 __cpu_up (unsigned int cpu)
 806 {
 807         int ret;
 808         int sapicid;
 809
 810         sapicid = ia64_cpu_to_sapicid[cpu];
 811         if (sapicid == -1)
 812                 return -EINVAL;
 813
 814         /*
 815          * Already booted cpu? not valid anymore since we dont
 816          * do idle loop tightspin anymore.
 817          */
 818         if (cpu_isset(cpu, cpu_callin_map))
 819                 return -EINVAL;
 820
 821         per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 822         /* Processor goes to start_secondary(), sets online flag */
 823         ret = do_boot_cpu(sapicid, cpu);
 824         if (ret < 0)
 825                 return ret;
 826
 827         if (cpu_data(cpu)->threads_per_core == 1 &&
 828             cpu_data(cpu)->cores_per_socket == 1) {
 829                 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
 830                 cpu_set(cpu, cpu_core_map[cpu]);
 831                 return 0;
 832         }
 833
 834         set_cpu_sibling_map(cpu);
 835
 836         return 0;
 837 }
 838
 839 /*
 840  * Assume that CPUs have been discovered by some platform-dependent interface.  For
 841  * SoftSDV/Lion, that would be ACPI.
 842  *
 843  * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
 844  */
 845 void __init
 846 init_smp_config(void)
 847 {
 848         struct fptr {
 849                 unsigned long fp;
 850                 unsigned long gp;
 851         } *ap_startup;
 852         long sal_ret;
 853
 854         /* Tell SAL where to drop the APs.  */
 855         ap_startup = (struct fptr *) start_ap;
 856         sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
 857                                        ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
 858         if (sal_ret < 0)
 859                 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
 860                        ia64_sal_strerror(sal_ret));
 861 }
 862
 863 /*
 864  * identify_siblings(cpu) gets called from identify_cpu. This populates the
 865  * information related to logical execution units in per_cpu_data structure.
 866  */
 867 void __devinit
 868 identify_siblings(struct cpuinfo_ia64 *c)
 869 {
 870         s64 status;
 871         u16 pltid;
 872         pal_logical_to_physical_t info;
 873
 874         status = ia64_pal_logical_to_phys(-1, &info);
 875         if (status != PAL_STATUS_SUCCESS) {
 876                 if (status != PAL_STATUS_UNIMPLEMENTED) {
 877                         printk(KERN_ERR
 878                                 "ia64_pal_logical_to_phys failed with %ld\n",
 879                                 status);
 880                         return;
 881                 }
 882
 883                 info.overview_ppid = 0;
 884                 info.overview_cpp  = 1;
 885                 info.overview_tpc  = 1;
 886         }
 887
 888         status = ia64_sal_physical_id_info(&pltid);
 889         if (status != PAL_STATUS_SUCCESS) {
 890                 if (status != PAL_STATUS_UNIMPLEMENTED)
 891                         printk(KERN_ERR
 892                                 "ia64_sal_pltid failed with %ld\n",
 893                                 status);
 894                 return;
 895         }
 896
 897         c->socket_id =  (pltid << 8) | info.overview_ppid;
 898
 899         if (info.overview_cpp == 1 && info.overview_tpc == 1)
 900                 return;
 901
 902         c->cores_per_socket = info.overview_cpp;
 903         c->threads_per_core = info.overview_tpc;
 904         c->num_log = info.overview_num_log;
 905
 906         c->core_id = info.log1_cid;
 907         c->thread_id = info.log1_tid;
 908 }
 909
 910 /*
 911  * returns non zero, if multi-threading is enabled
 912  * on at least one physical package. Due to hotplug cpu
 913  * and (maxcpus=), all threads may not necessarily be enabled
 914  * even though the processor supports multi-threading.
 915  */
 916 int is_multithreading_enabled(void)
 917 {
 918         int i, j;
 919
 920         for_each_present_cpu(i) {
 921                 for_each_present_cpu(j) {
 922                         if (j == i)
 923                                 continue;
 924                         if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) {
 925                                 if (cpu_data(j)->core_id == cpu_data(i)->core_id)
 926                                         return 1;
 927                         }
 928                 }
 929         }
 930         return 0;
 931 }
 932 EXPORT_SYMBOL_GPL(is_multithreading_enabled);