Merge commit 'v2.6.28-rc1' into sched/urgent
[linux-2.6] / arch / powerpc / boot / dts / sbc8560.dts
1 /*
2  * SBC8560 Device Tree Source
3  *
4  * Copyright 2007 Wind River Systems Inc.
5  *
6  * Paul Gortmaker (see MAINTAINERS for contact information)
7  *
8  * This program is free software; you can redistribute  it and/or modify it
9  * under  the terms of  the GNU General  Public License as published by the
10  * Free Software Foundation;  either version 2 of the  License, or (at your
11  * option) any later version.
12  */
13
14 /dts-v1/;
15
16 / {
17         model = "SBC8560";
18         compatible = "SBC8560";
19         #address-cells = <1>;
20         #size-cells = <1>;
21
22         aliases {
23                 ethernet0 = &enet0;
24                 ethernet1 = &enet1;
25                 ethernet2 = &enet2;
26                 ethernet3 = &enet3;
27                 serial0 = &serial0;
28                 serial1 = &serial1;
29                 pci0 = &pci0;
30         };
31
32         cpus {
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35
36                 PowerPC,8560@0 {
37                         device_type = "cpu";
38                         reg = <0>;
39                         d-cache-line-size = <0x20>;     // 32 bytes
40                         i-cache-line-size = <0x20>;     // 32 bytes
41                         d-cache-size = <0x8000>;        // L1, 32K
42                         i-cache-size = <0x8000>;        // L1, 32K
43                         timebase-frequency = <0>;       // From uboot
44                         bus-frequency = <0>;
45                         clock-frequency = <0>;
46                         next-level-cache = <&L2>;
47                 };
48         };
49
50         memory {
51                 device_type = "memory";
52                 reg = <0x00000000 0x20000000>;
53         };
54
55         soc@ff700000 {
56                 #address-cells = <1>;
57                 #size-cells = <1>;
58                 device_type = "soc";
59                 ranges = <0x0 0xff700000 0x00100000>;
60                 reg = <0xff700000 0x00100000>;
61                 clock-frequency = <0>;
62
63                 memory-controller@2000 {
64                         compatible = "fsl,8560-memory-controller";
65                         reg = <0x2000 0x1000>;
66                         interrupt-parent = <&mpic>;
67                         interrupts = <0x12 0x2>;
68                 };
69
70                 L2: l2-cache-controller@20000 {
71                         compatible = "fsl,8560-l2-cache-controller";
72                         reg = <0x20000 0x1000>;
73                         cache-line-size = <0x20>;       // 32 bytes
74                         cache-size = <0x40000>;         // L2, 256K
75                         interrupt-parent = <&mpic>;
76                         interrupts = <0x10 0x2>;
77                 };
78
79                 i2c@3000 {
80                         #address-cells = <1>;
81                         #size-cells = <0>;
82                         cell-index = <0>;
83                         compatible = "fsl-i2c";
84                         reg = <0x3000 0x100>;
85                         interrupts = <0x2b 0x2>;
86                         interrupt-parent = <&mpic>;
87                         dfsrr;
88                 };
89
90                 i2c@3100 {
91                         #address-cells = <1>;
92                         #size-cells = <0>;
93                         cell-index = <1>;
94                         compatible = "fsl-i2c";
95                         reg = <0x3100 0x100>;
96                         interrupts = <0x2b 0x2>;
97                         interrupt-parent = <&mpic>;
98                         dfsrr;
99                 };
100
101                 dma@21300 {
102                         #address-cells = <1>;
103                         #size-cells = <1>;
104                         compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
105                         reg = <0x21300 0x4>;
106                         ranges = <0x0 0x21100 0x200>;
107                         cell-index = <0>;
108                         dma-channel@0 {
109                                 compatible = "fsl,mpc8560-dma-channel",
110                                                 "fsl,eloplus-dma-channel";
111                                 reg = <0x0 0x80>;
112                                 cell-index = <0>;
113                                 interrupt-parent = <&mpic>;
114                                 interrupts = <20 2>;
115                         };
116                         dma-channel@80 {
117                                 compatible = "fsl,mpc8560-dma-channel",
118                                                 "fsl,eloplus-dma-channel";
119                                 reg = <0x80 0x80>;
120                                 cell-index = <1>;
121                                 interrupt-parent = <&mpic>;
122                                 interrupts = <21 2>;
123                         };
124                         dma-channel@100 {
125                                 compatible = "fsl,mpc8560-dma-channel",
126                                                 "fsl,eloplus-dma-channel";
127                                 reg = <0x100 0x80>;
128                                 cell-index = <2>;
129                                 interrupt-parent = <&mpic>;
130                                 interrupts = <22 2>;
131                         };
132                         dma-channel@180 {
133                                 compatible = "fsl,mpc8560-dma-channel",
134                                                 "fsl,eloplus-dma-channel";
135                                 reg = <0x180 0x80>;
136                                 cell-index = <3>;
137                                 interrupt-parent = <&mpic>;
138                                 interrupts = <23 2>;
139                         };
140                 };
141
142                 mdio@24520 {
143                         #address-cells = <1>;
144                         #size-cells = <0>;
145                         compatible = "fsl,gianfar-mdio";
146                         reg = <0x24520 0x20>;
147                         phy0: ethernet-phy@19 {
148                                 interrupt-parent = <&mpic>;
149                                 interrupts = <0x6 0x1>;
150                                 reg = <0x19>;
151                                 device_type = "ethernet-phy";
152                         };
153                         phy1: ethernet-phy@1a {
154                                 interrupt-parent = <&mpic>;
155                                 interrupts = <0x7 0x1>;
156                                 reg = <0x1a>;
157                                 device_type = "ethernet-phy";
158                         };
159                         phy2: ethernet-phy@1b {
160                                 interrupt-parent = <&mpic>;
161                                 interrupts = <0x8 0x1>;
162                                 reg = <0x1b>;
163                                 device_type = "ethernet-phy";
164                         };
165                         phy3: ethernet-phy@1c {
166                                 interrupt-parent = <&mpic>;
167                                 interrupts = <0x8 0x1>;
168                                 reg = <0x1c>;
169                                 device_type = "ethernet-phy";
170                         };
171                 };
172
173                 enet0: ethernet@24000 {
174                         cell-index = <0>;
175                         device_type = "network";
176                         model = "TSEC";
177                         compatible = "gianfar";
178                         reg = <0x24000 0x1000>;
179                         local-mac-address = [ 00 00 00 00 00 00 ];
180                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
181                         interrupt-parent = <&mpic>;
182                         phy-handle = <&phy0>;
183                 };
184
185                 enet1: ethernet@25000 {
186                         cell-index = <1>;
187                         device_type = "network";
188                         model = "TSEC";
189                         compatible = "gianfar";
190                         reg = <0x25000 0x1000>;
191                         local-mac-address = [ 00 00 00 00 00 00 ];
192                         interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
193                         interrupt-parent = <&mpic>;
194                         phy-handle = <&phy1>;
195                 };
196
197                 mpic: pic@40000 {
198                         interrupt-controller;
199                         #address-cells = <0>;
200                         #interrupt-cells = <2>;
201                         compatible = "chrp,open-pic";
202                         reg = <0x40000 0x40000>;
203                         device_type = "open-pic";
204                 };
205
206                 cpm@919c0 {
207                         #address-cells = <1>;
208                         #size-cells = <1>;
209                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
210                         reg = <0x919c0 0x30>;
211                         ranges;
212
213                         muram@80000 {
214                                 #address-cells = <1>;
215                                 #size-cells = <1>;
216                                 ranges = <0x0 0x80000 0x10000>;
217
218                                 data@0 {
219                                         compatible = "fsl,cpm-muram-data";
220                                         reg = <0x0 0x4000 0x9000 0x2000>;
221                                 };
222                         };
223
224                         brg@919f0 {
225                                 compatible = "fsl,mpc8560-brg",
226                                              "fsl,cpm2-brg",
227                                              "fsl,cpm-brg";
228                                 reg = <0x919f0 0x10 0x915f0 0x10>;
229                                 clock-frequency = <165000000>;
230                         };
231
232                         cpmpic: pic@90c00 {
233                                 interrupt-controller;
234                                 #address-cells = <0>;
235                                 #interrupt-cells = <2>;
236                                 interrupts = <0x2e 0x2>;
237                                 interrupt-parent = <&mpic>;
238                                 reg = <0x90c00 0x80>;
239                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
240                         };
241
242                         enet2: ethernet@91320 {
243                                 device_type = "network";
244                                 compatible = "fsl,mpc8560-fcc-enet",
245                                              "fsl,cpm2-fcc-enet";
246                                 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
247                                 local-mac-address = [ 00 00 00 00 00 00 ];
248                                 fsl,cpm-command = <0x16200300>;
249                                 interrupts = <0x21 0x8>;
250                                 interrupt-parent = <&cpmpic>;
251                                 phy-handle = <&phy2>;
252                         };
253
254                         enet3: ethernet@91340 {
255                                 device_type = "network";
256                                 compatible = "fsl,mpc8560-fcc-enet",
257                                              "fsl,cpm2-fcc-enet";
258                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
259                                 local-mac-address = [ 00 00 00 00 00 00 ];
260                                 fsl,cpm-command = <0x1a400300>;
261                                 interrupts = <0x22 0x8>;
262                                 interrupt-parent = <&cpmpic>;
263                                 phy-handle = <&phy3>;
264                         };
265                 };
266
267                 global-utilities@e0000 {
268                         compatible = "fsl,mpc8560-guts";
269                         reg = <0xe0000 0x1000>;
270                         fsl,has-rstcr;
271                 };
272         };
273
274         pci0: pci@ff708000 {
275                 cell-index = <0>;
276                 #interrupt-cells = <1>;
277                 #size-cells = <2>;
278                 #address-cells = <3>;
279                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
280                 device_type = "pci";
281                 reg = <0xff708000 0x1000>;
282                 clock-frequency = <66666666>;
283                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
284                 interrupt-map = <
285
286                         /* IDSEL 0x02 */
287                         0x1000 0x0 0x0 0x1 &mpic 0x2 0x1
288                         0x1000 0x0 0x0 0x2 &mpic 0x3 0x1
289                         0x1000 0x0 0x0 0x3 &mpic 0x4 0x1
290                         0x1000 0x0 0x0 0x4 &mpic 0x5 0x1>;
291
292                 interrupt-parent = <&mpic>;
293                 interrupts = <0x18 0x2>;
294                 bus-range = <0x0 0x0>;
295                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
296                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
297         };
298
299         localbus@ff705000 {
300                 compatible = "fsl,mpc8560-localbus";
301                 #address-cells = <2>;
302                 #size-cells = <1>;
303                 reg = <0xff705000 0x100>;       // BRx, ORx, etc.
304
305                 ranges = <
306                         0x0 0x0 0xff800000 0x0800000    // 8MB boot flash
307                         0x1 0x0 0xe4000000 0x4000000    // 64MB flash
308                         0x3 0x0 0x20000000 0x4000000    // 64MB SDRAM
309                         0x4 0x0 0x24000000 0x4000000    // 64MB SDRAM
310                         0x5 0x0 0xfc000000 0x0c00000    // EPLD
311                         0x6 0x0 0xe0000000 0x4000000    // 64MB flash
312                         0x7 0x0 0x80000000 0x0200000    // ATM1,2
313                 >;
314
315                 epld@5,0 {
316                         compatible = "wrs,epld-localbus";
317                         #address-cells = <2>;
318                         #size-cells = <1>;
319                         reg = <0x5 0x0 0xc00000>;
320                         ranges = <
321                                 0x0 0x0 0x5 0x000000 0x1fff     // LED disp.
322                                 0x1 0x0 0x5 0x100000 0x1fff     // switches
323                                 0x2 0x0 0x5 0x200000 0x1fff     // ID reg.
324                                 0x3 0x0 0x5 0x300000 0x1fff     // status reg.
325                                 0x4 0x0 0x5 0x400000 0x1fff     // reset reg.
326                                 0x5 0x0 0x5 0x500000 0x1fff     // Wind port
327                                 0x7 0x0 0x5 0x700000 0x1fff     // UART #1
328                                 0x8 0x0 0x5 0x800000 0x1fff     // UART #2
329                                 0x9 0x0 0x5 0x900000 0x1fff     // RTC
330                                 0xb 0x0 0x5 0xb00000 0x1fff     // EEPROM
331                         >;
332
333                         bidr@2,0 {
334                                 compatible = "wrs,sbc8560-bidr";
335                                 reg = <0x2 0x0 0x10>;
336                         };
337
338                         bcsr@3,0 {
339                                 compatible = "wrs,sbc8560-bcsr";
340                                 reg = <0x3 0x0 0x10>;
341                         };
342
343                         brstcr@4,0 {
344                                 compatible = "wrs,sbc8560-brstcr";
345                                 reg = <0x4 0x0 0x10>;
346                         };
347
348                         serial0: serial@7,0 {
349                                 device_type = "serial";
350                                 compatible = "ns16550";
351                                 reg = <0x7 0x0 0x100>;
352                                 clock-frequency = <1843200>;
353                                 interrupts = <0x9 0x2>;
354                                 interrupt-parent = <&mpic>;
355                         };
356
357                         serial1: serial@8,0 {
358                                 device_type = "serial";
359                                 compatible = "ns16550";
360                                 reg = <0x8 0x0 0x100>;
361                                 clock-frequency = <1843200>;
362                                 interrupts = <0xa 0x2>;
363                                 interrupt-parent = <&mpic>;
364                         };
365
366                         rtc@9,0 {
367                                 compatible = "m48t59";
368                                 reg = <0x9 0x0 0x1fff>;
369                         };
370                 };
371         };
372 };