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   1 /*
   2  * drivers/i2c/busses/i2c-s6000.h
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2008 Emlix GmbH <info@emlix.com>
   9  * Author:      Oskar Schirmer <os@emlix.com>
  10  */
  11
  12 #ifndef __DRIVERS_I2C_BUSSES_I2C_S6000_H
  13 #define __DRIVERS_I2C_BUSSES_I2C_S6000_H
  14
  15 #define S6_I2C_CON              0x000
  16 #define S6_I2C_CON_MASTER               0
  17 #define S6_I2C_CON_SPEED                1
  18 #define S6_I2C_CON_SPEED_NORMAL                 1
  19 #define S6_I2C_CON_SPEED_FAST                   2
  20 #define S6_I2C_CON_SPEED_MASK                   3
  21 #define S6_I2C_CON_10BITSLAVE           3
  22 #define S6_I2C_CON_10BITMASTER          4
  23 #define S6_I2C_CON_RESTARTENA           5
  24 #define S6_I2C_CON_SLAVEDISABLE         6
  25 #define S6_I2C_TAR              0x004
  26 #define S6_I2C_TAR_GCORSTART            10
  27 #define S6_I2C_TAR_SPECIAL              11
  28 #define S6_I2C_SAR              0x008
  29 #define S6_I2C_HSMADDR          0x00C
  30 #define S6_I2C_DATACMD          0x010
  31 #define S6_I2C_DATACMD_READ             8
  32 #define S6_I2C_SSHCNT           0x014
  33 #define S6_I2C_SSLCNT           0x018
  34 #define S6_I2C_FSHCNT           0x01C
  35 #define S6_I2C_FSLCNT           0x020
  36 #define S6_I2C_INTRSTAT         0x02C
  37 #define S6_I2C_INTRMASK         0x030
  38 #define S6_I2C_RAWINTR          0x034
  39 #define S6_I2C_INTR_RXUNDER             0
  40 #define S6_I2C_INTR_RXOVER              1
  41 #define S6_I2C_INTR_RXFULL              2
  42 #define S6_I2C_INTR_TXOVER              3
  43 #define S6_I2C_INTR_TXEMPTY             4
  44 #define S6_I2C_INTR_RDREQ               5
  45 #define S6_I2C_INTR_TXABRT              6
  46 #define S6_I2C_INTR_RXDONE              7
  47 #define S6_I2C_INTR_ACTIVITY            8
  48 #define S6_I2C_INTR_STOPDET             9
  49 #define S6_I2C_INTR_STARTDET            10
  50 #define S6_I2C_INTR_GENCALL             11
  51 #define S6_I2C_RXTL             0x038
  52 #define S6_I2C_TXTL             0x03C
  53 #define S6_I2C_CLRINTR          0x040
  54 #define S6_I2C_CLRRXUNDER       0x044
  55 #define S6_I2C_CLRRXOVER        0x048
  56 #define S6_I2C_CLRTXOVER        0x04C
  57 #define S6_I2C_CLRRDREQ         0x050
  58 #define S6_I2C_CLRTXABRT        0x054
  59 #define S6_I2C_CLRRXDONE        0x058
  60 #define S6_I2C_CLRACTIVITY      0x05C
  61 #define S6_I2C_CLRSTOPDET       0x060
  62 #define S6_I2C_CLRSTARTDET      0x064
  63 #define S6_I2C_CLRGENCALL       0x068
  64 #define S6_I2C_ENABLE           0x06C
  65 #define S6_I2C_STATUS           0x070
  66 #define S6_I2C_STATUS_ACTIVITY          0
  67 #define S6_I2C_STATUS_TFNF              1
  68 #define S6_I2C_STATUS_TFE               2
  69 #define S6_I2C_STATUS_RFNE              3
  70 #define S6_I2C_STATUS_RFF               4
  71 #define S6_I2C_TXFLR            0x074
  72 #define S6_I2C_RXFLR            0x078
  73 #define S6_I2C_SRESET           0x07C
  74 #define S6_I2C_SRESET_IC_SRST           0
  75 #define S6_I2C_SRESET_IC_MASTER_SRST    1
  76 #define S6_I2C_SRESET_IC_SLAVE_SRST     2
  77 #define S6_I2C_TXABRTSOURCE     0x080
  78
  79 #endif