Merge branch 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6] / drivers / net / wireless / b43 / wa.c
1 /*
2
3   Broadcom B43 wireless driver
4
5   PHY workarounds.
6
7   Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
8   Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
9
10   This program is free software; you can redistribute it and/or modify
11   it under the terms of the GNU General Public License as published by
12   the Free Software Foundation; either version 2 of the License, or
13   (at your option) any later version.
14
15   This program is distributed in the hope that it will be useful,
16   but WITHOUT ANY WARRANTY; without even the implied warranty of
17   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18   GNU General Public License for more details.
19
20   You should have received a copy of the GNU General Public License
21   along with this program; see the file COPYING.  If not, write to
22   the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
23   Boston, MA 02110-1301, USA.
24
25 */
26
27 #include "b43.h"
28 #include "main.h"
29 #include "tables.h"
30 #include "phy_common.h"
31 #include "wa.h"
32
33 static void b43_wa_papd(struct b43_wldev *dev)
34 {
35         u16 backup;
36
37         backup = b43_ofdmtab_read16(dev, B43_OFDMTAB_PWRDYN2, 0);
38         b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, 7);
39         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 0, 0);
40         b43_dummy_transmission(dev);
41         b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, backup);
42 }
43
44 static void b43_wa_auxclipthr(struct b43_wldev *dev)
45 {
46         b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x3800);
47 }
48
49 static void b43_wa_afcdac(struct b43_wldev *dev)
50 {
51         b43_phy_write(dev, 0x0035, 0x03FF);
52         b43_phy_write(dev, 0x0036, 0x0400);
53 }
54
55 static void b43_wa_txdc_offset(struct b43_wldev *dev)
56 {
57         b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 0, 0x0051);
58 }
59
60 void b43_wa_initgains(struct b43_wldev *dev)
61 {
62         struct b43_phy *phy = &dev->phy;
63
64         b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9);
65         b43_phy_write(dev, B43_PHY_LPFGAINCTL,
66                 b43_phy_read(dev, B43_PHY_LPFGAINCTL) & 0xFF0F);
67         if (phy->rev <= 2)
68                 b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF);
69         b43_radio_write16(dev, 0x0002, 0x1FBF);
70
71         b43_phy_write(dev, 0x0024, 0x4680);
72         b43_phy_write(dev, 0x0020, 0x0003);
73         b43_phy_write(dev, 0x001D, 0x0F40);
74         b43_phy_write(dev, 0x001F, 0x1C00);
75         if (phy->rev <= 3)
76                 b43_phy_write(dev, 0x002A,
77                         (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x0400);
78         else if (phy->rev == 5) {
79                 b43_phy_write(dev, 0x002A,
80                         (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x1A00);
81                 b43_phy_write(dev, 0x00CC, 0x2121);
82         }
83         if (phy->rev >= 3)
84                 b43_phy_write(dev, 0x00BA, 0x3ED5);
85 }
86
87 static void b43_wa_divider(struct b43_wldev *dev)
88 {
89         b43_phy_write(dev, 0x002B, b43_phy_read(dev, 0x002B) & ~0x0100);
90         b43_phy_write(dev, 0x008E, 0x58C1);
91 }
92
93 static void b43_wa_gt(struct b43_wldev *dev) /* Gain table. */
94 {
95         if (dev->phy.rev <= 2) {
96                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 0, 15);
97                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 1, 31);
98                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 2, 42);
99                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 3, 48);
100                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 4, 58);
101                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
102                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
103                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
104                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
105                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
106                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
107                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
108                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 0, 3);
109                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 1, 3);
110                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 2, 7);
111         } else {
112                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
113                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
114                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
115                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
116                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
117                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
118                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
119         }
120 }
121
122 static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
123 {
124         int i;
125
126         if (0 /* FIXME: For APHY.rev=2 this might be needed */) {
127                 for (i = 0; i < 8; i++)
128                         b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
129                 for (i = 8; i < 16; i++)
130                         b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
131         } else {
132                 for (i = 0; i < 64; i++)
133                         b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i);
134         }
135 }
136
137 static void b43_wa_analog(struct b43_wldev *dev)
138 {
139         struct b43_phy *phy = &dev->phy;
140         u16 ofdmrev;
141
142         ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION;
143         if (ofdmrev > 2) {
144                 if (phy->type == B43_PHYTYPE_A)
145                         b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1808);
146                 else
147                         b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1000);
148         } else {
149                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 3, 0x1044);
150                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 4, 0x7201);
151                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 6, 0x0040);
152         }
153 }
154
155 static void b43_wa_dac(struct b43_wldev *dev)
156 {
157         if (dev->phy.analog == 1)
158                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
159                         (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0034) | 0x0008);
160         else
161                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
162                         (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0078) | 0x0010);
163 }
164
165 static void b43_wa_fft(struct b43_wldev *dev) /* Fine frequency table */
166 {
167         int i;
168
169         if (dev->phy.type == B43_PHYTYPE_A)
170                 for (i = 0; i < B43_TAB_FINEFREQA_SIZE; i++)
171                         b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqa[i]);
172         else
173                 for (i = 0; i < B43_TAB_FINEFREQG_SIZE; i++)
174                         b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqg[i]);
175 }
176
177 static void b43_wa_nft(struct b43_wldev *dev) /* Noise figure table */
178 {
179         struct b43_phy *phy = &dev->phy;
180         int i;
181
182         if (phy->type == B43_PHYTYPE_A) {
183                 if (phy->rev == 2)
184                         for (i = 0; i < B43_TAB_NOISEA2_SIZE; i++)
185                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea2[i]);
186                 else
187                         for (i = 0; i < B43_TAB_NOISEA3_SIZE; i++)
188                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea3[i]);
189         } else {
190                 if (phy->rev == 1)
191                         for (i = 0; i < B43_TAB_NOISEG1_SIZE; i++)
192                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg1[i]);
193                 else
194                         for (i = 0; i < B43_TAB_NOISEG2_SIZE; i++)
195                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg2[i]);
196         }
197 }
198
199 static void b43_wa_rt(struct b43_wldev *dev) /* Rotor table */
200 {
201         int i;
202
203         for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
204                 b43_ofdmtab_write32(dev, B43_OFDMTAB_ROTOR, i, b43_tab_rotor[i]);
205 }
206
207 static void b43_write_null_nst(struct b43_wldev *dev)
208 {
209         int i;
210
211         for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
212                 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, 0);
213 }
214
215 static void b43_write_nst(struct b43_wldev *dev, const u16 *nst)
216 {
217         int i;
218
219         for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
220                 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, nst[i]);
221 }
222
223 static void b43_wa_nst(struct b43_wldev *dev) /* Noise scale table */
224 {
225         struct b43_phy *phy = &dev->phy;
226
227         if (phy->type == B43_PHYTYPE_A) {
228                 if (phy->rev <= 1)
229                         b43_write_null_nst(dev);
230                 else if (phy->rev == 2)
231                         b43_write_nst(dev, b43_tab_noisescalea2);
232                 else if (phy->rev == 3)
233                         b43_write_nst(dev, b43_tab_noisescalea3);
234                 else
235                         b43_write_nst(dev, b43_tab_noisescaleg3);
236         } else {
237                 if (phy->rev >= 6) {
238                         if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
239                                 b43_write_nst(dev, b43_tab_noisescaleg3);
240                         else
241                                 b43_write_nst(dev, b43_tab_noisescaleg2);
242                 } else {
243                         b43_write_nst(dev, b43_tab_noisescaleg1);
244                 }
245         }
246 }
247
248 static void b43_wa_art(struct b43_wldev *dev) /* ADV retard table */
249 {
250         int i;
251
252         for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
253                         b43_ofdmtab_write32(dev, B43_OFDMTAB_ADVRETARD,
254                                 i, b43_tab_retard[i]);
255 }
256
257 static void b43_wa_txlna_gain(struct b43_wldev *dev)
258 {
259         b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 13, 0x0000);
260 }
261
262 static void b43_wa_crs_reset(struct b43_wldev *dev)
263 {
264         b43_phy_write(dev, 0x002C, 0x0064);
265 }
266
267 static void b43_wa_2060txlna_gain(struct b43_wldev *dev)
268 {
269         b43_hf_write(dev, b43_hf_read(dev) |
270                          B43_HF_2060W);
271 }
272
273 static void b43_wa_lms(struct b43_wldev *dev)
274 {
275         b43_phy_write(dev, 0x0055,
276                 (b43_phy_read(dev, 0x0055) & 0xFFC0) | 0x0004);
277 }
278
279 static void b43_wa_mixedsignal(struct b43_wldev *dev)
280 {
281         b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1, 3);
282 }
283
284 static void b43_wa_msst(struct b43_wldev *dev) /* Min sigma square table */
285 {
286         struct b43_phy *phy = &dev->phy;
287         int i;
288         const u16 *tab;
289
290         if (phy->type == B43_PHYTYPE_A) {
291                 tab = b43_tab_sigmasqr1;
292         } else if (phy->type == B43_PHYTYPE_G) {
293                 tab = b43_tab_sigmasqr2;
294         } else {
295                 B43_WARN_ON(1);
296                 return;
297         }
298
299         for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
300                 b43_ofdmtab_write16(dev, B43_OFDMTAB_MINSIGSQ,
301                                         i, tab[i]);
302         }
303 }
304
305 static void b43_wa_iqadc(struct b43_wldev *dev)
306 {
307         if (dev->phy.analog == 4)
308                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 0,
309                         b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 0) & ~0xF000);
310 }
311
312 static void b43_wa_crs_ed(struct b43_wldev *dev)
313 {
314         struct b43_phy *phy = &dev->phy;
315
316         if (phy->rev == 1) {
317                 b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19);
318         } else if (phy->rev == 2) {
319                 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861);
320                 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271);
321                 b43_phy_write(dev, B43_PHY_ANTDWELL,
322                                   b43_phy_read(dev, B43_PHY_ANTDWELL)
323                                   | 0x0800);
324         } else {
325                 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098);
326                 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070);
327                 b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
328                 b43_phy_write(dev, B43_PHY_ANTDWELL,
329                                   b43_phy_read(dev, B43_PHY_ANTDWELL)
330                                   | 0x0800);
331         }
332 }
333
334 static void b43_wa_crs_thr(struct b43_wldev *dev)
335 {
336         b43_phy_write(dev, B43_PHY_CRS0,
337                         (b43_phy_read(dev, B43_PHY_CRS0) & ~0x03C0) | 0xD000);
338 }
339
340 static void b43_wa_crs_blank(struct b43_wldev *dev)
341 {
342         b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A);
343 }
344
345 static void b43_wa_cck_shiftbits(struct b43_wldev *dev)
346 {
347         b43_phy_write(dev, B43_PHY_CCKSHIFTBITS, 0x0026);
348 }
349
350 static void b43_wa_wrssi_offset(struct b43_wldev *dev)
351 {
352         int i;
353
354         if (dev->phy.rev == 1) {
355                 for (i = 0; i < 16; i++) {
356                         b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI_R1,
357                                                 i, 0x0020);
358                 }
359         } else {
360                 for (i = 0; i < 32; i++) {
361                         b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI,
362                                                 i, 0x0820);
363                 }
364         }
365 }
366
367 static void b43_wa_txpuoff_rxpuon(struct b43_wldev *dev)
368 {
369         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 2, 15);
370         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 3, 20);
371 }
372
373 static void b43_wa_altagc(struct b43_wldev *dev)
374 {
375         struct b43_phy *phy = &dev->phy;
376
377         if (phy->rev == 1) {
378                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 254);
379                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 1, 13);
380                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 2, 19);
381                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 3, 25);
382                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 0, 0x2710);
383                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 1, 0x9B83);
384                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 2, 0x9B83);
385                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 3, 0x0F8D);
386                 b43_phy_write(dev, B43_PHY_LMS, 4);
387         } else {
388                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0, 254);
389                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 1, 13);
390                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 2, 19);
391                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25);
392         }
393
394         b43_phy_write(dev, B43_PHY_CCKSHIFTBITS_WA,
395                 (b43_phy_read(dev, B43_PHY_CCKSHIFTBITS_WA) & ~0xFF00) | 0x5700);
396         b43_phy_write(dev, B43_PHY_OFDM(0x1A),
397                 (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x007F) | 0x000F);
398         b43_phy_write(dev, B43_PHY_OFDM(0x1A),
399                 (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x3F80) | 0x2B80);
400         b43_phy_write(dev, B43_PHY_ANTWRSETT,
401                 (b43_phy_read(dev, B43_PHY_ANTWRSETT) & 0xF0FF) | 0x0300);
402         b43_radio_write16(dev, 0x7A,
403                 b43_radio_read16(dev, 0x7A) | 0x0008);
404         b43_phy_write(dev, B43_PHY_N1P1GAIN,
405                 (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x000F) | 0x0008);
406         b43_phy_write(dev, B43_PHY_P1P2GAIN,
407                 (b43_phy_read(dev, B43_PHY_P1P2GAIN) & ~0x0F00) | 0x0600);
408         b43_phy_write(dev, B43_PHY_N1N2GAIN,
409                 (b43_phy_read(dev, B43_PHY_N1N2GAIN) & ~0x0F00) | 0x0700);
410         b43_phy_write(dev, B43_PHY_N1P1GAIN,
411                 (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x0F00) | 0x0100);
412         if (phy->rev == 1) {
413                 b43_phy_write(dev, B43_PHY_N1N2GAIN,
414                                   (b43_phy_read(dev, B43_PHY_N1N2GAIN)
415                                    & ~0x000F) | 0x0007);
416         }
417         b43_phy_write(dev, B43_PHY_OFDM(0x88),
418                 (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x00FF) | 0x001C);
419         b43_phy_write(dev, B43_PHY_OFDM(0x88),
420                 (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x3F00) | 0x0200);
421         b43_phy_write(dev, B43_PHY_OFDM(0x96),
422                 (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0x00FF) | 0x001C);
423         b43_phy_write(dev, B43_PHY_OFDM(0x89),
424                 (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x00FF) | 0x0020);
425         b43_phy_write(dev, B43_PHY_OFDM(0x89),
426                 (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x3F00) | 0x0200);
427         b43_phy_write(dev, B43_PHY_OFDM(0x82),
428                 (b43_phy_read(dev, B43_PHY_OFDM(0x82)) & ~0x00FF) | 0x002E);
429         b43_phy_write(dev, B43_PHY_OFDM(0x96),
430                 (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0xFF00) | 0x1A00);
431         b43_phy_write(dev, B43_PHY_OFDM(0x81),
432                 (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0x00FF) | 0x0028);
433         b43_phy_write(dev, B43_PHY_OFDM(0x81),
434                 (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0xFF00) | 0x2C00);
435         if (phy->rev == 1) {
436                 b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B);
437                 b43_phy_write(dev, B43_PHY_OFDM(0x1B),
438                         (b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E) | 0x0002);
439         } else {
440                 b43_phy_write(dev, B43_PHY_OFDM(0x1B),
441                         b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E);
442                 b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A);
443                 b43_phy_write(dev, B43_PHY_LPFGAINCTL,
444                         (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0x000F) | 0x0004);
445                 if (phy->rev >= 6) {
446                         b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A);
447                         b43_phy_write(dev, B43_PHY_LPFGAINCTL,
448                                 (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0xF000) | 0x3000);
449                 }
450         }
451         b43_phy_write(dev, B43_PHY_DIVSRCHIDX,
452                 (b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x8080) | 0x7874);
453         b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
454         if (phy->rev == 1) {
455                 b43_phy_write(dev, B43_PHY_DIVP1P2GAIN,
456                         (b43_phy_read(dev, B43_PHY_DIVP1P2GAIN) & ~0x0F00) | 0x0600);
457                 b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E);
458                 b43_phy_write(dev, B43_PHY_ANTWRSETT,
459                         (b43_phy_read(dev, B43_PHY_ANTWRSETT) & ~0x00FF) | 0x001E);
460                 b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002);
461                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0);
462                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7);
463                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 2, 16);
464                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 3, 28);
465         } else {
466                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 0, 0);
467                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 1, 7);
468                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 2, 16);
469                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28);
470         }
471         if (phy->rev >= 6) {
472                 b43_phy_write(dev, B43_PHY_OFDM(0x26),
473                         b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x0003);
474                 b43_phy_write(dev, B43_PHY_OFDM(0x26),
475                         b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x1000);
476         }
477         b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
478 }
479
480 static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */
481 {
482         b43_gtab_write(dev, B43_GTAB_ORIGTR, 0, 0xC480);
483 }
484
485 static void b43_wa_cpll_nonpilot(struct b43_wldev *dev)
486 {
487         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 0, 0);
488         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 1, 0);
489 }
490
491 static void b43_wa_rssi_adc(struct b43_wldev *dev)
492 {
493         if (dev->phy.analog == 4)
494                 b43_phy_write(dev, 0x00DC, 0x7454);
495 }
496
497 static void b43_wa_boards_a(struct b43_wldev *dev)
498 {
499         struct ssb_bus *bus = dev->dev->bus;
500
501         if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM &&
502             bus->boardinfo.type == SSB_BOARD_BU4306 &&
503             bus->boardinfo.rev < 0x30) {
504                 b43_phy_write(dev, 0x0010, 0xE000);
505                 b43_phy_write(dev, 0x0013, 0x0140);
506                 b43_phy_write(dev, 0x0014, 0x0280);
507         } else {
508                 if (bus->boardinfo.type == SSB_BOARD_MP4318 &&
509                     bus->boardinfo.rev < 0x20) {
510                         b43_phy_write(dev, 0x0013, 0x0210);
511                         b43_phy_write(dev, 0x0014, 0x0840);
512                 } else {
513                         b43_phy_write(dev, 0x0013, 0x0140);
514                         b43_phy_write(dev, 0x0014, 0x0280);
515                 }
516                 if (dev->phy.rev <= 4)
517                         b43_phy_write(dev, 0x0010, 0xE000);
518                 else
519                         b43_phy_write(dev, 0x0010, 0x2000);
520                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 1, 0x0039);
521                 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 7, 0x0040);
522         }
523 }
524
525 static void b43_wa_boards_g(struct b43_wldev *dev)
526 {
527         struct ssb_bus *bus = dev->dev->bus;
528         struct b43_phy *phy = &dev->phy;
529
530         if (bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM ||
531             bus->boardinfo.type != SSB_BOARD_BU4306 ||
532             bus->boardinfo.rev != 0x17) {
533                 if (phy->rev < 2) {
534                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002);
535                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001);
536                 } else {
537                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002);
538                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
539                         if ((bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
540                             (phy->rev >= 7)) {
541                                 b43_phy_write(dev, B43_PHY_EXTG(0x11),
542                                         b43_phy_read(dev, B43_PHY_EXTG(0x11)) & 0xF7FF);
543                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
544                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001);
545                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001);
546                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0023, 0x0000);
547                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0000, 0x0000);
548                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0003, 0x0002);
549                         }
550                 }
551         }
552         if (bus->sprom.boardflags_lo & B43_BFL_FEM) {
553                 b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120);
554                 b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480);
555         }
556 }
557
558 void b43_wa_all(struct b43_wldev *dev)
559 {
560         struct b43_phy *phy = &dev->phy;
561
562         if (phy->type == B43_PHYTYPE_A) {
563                 switch (phy->rev) {
564                 case 2:
565                         b43_wa_papd(dev);
566                         b43_wa_auxclipthr(dev);
567                         b43_wa_afcdac(dev);
568                         b43_wa_txdc_offset(dev);
569                         b43_wa_initgains(dev);
570                         b43_wa_divider(dev);
571                         b43_wa_gt(dev);
572                         b43_wa_rssi_lt(dev);
573                         b43_wa_analog(dev);
574                         b43_wa_dac(dev);
575                         b43_wa_fft(dev);
576                         b43_wa_nft(dev);
577                         b43_wa_rt(dev);
578                         b43_wa_nst(dev);
579                         b43_wa_art(dev);
580                         b43_wa_txlna_gain(dev);
581                         b43_wa_crs_reset(dev);
582                         b43_wa_2060txlna_gain(dev);
583                         b43_wa_lms(dev);
584                         break;
585                 case 3:
586                         b43_wa_papd(dev);
587                         b43_wa_mixedsignal(dev);
588                         b43_wa_rssi_lt(dev);
589                         b43_wa_txdc_offset(dev);
590                         b43_wa_initgains(dev);
591                         b43_wa_dac(dev);
592                         b43_wa_nft(dev);
593                         b43_wa_nst(dev);
594                         b43_wa_msst(dev);
595                         b43_wa_analog(dev);
596                         b43_wa_gt(dev);
597                         b43_wa_txpuoff_rxpuon(dev);
598                         b43_wa_txlna_gain(dev);
599                         break;
600                 case 5:
601                         b43_wa_iqadc(dev);
602                 case 6:
603                         b43_wa_papd(dev);
604                         b43_wa_rssi_lt(dev);
605                         b43_wa_txdc_offset(dev);
606                         b43_wa_initgains(dev);
607                         b43_wa_dac(dev);
608                         b43_wa_nft(dev);
609                         b43_wa_nst(dev);
610                         b43_wa_msst(dev);
611                         b43_wa_analog(dev);
612                         b43_wa_gt(dev);
613                         b43_wa_txpuoff_rxpuon(dev);
614                         b43_wa_txlna_gain(dev);
615                         break;
616                 case 7:
617                         b43_wa_iqadc(dev);
618                         b43_wa_papd(dev);
619                         b43_wa_rssi_lt(dev);
620                         b43_wa_txdc_offset(dev);
621                         b43_wa_initgains(dev);
622                         b43_wa_dac(dev);
623                         b43_wa_nft(dev);
624                         b43_wa_nst(dev);
625                         b43_wa_msst(dev);
626                         b43_wa_analog(dev);
627                         b43_wa_gt(dev);
628                         b43_wa_txpuoff_rxpuon(dev);
629                         b43_wa_txlna_gain(dev);
630                         b43_wa_rssi_adc(dev);
631                 default:
632                         B43_WARN_ON(1);
633                 }
634                 b43_wa_boards_a(dev);
635         } else if (phy->type == B43_PHYTYPE_G) {
636                 switch (phy->rev) {
637                 case 1://XXX review rev1
638                         b43_wa_crs_ed(dev);
639                         b43_wa_crs_thr(dev);
640                         b43_wa_crs_blank(dev);
641                         b43_wa_cck_shiftbits(dev);
642                         b43_wa_fft(dev);
643                         b43_wa_nft(dev);
644                         b43_wa_rt(dev);
645                         b43_wa_nst(dev);
646                         b43_wa_art(dev);
647                         b43_wa_wrssi_offset(dev);
648                         b43_wa_altagc(dev);
649                         break;
650                 case 2:
651                 case 6:
652                 case 7:
653                 case 8:
654                 case 9:
655                         b43_wa_tr_ltov(dev);
656                         b43_wa_crs_ed(dev);
657                         b43_wa_rssi_lt(dev);
658                         b43_wa_nft(dev);
659                         b43_wa_nst(dev);
660                         b43_wa_msst(dev);
661                         b43_wa_wrssi_offset(dev);
662                         b43_wa_altagc(dev);
663                         b43_wa_analog(dev);
664                         b43_wa_txpuoff_rxpuon(dev);
665                         break;
666                 default:
667                         B43_WARN_ON(1);
668                 }
669                 b43_wa_boards_g(dev);
670         } else { /* No N PHY support so far */
671                 B43_WARN_ON(1);
672         }
673
674         b43_wa_cpll_nonpilot(dev);
675 }