2 * Copyright (c) 2001-2004 by David Brownell
3 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 /* this file is part of ehci-hcd.c */
22 /*-------------------------------------------------------------------------*/
25 * EHCI scheduled transaction support: interrupt, iso, split iso
26 * These are called "periodic" transactions in the EHCI spec.
28 * Note that for interrupt transfers, the QH/QTD manipulation is shared
29 * with the "asynchronous" transaction support (control/bulk transfers).
30 * The only real difference is in how interrupt transfers are scheduled.
32 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33 * It keeps track of every ITD (or SITD) that's linked, and holds enough
34 * pre-calculated schedule data to make appending to the queue be quick.
37 static int ehci_get_frame (struct usb_hcd *hcd);
39 /*-------------------------------------------------------------------------*/
42 * periodic_next_shadow - return "next" pointer on shadow list
43 * @periodic: host pointer to qh/itd/sitd
44 * @tag: hardware tag for type of this record
46 static union ehci_shadow *
47 periodic_next_shadow (union ehci_shadow *periodic, __le32 tag)
51 return &periodic->qh->qh_next;
53 return &periodic->fstn->fstn_next;
55 return &periodic->itd->itd_next;
58 return &periodic->sitd->sitd_next;
62 /* caller must hold ehci->lock */
63 static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
65 union ehci_shadow *prev_p = &ehci->pshadow [frame];
66 __le32 *hw_p = &ehci->periodic [frame];
67 union ehci_shadow here = *prev_p;
69 /* find predecessor of "ptr"; hw and shadow lists are in sync */
70 while (here.ptr && here.ptr != ptr) {
71 prev_p = periodic_next_shadow (prev_p, Q_NEXT_TYPE (*hw_p));
75 /* an interrupt entry (at list end) could have been shared */
79 /* update shadow and hardware lists ... the old "next" pointers
80 * from ptr may still be in use, the caller updates them.
82 *prev_p = *periodic_next_shadow (&here, Q_NEXT_TYPE (*hw_p));
83 *hw_p = *here.hw_next;
86 /* how many of the uframe's 125 usecs are allocated? */
88 periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
90 __le32 *hw_p = &ehci->periodic [frame];
91 union ehci_shadow *q = &ehci->pshadow [frame];
95 switch (Q_NEXT_TYPE (*hw_p)) {
97 /* is it in the S-mask? */
98 if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe))
99 usecs += q->qh->usecs;
101 if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe)))
102 usecs += q->qh->c_usecs;
103 hw_p = &q->qh->hw_next;
108 /* for "save place" FSTNs, count the relevant INTR
109 * bandwidth from the previous frame
111 if (q->fstn->hw_prev != EHCI_LIST_END) {
112 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
114 hw_p = &q->fstn->hw_next;
115 q = &q->fstn->fstn_next;
118 usecs += q->itd->usecs [uframe];
119 hw_p = &q->itd->hw_next;
120 q = &q->itd->itd_next;
123 /* is it in the S-mask? (count SPLIT, DATA) */
124 if (q->sitd->hw_uframe & cpu_to_le32 (1 << uframe)) {
125 if (q->sitd->hw_fullspeed_ep &
126 __constant_cpu_to_le32 (1<<31))
127 usecs += q->sitd->stream->usecs;
128 else /* worst case for OUT start-split */
129 usecs += HS_USECS_ISO (188);
132 /* ... C-mask? (count CSPLIT, DATA) */
133 if (q->sitd->hw_uframe &
134 cpu_to_le32 (1 << (8 + uframe))) {
135 /* worst case for IN complete-split */
136 usecs += q->sitd->stream->c_usecs;
139 hw_p = &q->sitd->hw_next;
140 q = &q->sitd->sitd_next;
146 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
147 frame * 8 + uframe, usecs);
152 /*-------------------------------------------------------------------------*/
154 static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
156 if (!dev1->tt || !dev2->tt)
158 if (dev1->tt != dev2->tt)
161 return dev1->ttport == dev2->ttport;
166 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
168 /* Which uframe does the low/fullspeed transfer start in?
170 * The parameter is the mask of ssplits in "H-frame" terms
171 * and this returns the transfer start uframe in "B-frame" terms,
172 * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
173 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
174 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
176 static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __le32 mask)
178 unsigned char smask = QH_SMASK & le32_to_cpu(mask);
180 ehci_err(ehci, "invalid empty smask!\n");
181 /* uframe 7 can't have bw so this will indicate failure */
184 return ffs(smask) - 1;
187 static const unsigned char
188 max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
190 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
191 static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
194 for (i=0; i<7; i++) {
195 if (max_tt_usecs[i] < tt_usecs[i]) {
196 tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
197 tt_usecs[i] = max_tt_usecs[i];
202 /* How many of the tt's periodic downstream 1000 usecs are allocated?
204 * While this measures the bandwidth in terms of usecs/uframe,
205 * the low/fullspeed bus has no notion of uframes, so any particular
206 * low/fullspeed transfer can "carry over" from one uframe to the next,
207 * since the TT just performs downstream transfers in sequence.
209 * For example two seperate 100 usec transfers can start in the same uframe,
210 * and the second one would "carry over" 75 usecs into the next uframe.
214 struct ehci_hcd *ehci,
215 struct usb_device *dev,
217 unsigned short tt_usecs[8]
220 __le32 *hw_p = &ehci->periodic [frame];
221 union ehci_shadow *q = &ehci->pshadow [frame];
224 memset(tt_usecs, 0, 16);
227 switch (Q_NEXT_TYPE(*hw_p)) {
229 hw_p = &q->itd->hw_next;
230 q = &q->itd->itd_next;
233 if (same_tt(dev, q->qh->dev)) {
234 uf = tt_start_uframe(ehci, q->qh->hw_info2);
235 tt_usecs[uf] += q->qh->tt_usecs;
237 hw_p = &q->qh->hw_next;
241 if (same_tt(dev, q->sitd->urb->dev)) {
242 uf = tt_start_uframe(ehci, q->sitd->hw_uframe);
243 tt_usecs[uf] += q->sitd->stream->tt_usecs;
245 hw_p = &q->sitd->hw_next;
246 q = &q->sitd->sitd_next;
251 "ignoring periodic frame %d FSTN\n", frame);
252 hw_p = &q->fstn->hw_next;
253 q = &q->fstn->fstn_next;
257 carryover_tt_bandwidth(tt_usecs);
259 if (max_tt_usecs[7] < tt_usecs[7])
260 ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n",
261 frame, tt_usecs[7] - max_tt_usecs[7]);
265 * Return true if the device's tt's downstream bus is available for a
266 * periodic transfer of the specified length (usecs), starting at the
267 * specified frame/uframe. Note that (as summarized in section 11.19
268 * of the usb 2.0 spec) TTs can buffer multiple transactions for each
271 * The uframe parameter is when the fullspeed/lowspeed transfer
272 * should be executed in "B-frame" terms, which is the same as the
273 * highspeed ssplit's uframe (which is in "H-frame" terms). For example
274 * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
275 * See the EHCI spec sec 4.5 and fig 4.7.
277 * This checks if the full/lowspeed bus, at the specified starting uframe,
278 * has the specified bandwidth available, according to rules listed
279 * in USB 2.0 spec section 11.18.1 fig 11-60.
281 * This does not check if the transfer would exceed the max ssplit
282 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
283 * since proper scheduling limits ssplits to less than 16 per uframe.
285 static int tt_available (
286 struct ehci_hcd *ehci,
288 struct usb_device *dev,
294 if ((period == 0) || (uframe >= 7)) /* error */
297 for (; frame < ehci->periodic_size; frame += period) {
298 unsigned short tt_usecs[8];
300 periodic_tt_usecs (ehci, dev, frame, tt_usecs);
302 ehci_vdbg(ehci, "tt frame %d check %d usecs start uframe %d in"
303 " schedule %d/%d/%d/%d/%d/%d/%d/%d\n",
304 frame, usecs, uframe,
305 tt_usecs[0], tt_usecs[1], tt_usecs[2], tt_usecs[3],
306 tt_usecs[4], tt_usecs[5], tt_usecs[6], tt_usecs[7]);
308 if (max_tt_usecs[uframe] <= tt_usecs[uframe]) {
309 ehci_vdbg(ehci, "frame %d uframe %d fully scheduled\n",
314 /* special case for isoc transfers larger than 125us:
315 * the first and each subsequent fully used uframe
316 * must be empty, so as to not illegally delay
317 * already scheduled transactions
320 int ufs = (usecs / 125) - 1;
322 for (i = uframe; i < (uframe + ufs) && i < 8; i++)
323 if (0 < tt_usecs[i]) {
325 "multi-uframe xfer can't fit "
326 "in frame %d uframe %d\n",
332 tt_usecs[uframe] += usecs;
334 carryover_tt_bandwidth(tt_usecs);
336 /* fail if the carryover pushed bw past the last uframe's limit */
337 if (max_tt_usecs[7] < tt_usecs[7]) {
339 "tt unavailable usecs %d frame %d uframe %d\n",
340 usecs, frame, uframe);
350 /* return true iff the device's transaction translator is available
351 * for a periodic transfer starting at the specified frame, using
352 * all the uframes in the mask.
354 static int tt_no_collision (
355 struct ehci_hcd *ehci,
357 struct usb_device *dev,
362 if (period == 0) /* error */
365 /* note bandwidth wastage: split never follows csplit
366 * (different dev or endpoint) until the next uframe.
367 * calling convention doesn't make that distinction.
369 for (; frame < ehci->periodic_size; frame += period) {
370 union ehci_shadow here;
373 here = ehci->pshadow [frame];
374 type = Q_NEXT_TYPE (ehci->periodic [frame]);
378 type = Q_NEXT_TYPE (here.itd->hw_next);
379 here = here.itd->itd_next;
382 if (same_tt (dev, here.qh->dev)) {
385 mask = le32_to_cpu (here.qh->hw_info2);
386 /* "knows" no gap is needed */
391 type = Q_NEXT_TYPE (here.qh->hw_next);
392 here = here.qh->qh_next;
395 if (same_tt (dev, here.sitd->urb->dev)) {
398 mask = le32_to_cpu (here.sitd
400 /* FIXME assumes no gap for IN! */
405 type = Q_NEXT_TYPE (here.sitd->hw_next);
406 here = here.sitd->sitd_next;
411 "periodic frame %d bogus type %d\n",
415 /* collision or error */
424 #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
426 /*-------------------------------------------------------------------------*/
428 static int enable_periodic (struct ehci_hcd *ehci)
433 /* did clearing PSE did take effect yet?
434 * takes effect only at frame boundaries...
436 status = handshake (&ehci->regs->status, STS_PSS, 0, 9 * 125);
438 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
442 cmd = readl (&ehci->regs->command) | CMD_PSE;
443 writel (cmd, &ehci->regs->command);
444 /* posted write ... PSS happens later */
445 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
447 /* make sure ehci_work scans these */
448 ehci->next_uframe = readl (&ehci->regs->frame_index)
449 % (ehci->periodic_size << 3);
453 static int disable_periodic (struct ehci_hcd *ehci)
458 /* did setting PSE not take effect yet?
459 * takes effect only at frame boundaries...
461 status = handshake (&ehci->regs->status, STS_PSS, STS_PSS, 9 * 125);
463 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
467 cmd = readl (&ehci->regs->command) & ~CMD_PSE;
468 writel (cmd, &ehci->regs->command);
469 /* posted write ... */
471 ehci->next_uframe = -1;
475 /*-------------------------------------------------------------------------*/
477 /* periodic schedule slots have iso tds (normal or split) first, then a
478 * sparse tree for active interrupt transfers.
480 * this just links in a qh; caller guarantees uframe masks are set right.
481 * no FSTN support (yet; ehci 0.96+)
483 static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
486 unsigned period = qh->period;
488 dev_dbg (&qh->dev->dev,
489 "link qh%d-%04x/%p start %d [%d/%d us]\n",
490 period, le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK),
491 qh, qh->start, qh->usecs, qh->c_usecs);
493 /* high bandwidth, or otherwise every microframe */
497 for (i = qh->start; i < ehci->periodic_size; i += period) {
498 union ehci_shadow *prev = &ehci->pshadow [i];
499 __le32 *hw_p = &ehci->periodic [i];
500 union ehci_shadow here = *prev;
503 /* skip the iso nodes at list head */
505 type = Q_NEXT_TYPE (*hw_p);
506 if (type == Q_TYPE_QH)
508 prev = periodic_next_shadow (prev, type);
509 hw_p = &here.qh->hw_next;
513 /* sorting each branch by period (slow-->fast)
514 * enables sharing interior tree nodes
516 while (here.ptr && qh != here.qh) {
517 if (qh->period > here.qh->period)
519 prev = &here.qh->qh_next;
520 hw_p = &here.qh->hw_next;
523 /* link in this qh, unless some earlier pass did that */
530 *hw_p = QH_NEXT (qh->qh_dma);
533 qh->qh_state = QH_STATE_LINKED;
536 /* update per-qh bandwidth for usbfs */
537 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
538 ? ((qh->usecs + qh->c_usecs) / qh->period)
541 /* maybe enable periodic schedule processing */
542 if (!ehci->periodic_sched++)
543 return enable_periodic (ehci);
548 static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
554 // IF this isn't high speed
555 // and this qh is active in the current uframe
556 // (and overlay token SplitXstate is false?)
558 // qh->hw_info1 |= __constant_cpu_to_le32 (1 << 7 /* "ignore" */);
560 /* high bandwidth, or otherwise part of every microframe */
561 if ((period = qh->period) == 0)
564 for (i = qh->start; i < ehci->periodic_size; i += period)
565 periodic_unlink (ehci, i, qh);
567 /* update per-qh bandwidth for usbfs */
568 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
569 ? ((qh->usecs + qh->c_usecs) / qh->period)
572 dev_dbg (&qh->dev->dev,
573 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
575 le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK),
576 qh, qh->start, qh->usecs, qh->c_usecs);
578 /* qh->qh_next still "live" to HC */
579 qh->qh_state = QH_STATE_UNLINK;
580 qh->qh_next.ptr = NULL;
583 /* maybe turn off periodic schedule */
584 ehci->periodic_sched--;
585 if (!ehci->periodic_sched)
586 (void) disable_periodic (ehci);
589 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
593 qh_unlink_periodic (ehci, qh);
595 /* simple/paranoid: always delay, expecting the HC needs to read
596 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
597 * expect khubd to clean up after any CSPLITs we won't issue.
598 * active high speed queues may need bigger delays...
600 if (list_empty (&qh->qtd_list)
601 || (__constant_cpu_to_le32 (QH_CMASK)
602 & qh->hw_info2) != 0)
605 wait = 55; /* worst case: 3 * 1024 */
608 qh->qh_state = QH_STATE_IDLE;
609 qh->hw_next = EHCI_LIST_END;
613 /*-------------------------------------------------------------------------*/
615 static int check_period (
616 struct ehci_hcd *ehci,
624 /* complete split running into next frame?
625 * given FSTN support, we could sometimes check...
631 * 80% periodic == 100 usec/uframe available
632 * convert "usecs we need" to "max already claimed"
636 /* we "know" 2 and 4 uframe intervals were rejected; so
637 * for period 0, check _every_ microframe in the schedule.
639 if (unlikely (period == 0)) {
641 for (uframe = 0; uframe < 7; uframe++) {
642 claimed = periodic_usecs (ehci, frame, uframe);
646 } while ((frame += 1) < ehci->periodic_size);
648 /* just check the specified uframe, at that period */
651 claimed = periodic_usecs (ehci, frame, uframe);
654 } while ((frame += period) < ehci->periodic_size);
661 static int check_intr_schedule (
662 struct ehci_hcd *ehci,
665 const struct ehci_qh *qh,
669 int retval = -ENOSPC;
672 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
675 if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
683 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
684 if (tt_available (ehci, qh->period, qh->dev, frame, uframe,
688 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
689 for (i=uframe+1; i<8 && i<uframe+4; i++)
690 if (!check_period (ehci, frame, i,
691 qh->period, qh->c_usecs))
698 *c_maskp = cpu_to_le32 (mask << 8);
701 /* Make sure this tt's buffer is also available for CSPLITs.
702 * We pessimize a bit; probably the typical full speed case
703 * doesn't need the second CSPLIT.
705 * NOTE: both SPLIT and CSPLIT could be checked in just
708 mask = 0x03 << (uframe + qh->gap_uf);
709 *c_maskp = cpu_to_le32 (mask << 8);
712 if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
713 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
714 qh->period, qh->c_usecs))
716 if (!check_period (ehci, frame, uframe + qh->gap_uf,
717 qh->period, qh->c_usecs))
726 /* "first fit" scheduling policy used the first time through,
727 * or when the previous schedule slot can't be re-used.
729 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
734 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
736 qh_refresh(ehci, qh);
737 qh->hw_next = EHCI_LIST_END;
740 /* reuse the previous schedule slots, if we can */
741 if (frame < qh->period) {
742 uframe = ffs (le32_to_cpup (&qh->hw_info2) & QH_SMASK);
743 status = check_intr_schedule (ehci, frame, --uframe,
751 /* else scan the schedule to find a group of slots such that all
752 * uframes have enough periodic bandwidth available.
755 /* "normal" case, uframing flexible except with splits */
757 frame = qh->period - 1;
759 for (uframe = 0; uframe < 8; uframe++) {
760 status = check_intr_schedule (ehci,
766 } while (status && frame--);
768 /* qh->period == 0 means every uframe */
771 status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
777 /* reset S-frame and (maybe) C-frame masks */
778 qh->hw_info2 &= __constant_cpu_to_le32(~(QH_CMASK | QH_SMASK));
779 qh->hw_info2 |= qh->period
780 ? cpu_to_le32 (1 << uframe)
781 : __constant_cpu_to_le32 (QH_SMASK);
782 qh->hw_info2 |= c_mask;
784 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
786 /* stuff into the periodic schedule */
787 status = qh_link_periodic (ehci, qh);
792 static int intr_submit (
793 struct ehci_hcd *ehci,
794 struct usb_host_endpoint *ep,
796 struct list_head *qtd_list,
803 struct list_head empty;
805 /* get endpoint and transfer/schedule data */
806 epnum = ep->desc.bEndpointAddress;
808 spin_lock_irqsave (&ehci->lock, flags);
810 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
811 &ehci_to_hcd(ehci)->flags))) {
816 /* get qh and force any scheduling errors */
817 INIT_LIST_HEAD (&empty);
818 qh = qh_append_tds (ehci, urb, &empty, epnum, &ep->hcpriv);
823 if (qh->qh_state == QH_STATE_IDLE) {
824 if ((status = qh_schedule (ehci, qh)) != 0)
828 /* then queue the urb's tds to the qh */
829 qh = qh_append_tds (ehci, urb, qtd_list, epnum, &ep->hcpriv);
832 /* ... update usbfs periodic stats */
833 ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
836 spin_unlock_irqrestore (&ehci->lock, flags);
838 qtd_list_free (ehci, urb, qtd_list);
843 /*-------------------------------------------------------------------------*/
845 /* ehci_iso_stream ops work with both ITD and SITD */
847 static struct ehci_iso_stream *
848 iso_stream_alloc (gfp_t mem_flags)
850 struct ehci_iso_stream *stream;
852 stream = kzalloc(sizeof *stream, mem_flags);
853 if (likely (stream != NULL)) {
854 INIT_LIST_HEAD(&stream->td_list);
855 INIT_LIST_HEAD(&stream->free_list);
856 stream->next_uframe = -1;
857 stream->refcount = 1;
864 struct ehci_hcd *ehci,
865 struct ehci_iso_stream *stream,
866 struct usb_device *dev,
871 static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
874 unsigned epnum, maxp;
879 * this might be a "high bandwidth" highspeed endpoint,
880 * as encoded in the ep descriptor's wMaxPacket field
882 epnum = usb_pipeendpoint (pipe);
883 is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
884 maxp = usb_maxpacket(dev, pipe, !is_input);
891 /* knows about ITD vs SITD */
892 if (dev->speed == USB_SPEED_HIGH) {
893 unsigned multi = hb_mult(maxp);
895 stream->highspeed = 1;
897 maxp = max_packet(maxp);
901 stream->buf0 = cpu_to_le32 ((epnum << 8) | dev->devnum);
902 stream->buf1 = cpu_to_le32 (buf1);
903 stream->buf2 = cpu_to_le32 (multi);
905 /* usbfs wants to report the average usecs per frame tied up
906 * when transfers on this endpoint are scheduled ...
908 stream->usecs = HS_USECS_ISO (maxp);
909 bandwidth = stream->usecs * 8;
910 bandwidth /= 1 << (interval - 1);
917 addr = dev->ttport << 24;
918 if (!ehci_is_TDI(ehci)
920 ehci_to_hcd(ehci)->self.root_hub))
921 addr |= dev->tt->hub->devnum << 16;
924 stream->usecs = HS_USECS_ISO (maxp);
925 think_time = dev->tt ? dev->tt->think_time : 0;
926 stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time (
927 dev->speed, is_input, 1, maxp));
928 hs_transfers = max (1u, (maxp + 187) / 188);
933 stream->c_usecs = stream->usecs;
934 stream->usecs = HS_USECS_ISO (1);
935 stream->raw_mask = 1;
937 /* c-mask as specified in USB 2.0 11.18.4 3.c */
938 tmp = (1 << (hs_transfers + 2)) - 1;
939 stream->raw_mask |= tmp << (8 + 2);
941 stream->raw_mask = smask_out [hs_transfers - 1];
942 bandwidth = stream->usecs + stream->c_usecs;
943 bandwidth /= 1 << (interval + 2);
945 /* stream->splits gets created from raw_mask later */
946 stream->address = cpu_to_le32 (addr);
948 stream->bandwidth = bandwidth;
952 stream->bEndpointAddress = is_input | epnum;
953 stream->interval = interval;
958 iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
962 /* free whenever just a dev->ep reference remains.
963 * not like a QH -- no persistent state (toggle, halt)
965 if (stream->refcount == 1) {
968 // BUG_ON (!list_empty(&stream->td_list));
970 while (!list_empty (&stream->free_list)) {
971 struct list_head *entry;
973 entry = stream->free_list.next;
976 /* knows about ITD vs SITD */
977 if (stream->highspeed) {
978 struct ehci_itd *itd;
980 itd = list_entry (entry, struct ehci_itd,
982 dma_pool_free (ehci->itd_pool, itd,
985 struct ehci_sitd *sitd;
987 sitd = list_entry (entry, struct ehci_sitd,
989 dma_pool_free (ehci->sitd_pool, sitd,
994 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
995 stream->bEndpointAddress &= 0x0f;
996 stream->ep->hcpriv = NULL;
998 if (stream->rescheduled) {
999 ehci_info (ehci, "ep%d%s-iso rescheduled "
1000 "%lu times in %lu seconds\n",
1001 stream->bEndpointAddress, is_in ? "in" : "out",
1002 stream->rescheduled,
1003 ((jiffies - stream->start)/HZ)
1011 static inline struct ehci_iso_stream *
1012 iso_stream_get (struct ehci_iso_stream *stream)
1014 if (likely (stream != NULL))
1019 static struct ehci_iso_stream *
1020 iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1023 struct ehci_iso_stream *stream;
1024 struct usb_host_endpoint *ep;
1025 unsigned long flags;
1027 epnum = usb_pipeendpoint (urb->pipe);
1028 if (usb_pipein(urb->pipe))
1029 ep = urb->dev->ep_in[epnum];
1031 ep = urb->dev->ep_out[epnum];
1033 spin_lock_irqsave (&ehci->lock, flags);
1034 stream = ep->hcpriv;
1036 if (unlikely (stream == NULL)) {
1037 stream = iso_stream_alloc(GFP_ATOMIC);
1038 if (likely (stream != NULL)) {
1039 /* dev->ep owns the initial refcount */
1040 ep->hcpriv = stream;
1042 iso_stream_init(ehci, stream, urb->dev, urb->pipe,
1046 /* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */
1047 } else if (unlikely (stream->hw_info1 != 0)) {
1048 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
1049 urb->dev->devpath, epnum,
1050 usb_pipein(urb->pipe) ? "in" : "out");
1054 /* caller guarantees an eventual matching iso_stream_put */
1055 stream = iso_stream_get (stream);
1057 spin_unlock_irqrestore (&ehci->lock, flags);
1061 /*-------------------------------------------------------------------------*/
1063 /* ehci_iso_sched ops can be ITD-only or SITD-only */
1065 static struct ehci_iso_sched *
1066 iso_sched_alloc (unsigned packets, gfp_t mem_flags)
1068 struct ehci_iso_sched *iso_sched;
1069 int size = sizeof *iso_sched;
1071 size += packets * sizeof (struct ehci_iso_packet);
1072 iso_sched = kzalloc(size, mem_flags);
1073 if (likely (iso_sched != NULL)) {
1074 INIT_LIST_HEAD (&iso_sched->td_list);
1081 struct ehci_iso_sched *iso_sched,
1082 struct ehci_iso_stream *stream,
1087 dma_addr_t dma = urb->transfer_dma;
1089 /* how many uframes are needed for these transfers */
1090 iso_sched->span = urb->number_of_packets * stream->interval;
1092 /* figure out per-uframe itd fields that we'll need later
1093 * when we fit new itds into the schedule.
1095 for (i = 0; i < urb->number_of_packets; i++) {
1096 struct ehci_iso_packet *uframe = &iso_sched->packet [i];
1101 length = urb->iso_frame_desc [i].length;
1102 buf = dma + urb->iso_frame_desc [i].offset;
1104 trans = EHCI_ISOC_ACTIVE;
1105 trans |= buf & 0x0fff;
1106 if (unlikely (((i + 1) == urb->number_of_packets))
1107 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1108 trans |= EHCI_ITD_IOC;
1109 trans |= length << 16;
1110 uframe->transaction = cpu_to_le32 (trans);
1112 /* might need to cross a buffer page within a uframe */
1113 uframe->bufp = (buf & ~(u64)0x0fff);
1115 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
1122 struct ehci_iso_stream *stream,
1123 struct ehci_iso_sched *iso_sched
1128 // caller must hold ehci->lock!
1129 list_splice (&iso_sched->td_list, &stream->free_list);
1134 itd_urb_transaction (
1135 struct ehci_iso_stream *stream,
1136 struct ehci_hcd *ehci,
1141 struct ehci_itd *itd;
1145 struct ehci_iso_sched *sched;
1146 unsigned long flags;
1148 sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1149 if (unlikely (sched == NULL))
1152 itd_sched_init (sched, stream, urb);
1154 if (urb->interval < 8)
1155 num_itds = 1 + (sched->span + 7) / 8;
1157 num_itds = urb->number_of_packets;
1159 /* allocate/init ITDs */
1160 spin_lock_irqsave (&ehci->lock, flags);
1161 for (i = 0; i < num_itds; i++) {
1163 /* free_list.next might be cache-hot ... but maybe
1164 * the HC caches it too. avoid that issue for now.
1167 /* prefer previously-allocated itds */
1168 if (likely (!list_empty(&stream->free_list))) {
1169 itd = list_entry (stream->free_list.prev,
1170 struct ehci_itd, itd_list);
1171 list_del (&itd->itd_list);
1172 itd_dma = itd->itd_dma;
1177 spin_unlock_irqrestore (&ehci->lock, flags);
1178 itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
1180 spin_lock_irqsave (&ehci->lock, flags);
1183 if (unlikely (NULL == itd)) {
1184 iso_sched_free (stream, sched);
1185 spin_unlock_irqrestore (&ehci->lock, flags);
1188 memset (itd, 0, sizeof *itd);
1189 itd->itd_dma = itd_dma;
1190 list_add (&itd->itd_list, &sched->td_list);
1192 spin_unlock_irqrestore (&ehci->lock, flags);
1194 /* temporarily store schedule info in hcpriv */
1195 urb->hcpriv = sched;
1196 urb->error_count = 0;
1200 /*-------------------------------------------------------------------------*/
1204 struct ehci_hcd *ehci,
1213 /* can't commit more than 80% periodic == 100 usec */
1214 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
1218 /* we know urb->interval is 2^N uframes */
1220 } while (uframe < mod);
1226 struct ehci_hcd *ehci,
1228 struct ehci_iso_stream *stream,
1230 struct ehci_iso_sched *sched,
1237 mask = stream->raw_mask << (uframe & 7);
1239 /* for IN, don't wrap CSPLIT into the next frame */
1243 /* this multi-pass logic is simple, but performance may
1244 * suffer when the schedule data isn't cached.
1247 /* check bandwidth */
1248 uframe %= period_uframes;
1252 frame = uframe >> 3;
1255 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1256 /* The tt's fullspeed bus bandwidth must be available.
1257 * tt_available scheduling guarantees 10+% for control/bulk.
1259 if (!tt_available (ehci, period_uframes << 3,
1260 stream->udev, frame, uf, stream->tt_usecs))
1263 /* tt must be idle for start(s), any gap, and csplit.
1264 * assume scheduling slop leaves 10+% for control/bulk.
1266 if (!tt_no_collision (ehci, period_uframes << 3,
1267 stream->udev, frame, mask))
1271 /* check starts (OUT uses more than one) */
1272 max_used = 100 - stream->usecs;
1273 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1274 if (periodic_usecs (ehci, frame, uf) > max_used)
1278 /* for IN, check CSPLIT */
1279 if (stream->c_usecs) {
1281 max_used = 100 - stream->c_usecs;
1285 if ((stream->raw_mask & tmp) == 0)
1287 if (periodic_usecs (ehci, frame, uf)
1293 /* we know urb->interval is 2^N uframes */
1294 uframe += period_uframes;
1295 } while (uframe < mod);
1297 stream->splits = cpu_to_le32(stream->raw_mask << (uframe & 7));
1302 * This scheduler plans almost as far into the future as it has actual
1303 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
1304 * "as small as possible" to be cache-friendlier.) That limits the size
1305 * transfers you can stream reliably; avoid more than 64 msec per urb.
1306 * Also avoid queue depths of less than ehci's worst irq latency (affected
1307 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1308 * and other factors); or more than about 230 msec total (for portability,
1309 * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler!
1312 #define SCHEDULE_SLOP 10 /* frames */
1315 iso_stream_schedule (
1316 struct ehci_hcd *ehci,
1318 struct ehci_iso_stream *stream
1321 u32 now, start, max, period;
1323 unsigned mod = ehci->periodic_size << 3;
1324 struct ehci_iso_sched *sched = urb->hcpriv;
1326 if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
1327 ehci_dbg (ehci, "iso request %p too long\n", urb);
1332 if ((stream->depth + sched->span) > mod) {
1333 ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
1334 urb, stream->depth, sched->span, mod);
1339 now = readl (&ehci->regs->frame_index) % mod;
1341 /* when's the last uframe this urb could start? */
1344 /* typical case: reuse current schedule. stream is still active,
1345 * and no gaps from host falling behind (irq delays etc)
1347 if (likely (!list_empty (&stream->td_list))) {
1348 start = stream->next_uframe;
1351 if (likely ((start + sched->span) < max))
1353 /* else fell behind; someday, try to reschedule */
1358 /* need to schedule; when's the next (u)frame we could start?
1359 * this is bigger than ehci->i_thresh allows; scheduling itself
1360 * isn't free, the slop should handle reasonably slow cpus. it
1361 * can also help high bandwidth if the dma and irq loads don't
1362 * jump until after the queue is primed.
1364 start = SCHEDULE_SLOP * 8 + (now & ~0x07);
1366 stream->next_uframe = start;
1368 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
1370 period = urb->interval;
1371 if (!stream->highspeed)
1374 /* find a uframe slot with enough bandwidth */
1375 for (; start < (stream->next_uframe + period); start++) {
1378 /* check schedule: enough space? */
1379 if (stream->highspeed)
1380 enough_space = itd_slot_ok (ehci, mod, start,
1381 stream->usecs, period);
1383 if ((start % 8) >= 6)
1385 enough_space = sitd_slot_ok (ehci, mod, stream,
1386 start, sched, period);
1389 /* schedule it here if there's enough bandwidth */
1391 stream->next_uframe = start % mod;
1396 /* no room in the schedule */
1397 ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
1398 list_empty (&stream->td_list) ? "" : "re",
1403 iso_sched_free (stream, sched);
1408 /* report high speed start in uframes; full speed, in frames */
1409 urb->start_frame = stream->next_uframe;
1410 if (!stream->highspeed)
1411 urb->start_frame >>= 3;
1415 /*-------------------------------------------------------------------------*/
1418 itd_init (struct ehci_iso_stream *stream, struct ehci_itd *itd)
1422 /* it's been recently zeroed */
1423 itd->hw_next = EHCI_LIST_END;
1424 itd->hw_bufp [0] = stream->buf0;
1425 itd->hw_bufp [1] = stream->buf1;
1426 itd->hw_bufp [2] = stream->buf2;
1428 for (i = 0; i < 8; i++)
1431 /* All other fields are filled when scheduling */
1436 struct ehci_itd *itd,
1437 struct ehci_iso_sched *iso_sched,
1442 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1443 unsigned pg = itd->pg;
1445 // BUG_ON (pg == 6 && uf->cross);
1448 itd->index [uframe] = index;
1450 itd->hw_transaction [uframe] = uf->transaction;
1451 itd->hw_transaction [uframe] |= cpu_to_le32 (pg << 12);
1452 itd->hw_bufp [pg] |= cpu_to_le32 (uf->bufp & ~(u32)0);
1453 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32));
1455 /* iso_frame_desc[].offset must be strictly increasing */
1456 if (unlikely (uf->cross)) {
1457 u64 bufp = uf->bufp + 4096;
1459 itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0);
1460 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(bufp >> 32));
1465 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1467 /* always prepend ITD/SITD ... only QH tree is order-sensitive */
1468 itd->itd_next = ehci->pshadow [frame];
1469 itd->hw_next = ehci->periodic [frame];
1470 ehci->pshadow [frame].itd = itd;
1473 ehci->periodic [frame] = cpu_to_le32 (itd->itd_dma) | Q_TYPE_ITD;
1476 /* fit urb's itds into the selected schedule slot; activate as needed */
1479 struct ehci_hcd *ehci,
1482 struct ehci_iso_stream *stream
1486 unsigned next_uframe, uframe, frame;
1487 struct ehci_iso_sched *iso_sched = urb->hcpriv;
1488 struct ehci_itd *itd;
1490 next_uframe = stream->next_uframe % mod;
1492 if (unlikely (list_empty(&stream->td_list))) {
1493 ehci_to_hcd(ehci)->self.bandwidth_allocated
1494 += stream->bandwidth;
1496 "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1497 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1498 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1500 next_uframe >> 3, next_uframe & 0x7);
1501 stream->start = jiffies;
1503 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1505 /* fill iTDs uframe by uframe */
1506 for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1508 /* ASSERT: we have all necessary itds */
1509 // BUG_ON (list_empty (&iso_sched->td_list));
1511 /* ASSERT: no itds for this endpoint in this uframe */
1513 itd = list_entry (iso_sched->td_list.next,
1514 struct ehci_itd, itd_list);
1515 list_move_tail (&itd->itd_list, &stream->td_list);
1516 itd->stream = iso_stream_get (stream);
1517 itd->urb = usb_get_urb (urb);
1518 itd_init (stream, itd);
1521 uframe = next_uframe & 0x07;
1522 frame = next_uframe >> 3;
1524 itd->usecs [uframe] = stream->usecs;
1525 itd_patch (itd, iso_sched, packet, uframe);
1527 next_uframe += stream->interval;
1528 stream->depth += stream->interval;
1532 /* link completed itds into the schedule */
1533 if (((next_uframe >> 3) != frame)
1534 || packet == urb->number_of_packets) {
1535 itd_link (ehci, frame % ehci->periodic_size, itd);
1539 stream->next_uframe = next_uframe;
1541 /* don't need that schedule data any more */
1542 iso_sched_free (stream, iso_sched);
1545 timer_action (ehci, TIMER_IO_WATCHDOG);
1546 if (unlikely (!ehci->periodic_sched++))
1547 return enable_periodic (ehci);
1551 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1555 struct ehci_hcd *ehci,
1556 struct ehci_itd *itd,
1557 struct pt_regs *regs
1559 struct urb *urb = itd->urb;
1560 struct usb_iso_packet_descriptor *desc;
1564 struct ehci_iso_stream *stream = itd->stream;
1565 struct usb_device *dev;
1567 /* for each uframe with a packet */
1568 for (uframe = 0; uframe < 8; uframe++) {
1569 if (likely (itd->index[uframe] == -1))
1571 urb_index = itd->index[uframe];
1572 desc = &urb->iso_frame_desc [urb_index];
1574 t = le32_to_cpup (&itd->hw_transaction [uframe]);
1575 itd->hw_transaction [uframe] = 0;
1576 stream->depth -= stream->interval;
1578 /* report transfer status */
1579 if (unlikely (t & ISO_ERRS)) {
1581 if (t & EHCI_ISOC_BUF_ERR)
1582 desc->status = usb_pipein (urb->pipe)
1583 ? -ENOSR /* hc couldn't read */
1584 : -ECOMM; /* hc couldn't write */
1585 else if (t & EHCI_ISOC_BABBLE)
1586 desc->status = -EOVERFLOW;
1587 else /* (t & EHCI_ISOC_XACTERR) */
1588 desc->status = -EPROTO;
1590 /* HC need not update length with this error */
1591 if (!(t & EHCI_ISOC_BABBLE))
1592 desc->actual_length = EHCI_ITD_LENGTH (t);
1593 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1595 desc->actual_length = EHCI_ITD_LENGTH (t);
1602 list_move (&itd->itd_list, &stream->free_list);
1603 iso_stream_put (ehci, stream);
1605 /* handle completion now? */
1606 if (likely ((urb_index + 1) != urb->number_of_packets))
1609 /* ASSERT: it's really the last itd for this urb
1610 list_for_each_entry (itd, &stream->td_list, itd_list)
1611 BUG_ON (itd->urb == urb);
1614 /* give urb back to the driver ... can be out-of-order */
1616 ehci_urb_done (ehci, urb, regs);
1619 /* defer stopping schedule; completion can submit */
1620 ehci->periodic_sched--;
1621 if (unlikely (!ehci->periodic_sched))
1622 (void) disable_periodic (ehci);
1623 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1625 if (unlikely (list_empty (&stream->td_list))) {
1626 ehci_to_hcd(ehci)->self.bandwidth_allocated
1627 -= stream->bandwidth;
1629 "deschedule devp %s ep%d%s-iso\n",
1630 dev->devpath, stream->bEndpointAddress & 0x0f,
1631 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1633 iso_stream_put (ehci, stream);
1638 /*-------------------------------------------------------------------------*/
1640 static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1643 int status = -EINVAL;
1644 unsigned long flags;
1645 struct ehci_iso_stream *stream;
1647 /* Get iso_stream head */
1648 stream = iso_stream_find (ehci, urb);
1649 if (unlikely (stream == NULL)) {
1650 ehci_dbg (ehci, "can't get iso stream\n");
1653 if (unlikely (urb->interval != stream->interval)) {
1654 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1655 stream->interval, urb->interval);
1659 #ifdef EHCI_URB_TRACE
1661 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1662 __FUNCTION__, urb->dev->devpath, urb,
1663 usb_pipeendpoint (urb->pipe),
1664 usb_pipein (urb->pipe) ? "in" : "out",
1665 urb->transfer_buffer_length,
1666 urb->number_of_packets, urb->interval,
1670 /* allocate ITDs w/o locking anything */
1671 status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1672 if (unlikely (status < 0)) {
1673 ehci_dbg (ehci, "can't init itds\n");
1677 /* schedule ... need to lock */
1678 spin_lock_irqsave (&ehci->lock, flags);
1679 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1680 &ehci_to_hcd(ehci)->flags)))
1681 status = -ESHUTDOWN;
1683 status = iso_stream_schedule (ehci, urb, stream);
1684 if (likely (status == 0))
1685 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1686 spin_unlock_irqrestore (&ehci->lock, flags);
1689 if (unlikely (status < 0))
1690 iso_stream_put (ehci, stream);
1694 #ifdef CONFIG_USB_EHCI_SPLIT_ISO
1696 /*-------------------------------------------------------------------------*/
1699 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1700 * TTs in USB 2.0 hubs. These need microframe scheduling.
1705 struct ehci_iso_sched *iso_sched,
1706 struct ehci_iso_stream *stream,
1711 dma_addr_t dma = urb->transfer_dma;
1713 /* how many frames are needed for these transfers */
1714 iso_sched->span = urb->number_of_packets * stream->interval;
1716 /* figure out per-frame sitd fields that we'll need later
1717 * when we fit new sitds into the schedule.
1719 for (i = 0; i < urb->number_of_packets; i++) {
1720 struct ehci_iso_packet *packet = &iso_sched->packet [i];
1725 length = urb->iso_frame_desc [i].length & 0x03ff;
1726 buf = dma + urb->iso_frame_desc [i].offset;
1728 trans = SITD_STS_ACTIVE;
1729 if (((i + 1) == urb->number_of_packets)
1730 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1732 trans |= length << 16;
1733 packet->transaction = cpu_to_le32 (trans);
1735 /* might need to cross a buffer page within a td */
1737 packet->buf1 = (buf + length) & ~0x0fff;
1738 if (packet->buf1 != (buf & ~(u64)0x0fff))
1741 /* OUT uses multiple start-splits */
1742 if (stream->bEndpointAddress & USB_DIR_IN)
1744 length = (length + 187) / 188;
1745 if (length > 1) /* BEGIN vs ALL */
1747 packet->buf1 |= length;
1752 sitd_urb_transaction (
1753 struct ehci_iso_stream *stream,
1754 struct ehci_hcd *ehci,
1759 struct ehci_sitd *sitd;
1760 dma_addr_t sitd_dma;
1762 struct ehci_iso_sched *iso_sched;
1763 unsigned long flags;
1765 iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1766 if (iso_sched == NULL)
1769 sitd_sched_init (iso_sched, stream, urb);
1771 /* allocate/init sITDs */
1772 spin_lock_irqsave (&ehci->lock, flags);
1773 for (i = 0; i < urb->number_of_packets; i++) {
1775 /* NOTE: for now, we don't try to handle wraparound cases
1776 * for IN (using sitd->hw_backpointer, like a FSTN), which
1777 * means we never need two sitds for full speed packets.
1780 /* free_list.next might be cache-hot ... but maybe
1781 * the HC caches it too. avoid that issue for now.
1784 /* prefer previously-allocated sitds */
1785 if (!list_empty(&stream->free_list)) {
1786 sitd = list_entry (stream->free_list.prev,
1787 struct ehci_sitd, sitd_list);
1788 list_del (&sitd->sitd_list);
1789 sitd_dma = sitd->sitd_dma;
1794 spin_unlock_irqrestore (&ehci->lock, flags);
1795 sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1797 spin_lock_irqsave (&ehci->lock, flags);
1801 iso_sched_free (stream, iso_sched);
1802 spin_unlock_irqrestore (&ehci->lock, flags);
1805 memset (sitd, 0, sizeof *sitd);
1806 sitd->sitd_dma = sitd_dma;
1807 list_add (&sitd->sitd_list, &iso_sched->td_list);
1810 /* temporarily store schedule info in hcpriv */
1811 urb->hcpriv = iso_sched;
1812 urb->error_count = 0;
1814 spin_unlock_irqrestore (&ehci->lock, flags);
1818 /*-------------------------------------------------------------------------*/
1822 struct ehci_iso_stream *stream,
1823 struct ehci_sitd *sitd,
1824 struct ehci_iso_sched *iso_sched,
1828 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1829 u64 bufp = uf->bufp;
1831 sitd->hw_next = EHCI_LIST_END;
1832 sitd->hw_fullspeed_ep = stream->address;
1833 sitd->hw_uframe = stream->splits;
1834 sitd->hw_results = uf->transaction;
1835 sitd->hw_backpointer = EHCI_LIST_END;
1838 sitd->hw_buf [0] = cpu_to_le32 (bufp);
1839 sitd->hw_buf_hi [0] = cpu_to_le32 (bufp >> 32);
1841 sitd->hw_buf [1] = cpu_to_le32 (uf->buf1);
1844 sitd->hw_buf_hi [1] = cpu_to_le32 (bufp >> 32);
1845 sitd->index = index;
1849 sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1851 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1852 sitd->sitd_next = ehci->pshadow [frame];
1853 sitd->hw_next = ehci->periodic [frame];
1854 ehci->pshadow [frame].sitd = sitd;
1855 sitd->frame = frame;
1857 ehci->periodic [frame] = cpu_to_le32 (sitd->sitd_dma) | Q_TYPE_SITD;
1860 /* fit urb's sitds into the selected schedule slot; activate as needed */
1863 struct ehci_hcd *ehci,
1866 struct ehci_iso_stream *stream
1870 unsigned next_uframe;
1871 struct ehci_iso_sched *sched = urb->hcpriv;
1872 struct ehci_sitd *sitd;
1874 next_uframe = stream->next_uframe;
1876 if (list_empty(&stream->td_list)) {
1877 /* usbfs ignores TT bandwidth */
1878 ehci_to_hcd(ehci)->self.bandwidth_allocated
1879 += stream->bandwidth;
1881 "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
1882 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1883 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1884 (next_uframe >> 3) % ehci->periodic_size,
1885 stream->interval, le32_to_cpu (stream->splits));
1886 stream->start = jiffies;
1888 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1890 /* fill sITDs frame by frame */
1891 for (packet = 0, sitd = NULL;
1892 packet < urb->number_of_packets;
1895 /* ASSERT: we have all necessary sitds */
1896 BUG_ON (list_empty (&sched->td_list));
1898 /* ASSERT: no itds for this endpoint in this frame */
1900 sitd = list_entry (sched->td_list.next,
1901 struct ehci_sitd, sitd_list);
1902 list_move_tail (&sitd->sitd_list, &stream->td_list);
1903 sitd->stream = iso_stream_get (stream);
1904 sitd->urb = usb_get_urb (urb);
1906 sitd_patch (stream, sitd, sched, packet);
1907 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
1910 next_uframe += stream->interval << 3;
1911 stream->depth += stream->interval << 3;
1913 stream->next_uframe = next_uframe % mod;
1915 /* don't need that schedule data any more */
1916 iso_sched_free (stream, sched);
1919 timer_action (ehci, TIMER_IO_WATCHDOG);
1920 if (!ehci->periodic_sched++)
1921 return enable_periodic (ehci);
1925 /*-------------------------------------------------------------------------*/
1927 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
1928 | SITD_STS_XACT | SITD_STS_MMF)
1932 struct ehci_hcd *ehci,
1933 struct ehci_sitd *sitd,
1934 struct pt_regs *regs
1936 struct urb *urb = sitd->urb;
1937 struct usb_iso_packet_descriptor *desc;
1940 struct ehci_iso_stream *stream = sitd->stream;
1941 struct usb_device *dev;
1943 urb_index = sitd->index;
1944 desc = &urb->iso_frame_desc [urb_index];
1945 t = le32_to_cpup (&sitd->hw_results);
1947 /* report transfer status */
1948 if (t & SITD_ERRS) {
1950 if (t & SITD_STS_DBE)
1951 desc->status = usb_pipein (urb->pipe)
1952 ? -ENOSR /* hc couldn't read */
1953 : -ECOMM; /* hc couldn't write */
1954 else if (t & SITD_STS_BABBLE)
1955 desc->status = -EOVERFLOW;
1956 else /* XACT, MMF, etc */
1957 desc->status = -EPROTO;
1960 desc->actual_length = desc->length - SITD_LENGTH (t);
1965 sitd->stream = NULL;
1966 list_move (&sitd->sitd_list, &stream->free_list);
1967 stream->depth -= stream->interval << 3;
1968 iso_stream_put (ehci, stream);
1970 /* handle completion now? */
1971 if ((urb_index + 1) != urb->number_of_packets)
1974 /* ASSERT: it's really the last sitd for this urb
1975 list_for_each_entry (sitd, &stream->td_list, sitd_list)
1976 BUG_ON (sitd->urb == urb);
1979 /* give urb back to the driver */
1981 ehci_urb_done (ehci, urb, regs);
1984 /* defer stopping schedule; completion can submit */
1985 ehci->periodic_sched--;
1986 if (!ehci->periodic_sched)
1987 (void) disable_periodic (ehci);
1988 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1990 if (list_empty (&stream->td_list)) {
1991 ehci_to_hcd(ehci)->self.bandwidth_allocated
1992 -= stream->bandwidth;
1994 "deschedule devp %s ep%d%s-iso\n",
1995 dev->devpath, stream->bEndpointAddress & 0x0f,
1996 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1998 iso_stream_put (ehci, stream);
2004 static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2007 int status = -EINVAL;
2008 unsigned long flags;
2009 struct ehci_iso_stream *stream;
2011 /* Get iso_stream head */
2012 stream = iso_stream_find (ehci, urb);
2013 if (stream == NULL) {
2014 ehci_dbg (ehci, "can't get iso stream\n");
2017 if (urb->interval != stream->interval) {
2018 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
2019 stream->interval, urb->interval);
2023 #ifdef EHCI_URB_TRACE
2025 "submit %p dev%s ep%d%s-iso len %d\n",
2026 urb, urb->dev->devpath,
2027 usb_pipeendpoint (urb->pipe),
2028 usb_pipein (urb->pipe) ? "in" : "out",
2029 urb->transfer_buffer_length);
2032 /* allocate SITDs */
2033 status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
2035 ehci_dbg (ehci, "can't init sitds\n");
2039 /* schedule ... need to lock */
2040 spin_lock_irqsave (&ehci->lock, flags);
2041 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
2042 &ehci_to_hcd(ehci)->flags)))
2043 status = -ESHUTDOWN;
2045 status = iso_stream_schedule (ehci, urb, stream);
2047 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
2048 spin_unlock_irqrestore (&ehci->lock, flags);
2052 iso_stream_put (ehci, stream);
2059 sitd_submit (struct ehci_hcd *ehci, struct urb *urb, gfp_t mem_flags)
2061 ehci_dbg (ehci, "split iso support is disabled\n");
2065 static inline unsigned
2067 struct ehci_hcd *ehci,
2068 struct ehci_sitd *sitd,
2069 struct pt_regs *regs
2071 ehci_err (ehci, "sitd_complete %p?\n", sitd);
2075 #endif /* USB_EHCI_SPLIT_ISO */
2077 /*-------------------------------------------------------------------------*/
2080 scan_periodic (struct ehci_hcd *ehci, struct pt_regs *regs)
2082 unsigned frame, clock, now_uframe, mod;
2085 mod = ehci->periodic_size << 3;
2088 * When running, scan from last scan point up to "now"
2089 * else clean up by scanning everything that's left.
2090 * Touches as few pages as possible: cache-friendly.
2092 now_uframe = ehci->next_uframe;
2093 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
2094 clock = readl (&ehci->regs->frame_index);
2096 clock = now_uframe + mod - 1;
2100 union ehci_shadow q, *q_p;
2104 /* don't scan past the live uframe */
2105 frame = now_uframe >> 3;
2106 if (frame == (clock >> 3))
2107 uframes = now_uframe & 0x07;
2109 /* safe to scan the whole frame at once */
2115 /* scan each element in frame's queue for completions */
2116 q_p = &ehci->pshadow [frame];
2117 hw_p = &ehci->periodic [frame];
2119 type = Q_NEXT_TYPE (*hw_p);
2122 while (q.ptr != NULL) {
2124 union ehci_shadow temp;
2127 live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
2130 /* handle any completions */
2131 temp.qh = qh_get (q.qh);
2132 type = Q_NEXT_TYPE (q.qh->hw_next);
2134 modified = qh_completions (ehci, temp.qh, regs);
2135 if (unlikely (list_empty (&temp.qh->qtd_list)))
2136 intr_deschedule (ehci, temp.qh);
2140 /* for "save place" FSTNs, look at QH entries
2141 * in the previous frame for completions.
2143 if (q.fstn->hw_prev != EHCI_LIST_END) {
2144 dbg ("ignoring completions from FSTNs");
2146 type = Q_NEXT_TYPE (q.fstn->hw_next);
2147 q = q.fstn->fstn_next;
2150 /* skip itds for later in the frame */
2152 for (uf = live ? uframes : 8; uf < 8; uf++) {
2153 if (0 == (q.itd->hw_transaction [uf]
2156 q_p = &q.itd->itd_next;
2157 hw_p = &q.itd->hw_next;
2158 type = Q_NEXT_TYPE (q.itd->hw_next);
2165 /* this one's ready ... HC won't cache the
2166 * pointer for much longer, if at all.
2168 *q_p = q.itd->itd_next;
2169 *hw_p = q.itd->hw_next;
2170 type = Q_NEXT_TYPE (q.itd->hw_next);
2172 modified = itd_complete (ehci, q.itd, regs);
2176 if ((q.sitd->hw_results & SITD_ACTIVE)
2178 q_p = &q.sitd->sitd_next;
2179 hw_p = &q.sitd->hw_next;
2180 type = Q_NEXT_TYPE (q.sitd->hw_next);
2184 *q_p = q.sitd->sitd_next;
2185 *hw_p = q.sitd->hw_next;
2186 type = Q_NEXT_TYPE (q.sitd->hw_next);
2188 modified = sitd_complete (ehci, q.sitd, regs);
2192 dbg ("corrupt type %d frame %d shadow %p",
2193 type, frame, q.ptr);
2198 /* assume completion callbacks modify the queue */
2199 if (unlikely (modified))
2203 /* stop when we catch up to the HC */
2205 // FIXME: this assumes we won't get lapped when
2206 // latencies climb; that should be rare, but...
2207 // detect it, and just go all the way around.
2208 // FLR might help detect this case, so long as latencies
2209 // don't exceed periodic_size msec (default 1.024 sec).
2211 // FIXME: likewise assumes HC doesn't halt mid-scan
2213 if (now_uframe == clock) {
2216 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
2218 ehci->next_uframe = now_uframe;
2219 now = readl (&ehci->regs->frame_index) % mod;
2220 if (now_uframe == now)
2223 /* rescan the rest of this frame, then ... */