1 /*****************************************************************************/
2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller */
4 /* Written By: Keith Mitchell, IBM Corporation */
5 /* Jack Hammer, Adaptec, Inc. */
6 /* David Jeffery, Adaptec, Inc. */
8 /* Copyright (C) 2000 IBM Corporation */
9 /* Copyright (C) 2002,2003 Adaptec, Inc. */
11 /* This program is free software; you can redistribute it and/or modify */
12 /* it under the terms of the GNU General Public License as published by */
13 /* the Free Software Foundation; either version 2 of the License, or */
14 /* (at your option) any later version. */
16 /* This program is distributed in the hope that it will be useful, */
17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
19 /* GNU General Public License for more details. */
22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
26 /* solely responsible for determining the appropriateness of using and */
27 /* distributing the Program and assumes all risks associated with its */
28 /* exercise of rights under this Agreement, including but not limited to */
29 /* the risks and costs of program errors, damage to or loss of data, */
30 /* programs or equipment, and unavailability or interruption of operations. */
32 /* DISCLAIMER OF LIABILITY */
33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
41 /* You should have received a copy of the GNU General Public License */
42 /* along with this program; if not, write to the Free Software */
43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
45 /* Bugs/Comments/Suggestions about this driver should be mailed to: */
46 /* ipslinux@adaptec.com */
48 /* For system support issues, contact your local IBM Customer support. */
49 /* Directions to find IBM Customer Support for each country can be found at: */
50 /* http://www.ibm.com/planetwide/ */
52 /*****************************************************************************/
54 /*****************************************************************************/
57 /* 0.99.02 - Breakup commands that are bigger than 8 * the stripe size */
58 /* 0.99.03 - Make interrupt routine handle all completed request on the */
59 /* adapter not just the first one */
60 /* - Make sure passthru commands get woken up if we run out of */
62 /* - Send all of the commands on the queue at once rather than */
63 /* one at a time since the card will support it. */
64 /* 0.99.04 - Fix race condition in the passthru mechanism -- this required */
65 /* the interface to the utilities to change */
66 /* - Fix error recovery code */
67 /* 0.99.05 - Fix an oops when we get certain passthru commands */
68 /* 1.00.00 - Initial Public Release */
69 /* Functionally equivalent to 0.99.05 */
70 /* 3.60.00 - Bump max commands to 128 for use with firmware 3.60 */
71 /* - Change version to 3.60 to coincide with release numbering. */
72 /* 3.60.01 - Remove bogus error check in passthru routine */
73 /* 3.60.02 - Make DCDB direction based on lookup table */
74 /* - Only allow one DCDB command to a SCSI ID at a time */
75 /* 4.00.00 - Add support for ServeRAID 4 */
76 /* 4.00.01 - Add support for First Failure Data Capture */
77 /* 4.00.02 - Fix problem with PT DCDB with no buffer */
78 /* 4.00.03 - Add alternative passthru interface */
79 /* - Add ability to flash BIOS */
80 /* 4.00.04 - Rename structures/constants to be prefixed with IPS_ */
81 /* 4.00.05 - Remove wish_block from init routine */
82 /* - Use linux/spinlock.h instead of asm/spinlock.h for kernels */
83 /* 2.3.18 and later */
84 /* - Sync with other changes from the 2.3 kernels */
85 /* 4.00.06 - Fix timeout with initial FFDC command */
86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
87 /* 4.10.00 - Add support for ServeRAID 4M/4L */
88 /* 4.10.13 - Fix for dynamic unload and proc file system */
89 /* 4.20.03 - Rename version to coincide with new release schedules */
90 /* Performance fixes */
91 /* Fix truncation of /proc files with cat */
92 /* Merge in changes through kernel 2.4.0test1ac21 */
93 /* 4.20.13 - Fix some failure cases / reset code */
94 /* - Hook into the reboot_notifier to flush the controller cache */
95 /* 4.50.01 - Fix problem when there is a hole in logical drive numbering */
96 /* 4.70.09 - Use a Common ( Large Buffer ) for Flashing from the JCRM CD */
97 /* - Add IPSSEND Flash Support */
98 /* - Set Sense Data for Unknown SCSI Command */
99 /* - Use Slot Number from NVRAM Page 5 */
100 /* - Restore caller's DCDB Structure */
101 /* 4.70.12 - Corrective actions for bad controller ( during initialization )*/
102 /* 4.70.13 - Don't Send CDB's if we already know the device is not present */
103 /* - Don't release HA Lock in ips_next() until SC taken off queue */
104 /* - Unregister SCSI device in ips_release() */
105 /* 4.70.15 - Fix Breakup for very large ( non-SG ) requests in ips_done() */
106 /* 4.71.00 - Change all memory allocations to not use GFP_DMA flag */
107 /* Code Clean-Up for 2.4.x kernel */
108 /* 4.72.00 - Allow for a Scatter-Gather Element to exceed MAX_XFER Size */
109 /* 4.72.01 - I/O Mapped Memory release ( so "insmod ips" does not Fail ) */
110 /* - Don't Issue Internal FFDC Command if there are Active Commands */
111 /* - Close Window for getting too many IOCTL's active */
112 /* 4.80.00 - Make ia64 Safe */
113 /* 4.80.04 - Eliminate calls to strtok() if 2.4.x or greater */
114 /* - Adjustments to Device Queue Depth */
115 /* 4.80.14 - Take all semaphores off stack */
116 /* - Clean Up New_IOCTL path */
117 /* 4.80.20 - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel ) */
118 /* - 5 second delay needed after resetting an i960 adapter */
119 /* 4.80.26 - Clean up potential code problems ( Arjan's recommendations ) */
120 /* 4.90.01 - Version Matching for FirmWare, BIOS, and Driver */
121 /* 4.90.05 - Use New PCI Architecture to facilitate Hot Plug Development */
122 /* 4.90.08 - Increase Delays in Flashing ( Trombone Only - 4H ) */
123 /* 4.90.08 - Data Corruption if First Scatter Gather Element is > 64K */
124 /* 4.90.11 - Don't actually RESET unless it's physically required */
125 /* - Remove unused compile options */
126 /* 5.00.01 - Sarasota ( 5i ) adapters must always be scanned first */
127 /* - Get rid on IOCTL_NEW_COMMAND code */
128 /* - Add Extended DCDB Commands for Tape Support in 5I */
129 /* 5.10.12 - use pci_dma interfaces, update for 2.5 kernel changes */
130 /* 5.10.15 - remove unused code (sem, macros, etc.) */
131 /* 5.30.00 - use __devexit_p() */
132 /* 6.00.00 - Add 6x Adapters and Battery Flash */
133 /* 6.10.00 - Remove 1G Addressing Limitations */
134 /* 6.11.xx - Get VersionInfo buffer off the stack ! DDTS 60401 */
135 /* 6.11.xx - Make Logical Drive Info structure safe for DMA DDTS 60639 */
136 /* 7.10.18 - Add highmem_io flag in SCSI Templete for 2.4 kernels */
137 /* - Fix path/name for scsi_hosts.h include for 2.6 kernels */
138 /* - Fix sort order of 7k */
139 /* - Remove 3 unused "inline" functions */
140 /* 7.12.xx - Use STATIC functions whereever possible */
141 /* - Clean up deprecated MODULE_PARM calls */
142 /* 7.12.05 - Remove Version Matching per IBM request */
143 /*****************************************************************************/
146 * Conditional Compilation directives for this driver:
148 * IPS_DEBUG - Turn on debugging info
152 * debug:<number> - Set debug level to <number>
153 * NOTE: only works when IPS_DEBUG compile directive is used.
154 * 1 - Normal debug messages
155 * 2 - Verbose debug messages
156 * 11 - Method trace (non interrupt)
157 * 12 - Method trace (includes interrupt)
159 * noi2o - Don't use I2O Queues (ServeRAID 4 only)
160 * nommap - Don't use memory mapped I/O
161 * ioctlsize - Initial size of the IOCTL buffer
165 #include <asm/byteorder.h>
166 #include <asm/page.h>
167 #include <linux/stddef.h>
168 #include <linux/version.h>
169 #include <linux/string.h>
170 #include <linux/errno.h>
171 #include <linux/kernel.h>
172 #include <linux/ioport.h>
173 #include <linux/slab.h>
174 #include <linux/delay.h>
175 #include <linux/pci.h>
176 #include <linux/proc_fs.h>
177 #include <linux/reboot.h>
178 #include <linux/interrupt.h>
180 #include <linux/blkdev.h>
181 #include <linux/types.h>
187 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)
190 #include <scsi/scsi_host.h>
195 #include <linux/module.h>
197 #include <linux/stat.h>
198 #include <linux/config.h>
200 #include <linux/spinlock.h>
201 #include <linux/init.h>
203 #include <linux/smp.h>
206 static char *ips = NULL;
207 module_param(ips, charp, 0);
213 #define IPS_VERSION_HIGH "7.12"
214 #define IPS_VERSION_LOW ".05 "
216 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
217 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
220 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)
221 #include <linux/blk.h>
223 #define IPS_LOCK_SAVE(lock,flags) spin_lock_irqsave(&io_request_lock,flags)
224 #define IPS_UNLOCK_RESTORE(lock,flags) spin_unlock_irqrestore(&io_request_lock,flags)
226 #define __devexit_p(x) x
229 #define IPS_LOCK_SAVE(lock,flags) do{spin_lock(lock);(void)flags;}while(0)
230 #define IPS_UNLOCK_RESTORE(lock,flags) do{spin_unlock(lock);(void)flags;}while(0)
233 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
234 DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
235 PCI_DMA_BIDIRECTIONAL : \
236 scb->scsi_cmd->sc_data_direction)
239 #define METHOD_TRACE(s, i) if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
240 #define DEBUG(i, s) if (ips_debug >= i) printk(KERN_NOTICE s "\n");
241 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
243 #define METHOD_TRACE(s, i)
245 #define DEBUG_VAR(i, s, v...)
249 * Function prototypes
251 static int ips_detect(struct scsi_host_template *);
252 static int ips_release(struct Scsi_Host *);
253 static int ips_eh_abort(Scsi_Cmnd *);
254 static int ips_eh_reset(Scsi_Cmnd *);
255 static int ips_queue(Scsi_Cmnd *, void (*)(Scsi_Cmnd *));
256 static const char *ips_info(struct Scsi_Host *);
257 static irqreturn_t do_ipsintr(int, void *, struct pt_regs *);
258 static int ips_hainit(ips_ha_t *);
259 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
260 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
261 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
262 static int ips_online(ips_ha_t *, ips_scb_t *);
263 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
264 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
265 static int ips_msense(ips_ha_t *, ips_scb_t *);
266 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
267 static int ips_deallocatescbs(ips_ha_t *, int);
268 static int ips_allocatescbs(ips_ha_t *);
269 static int ips_reset_copperhead(ips_ha_t *);
270 static int ips_reset_copperhead_memio(ips_ha_t *);
271 static int ips_reset_morpheus(ips_ha_t *);
272 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
273 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
274 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
275 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
276 static int ips_isintr_copperhead(ips_ha_t *);
277 static int ips_isintr_copperhead_memio(ips_ha_t *);
278 static int ips_isintr_morpheus(ips_ha_t *);
279 static int ips_wait(ips_ha_t *, int, int);
280 static int ips_write_driver_status(ips_ha_t *, int);
281 static int ips_read_adapter_status(ips_ha_t *, int);
282 static int ips_read_subsystem_parameters(ips_ha_t *, int);
283 static int ips_read_config(ips_ha_t *, int);
284 static int ips_clear_adapter(ips_ha_t *, int);
285 static int ips_readwrite_page5(ips_ha_t *, int, int);
286 static int ips_init_copperhead(ips_ha_t *);
287 static int ips_init_copperhead_memio(ips_ha_t *);
288 static int ips_init_morpheus(ips_ha_t *);
289 static int ips_isinit_copperhead(ips_ha_t *);
290 static int ips_isinit_copperhead_memio(ips_ha_t *);
291 static int ips_isinit_morpheus(ips_ha_t *);
292 static int ips_erase_bios(ips_ha_t *);
293 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
294 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
295 static int ips_erase_bios_memio(ips_ha_t *);
296 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
297 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
298 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
299 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
300 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
301 static void ips_free_flash_copperhead(ips_ha_t * ha);
302 static void ips_get_bios_version(ips_ha_t *, int);
303 static void ips_identify_controller(ips_ha_t *);
304 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
305 static void ips_enable_int_copperhead(ips_ha_t *);
306 static void ips_enable_int_copperhead_memio(ips_ha_t *);
307 static void ips_enable_int_morpheus(ips_ha_t *);
308 static int ips_intr_copperhead(ips_ha_t *);
309 static int ips_intr_morpheus(ips_ha_t *);
310 static void ips_next(ips_ha_t *, int);
311 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
312 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
313 static void ips_done(ips_ha_t *, ips_scb_t *);
314 static void ips_free(ips_ha_t *);
315 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
316 static void ips_freescb(ips_ha_t *, ips_scb_t *);
317 static void ips_setup_funclist(ips_ha_t *);
318 static void ips_statinit(ips_ha_t *);
319 static void ips_statinit_memio(ips_ha_t *);
320 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time_t);
321 static void ips_ffdc_reset(ips_ha_t *, int);
322 static void ips_ffdc_time(ips_ha_t *);
323 static uint32_t ips_statupd_copperhead(ips_ha_t *);
324 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
325 static uint32_t ips_statupd_morpheus(ips_ha_t *);
326 static ips_scb_t *ips_getscb(ips_ha_t *);
327 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
328 static void ips_putq_wait_tail(ips_wait_queue_t *, Scsi_Cmnd *);
329 static void ips_putq_copp_tail(ips_copp_queue_t *,
330 ips_copp_wait_item_t *);
331 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
332 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
333 static Scsi_Cmnd *ips_removeq_wait_head(ips_wait_queue_t *);
334 static Scsi_Cmnd *ips_removeq_wait(ips_wait_queue_t *, Scsi_Cmnd *);
335 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
336 ips_copp_wait_item_t *);
337 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
339 static int ips_is_passthru(Scsi_Cmnd *);
340 static int ips_make_passthru(ips_ha_t *, Scsi_Cmnd *, ips_scb_t *, int);
341 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
342 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
343 static void ips_scmd_buf_write(Scsi_Cmnd * scmd, void *data,
345 static void ips_scmd_buf_read(Scsi_Cmnd * scmd, void *data, unsigned int count);
347 static int ips_proc_info(struct Scsi_Host *, char *, char **, off_t, int, int);
348 static int ips_host_info(ips_ha_t *, char *, off_t, int);
349 static void copy_mem_info(IPS_INFOSTR *, char *, int);
350 static int copy_info(IPS_INFOSTR *, char *, ...);
351 static int ips_abort_init(ips_ha_t * ha, int index);
352 static int ips_init_phase2(int index);
354 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
355 static int ips_register_scsi(int index);
357 static int ips_poll_for_flush_complete(ips_ha_t * ha);
358 static void ips_flush_and_reset(ips_ha_t *ha);
363 static const char ips_name[] = "ips";
364 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS]; /* Array of host controller structures */
365 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS]; /* Array of HA structures */
366 static unsigned int ips_next_controller;
367 static unsigned int ips_num_controllers;
368 static unsigned int ips_released_controllers;
369 static int ips_hotplug;
370 static int ips_cmd_timeout = 60;
371 static int ips_reset_timeout = 60 * 5;
372 static int ips_force_memio = 1; /* Always use Memory Mapped I/O */
373 static int ips_force_i2o = 1; /* Always use I2O command delivery */
374 static int ips_ioctlsize = IPS_IOCTL_SIZE; /* Size of the ioctl buffer */
375 static int ips_cd_boot; /* Booting from Manager CD */
376 static char *ips_FlashData = NULL; /* CD Boot - Flash Data Buffer */
377 static dma_addr_t ips_flashbusaddr;
378 static long ips_FlashDataInUse; /* CD Boot - Flash Data In Use Flag */
379 static uint32_t MaxLiteCmds = 32; /* Max Active Cmds for a Lite Adapter */
380 static struct scsi_host_template ips_driver_template = {
381 .detect = ips_detect,
382 .release = ips_release,
384 .queuecommand = ips_queue,
385 .eh_abort_handler = ips_eh_abort,
386 .eh_host_reset_handler = ips_eh_reset,
388 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
389 .proc_info = ips_proc_info,
390 .slave_configure = ips_slave_configure,
392 .proc_info = ips_proc24_info,
393 .select_queue_depths = ips_select_queue_depth,
395 .bios_param = ips_biosparam,
397 .sg_tablesize = IPS_MAX_SG,
399 .use_clustering = ENABLE_CLUSTERING,
400 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
401 .use_new_eh_code = 1,
403 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) && LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
409 /* This table describes all ServeRAID Adapters */
410 static struct pci_device_id ips_pci_table[] = {
411 { 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
412 { 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
413 { 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
417 MODULE_DEVICE_TABLE( pci, ips_pci_table );
419 static char ips_hot_plug_name[] = "ips";
421 static int __devinit ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
422 static void __devexit ips_remove_device(struct pci_dev *pci_dev);
424 static struct pci_driver ips_pci_driver = {
425 .name = ips_hot_plug_name,
426 .id_table = ips_pci_table,
427 .probe = ips_insert_device,
428 .remove = __devexit_p(ips_remove_device),
433 * Necessary forward function protoypes
435 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
437 #define MAX_ADAPTER_NAME 15
439 static char ips_adapter_name[][30] = {
442 "ServeRAID on motherboard",
443 "ServeRAID on motherboard",
460 static struct notifier_block ips_notifier = {
467 static char ips_command_direction[] = {
468 IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
469 IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
470 IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
471 IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
472 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
473 IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
474 IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
475 IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
476 IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
477 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
478 IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
479 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
480 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
481 IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
482 IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
483 IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
484 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
485 IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
486 IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
487 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
488 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
489 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
490 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
491 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
492 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
493 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
494 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
495 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
496 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
497 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
498 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
499 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
500 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
501 IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
502 IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
503 IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
504 IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
505 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
506 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
507 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
508 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
509 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
510 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
511 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
512 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
513 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
514 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
515 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
516 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
517 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
518 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
522 /****************************************************************************/
524 /* Routine Name: ips_setup */
526 /* Routine Description: */
528 /* setup parameters to the driver */
530 /****************************************************************************/
532 ips_setup(char *ips_str)
538 IPS_OPTION options[] = {
539 {"noi2o", &ips_force_i2o, 0},
540 {"nommap", &ips_force_memio, 0},
541 {"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
542 {"cdboot", &ips_cd_boot, 0},
543 {"maxcmds", &MaxLiteCmds, 32},
546 /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
547 /* Search for value */
548 while ((key = strsep(&ips_str, ",."))) {
551 value = strchr(key, ':');
555 * We now have key/value pairs.
556 * Update the variables
558 for (i = 0; i < (sizeof (options) / sizeof (options[0])); i++) {
560 (key, options[i].option_name,
561 strlen(options[i].option_name)) == 0) {
563 *options[i].option_flag =
564 simple_strtoul(value, NULL, 0);
566 *options[i].option_flag =
567 options[i].option_value;
576 __setup("ips=", ips_setup);
578 /****************************************************************************/
580 /* Routine Name: ips_detect */
582 /* Routine Description: */
584 /* Detect and initialize the driver */
586 /* NOTE: this routine is called under the io_request_lock spinlock */
588 /****************************************************************************/
590 ips_detect(struct scsi_host_template * SHT)
594 METHOD_TRACE("ips_detect", 1);
601 for (i = 0; i < ips_num_controllers; i++) {
602 if (ips_register_scsi(i))
604 ips_released_controllers++;
607 return (ips_num_controllers);
610 /****************************************************************************/
611 /* configure the function pointers to use the functions that will work */
612 /* with the found version of the adapter */
613 /****************************************************************************/
615 ips_setup_funclist(ips_ha_t * ha)
621 if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
622 /* morpheus / marco / sebring */
623 ha->func.isintr = ips_isintr_morpheus;
624 ha->func.isinit = ips_isinit_morpheus;
625 ha->func.issue = ips_issue_i2o_memio;
626 ha->func.init = ips_init_morpheus;
627 ha->func.statupd = ips_statupd_morpheus;
628 ha->func.reset = ips_reset_morpheus;
629 ha->func.intr = ips_intr_morpheus;
630 ha->func.enableint = ips_enable_int_morpheus;
631 } else if (IPS_USE_MEMIO(ha)) {
632 /* copperhead w/MEMIO */
633 ha->func.isintr = ips_isintr_copperhead_memio;
634 ha->func.isinit = ips_isinit_copperhead_memio;
635 ha->func.init = ips_init_copperhead_memio;
636 ha->func.statupd = ips_statupd_copperhead_memio;
637 ha->func.statinit = ips_statinit_memio;
638 ha->func.reset = ips_reset_copperhead_memio;
639 ha->func.intr = ips_intr_copperhead;
640 ha->func.erasebios = ips_erase_bios_memio;
641 ha->func.programbios = ips_program_bios_memio;
642 ha->func.verifybios = ips_verify_bios_memio;
643 ha->func.enableint = ips_enable_int_copperhead_memio;
644 if (IPS_USE_I2O_DELIVER(ha))
645 ha->func.issue = ips_issue_i2o_memio;
647 ha->func.issue = ips_issue_copperhead_memio;
650 ha->func.isintr = ips_isintr_copperhead;
651 ha->func.isinit = ips_isinit_copperhead;
652 ha->func.init = ips_init_copperhead;
653 ha->func.statupd = ips_statupd_copperhead;
654 ha->func.statinit = ips_statinit;
655 ha->func.reset = ips_reset_copperhead;
656 ha->func.intr = ips_intr_copperhead;
657 ha->func.erasebios = ips_erase_bios;
658 ha->func.programbios = ips_program_bios;
659 ha->func.verifybios = ips_verify_bios;
660 ha->func.enableint = ips_enable_int_copperhead;
662 if (IPS_USE_I2O_DELIVER(ha))
663 ha->func.issue = ips_issue_i2o;
665 ha->func.issue = ips_issue_copperhead;
669 /****************************************************************************/
671 /* Routine Name: ips_release */
673 /* Routine Description: */
675 /* Remove a driver */
677 /****************************************************************************/
679 ips_release(struct Scsi_Host *sh)
685 METHOD_TRACE("ips_release", 1);
687 for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
689 if (i == IPS_MAX_ADAPTERS) {
691 "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
701 /* flush the cache on the controller */
702 scb = &ha->scbs[ha->max_cmds - 1];
704 ips_init_scb(ha, scb);
706 scb->timeout = ips_cmd_timeout;
707 scb->cdb[0] = IPS_CMD_FLUSH;
709 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
710 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
711 scb->cmd.flush_cache.state = IPS_NORM_STATE;
712 scb->cmd.flush_cache.reserved = 0;
713 scb->cmd.flush_cache.reserved2 = 0;
714 scb->cmd.flush_cache.reserved3 = 0;
715 scb->cmd.flush_cache.reserved4 = 0;
717 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
720 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
721 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
723 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
728 /* free extra memory */
731 /* Free I/O Region */
733 release_region(ha->io_addr, ha->io_len);
736 free_irq(ha->irq, ha);
741 ips_released_controllers++;
746 /****************************************************************************/
748 /* Routine Name: ips_halt */
750 /* Routine Description: */
752 /* Perform cleanup when the system reboots */
754 /****************************************************************************/
756 ips_halt(struct notifier_block *nb, ulong event, void *buf)
762 if ((event != SYS_RESTART) && (event != SYS_HALT) &&
763 (event != SYS_POWER_OFF))
764 return (NOTIFY_DONE);
766 for (i = 0; i < ips_next_controller; i++) {
767 ha = (ips_ha_t *) ips_ha[i];
775 /* flush the cache on the controller */
776 scb = &ha->scbs[ha->max_cmds - 1];
778 ips_init_scb(ha, scb);
780 scb->timeout = ips_cmd_timeout;
781 scb->cdb[0] = IPS_CMD_FLUSH;
783 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
784 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
785 scb->cmd.flush_cache.state = IPS_NORM_STATE;
786 scb->cmd.flush_cache.reserved = 0;
787 scb->cmd.flush_cache.reserved2 = 0;
788 scb->cmd.flush_cache.reserved3 = 0;
789 scb->cmd.flush_cache.reserved4 = 0;
791 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
794 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
796 IPS_PRINTK(KERN_WARNING, ha->pcidev,
797 "Incomplete Flush.\n");
799 IPS_PRINTK(KERN_WARNING, ha->pcidev,
800 "Flushing Complete.\n");
806 /****************************************************************************/
808 /* Routine Name: ips_eh_abort */
810 /* Routine Description: */
812 /* Abort a command (using the new error code stuff) */
813 /* Note: this routine is called under the io_request_lock */
814 /****************************************************************************/
816 ips_eh_abort(Scsi_Cmnd * SC)
819 ips_copp_wait_item_t *item;
821 unsigned long cpu_flags;
822 struct Scsi_Host *host;
824 METHOD_TRACE("ips_eh_abort", 1);
829 host = SC->device->host;
830 ha = (ips_ha_t *) SC->device->host->hostdata;
838 IPS_LOCK_SAVE(host->host_lock, cpu_flags);
840 /* See if the command is on the copp queue */
841 item = ha->copp_waitlist.head;
842 while ((item) && (item->scsi_cmd != SC))
847 ips_removeq_copp(&ha->copp_waitlist, item);
850 /* See if the command is on the wait queue */
851 } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
852 /* command not sent yet */
855 /* command must have already been sent */
859 IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
863 /****************************************************************************/
865 /* Routine Name: ips_eh_reset */
867 /* Routine Description: */
869 /* Reset the controller (with new eh error code) */
871 /* NOTE: this routine is called under the io_request_lock spinlock */
873 /****************************************************************************/
875 __ips_eh_reset(Scsi_Cmnd * SC)
881 ips_copp_wait_item_t *item;
883 METHOD_TRACE("ips_eh_reset", 1);
890 DEBUG(1, "Reset called with NULL scsi command");
895 ha = (ips_ha_t *) SC->device->host->hostdata;
898 DEBUG(1, "Reset called with NULL ha struct");
906 /* See if the command is on the copp queue */
907 item = ha->copp_waitlist.head;
908 while ((item) && (item->scsi_cmd != SC))
913 ips_removeq_copp(&ha->copp_waitlist, item);
917 /* See if the command is on the wait queue */
918 if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
919 /* command not sent yet */
923 /* An explanation for the casual observer: */
924 /* Part of the function of a RAID controller is automatic error */
925 /* detection and recovery. As such, the only problem that physically */
926 /* resetting an adapter will ever fix is when, for some reason, */
927 /* the driver is not successfully communicating with the adapter. */
928 /* Therefore, we will attempt to flush this adapter. If that succeeds, */
929 /* then there's no real purpose in a physical reset. This will complete */
930 /* much faster and avoids any problems that might be caused by a */
931 /* physical reset ( such as having to fail all the outstanding I/O's ). */
933 if (ha->ioctl_reset == 0) { /* IF Not an IOCTL Requested Reset */
934 scb = &ha->scbs[ha->max_cmds - 1];
936 ips_init_scb(ha, scb);
938 scb->timeout = ips_cmd_timeout;
939 scb->cdb[0] = IPS_CMD_FLUSH;
941 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
942 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
943 scb->cmd.flush_cache.state = IPS_NORM_STATE;
944 scb->cmd.flush_cache.reserved = 0;
945 scb->cmd.flush_cache.reserved2 = 0;
946 scb->cmd.flush_cache.reserved3 = 0;
947 scb->cmd.flush_cache.reserved4 = 0;
949 /* Attempt the flush command */
950 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
951 if (ret == IPS_SUCCESS) {
952 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
953 "Reset Request - Flushed Cache\n");
958 /* Either we can't communicate with the adapter or it's an IOCTL request */
959 /* from a utility. A physical reset is needed at this point. */
961 ha->ioctl_reset = 0; /* Reset the IOCTL Requested Reset Flag */
964 * command must have already been sent
965 * reset the controller
967 IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
968 ret = (*ha->func.reset) (ha);
973 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
974 "Controller reset failed - controller now offline.\n");
976 /* Now fail all of the active commands */
977 DEBUG_VAR(1, "(%s%d) Failing active commands",
978 ips_name, ha->host_num);
980 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
981 scb->scsi_cmd->result = DID_ERROR << 16;
982 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
983 ips_freescb(ha, scb);
986 /* Now fail all of the pending commands */
987 DEBUG_VAR(1, "(%s%d) Failing pending commands",
988 ips_name, ha->host_num);
990 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
991 scsi_cmd->result = DID_ERROR;
992 scsi_cmd->scsi_done(scsi_cmd);
999 if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
1000 Scsi_Cmnd *scsi_cmd;
1002 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
1003 "Controller reset failed - controller now offline.\n");
1005 /* Now fail all of the active commands */
1006 DEBUG_VAR(1, "(%s%d) Failing active commands",
1007 ips_name, ha->host_num);
1009 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1010 scb->scsi_cmd->result = DID_ERROR << 16;
1011 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1012 ips_freescb(ha, scb);
1015 /* Now fail all of the pending commands */
1016 DEBUG_VAR(1, "(%s%d) Failing pending commands",
1017 ips_name, ha->host_num);
1019 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
1020 scsi_cmd->result = DID_ERROR << 16;
1021 scsi_cmd->scsi_done(scsi_cmd);
1029 if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
1032 do_gettimeofday(&tv);
1033 ha->last_ffdc = tv.tv_sec;
1035 ips_ffdc_reset(ha, IPS_INTR_IORL);
1038 /* Now fail all of the active commands */
1039 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1041 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1042 scb->scsi_cmd->result =
1043 (DID_RESET << 16) | (SUGGEST_RETRY << 24);
1044 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1045 ips_freescb(ha, scb);
1048 /* Reset DCDB active command bits */
1049 for (i = 1; i < ha->nbus; i++)
1050 ha->dcdb_active[i - 1] = 0;
1052 /* Reset the number of active IOCTLs */
1055 ips_next(ha, IPS_INTR_IORL);
1058 #endif /* NO_IPS_RESET */
1063 ips_eh_reset(Scsi_Cmnd * SC)
1067 spin_lock_irq(SC->device->host->host_lock);
1068 rc = __ips_eh_reset(SC);
1069 spin_unlock_irq(SC->device->host->host_lock);
1074 /****************************************************************************/
1076 /* Routine Name: ips_queue */
1078 /* Routine Description: */
1080 /* Send a command to the controller */
1083 /* Linux obtains io_request_lock before calling this function */
1085 /****************************************************************************/
1087 ips_queue(Scsi_Cmnd * SC, void (*done) (Scsi_Cmnd *))
1092 METHOD_TRACE("ips_queue", 1);
1094 ha = (ips_ha_t *) SC->device->host->hostdata;
1102 if (ips_is_passthru(SC)) {
1103 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1104 SC->result = DID_BUS_BUSY << 16;
1109 } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1110 SC->result = DID_BUS_BUSY << 16;
1116 SC->scsi_done = done;
1118 DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1122 SC->device->channel, SC->device->id, SC->device->lun);
1124 /* Check for command to initiator IDs */
1125 if ((scmd_channel(SC) > 0)
1126 && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1127 SC->result = DID_NO_CONNECT << 16;
1133 if (ips_is_passthru(SC)) {
1135 ips_copp_wait_item_t *scratch;
1137 /* A Reset IOCTL is only sent by the boot CD in extreme cases. */
1138 /* There can never be any system activity ( network or disk ), but check */
1139 /* anyway just as a good practice. */
1140 pt = (ips_passthru_t *) SC->request_buffer;
1141 if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1142 (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1143 if (ha->scb_activelist.count != 0) {
1144 SC->result = DID_BUS_BUSY << 16;
1148 ha->ioctl_reset = 1; /* This reset request is from an IOCTL */
1150 SC->result = DID_OK << 16;
1155 /* allocate space for the scribble */
1156 scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1159 SC->result = DID_ERROR << 16;
1165 scratch->scsi_cmd = SC;
1166 scratch->next = NULL;
1168 ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1170 ips_putq_wait_tail(&ha->scb_waitlist, SC);
1173 ips_next(ha, IPS_INTR_IORL);
1178 /****************************************************************************/
1180 /* Routine Name: ips_biosparam */
1182 /* Routine Description: */
1184 /* Set bios geometry for the controller */
1186 /****************************************************************************/
1188 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1189 ips_biosparam(Disk * disk, kdev_t dev, int geom[])
1191 ips_ha_t *ha = (ips_ha_t *) disk->device->host->hostdata;
1192 unsigned long capacity = disk->capacity;
1194 ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1195 sector_t capacity, int geom[])
1197 ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1203 METHOD_TRACE("ips_biosparam", 1);
1206 /* ?!?! host adater info invalid */
1212 if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1213 /* ?!?! Enquiry command failed */
1216 if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1217 heads = IPS_NORM_HEADS;
1218 sectors = IPS_NORM_SECTORS;
1220 heads = IPS_COMP_HEADS;
1221 sectors = IPS_COMP_SECTORS;
1224 cylinders = (unsigned long) capacity / (heads * sectors);
1226 DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1227 heads, sectors, cylinders);
1231 geom[2] = cylinders;
1236 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1238 /* ips_proc24_info is a wrapper around ips_proc_info *
1239 * for compatibility with the 2.4 scsi parameters */
1241 ips_proc24_info(char *buffer, char **start, off_t offset, int length,
1242 int hostno, int func)
1246 for (i = 0; i < ips_next_controller; i++) {
1247 if (ips_sh[i] && ips_sh[i]->host_no == hostno) {
1248 return ips_proc_info(ips_sh[i], buffer, start,
1249 offset, length, func);
1255 /****************************************************************************/
1257 /* Routine Name: ips_select_queue_depth */
1259 /* Routine Description: */
1261 /* Select queue depths for the devices on the contoller */
1263 /****************************************************************************/
1265 ips_select_queue_depth(struct Scsi_Host *host, struct scsi_device * scsi_devs)
1267 struct scsi_device *device;
1273 min = ha->max_cmds / 4;
1275 for (device = scsi_devs; device; device = device->next) {
1276 if (device->host == host) {
1277 if ((device->channel == 0) && (device->type == 0))
1282 for (device = scsi_devs; device; device = device->next) {
1283 if (device->host == host) {
1284 if ((device->channel == 0) && (device->type == 0)) {
1285 device->queue_depth =
1286 (ha->max_cmds - 1) / count;
1287 if (device->queue_depth < min)
1288 device->queue_depth = min;
1290 device->queue_depth = 2;
1293 if (device->queue_depth < 2)
1294 device->queue_depth = 2;
1300 /****************************************************************************/
1302 /* Routine Name: ips_slave_configure */
1304 /* Routine Description: */
1306 /* Set queue depths on devices once scan is complete */
1308 /****************************************************************************/
1310 ips_slave_configure(struct scsi_device * SDptr)
1315 ha = IPS_HA(SDptr->host);
1316 if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1317 min = ha->max_cmds / 2;
1318 if (ha->enq->ucLogDriveCount <= 2)
1319 min = ha->max_cmds - 1;
1320 scsi_adjust_queue_depth(SDptr, MSG_ORDERED_TAG, min);
1323 SDptr->skip_ms_page_8 = 1;
1324 SDptr->skip_ms_page_3f = 1;
1329 /****************************************************************************/
1331 /* Routine Name: do_ipsintr */
1333 /* Routine Description: */
1335 /* Wrapper for the interrupt handler */
1337 /****************************************************************************/
1339 do_ipsintr(int irq, void *dev_id, struct pt_regs * regs)
1342 unsigned long cpu_flags;
1343 struct Scsi_Host *host;
1346 METHOD_TRACE("do_ipsintr", 2);
1348 ha = (ips_ha_t *) dev_id;
1351 host = ips_sh[ha->host_num];
1352 /* interrupt during initialization */
1354 (*ha->func.intr) (ha);
1358 IPS_LOCK_SAVE(host->host_lock, cpu_flags);
1361 IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
1365 irqstatus = (*ha->func.intr) (ha);
1367 IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
1369 /* start the next command */
1370 ips_next(ha, IPS_INTR_ON);
1371 return IRQ_RETVAL(irqstatus);
1374 /****************************************************************************/
1376 /* Routine Name: ips_intr_copperhead */
1378 /* Routine Description: */
1380 /* Polling interrupt handler */
1382 /* ASSUMES interrupts are disabled */
1384 /****************************************************************************/
1386 ips_intr_copperhead(ips_ha_t * ha)
1393 METHOD_TRACE("ips_intr", 2);
1401 intrstatus = (*ha->func.isintr) (ha);
1405 * Unexpected/Shared interrupt
1414 intrstatus = (*ha->func.isintr) (ha);
1419 cstatus.value = (*ha->func.statupd) (ha);
1421 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1422 /* Spurious Interupt ? */
1426 ips_chkstatus(ha, &cstatus);
1427 scb = (ips_scb_t *) sp->scb_addr;
1430 * use the callback function to finish things up
1431 * NOTE: interrupts are OFF for this
1433 (*scb->callback) (ha, scb);
1438 /****************************************************************************/
1440 /* Routine Name: ips_intr_morpheus */
1442 /* Routine Description: */
1444 /* Polling interrupt handler */
1446 /* ASSUMES interrupts are disabled */
1448 /****************************************************************************/
1450 ips_intr_morpheus(ips_ha_t * ha)
1457 METHOD_TRACE("ips_intr_morpheus", 2);
1465 intrstatus = (*ha->func.isintr) (ha);
1469 * Unexpected/Shared interrupt
1478 intrstatus = (*ha->func.isintr) (ha);
1483 cstatus.value = (*ha->func.statupd) (ha);
1485 if (cstatus.value == 0xffffffff)
1486 /* No more to process */
1489 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1490 IPS_PRINTK(KERN_WARNING, ha->pcidev,
1491 "Spurious interrupt; no ccb.\n");
1496 ips_chkstatus(ha, &cstatus);
1497 scb = (ips_scb_t *) sp->scb_addr;
1500 * use the callback function to finish things up
1501 * NOTE: interrupts are OFF for this
1503 (*scb->callback) (ha, scb);
1508 /****************************************************************************/
1510 /* Routine Name: ips_info */
1512 /* Routine Description: */
1514 /* Return info about the driver */
1516 /****************************************************************************/
1518 ips_info(struct Scsi_Host *SH)
1520 static char buffer[256];
1524 METHOD_TRACE("ips_info", 1);
1532 memset(bp, 0, sizeof (buffer));
1534 sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1535 IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1537 if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1539 strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1546 /****************************************************************************/
1548 /* Routine Name: ips_proc_info */
1550 /* Routine Description: */
1552 /* The passthru interface for the driver */
1554 /****************************************************************************/
1556 ips_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
1557 int length, int func)
1561 ips_ha_t *ha = NULL;
1563 METHOD_TRACE("ips_proc_info", 1);
1565 /* Find our host structure */
1566 for (i = 0; i < ips_next_controller; i++) {
1568 if (ips_sh[i] == host) {
1569 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1586 ret = ips_host_info(ha, buffer, offset, length);
1592 /*--------------------------------------------------------------------------*/
1593 /* Helper Functions */
1594 /*--------------------------------------------------------------------------*/
1596 /****************************************************************************/
1598 /* Routine Name: ips_is_passthru */
1600 /* Routine Description: */
1602 /* Determine if the specified SCSI command is really a passthru command */
1604 /****************************************************************************/
1606 ips_is_passthru(Scsi_Cmnd * SC)
1608 unsigned long flags;
1610 METHOD_TRACE("ips_is_passthru", 1);
1615 if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1616 (SC->device->channel == 0) &&
1617 (SC->device->id == IPS_ADAPTER_ID) &&
1618 (SC->device->lun == 0) && SC->request_buffer) {
1619 if ((!SC->use_sg) && SC->request_bufflen &&
1620 (((char *) SC->request_buffer)[0] == 'C') &&
1621 (((char *) SC->request_buffer)[1] == 'O') &&
1622 (((char *) SC->request_buffer)[2] == 'P') &&
1623 (((char *) SC->request_buffer)[3] == 'P'))
1625 else if (SC->use_sg) {
1626 struct scatterlist *sg = SC->request_buffer;
1629 /* kmap_atomic() ensures addressability of the user buffer.*/
1630 /* local_irq_save() protects the KM_IRQ0 address slot. */
1631 local_irq_save(flags);
1632 buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
1633 if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1634 buffer[2] == 'P' && buffer[3] == 'P') {
1635 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1636 local_irq_restore(flags);
1639 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1640 local_irq_restore(flags);
1646 /****************************************************************************/
1648 /* Routine Name: ips_alloc_passthru_buffer */
1650 /* Routine Description: */
1651 /* allocate a buffer large enough for the ioctl data if the ioctl buffer */
1652 /* is too small or doesn't exist */
1653 /****************************************************************************/
1655 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1658 dma_addr_t dma_busaddr;
1660 if (ha->ioctl_data && length <= ha->ioctl_len)
1662 /* there is no buffer or it's not big enough, allocate a new one */
1663 bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr);
1665 /* free the old memory */
1666 pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data,
1668 /* use the new memory */
1669 ha->ioctl_data = (char *) bigger_buf;
1670 ha->ioctl_len = length;
1671 ha->ioctl_busaddr = dma_busaddr;
1678 /****************************************************************************/
1680 /* Routine Name: ips_make_passthru */
1682 /* Routine Description: */
1684 /* Make a passthru command out of the info in the Scsi block */
1686 /****************************************************************************/
1688 ips_make_passthru(ips_ha_t * ha, Scsi_Cmnd * SC, ips_scb_t * scb, int intr)
1694 METHOD_TRACE("ips_make_passthru", 1);
1697 length = SC->request_bufflen;
1699 struct scatterlist *sg = SC->request_buffer;
1701 for (i = 0; i < SC->use_sg; i++)
1702 length += sg[i].length;
1704 if (length < sizeof (ips_passthru_t)) {
1706 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1707 ips_name, ha->host_num);
1708 return (IPS_FAILURE);
1710 if (ips_alloc_passthru_buffer(ha, length)) {
1711 /* allocation failure! If ha->ioctl_data exists, use it to return
1712 some error codes. Return a failed command to the scsi layer. */
1713 if (ha->ioctl_data) {
1714 pt = (ips_passthru_t *) ha->ioctl_data;
1715 ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1716 pt->BasicStatus = 0x0B;
1717 pt->ExtendedStatus = 0x00;
1718 ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1722 ha->ioctl_datasize = length;
1724 ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1725 pt = (ips_passthru_t *) ha->ioctl_data;
1728 * Some notes about the passthru interface used
1730 * IF the scsi op_code == 0x0d then we assume
1731 * that the data came along with/goes with the
1732 * packet we received from the sg driver. In this
1733 * case the CmdBSize field of the pt structure is
1734 * used for the size of the buffer.
1737 switch (pt->CoppCmd) {
1739 memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1740 &ips_num_controllers, sizeof (int));
1741 ips_scmd_buf_write(SC, ha->ioctl_data,
1742 sizeof (ips_passthru_t) + sizeof (int));
1743 SC->result = DID_OK << 16;
1745 return (IPS_SUCCESS_IMM);
1747 case IPS_COPPUSRCMD:
1748 case IPS_COPPIOCCMD:
1749 if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1750 if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1753 "(%s%d) Passthru structure wrong size",
1754 ips_name, ha->host_num);
1756 return (IPS_FAILURE);
1759 if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
1760 pt->CoppCP.cmd.flashfw.op_code ==
1761 IPS_CMD_RW_BIOSFW) {
1762 ret = ips_flash_copperhead(ha, pt, scb);
1763 ips_scmd_buf_write(SC, ha->ioctl_data,
1764 sizeof (ips_passthru_t));
1767 if (ips_usrcmd(ha, pt, scb))
1768 return (IPS_SUCCESS);
1770 return (IPS_FAILURE);
1777 return (IPS_FAILURE);
1780 /****************************************************************************/
1781 /* Routine Name: ips_flash_copperhead */
1782 /* Routine Description: */
1783 /* Flash the BIOS/FW on a Copperhead style controller */
1784 /****************************************************************************/
1786 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1790 /* Trombone is the only copperhead that can do packet flash, but only
1791 * for firmware. No one said it had to make sence. */
1792 if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1793 if (ips_usrcmd(ha, pt, scb))
1798 pt->BasicStatus = 0x0B;
1799 pt->ExtendedStatus = 0;
1800 scb->scsi_cmd->result = DID_OK << 16;
1801 /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can */
1802 /* avoid allocating a huge buffer per adapter ( which can fail ). */
1803 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1804 pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1805 pt->BasicStatus = 0;
1806 return ips_flash_bios(ha, pt, scb);
1807 } else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1808 if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1809 ha->flash_data = ips_FlashData;
1810 ha->flash_busaddr = ips_flashbusaddr;
1811 ha->flash_len = PAGE_SIZE << 7;
1812 ha->flash_datasize = 0;
1813 } else if (!ha->flash_data) {
1814 datasize = pt->CoppCP.cmd.flashfw.total_packets *
1815 pt->CoppCP.cmd.flashfw.count;
1816 ha->flash_data = pci_alloc_consistent(ha->pcidev,
1818 &ha->flash_busaddr);
1819 if (!ha->flash_data){
1820 printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1823 ha->flash_datasize = 0;
1824 ha->flash_len = datasize;
1828 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1830 ips_free_flash_copperhead(ha);
1831 IPS_PRINTK(KERN_WARNING, ha->pcidev,
1832 "failed size sanity check\n");
1836 if (!ha->flash_data)
1838 pt->BasicStatus = 0;
1839 memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1840 pt->CoppCP.cmd.flashfw.count);
1841 ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1842 if (pt->CoppCP.cmd.flashfw.packet_num ==
1843 pt->CoppCP.cmd.flashfw.total_packets - 1) {
1844 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1845 return ips_flash_bios(ha, pt, scb);
1846 else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1847 return ips_flash_firmware(ha, pt, scb);
1849 return IPS_SUCCESS_IMM;
1852 /****************************************************************************/
1853 /* Routine Name: ips_flash_bios */
1854 /* Routine Description: */
1855 /* flashes the bios of a copperhead adapter */
1856 /****************************************************************************/
1858 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1861 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1862 pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1863 if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1864 (!ha->func.verifybios))
1866 if ((*ha->func.erasebios) (ha)) {
1868 "(%s%d) flash bios failed - unable to erase flash",
1869 ips_name, ha->host_num);
1872 if ((*ha->func.programbios) (ha,
1875 ha->flash_datasize -
1876 IPS_BIOS_HEADER, 0)) {
1878 "(%s%d) flash bios failed - unable to flash",
1879 ips_name, ha->host_num);
1882 if ((*ha->func.verifybios) (ha,
1885 ha->flash_datasize -
1886 IPS_BIOS_HEADER, 0)) {
1888 "(%s%d) flash bios failed - unable to verify flash",
1889 ips_name, ha->host_num);
1892 ips_free_flash_copperhead(ha);
1893 return IPS_SUCCESS_IMM;
1894 } else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1895 pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1896 if (!ha->func.erasebios)
1898 if ((*ha->func.erasebios) (ha)) {
1900 "(%s%d) flash bios failed - unable to erase flash",
1901 ips_name, ha->host_num);
1904 return IPS_SUCCESS_IMM;
1907 pt->BasicStatus = 0x0B;
1908 pt->ExtendedStatus = 0x00;
1909 ips_free_flash_copperhead(ha);
1913 /****************************************************************************/
1915 /* Routine Name: ips_fill_scb_sg_single */
1917 /* Routine Description: */
1918 /* Fill in a single scb sg_list element from an address */
1919 /* return a -1 if a breakup occurred */
1920 /****************************************************************************/
1922 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1923 ips_scb_t * scb, int indx, unsigned int e_len)
1928 if ((scb->data_len + e_len) > ha->max_xfer) {
1929 e_len = ha->max_xfer - scb->data_len;
1930 scb->breakup = indx;
1937 if (IPS_USE_ENH_SGLIST(ha)) {
1938 scb->sg_list.enh_list[indx].address_lo =
1939 cpu_to_le32(pci_dma_lo32(busaddr));
1940 scb->sg_list.enh_list[indx].address_hi =
1941 cpu_to_le32(pci_dma_hi32(busaddr));
1942 scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1944 scb->sg_list.std_list[indx].address =
1945 cpu_to_le32(pci_dma_lo32(busaddr));
1946 scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1950 scb->data_len += e_len;
1954 /****************************************************************************/
1955 /* Routine Name: ips_flash_firmware */
1956 /* Routine Description: */
1957 /* flashes the firmware of a copperhead adapter */
1958 /****************************************************************************/
1960 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1962 IPS_SG_LIST sg_list;
1963 uint32_t cmd_busaddr;
1965 if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1966 pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1967 memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1968 pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1969 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1971 pt->BasicStatus = 0x0B;
1972 pt->ExtendedStatus = 0x00;
1973 ips_free_flash_copperhead(ha);
1976 /* Save the S/G list pointer so it doesn't get clobbered */
1977 sg_list.list = scb->sg_list.list;
1978 cmd_busaddr = scb->scb_busaddr;
1979 /* copy in the CP */
1980 memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1981 /* FIX stuff that might be wrong */
1982 scb->sg_list.list = sg_list.list;
1983 scb->scb_busaddr = cmd_busaddr;
1984 scb->bus = scb->scsi_cmd->device->channel;
1985 scb->target_id = scb->scsi_cmd->device->id;
1986 scb->lun = scb->scsi_cmd->device->lun;
1991 scb->callback = ipsintr_done;
1992 scb->timeout = ips_cmd_timeout;
1994 scb->data_len = ha->flash_datasize;
1996 pci_map_single(ha->pcidev, ha->flash_data, scb->data_len,
1998 scb->flags |= IPS_SCB_MAP_SINGLE;
1999 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2000 scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
2002 scb->timeout = pt->TimeOut;
2003 scb->scsi_cmd->result = DID_OK << 16;
2007 /****************************************************************************/
2008 /* Routine Name: ips_free_flash_copperhead */
2009 /* Routine Description: */
2010 /* release the memory resources used to hold the flash image */
2011 /****************************************************************************/
2013 ips_free_flash_copperhead(ips_ha_t * ha)
2015 if (ha->flash_data == ips_FlashData)
2016 test_and_clear_bit(0, &ips_FlashDataInUse);
2017 else if (ha->flash_data)
2018 pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data,
2020 ha->flash_data = NULL;
2023 /****************************************************************************/
2025 /* Routine Name: ips_usrcmd */
2027 /* Routine Description: */
2029 /* Process a user command and make it ready to send */
2031 /****************************************************************************/
2033 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
2035 IPS_SG_LIST sg_list;
2036 uint32_t cmd_busaddr;
2038 METHOD_TRACE("ips_usrcmd", 1);
2040 if ((!scb) || (!pt) || (!ha))
2043 /* Save the S/G list pointer so it doesn't get clobbered */
2044 sg_list.list = scb->sg_list.list;
2045 cmd_busaddr = scb->scb_busaddr;
2046 /* copy in the CP */
2047 memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
2048 memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
2050 /* FIX stuff that might be wrong */
2051 scb->sg_list.list = sg_list.list;
2052 scb->scb_busaddr = cmd_busaddr;
2053 scb->bus = scb->scsi_cmd->device->channel;
2054 scb->target_id = scb->scsi_cmd->device->id;
2055 scb->lun = scb->scsi_cmd->device->lun;
2060 scb->callback = ipsintr_done;
2061 scb->timeout = ips_cmd_timeout;
2062 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
2064 /* we don't support DCDB/READ/WRITE Scatter Gather */
2065 if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
2066 (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
2067 (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
2071 scb->data_len = pt->CmdBSize;
2072 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
2074 scb->data_busaddr = 0L;
2077 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
2078 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
2079 (unsigned long) &scb->
2081 (unsigned long) scb);
2084 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
2085 scb->dcdb.buffer_pointer =
2086 cpu_to_le32(scb->data_busaddr);
2088 scb->cmd.basic_io.sg_addr =
2089 cpu_to_le32(scb->data_busaddr);
2094 scb->timeout = pt->TimeOut;
2096 if (pt->TimeOut <= 10)
2097 scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
2098 else if (pt->TimeOut <= 60)
2099 scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
2101 scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
2104 /* assume success */
2105 scb->scsi_cmd->result = DID_OK << 16;
2111 /****************************************************************************/
2113 /* Routine Name: ips_cleanup_passthru */
2115 /* Routine Description: */
2117 /* Cleanup after a passthru command */
2119 /****************************************************************************/
2121 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
2125 METHOD_TRACE("ips_cleanup_passthru", 1);
2127 if ((!scb) || (!scb->scsi_cmd) || (!scb->scsi_cmd->request_buffer)) {
2128 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2129 ips_name, ha->host_num);
2133 pt = (ips_passthru_t *) ha->ioctl_data;
2135 /* Copy data back to the user */
2136 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB) /* Copy DCDB Back to Caller's Area */
2137 memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2139 pt->BasicStatus = scb->basic_status;
2140 pt->ExtendedStatus = scb->extended_status;
2141 pt->AdapterType = ha->ad_type;
2143 if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
2144 (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2145 scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2146 ips_free_flash_copperhead(ha);
2148 ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2151 /****************************************************************************/
2153 /* Routine Name: ips_host_info */
2155 /* Routine Description: */
2157 /* The passthru interface for the driver */
2159 /****************************************************************************/
2161 ips_host_info(ips_ha_t * ha, char *ptr, off_t offset, int len)
2165 METHOD_TRACE("ips_host_info", 1);
2169 info.offset = offset;
2173 copy_info(&info, "\nIBM ServeRAID General Information:\n\n");
2175 if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2176 (le16_to_cpu(ha->nvram->adapter_type) != 0))
2177 copy_info(&info, "\tController Type : %s\n",
2178 ips_adapter_name[ha->ad_type - 1]);
2181 "\tController Type : Unknown\n");
2185 "\tIO region : 0x%lx (%d bytes)\n",
2186 ha->io_addr, ha->io_len);
2190 "\tMemory region : 0x%lx (%d bytes)\n",
2191 ha->mem_addr, ha->mem_len);
2193 "\tShared memory address : 0x%lx\n",
2197 copy_info(&info, "\tIRQ number : %d\n", ha->irq);
2199 /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2200 /* That keeps everything happy for "text" operations on the proc file. */
2202 if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2203 if (ha->nvram->bios_low[3] == 0) {
2205 "\tBIOS Version : %c%c%c%c%c%c%c\n",
2206 ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2207 ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2208 ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2209 ha->nvram->bios_low[2]);
2213 "\tBIOS Version : %c%c%c%c%c%c%c%c\n",
2214 ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2215 ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2216 ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2217 ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2222 if (ha->enq->CodeBlkVersion[7] == 0) {
2224 "\tFirmware Version : %c%c%c%c%c%c%c\n",
2225 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2226 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2227 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2228 ha->enq->CodeBlkVersion[6]);
2231 "\tFirmware Version : %c%c%c%c%c%c%c%c\n",
2232 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2233 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2234 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2235 ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2238 if (ha->enq->BootBlkVersion[7] == 0) {
2240 "\tBoot Block Version : %c%c%c%c%c%c%c\n",
2241 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2242 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2243 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2244 ha->enq->BootBlkVersion[6]);
2247 "\tBoot Block Version : %c%c%c%c%c%c%c%c\n",
2248 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2249 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2250 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2251 ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2254 copy_info(&info, "\tDriver Version : %s%s\n",
2255 IPS_VERSION_HIGH, IPS_VERSION_LOW);
2257 copy_info(&info, "\tDriver Build : %d\n",
2260 copy_info(&info, "\tMax Physical Devices : %d\n",
2261 ha->enq->ucMaxPhysicalDevices);
2262 copy_info(&info, "\tMax Active Commands : %d\n",
2264 copy_info(&info, "\tCurrent Queued Commands : %d\n",
2265 ha->scb_waitlist.count);
2266 copy_info(&info, "\tCurrent Active Commands : %d\n",
2267 ha->scb_activelist.count - ha->num_ioctl);
2268 copy_info(&info, "\tCurrent Queued PT Commands : %d\n",
2269 ha->copp_waitlist.count);
2270 copy_info(&info, "\tCurrent Active PT Commands : %d\n",
2273 copy_info(&info, "\n");
2275 return (info.localpos);
2278 /****************************************************************************/
2280 /* Routine Name: copy_mem_info */
2282 /* Routine Description: */
2284 /* Copy data into an IPS_INFOSTR structure */
2286 /****************************************************************************/
2288 copy_mem_info(IPS_INFOSTR * info, char *data, int len)
2290 METHOD_TRACE("copy_mem_info", 1);
2292 if (info->pos + len < info->offset) {
2297 if (info->pos < info->offset) {
2298 data += (info->offset - info->pos);
2299 len -= (info->offset - info->pos);
2300 info->pos += (info->offset - info->pos);
2303 if (info->localpos + len > info->length)
2304 len = info->length - info->localpos;
2307 memcpy(info->buffer + info->localpos, data, len);
2309 info->localpos += len;
2313 /****************************************************************************/
2315 /* Routine Name: copy_info */
2317 /* Routine Description: */
2319 /* printf style wrapper for an info structure */
2321 /****************************************************************************/
2323 copy_info(IPS_INFOSTR * info, char *fmt, ...)
2329 METHOD_TRACE("copy_info", 1);
2331 va_start(args, fmt);
2332 len = vsprintf(buf, fmt, args);
2335 copy_mem_info(info, buf, len);
2340 /****************************************************************************/
2342 /* Routine Name: ips_identify_controller */
2344 /* Routine Description: */
2346 /* Identify this controller */
2348 /****************************************************************************/
2350 ips_identify_controller(ips_ha_t * ha)
2352 METHOD_TRACE("ips_identify_controller", 1);
2354 switch (ha->device_id) {
2355 case IPS_DEVICEID_COPPERHEAD:
2356 if (ha->revision_id <= IPS_REVID_SERVERAID) {
2357 ha->ad_type = IPS_ADTYPE_SERVERAID;
2358 } else if (ha->revision_id == IPS_REVID_SERVERAID2) {
2359 ha->ad_type = IPS_ADTYPE_SERVERAID2;
2360 } else if (ha->revision_id == IPS_REVID_NAVAJO) {
2361 ha->ad_type = IPS_ADTYPE_NAVAJO;
2362 } else if ((ha->revision_id == IPS_REVID_SERVERAID2)
2363 && (ha->slot_num == 0)) {
2364 ha->ad_type = IPS_ADTYPE_KIOWA;
2365 } else if ((ha->revision_id >= IPS_REVID_CLARINETP1) &&
2366 (ha->revision_id <= IPS_REVID_CLARINETP3)) {
2367 if (ha->enq->ucMaxPhysicalDevices == 15)
2368 ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2370 ha->ad_type = IPS_ADTYPE_SERVERAID3;
2371 } else if ((ha->revision_id >= IPS_REVID_TROMBONE32) &&
2372 (ha->revision_id <= IPS_REVID_TROMBONE64)) {
2373 ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2377 case IPS_DEVICEID_MORPHEUS:
2378 switch (ha->subdevice_id) {
2379 case IPS_SUBDEVICEID_4L:
2380 ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2383 case IPS_SUBDEVICEID_4M:
2384 ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2387 case IPS_SUBDEVICEID_4MX:
2388 ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2391 case IPS_SUBDEVICEID_4LX:
2392 ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2395 case IPS_SUBDEVICEID_5I2:
2396 ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2399 case IPS_SUBDEVICEID_5I1:
2400 ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2406 case IPS_DEVICEID_MARCO:
2407 switch (ha->subdevice_id) {
2408 case IPS_SUBDEVICEID_6M:
2409 ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2411 case IPS_SUBDEVICEID_6I:
2412 ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2414 case IPS_SUBDEVICEID_7k:
2415 ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2417 case IPS_SUBDEVICEID_7M:
2418 ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2425 /****************************************************************************/
2427 /* Routine Name: ips_get_bios_version */
2429 /* Routine Description: */
2431 /* Get the BIOS revision number */
2433 /****************************************************************************/
2435 ips_get_bios_version(ips_ha_t * ha, int intr)
2444 { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2447 METHOD_TRACE("ips_get_bios_version", 1);
2452 strncpy(ha->bios_version, " ?", 8);
2454 if (ha->device_id == IPS_DEVICEID_COPPERHEAD) {
2455 if (IPS_USE_MEMIO(ha)) {
2456 /* Memory Mapped I/O */
2459 writel(0, ha->mem_ptr + IPS_REG_FLAP);
2460 if (ha->revision_id == IPS_REVID_TROMBONE64)
2461 udelay(25); /* 25 us */
2463 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2466 writel(1, ha->mem_ptr + IPS_REG_FLAP);
2467 if (ha->revision_id == IPS_REVID_TROMBONE64)
2468 udelay(25); /* 25 us */
2470 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2473 /* Get Major version */
2474 writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2475 if (ha->revision_id == IPS_REVID_TROMBONE64)
2476 udelay(25); /* 25 us */
2478 major = readb(ha->mem_ptr + IPS_REG_FLDP);
2480 /* Get Minor version */
2481 writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2482 if (ha->revision_id == IPS_REVID_TROMBONE64)
2483 udelay(25); /* 25 us */
2484 minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2486 /* Get SubMinor version */
2487 writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2488 if (ha->revision_id == IPS_REVID_TROMBONE64)
2489 udelay(25); /* 25 us */
2490 subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2493 /* Programmed I/O */
2496 outl(0, ha->io_addr + IPS_REG_FLAP);
2497 if (ha->revision_id == IPS_REVID_TROMBONE64)
2498 udelay(25); /* 25 us */
2500 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2503 outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
2504 if (ha->revision_id == IPS_REVID_TROMBONE64)
2505 udelay(25); /* 25 us */
2507 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2510 /* Get Major version */
2511 outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP);
2512 if (ha->revision_id == IPS_REVID_TROMBONE64)
2513 udelay(25); /* 25 us */
2515 major = inb(ha->io_addr + IPS_REG_FLDP);
2517 /* Get Minor version */
2518 outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP);
2519 if (ha->revision_id == IPS_REVID_TROMBONE64)
2520 udelay(25); /* 25 us */
2522 minor = inb(ha->io_addr + IPS_REG_FLDP);
2524 /* Get SubMinor version */
2525 outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP);
2526 if (ha->revision_id == IPS_REVID_TROMBONE64)
2527 udelay(25); /* 25 us */
2529 subminor = inb(ha->io_addr + IPS_REG_FLDP);
2533 /* Morpheus Family - Send Command to the card */
2535 buffer = ha->ioctl_data;
2537 memset(buffer, 0, 0x1000);
2539 scb = &ha->scbs[ha->max_cmds - 1];
2541 ips_init_scb(ha, scb);
2543 scb->timeout = ips_cmd_timeout;
2544 scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2546 scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2547 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2548 scb->cmd.flashfw.type = 1;
2549 scb->cmd.flashfw.direction = 0;
2550 scb->cmd.flashfw.count = cpu_to_le32(0x800);
2551 scb->cmd.flashfw.total_packets = 1;
2552 scb->cmd.flashfw.packet_num = 0;
2553 scb->data_len = 0x1000;
2554 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2556 /* issue the command */
2558 ips_send_wait(ha, scb, ips_cmd_timeout,
2559 intr)) == IPS_FAILURE)
2560 || (ret == IPS_SUCCESS_IMM)
2561 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2562 /* Error occurred */
2567 if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2568 major = buffer[0x1ff + 0xC0]; /* Offset 0x1ff after the header (0xc0) */
2569 minor = buffer[0x1fe + 0xC0]; /* Offset 0x1fe after the header (0xc0) */
2570 subminor = buffer[0x1fd + 0xC0]; /* Offset 0x1fd after the header (0xc0) */
2576 ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4];
2577 ha->bios_version[1] = '.';
2578 ha->bios_version[2] = hexDigits[major & 0x0F];
2579 ha->bios_version[3] = hexDigits[subminor];
2580 ha->bios_version[4] = '.';
2581 ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4];
2582 ha->bios_version[6] = hexDigits[minor & 0x0F];
2583 ha->bios_version[7] = 0;
2586 /****************************************************************************/
2588 /* Routine Name: ips_hainit */
2590 /* Routine Description: */
2592 /* Initialize the controller */
2594 /* NOTE: Assumes to be called from with a lock */
2596 /****************************************************************************/
2598 ips_hainit(ips_ha_t * ha)
2603 METHOD_TRACE("ips_hainit", 1);
2608 if (ha->func.statinit)
2609 (*ha->func.statinit) (ha);
2611 if (ha->func.enableint)
2612 (*ha->func.enableint) (ha);
2615 ha->reset_count = 1;
2616 do_gettimeofday(&tv);
2617 ha->last_ffdc = tv.tv_sec;
2618 ips_ffdc_reset(ha, IPS_INTR_IORL);
2620 if (!ips_read_config(ha, IPS_INTR_IORL)) {
2621 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2622 "unable to read config from controller.\n");
2627 if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2628 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2629 "unable to read controller status.\n");
2634 /* Identify this controller */
2635 ips_identify_controller(ha);
2637 if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2638 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2639 "unable to read subsystem parameters.\n");
2644 /* write nvram user page 5 */
2645 if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2646 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2647 "unable to write driver info to controller.\n");
2652 /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2653 if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2654 ips_clear_adapter(ha, IPS_INTR_IORL);
2656 /* set limits on SID, LUN, BUS */
2657 ha->ntargets = IPS_MAX_TARGETS + 1;
2659 ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2661 switch (ha->conf->logical_drive[0].ucStripeSize) {
2663 ha->max_xfer = 0x10000;
2667 ha->max_xfer = 0x20000;
2671 ha->max_xfer = 0x40000;
2676 ha->max_xfer = 0x80000;
2680 /* setup max concurrent commands */
2681 if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2682 /* Use the new method */
2683 ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2685 /* use the old method */
2686 switch (ha->conf->logical_drive[0].ucStripeSize) {
2706 /* Limit the Active Commands on a Lite Adapter */
2707 if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2708 (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2709 (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2710 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2711 ha->max_cmds = MaxLiteCmds;
2714 /* set controller IDs */
2715 ha->ha_id[0] = IPS_ADAPTER_ID;
2716 for (i = 1; i < ha->nbus; i++) {
2717 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2718 ha->dcdb_active[i - 1] = 0;
2724 /****************************************************************************/
2726 /* Routine Name: ips_next */
2728 /* Routine Description: */
2730 /* Take the next command off the queue and send it to the controller */
2732 /****************************************************************************/
2734 ips_next(ips_ha_t * ha, int intr)
2740 ips_copp_wait_item_t *item;
2742 unsigned long cpu_flags = 0;
2743 struct Scsi_Host *host;
2744 METHOD_TRACE("ips_next", 1);
2748 host = ips_sh[ha->host_num];
2750 * Block access to the queue function so
2751 * this command won't time out
2753 if (intr == IPS_INTR_ON)
2754 IPS_LOCK_SAVE(host->host_lock, cpu_flags);
2756 if ((ha->subsys->param[3] & 0x300000)
2757 && (ha->scb_activelist.count == 0)) {
2760 do_gettimeofday(&tv);
2762 if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) {
2763 ha->last_ffdc = tv.tv_sec;
2769 * Send passthru commands
2770 * These have priority over normal I/O
2771 * but shouldn't affect performance too much
2772 * since we limit the number that can be active
2773 * on the card at any one time
2775 while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2776 (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2778 item = ips_removeq_copp_head(&ha->copp_waitlist);
2780 if (intr == IPS_INTR_ON)
2781 IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
2782 scb->scsi_cmd = item->scsi_cmd;
2785 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2787 if (intr == IPS_INTR_ON)
2788 IPS_LOCK_SAVE(host->host_lock, cpu_flags);
2791 if (scb->scsi_cmd) {
2792 scb->scsi_cmd->result = DID_ERROR << 16;
2793 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2796 ips_freescb(ha, scb);
2798 case IPS_SUCCESS_IMM:
2799 if (scb->scsi_cmd) {
2800 scb->scsi_cmd->result = DID_OK << 16;
2801 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2804 ips_freescb(ha, scb);
2810 if (ret != IPS_SUCCESS) {
2815 ret = ips_send_cmd(ha, scb);
2817 if (ret == IPS_SUCCESS)
2818 ips_putq_scb_head(&ha->scb_activelist, scb);
2824 if (scb->scsi_cmd) {
2825 scb->scsi_cmd->result = DID_ERROR << 16;
2828 ips_freescb(ha, scb);
2830 case IPS_SUCCESS_IMM:
2831 ips_freescb(ha, scb);
2840 * Send "Normal" I/O commands
2843 p = ha->scb_waitlist.head;
2844 while ((p) && (scb = ips_getscb(ha))) {
2845 if ((scmd_channel(p) > 0)
2847 dcdb_active[scmd_channel(p) -
2848 1] & (1 << scmd_id(p)))) {
2849 ips_freescb(ha, scb);
2850 p = (Scsi_Cmnd *) p->host_scribble;
2855 SC = ips_removeq_wait(&ha->scb_waitlist, q);
2857 if (intr == IPS_INTR_ON)
2858 IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags); /* Unlock HA after command is taken off queue */
2860 SC->result = DID_OK;
2861 SC->host_scribble = NULL;
2863 memset(SC->sense_buffer, 0, sizeof (SC->sense_buffer));
2865 scb->target_id = SC->device->id;
2866 scb->lun = SC->device->lun;
2867 scb->bus = SC->device->channel;
2871 scb->callback = ipsintr_done;
2872 scb->timeout = ips_cmd_timeout;
2873 memset(&scb->cmd, 0, 16);
2875 /* copy in the CDB */
2876 memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2878 /* Now handle the data buffer */
2880 struct scatterlist *sg;
2883 sg = SC->request_buffer;
2884 scb->sg_count = pci_map_sg(ha->pcidev, sg, SC->use_sg,
2885 SC->sc_data_direction);
2886 scb->flags |= IPS_SCB_MAP_SG;
2887 for (i = 0; i < scb->sg_count; i++) {
2888 if (ips_fill_scb_sg_single
2889 (ha, sg_dma_address(&sg[i]), scb, i,
2890 sg_dma_len(&sg[i])) < 0)
2893 scb->dcdb.transfer_length = scb->data_len;
2895 if (SC->request_bufflen) {
2897 pci_map_single(ha->pcidev,
2899 SC->request_bufflen,
2900 SC->sc_data_direction);
2901 scb->flags |= IPS_SCB_MAP_SINGLE;
2902 ips_fill_scb_sg_single(ha, scb->data_busaddr,
2904 SC->request_bufflen);
2905 scb->dcdb.transfer_length = scb->data_len;
2907 scb->data_busaddr = 0L;
2910 scb->dcdb.transfer_length = 0;
2915 scb->dcdb.cmd_attribute =
2916 ips_command_direction[scb->scsi_cmd->cmnd[0]];
2918 /* Allow a WRITE BUFFER Command to Have no Data */
2919 /* This is Used by Tape Flash Utilites */
2920 if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) && (scb->data_len == 0))
2921 scb->dcdb.cmd_attribute = 0;
2923 if (!(scb->dcdb.cmd_attribute & 0x3))
2924 scb->dcdb.transfer_length = 0;
2926 if (scb->data_len >= IPS_MAX_XFER) {
2927 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2928 scb->dcdb.transfer_length = 0;
2930 if (intr == IPS_INTR_ON)
2931 IPS_LOCK_SAVE(host->host_lock, cpu_flags);
2933 ret = ips_send_cmd(ha, scb);
2937 ips_putq_scb_head(&ha->scb_activelist, scb);
2940 if (scb->scsi_cmd) {
2941 scb->scsi_cmd->result = DID_ERROR << 16;
2942 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2946 ha->dcdb_active[scb->bus - 1] &=
2947 ~(1 << scb->target_id);
2949 ips_freescb(ha, scb);
2951 case IPS_SUCCESS_IMM:
2953 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2956 ha->dcdb_active[scb->bus - 1] &=
2957 ~(1 << scb->target_id);
2959 ips_freescb(ha, scb);
2965 p = (Scsi_Cmnd *) p->host_scribble;
2969 if (intr == IPS_INTR_ON)
2970 IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
2973 /****************************************************************************/
2975 /* Routine Name: ips_putq_scb_head */
2977 /* Routine Description: */
2979 /* Add an item to the head of the queue */
2981 /* ASSUMED to be called from within the HA lock */
2983 /****************************************************************************/
2985 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2987 METHOD_TRACE("ips_putq_scb_head", 1);
2992 item->q_next = queue->head;
3001 /****************************************************************************/
3003 /* Routine Name: ips_removeq_scb_head */
3005 /* Routine Description: */
3007 /* Remove the head of the queue */
3009 /* ASSUMED to be called from within the HA lock */
3011 /****************************************************************************/
3013 ips_removeq_scb_head(ips_scb_queue_t * queue)
3017 METHOD_TRACE("ips_removeq_scb_head", 1);
3025 queue->head = item->q_next;
3026 item->q_next = NULL;
3028 if (queue->tail == item)
3036 /****************************************************************************/
3038 /* Routine Name: ips_removeq_scb */
3040 /* Routine Description: */
3042 /* Remove an item from a queue */
3044 /* ASSUMED to be called from within the HA lock */
3046 /****************************************************************************/
3048 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
3052 METHOD_TRACE("ips_removeq_scb", 1);
3057 if (item == queue->head) {
3058 return (ips_removeq_scb_head(queue));
3063 while ((p) && (item != p->q_next))
3068 p->q_next = item->q_next;
3073 item->q_next = NULL;
3082 /****************************************************************************/
3084 /* Routine Name: ips_putq_wait_tail */
3086 /* Routine Description: */
3088 /* Add an item to the tail of the queue */
3090 /* ASSUMED to be called from within the HA lock */
3092 /****************************************************************************/
3094 ips_putq_wait_tail(ips_wait_queue_t * queue, Scsi_Cmnd * item)
3096 METHOD_TRACE("ips_putq_wait_tail", 1);
3101 item->host_scribble = NULL;
3104 queue->tail->host_scribble = (char *) item;
3114 /****************************************************************************/
3116 /* Routine Name: ips_removeq_wait_head */
3118 /* Routine Description: */
3120 /* Remove the head of the queue */
3122 /* ASSUMED to be called from within the HA lock */
3124 /****************************************************************************/
3126 ips_removeq_wait_head(ips_wait_queue_t * queue)
3130 METHOD_TRACE("ips_removeq_wait_head", 1);
3138 queue->head = (Scsi_Cmnd *) item->host_scribble;
3139 item->host_scribble = NULL;
3141 if (queue->tail == item)
3149 /****************************************************************************/
3151 /* Routine Name: ips_removeq_wait */
3153 /* Routine Description: */
3155 /* Remove an item from a queue */
3157 /* ASSUMED to be called from within the HA lock */
3159 /****************************************************************************/
3161 ips_removeq_wait(ips_wait_queue_t * queue, Scsi_Cmnd * item)
3165 METHOD_TRACE("ips_removeq_wait", 1);
3170 if (item == queue->head) {
3171 return (ips_removeq_wait_head(queue));
3176 while ((p) && (item != (Scsi_Cmnd *) p->host_scribble))
3177 p = (Scsi_Cmnd *) p->host_scribble;
3181 p->host_scribble = item->host_scribble;
3183 if (!item->host_scribble)
3186 item->host_scribble = NULL;
3195 /****************************************************************************/
3197 /* Routine Name: ips_putq_copp_tail */
3199 /* Routine Description: */
3201 /* Add an item to the tail of the queue */
3203 /* ASSUMED to be called from within the HA lock */
3205 /****************************************************************************/
3207 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3209 METHOD_TRACE("ips_putq_copp_tail", 1);
3217 queue->tail->next = item;
3227 /****************************************************************************/
3229 /* Routine Name: ips_removeq_copp_head */
3231 /* Routine Description: */
3233 /* Remove the head of the queue */
3235 /* ASSUMED to be called from within the HA lock */
3237 /****************************************************************************/
3238 static ips_copp_wait_item_t *
3239 ips_removeq_copp_head(ips_copp_queue_t * queue)
3241 ips_copp_wait_item_t *item;
3243 METHOD_TRACE("ips_removeq_copp_head", 1);
3251 queue->head = item->next;
3254 if (queue->tail == item)
3262 /****************************************************************************/
3264 /* Routine Name: ips_removeq_copp */
3266 /* Routine Description: */
3268 /* Remove an item from a queue */
3270 /* ASSUMED to be called from within the HA lock */
3272 /****************************************************************************/
3273 static ips_copp_wait_item_t *
3274 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3276 ips_copp_wait_item_t *p;
3278 METHOD_TRACE("ips_removeq_copp", 1);
3283 if (item == queue->head) {
3284 return (ips_removeq_copp_head(queue));
3289 while ((p) && (item != p->next))
3294 p->next = item->next;
3308 /****************************************************************************/
3310 /* Routine Name: ipsintr_blocking */
3312 /* Routine Description: */
3314 /* Finalize an interrupt for internal commands */
3316 /****************************************************************************/
3318 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3320 METHOD_TRACE("ipsintr_blocking", 2);
3322 ips_freescb(ha, scb);
3323 if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3324 ha->waitflag = FALSE;
3330 /****************************************************************************/
3332 /* Routine Name: ipsintr_done */
3334 /* Routine Description: */
3336 /* Finalize an interrupt for non-internal commands */
3338 /****************************************************************************/
3340 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3342 METHOD_TRACE("ipsintr_done", 2);
3345 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3346 "Spurious interrupt; scb NULL.\n");
3351 if (scb->scsi_cmd == NULL) {
3352 /* unexpected interrupt */
3353 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3354 "Spurious interrupt; scsi_cmd not set.\n");
3362 /****************************************************************************/
3364 /* Routine Name: ips_done */
3366 /* Routine Description: */
3368 /* Do housekeeping on completed commands */
3369 /* ASSUMED to be called form within the request lock */
3370 /****************************************************************************/
3372 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3376 METHOD_TRACE("ips_done", 1);
3381 if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3382 ips_cleanup_passthru(ha, scb);
3386 * Check to see if this command had too much
3387 * data and had to be broke up. If so, queue
3388 * the rest of the data and continue.
3390 if ((scb->breakup) || (scb->sg_break)) {
3391 /* we had a data breakup */
3394 if (scb->sg_count) {
3396 struct scatterlist *sg;
3397 int ips_sg_index = 0;
3400 sg = scb->scsi_cmd->request_buffer;
3402 /* Spin forward to last dma chunk */
3403 sg_dma_index = scb->breakup;
3405 /* Take care of possible partial on last chunk */
3406 ips_fill_scb_sg_single(ha,
3409 scb, ips_sg_index++,
3413 for (; sg_dma_index < scb->sg_count;
3415 if (ips_fill_scb_sg_single
3417 sg_dma_address(&sg[sg_dma_index]),
3418 scb, ips_sg_index++,
3419 sg_dma_len(&sg[sg_dma_index])) < 0)
3425 /* Non S/G Request */
3426 (void) ips_fill_scb_sg_single(ha,
3438 scb->dcdb.transfer_length = scb->data_len;
3439 scb->dcdb.cmd_attribute |=
3440 ips_command_direction[scb->scsi_cmd->cmnd[0]];
3442 if (!(scb->dcdb.cmd_attribute & 0x3))
3443 scb->dcdb.transfer_length = 0;
3445 if (scb->data_len >= IPS_MAX_XFER) {
3446 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3447 scb->dcdb.transfer_length = 0;
3450 ret = ips_send_cmd(ha, scb);
3454 if (scb->scsi_cmd) {
3455 scb->scsi_cmd->result = DID_ERROR << 16;
3456 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3459 ips_freescb(ha, scb);
3461 case IPS_SUCCESS_IMM:
3462 if (scb->scsi_cmd) {
3463 scb->scsi_cmd->result = DID_ERROR << 16;
3464 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3467 ips_freescb(ha, scb);
3475 } /* end if passthru */
3478 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3481 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3483 ips_freescb(ha, scb);
3486 /****************************************************************************/
3488 /* Routine Name: ips_map_status */
3490 /* Routine Description: */
3492 /* Map Controller Error codes to Linux Error Codes */
3494 /****************************************************************************/
3496 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3500 uint32_t transfer_len;
3501 IPS_DCDB_TABLE_TAPE *tapeDCDB;
3503 METHOD_TRACE("ips_map_status", 1);
3507 "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3508 ips_name, ha->host_num,
3509 scb->scsi_cmd->device->channel,
3510 scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3511 scb->basic_status, scb->extended_status,
3512 scb->extended_status ==
3513 IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3514 scb->extended_status ==
3515 IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3516 scb->extended_status ==
3517 IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3520 /* default driver error */
3521 errcode = DID_ERROR;
3524 switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3525 case IPS_CMD_TIMEOUT:
3526 errcode = DID_TIME_OUT;
3529 case IPS_INVAL_OPCO:
3530 case IPS_INVAL_CMD_BLK:
3531 case IPS_INVAL_PARM_BLK:
3533 case IPS_CMD_CMPLT_WERROR:
3536 case IPS_PHYS_DRV_ERROR:
3537 switch (scb->extended_status) {
3538 case IPS_ERR_SEL_TO:
3540 errcode = DID_NO_CONNECT;
3544 case IPS_ERR_OU_RUN:
3545 if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3546 (scb->cmd.dcdb.op_code ==
3547 IPS_CMD_EXTENDED_DCDB_SG)) {
3548 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3549 transfer_len = tapeDCDB->transfer_length;
3552 (uint32_t) scb->dcdb.transfer_length;
3555 if ((scb->bus) && (transfer_len < scb->data_len)) {
3556 /* Underrun - set default to no error */
3559 /* Restrict access to physical DASD */
3560 if ((scb->scsi_cmd->cmnd[0] == INQUIRY) &&
3561 ((((char *) scb->scsi_cmd->
3562 buffer)[0] & 0x1f) == TYPE_DISK)) {
3563 /* underflow -- no error */
3564 /* restrict access to physical DASD */
3565 errcode = DID_TIME_OUT;
3569 errcode = DID_ERROR;
3573 case IPS_ERR_RECOVERY:
3574 /* don't fail recovered errors */
3580 case IPS_ERR_HOST_RESET:
3581 case IPS_ERR_DEV_RESET:
3582 errcode = DID_RESET;
3585 case IPS_ERR_CKCOND:
3587 if ((scb->cmd.dcdb.op_code ==
3588 IPS_CMD_EXTENDED_DCDB)
3589 || (scb->cmd.dcdb.op_code ==
3590 IPS_CMD_EXTENDED_DCDB_SG)) {
3592 (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3593 memcpy(scb->scsi_cmd->sense_buffer,
3594 tapeDCDB->sense_info,
3595 sizeof (scb->scsi_cmd->
3598 memcpy(scb->scsi_cmd->sense_buffer,
3599 scb->dcdb.sense_info,
3600 sizeof (scb->scsi_cmd->
3603 device_error = 2; /* check condition */
3611 errcode = DID_ERROR;
3617 scb->scsi_cmd->result = device_error | (errcode << 16);
3622 /****************************************************************************/
3624 /* Routine Name: ips_send_wait */
3626 /* Routine Description: */
3628 /* Send a command to the controller and wait for it to return */
3630 /* The FFDC Time Stamp use this function for the callback, but doesn't */
3631 /* actually need to wait. */
3632 /****************************************************************************/
3634 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3638 METHOD_TRACE("ips_send_wait", 1);
3640 if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */
3641 ha->waitflag = TRUE;
3642 ha->cmd_in_progress = scb->cdb[0];
3644 scb->callback = ipsintr_blocking;
3645 ret = ips_send_cmd(ha, scb);
3647 if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3650 if (intr != IPS_FFDC) /* Don't Wait around if this is a Time Stamp */
3651 ret = ips_wait(ha, timeout, intr);
3656 /****************************************************************************/
3658 /* Routine Name: ips_scmd_buf_write */
3660 /* Routine Description: */
3661 /* Write data to Scsi_Cmnd request_buffer at proper offsets */
3662 /****************************************************************************/
3664 ips_scmd_buf_write(Scsi_Cmnd * scmd, void *data, unsigned
3669 unsigned int min_cnt, xfer_cnt;
3670 char *cdata = (char *) data;
3671 unsigned char *buffer;
3672 unsigned long flags;
3673 struct scatterlist *sg = scmd->request_buffer;
3674 for (i = 0, xfer_cnt = 0;
3675 (i < scmd->use_sg) && (xfer_cnt < count); i++) {
3676 min_cnt = min(count - xfer_cnt, sg[i].length);
3678 /* kmap_atomic() ensures addressability of the data buffer.*/
3679 /* local_irq_save() protects the KM_IRQ0 address slot. */
3680 local_irq_save(flags);
3681 buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3682 memcpy(buffer, &cdata[xfer_cnt], min_cnt);
3683 kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3684 local_irq_restore(flags);
3686 xfer_cnt += min_cnt;
3690 unsigned int min_cnt = min(count, scmd->request_bufflen);
3691 memcpy(scmd->request_buffer, data, min_cnt);
3695 /****************************************************************************/
3697 /* Routine Name: ips_scmd_buf_read */
3699 /* Routine Description: */
3700 /* Copy data from a Scsi_Cmnd to a new, linear buffer */
3701 /****************************************************************************/
3703 ips_scmd_buf_read(Scsi_Cmnd * scmd, void *data, unsigned
3708 unsigned int min_cnt, xfer_cnt;
3709 char *cdata = (char *) data;
3710 unsigned char *buffer;
3711 unsigned long flags;
3712 struct scatterlist *sg = scmd->request_buffer;
3713 for (i = 0, xfer_cnt = 0;
3714 (i < scmd->use_sg) && (xfer_cnt < count); i++) {
3715 min_cnt = min(count - xfer_cnt, sg[i].length);
3717 /* kmap_atomic() ensures addressability of the data buffer.*/
3718 /* local_irq_save() protects the KM_IRQ0 address slot. */
3719 local_irq_save(flags);
3720 buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3721 memcpy(&cdata[xfer_cnt], buffer, min_cnt);
3722 kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3723 local_irq_restore(flags);
3725 xfer_cnt += min_cnt;
3729 unsigned int min_cnt = min(count, scmd->request_bufflen);
3730 memcpy(data, scmd->request_buffer, min_cnt);
3734 /****************************************************************************/
3736 /* Routine Name: ips_send_cmd */
3738 /* Routine Description: */
3740 /* Map SCSI commands to ServeRAID commands for logical drives */
3742 /****************************************************************************/
3744 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3749 IPS_DCDB_TABLE_TAPE *tapeDCDB;
3752 METHOD_TRACE("ips_send_cmd", 1);
3756 if (!scb->scsi_cmd) {
3757 /* internal command */
3760 /* Controller commands can't be issued */
3761 /* to real devices -- fail them */
3762 if ((ha->waitflag == TRUE) &&
3763 (ha->cmd_in_progress == scb->cdb[0])) {
3764 ha->waitflag = FALSE;
3769 } else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3770 /* command to logical bus -- interpret */
3771 ret = IPS_SUCCESS_IMM;
3773 switch (scb->scsi_cmd->cmnd[0]) {
3774 case ALLOW_MEDIUM_REMOVAL:
3777 case WRITE_FILEMARKS:
3779 scb->scsi_cmd->result = DID_ERROR << 16;
3783 scb->scsi_cmd->result = DID_OK << 16;
3785 case TEST_UNIT_READY:
3787 if (scb->target_id == IPS_ADAPTER_ID) {
3789 * Either we have a TUR
3790 * or we have a SCSI inquiry
3792 if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3793 scb->scsi_cmd->result = DID_OK << 16;
3795 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3796 IPS_SCSI_INQ_DATA inquiry;
3799 sizeof (IPS_SCSI_INQ_DATA));
3801 inquiry.DeviceType =
3802 IPS_SCSI_INQ_TYPE_PROCESSOR;
3803 inquiry.DeviceTypeQualifier =
3804 IPS_SCSI_INQ_LU_CONNECTED;
3805 inquiry.Version = IPS_SCSI_INQ_REV2;
3806 inquiry.ResponseDataFormat =
3807 IPS_SCSI_INQ_RD_REV2;
3808 inquiry.AdditionalLength = 31;
3810 IPS_SCSI_INQ_Address16;
3812 IPS_SCSI_INQ_WBus16 |
3814 strncpy(inquiry.VendorId, "IBM ",
3816 strncpy(inquiry.ProductId,
3818 strncpy(inquiry.ProductRevisionLevel,
3821 ips_scmd_buf_write(scb->scsi_cmd,
3825 scb->scsi_cmd->result = DID_OK << 16;
3828 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3829 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3830 scb->cmd.logical_info.reserved = 0;
3831 scb->cmd.logical_info.reserved2 = 0;
3832 scb->data_len = sizeof (IPS_LD_INFO);
3833 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3835 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3842 ips_reqsen(ha, scb);
3843 scb->scsi_cmd->result = DID_OK << 16;
3849 scb->cmd.basic_io.op_code =
3850 (scb->scsi_cmd->cmnd[0] ==
3851 READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3852 scb->cmd.basic_io.enhanced_sg = 0;
3853 scb->cmd.basic_io.sg_addr =
3854 cpu_to_le32(scb->data_busaddr);
3856 scb->cmd.basic_io.op_code =
3857 (scb->scsi_cmd->cmnd[0] ==
3858 READ_6) ? IPS_CMD_READ_SG :
3860 scb->cmd.basic_io.enhanced_sg =
3861 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3862 scb->cmd.basic_io.sg_addr =
3863 cpu_to_le32(scb->sg_busaddr);
3866 scb->cmd.basic_io.segment_4G = 0;
3867 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3868 scb->cmd.basic_io.log_drv = scb->target_id;
3869 scb->cmd.basic_io.sg_count = scb->sg_len;
3871 if (scb->cmd.basic_io.lba)
3872 scb->cmd.basic_io.lba =
3873 cpu_to_le32(le32_to_cpu
3874 (scb->cmd.basic_io.lba) +
3875 le16_to_cpu(scb->cmd.basic_io.
3878 scb->cmd.basic_io.lba =
3880 cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3882 (scb->scsi_cmd->cmnd[3]));
3884 scb->cmd.basic_io.sector_count =
3885 cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3887 if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3888 scb->cmd.basic_io.sector_count =
3897 scb->cmd.basic_io.op_code =
3898 (scb->scsi_cmd->cmnd[0] ==
3899 READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3900 scb->cmd.basic_io.enhanced_sg = 0;
3901 scb->cmd.basic_io.sg_addr =
3902 cpu_to_le32(scb->data_busaddr);
3904 scb->cmd.basic_io.op_code =
3905 (scb->scsi_cmd->cmnd[0] ==
3906 READ_10) ? IPS_CMD_READ_SG :
3908 scb->cmd.basic_io.enhanced_sg =
3909 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3910 scb->cmd.basic_io.sg_addr =
3911 cpu_to_le32(scb->sg_busaddr);
3914 scb->cmd.basic_io.segment_4G = 0;
3915 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3916 scb->cmd.basic_io.log_drv = scb->target_id;
3917 scb->cmd.basic_io.sg_count = scb->sg_len;
3919 if (scb->cmd.basic_io.lba)
3920 scb->cmd.basic_io.lba =
3921 cpu_to_le32(le32_to_cpu
3922 (scb->cmd.basic_io.lba) +
3923 le16_to_cpu(scb->cmd.basic_io.
3926 scb->cmd.basic_io.lba =
3927 ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3931 (scb->scsi_cmd->cmnd[4] << 8) | scb->
3934 scb->cmd.basic_io.sector_count =
3935 cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3937 if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3939 * This is a null condition
3940 * we don't have to do anything
3943 scb->scsi_cmd->result = DID_OK << 16;
3951 scb->scsi_cmd->result = DID_OK << 16;
3955 scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3956 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3957 scb->cmd.basic_io.segment_4G = 0;
3958 scb->cmd.basic_io.enhanced_sg = 0;
3959 scb->data_len = sizeof (*ha->enq);
3960 scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3965 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3966 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3967 scb->cmd.logical_info.reserved = 0;
3968 scb->cmd.logical_info.reserved2 = 0;
3969 scb->cmd.logical_info.reserved3 = 0;
3970 scb->data_len = sizeof (IPS_LD_INFO);
3971 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3973 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3977 case SEND_DIAGNOSTIC:
3978 case REASSIGN_BLOCKS:
3982 case READ_DEFECT_DATA:
3985 scb->scsi_cmd->result = DID_OK << 16;
3989 /* Set the Return Info to appear like the Command was */
3990 /* attempted, a Check Condition occurred, and Sense */
3991 /* Data indicating an Invalid CDB OpCode is returned. */
3992 sp = (char *) scb->scsi_cmd->sense_buffer;
3993 memset(sp, 0, sizeof (scb->scsi_cmd->sense_buffer));
3995 sp[0] = 0x70; /* Error Code */
3996 sp[2] = ILLEGAL_REQUEST; /* Sense Key 5 Illegal Req. */
3997 sp[7] = 0x0A; /* Additional Sense Length */
3998 sp[12] = 0x20; /* ASC = Invalid OpCode */
3999 sp[13] = 0x00; /* ASCQ */
4001 device_error = 2; /* Indicate Check Condition */
4002 scb->scsi_cmd->result = device_error | (DID_OK << 16);
4007 if (ret == IPS_SUCCESS_IMM)
4013 /* If we already know the Device is Not there, no need to attempt a Command */
4014 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
4015 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
4016 scb->scsi_cmd->result = DID_NO_CONNECT << 16;
4017 return (IPS_SUCCESS_IMM);
4020 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
4021 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
4022 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
4023 (unsigned long) &scb->
4025 (unsigned long) scb);
4026 scb->cmd.dcdb.reserved = 0;
4027 scb->cmd.dcdb.reserved2 = 0;
4028 scb->cmd.dcdb.reserved3 = 0;
4029 scb->cmd.dcdb.segment_4G = 0;
4030 scb->cmd.dcdb.enhanced_sg = 0;
4032 TimeOut = scb->scsi_cmd->timeout_per_command;
4034 if (ha->subsys->param[4] & 0x00100000) { /* If NEW Tape DCDB is Supported */
4036 scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
4038 scb->cmd.dcdb.op_code =
4039 IPS_CMD_EXTENDED_DCDB_SG;
4040 scb->cmd.dcdb.enhanced_sg =
4041 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
4044 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; /* Use Same Data Area as Old DCDB Struct */
4045 tapeDCDB->device_address =
4046 ((scb->bus - 1) << 4) | scb->target_id;
4047 tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
4048 tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K; /* Always Turn OFF 64K Size Flag */
4051 if (TimeOut < (10 * HZ))
4052 tapeDCDB->cmd_attribute |= IPS_TIMEOUT10; /* TimeOut is 10 Seconds */
4053 else if (TimeOut < (60 * HZ))
4054 tapeDCDB->cmd_attribute |= IPS_TIMEOUT60; /* TimeOut is 60 Seconds */
4055 else if (TimeOut < (1200 * HZ))
4056 tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M; /* TimeOut is 20 Minutes */
4059 tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
4060 tapeDCDB->reserved_for_LUN = 0;
4061 tapeDCDB->transfer_length = scb->data_len;
4062 if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
4063 tapeDCDB->buffer_pointer =
4064 cpu_to_le32(scb->sg_busaddr);
4066 tapeDCDB->buffer_pointer =
4067 cpu_to_le32(scb->data_busaddr);
4068 tapeDCDB->sg_count = scb->sg_len;
4069 tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
4070 tapeDCDB->scsi_status = 0;
4071 tapeDCDB->reserved = 0;
4072 memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
4073 scb->scsi_cmd->cmd_len);
4076 scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
4078 scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
4079 scb->cmd.dcdb.enhanced_sg =
4080 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
4083 scb->dcdb.device_address =
4084 ((scb->bus - 1) << 4) | scb->target_id;
4085 scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
4088 if (TimeOut < (10 * HZ))
4089 scb->dcdb.cmd_attribute |= IPS_TIMEOUT10; /* TimeOut is 10 Seconds */
4090 else if (TimeOut < (60 * HZ))
4091 scb->dcdb.cmd_attribute |= IPS_TIMEOUT60; /* TimeOut is 60 Seconds */
4092 else if (TimeOut < (1200 * HZ))
4093 scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M; /* TimeOut is 20 Minutes */
4096 scb->dcdb.transfer_length = scb->data_len;
4097 if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
4098 scb->dcdb.transfer_length = 0;
4099 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
4100 scb->dcdb.buffer_pointer =
4101 cpu_to_le32(scb->sg_busaddr);
4103 scb->dcdb.buffer_pointer =
4104 cpu_to_le32(scb->data_busaddr);
4105 scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
4106 scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
4107 scb->dcdb.sg_count = scb->sg_len;
4108 scb->dcdb.reserved = 0;
4109 memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
4110 scb->scsi_cmd->cmd_len);
4111 scb->dcdb.scsi_status = 0;
4112 scb->dcdb.reserved2[0] = 0;
4113 scb->dcdb.reserved2[1] = 0;
4114 scb->dcdb.reserved2[2] = 0;
4118 return ((*ha->func.issue) (ha, scb));
4121 /****************************************************************************/
4123 /* Routine Name: ips_chk_status */
4125 /* Routine Description: */
4127 /* Check the status of commands to logical drives */
4128 /* Assumed to be called with the HA lock */
4129 /****************************************************************************/
4131 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
4135 uint8_t basic_status;
4139 METHOD_TRACE("ips_chkstatus", 1);
4141 scb = &ha->scbs[pstatus->fields.command_id];
4142 scb->basic_status = basic_status =
4143 pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
4144 scb->extended_status = ext_status = pstatus->fields.extended_status;
4147 sp->residue_len = 0;
4148 sp->scb_addr = (void *) scb;
4150 /* Remove the item from the active queue */
4151 ips_removeq_scb(&ha->scb_activelist, scb);
4154 /* internal commands are handled in do_ipsintr */
4157 DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
4161 scb->cmd.basic_io.command_id,
4162 scb->bus, scb->target_id, scb->lun);
4164 if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
4165 /* passthru - just returns the raw result */
4170 if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
4171 ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
4173 if (scb->bus == 0) {
4174 if ((basic_status & IPS_GSC_STATUS_MASK) ==
4175 IPS_CMD_RECOVERED_ERROR) {
4177 "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4178 ips_name, ha->host_num,
4179 scb->cmd.basic_io.op_code,
4180 basic_status, ext_status);
4183 switch (scb->scsi_cmd->cmnd[0]) {
4184 case ALLOW_MEDIUM_REMOVAL:
4187 case WRITE_FILEMARKS:
4189 errcode = DID_ERROR;
4195 case TEST_UNIT_READY:
4196 if (!ips_online(ha, scb)) {
4197 errcode = DID_TIME_OUT;
4202 if (ips_online(ha, scb)) {
4203 ips_inquiry(ha, scb);
4205 errcode = DID_TIME_OUT;
4210 ips_reqsen(ha, scb);
4222 if (!ips_online(ha, scb)
4223 || !ips_msense(ha, scb)) {
4224 errcode = DID_ERROR;
4229 if (ips_online(ha, scb))
4232 errcode = DID_TIME_OUT;
4236 case SEND_DIAGNOSTIC:
4237 case REASSIGN_BLOCKS:
4241 errcode = DID_ERROR;
4246 case READ_DEFECT_DATA:
4252 errcode = DID_ERROR;
4255 scb->scsi_cmd->result = errcode << 16;
4256 } else { /* bus == 0 */
4257 /* restrict access to physical drives */
4258 if ((scb->scsi_cmd->cmnd[0] == INQUIRY) &&
4259 ((((char *) scb->scsi_cmd->buffer)[0] & 0x1f) ==
4262 scb->scsi_cmd->result = DID_TIME_OUT << 16;
4265 } else { /* recovered error / success */
4266 if (scb->bus == 0) {
4268 "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4269 ips_name, ha->host_num,
4270 scb->cmd.basic_io.op_code, basic_status,
4274 ips_map_status(ha, scb, sp);
4278 /****************************************************************************/
4280 /* Routine Name: ips_online */
4282 /* Routine Description: */
4284 /* Determine if a logical drive is online */
4286 /****************************************************************************/
4288 ips_online(ips_ha_t * ha, ips_scb_t * scb)
4290 METHOD_TRACE("ips_online", 1);
4292 if (scb->target_id >= IPS_MAX_LD)
4295 if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4296 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4300 if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4302 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4304 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4306 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4313 /****************************************************************************/
4315 /* Routine Name: ips_inquiry */
4317 /* Routine Description: */
4319 /* Simulate an inquiry command to a logical drive */
4321 /****************************************************************************/
4323 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4325 IPS_SCSI_INQ_DATA inquiry;
4327 METHOD_TRACE("ips_inquiry", 1);
4329 memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4331 inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4332 inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4333 inquiry.Version = IPS_SCSI_INQ_REV2;
4334 inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4335 inquiry.AdditionalLength = 31;
4336 inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4338 IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4339 strncpy(inquiry.VendorId, "IBM ", 8);
4340 strncpy(inquiry.ProductId, "SERVERAID ", 16);
4341 strncpy(inquiry.ProductRevisionLevel, "1.00", 4);
4343 ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4348 /****************************************************************************/
4350 /* Routine Name: ips_rdcap */
4352 /* Routine Description: */
4354 /* Simulate a read capacity command to a logical drive */
4356 /****************************************************************************/
4358 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4360 IPS_SCSI_CAPACITY cap;
4362 METHOD_TRACE("ips_rdcap", 1);
4364 if (scb->scsi_cmd->bufflen < 8)
4368 cpu_to_be32(le32_to_cpu
4369 (ha->logical_drive_info->
4370 drive_info[scb->target_id].sector_count) - 1);
4371 cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4373 ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4378 /****************************************************************************/
4380 /* Routine Name: ips_msense */
4382 /* Routine Description: */
4384 /* Simulate a mode sense command to a logical drive */
4386 /****************************************************************************/
4388 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4393 IPS_SCSI_MODE_PAGE_DATA mdata;
4395 METHOD_TRACE("ips_msense", 1);
4397 if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4398 (ha->enq->ucMiscFlag & 0x8) == 0) {
4399 heads = IPS_NORM_HEADS;
4400 sectors = IPS_NORM_SECTORS;
4402 heads = IPS_COMP_HEADS;
4403 sectors = IPS_COMP_SECTORS;
4407 (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4408 1) / (heads * sectors);
4410 memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4412 mdata.hdr.BlockDescLength = 8;
4414 switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4415 case 0x03: /* page 3 */
4416 mdata.pdata.pg3.PageCode = 3;
4417 mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4418 mdata.hdr.DataLength =
4419 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4420 mdata.pdata.pg3.TracksPerZone = 0;
4421 mdata.pdata.pg3.AltSectorsPerZone = 0;
4422 mdata.pdata.pg3.AltTracksPerZone = 0;
4423 mdata.pdata.pg3.AltTracksPerVolume = 0;
4424 mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4425 mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4426 mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4427 mdata.pdata.pg3.TrackSkew = 0;
4428 mdata.pdata.pg3.CylinderSkew = 0;
4429 mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4433 mdata.pdata.pg4.PageCode = 4;
4434 mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4435 mdata.hdr.DataLength =
4436 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4437 mdata.pdata.pg4.CylindersHigh =
4438 cpu_to_be16((cylinders >> 8) & 0xFFFF);
4439 mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4440 mdata.pdata.pg4.Heads = heads;
4441 mdata.pdata.pg4.WritePrecompHigh = 0;
4442 mdata.pdata.pg4.WritePrecompLow = 0;
4443 mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4444 mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4445 mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4446 mdata.pdata.pg4.LandingZoneHigh = 0;
4447 mdata.pdata.pg4.LandingZoneLow = 0;
4448 mdata.pdata.pg4.flags = 0;
4449 mdata.pdata.pg4.RotationalOffset = 0;
4450 mdata.pdata.pg4.MediumRotationRate = 0;
4453 mdata.pdata.pg8.PageCode = 8;
4454 mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4455 mdata.hdr.DataLength =
4456 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4457 /* everything else is left set to 0 */
4464 ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4469 /****************************************************************************/
4471 /* Routine Name: ips_reqsen */
4473 /* Routine Description: */
4475 /* Simulate a request sense command to a logical drive */
4477 /****************************************************************************/
4479 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4481 IPS_SCSI_REQSEN reqsen;
4483 METHOD_TRACE("ips_reqsen", 1);
4485 memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4487 reqsen.ResponseCode =
4488 IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4489 reqsen.AdditionalLength = 10;
4490 reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4491 reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4493 ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4498 /****************************************************************************/
4500 /* Routine Name: ips_free */
4502 /* Routine Description: */
4504 /* Free any allocated space for this controller */
4506 /****************************************************************************/
4508 ips_free(ips_ha_t * ha)
4511 METHOD_TRACE("ips_free", 1);
4515 pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ),
4516 ha->enq, ha->enq_busaddr);
4524 pci_free_consistent(ha->pcidev,
4525 sizeof (IPS_ADAPTER) +
4526 sizeof (IPS_IO_CMD), ha->adapt,
4527 ha->adapt->hw_status_start);
4531 if (ha->logical_drive_info) {
4532 pci_free_consistent(ha->pcidev,
4533 sizeof (IPS_LD_INFO),
4534 ha->logical_drive_info,
4535 ha->logical_drive_info_dma_addr);
4536 ha->logical_drive_info = NULL;
4545 if (ha->ioctl_data) {
4546 pci_free_consistent(ha->pcidev, ha->ioctl_len,
4547 ha->ioctl_data, ha->ioctl_busaddr);
4548 ha->ioctl_data = NULL;
4549 ha->ioctl_datasize = 0;
4552 ips_deallocatescbs(ha, ha->max_cmds);
4554 /* free memory mapped (if applicable) */
4556 iounmap(ha->ioremap_ptr);
4557 ha->ioremap_ptr = NULL;
4562 release_mem_region(ha->mem_addr, ha->mem_len);
4568 /****************************************************************************/
4570 /* Routine Name: ips_deallocatescbs */
4572 /* Routine Description: */
4574 /* Free the command blocks */
4576 /****************************************************************************/
4578 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4581 pci_free_consistent(ha->pcidev,
4582 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4583 ha->scbs->sg_list.list,
4584 ha->scbs->sg_busaddr);
4585 pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds,
4586 ha->scbs, ha->scbs->scb_busaddr);
4592 /****************************************************************************/
4594 /* Routine Name: ips_allocatescbs */
4596 /* Routine Description: */
4598 /* Allocate the command blocks */
4600 /****************************************************************************/
4602 ips_allocatescbs(ips_ha_t * ha)
4607 dma_addr_t command_dma, sg_dma;
4609 METHOD_TRACE("ips_allocatescbs", 1);
4611 /* Allocate memory for the SCBs */
4613 pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t),
4615 if (ha->scbs == NULL)
4618 pci_alloc_consistent(ha->pcidev,
4619 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG *
4620 ha->max_cmds, &sg_dma);
4621 if (ips_sg.list == NULL) {
4622 pci_free_consistent(ha->pcidev,
4623 ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4628 memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4630 for (i = 0; i < ha->max_cmds; i++) {
4631 scb_p = &ha->scbs[i];
4632 scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4633 /* set up S/G list */
4634 if (IPS_USE_ENH_SGLIST(ha)) {
4635 scb_p->sg_list.enh_list =
4636 ips_sg.enh_list + i * IPS_MAX_SG;
4638 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4640 scb_p->sg_list.std_list =
4641 ips_sg.std_list + i * IPS_MAX_SG;
4643 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4646 /* add to the free list */
4647 if (i < ha->max_cmds - 1) {
4648 scb_p->q_next = ha->scb_freelist;
4649 ha->scb_freelist = scb_p;
4657 /****************************************************************************/
4659 /* Routine Name: ips_init_scb */
4661 /* Routine Description: */
4663 /* Initialize a CCB to default values */
4665 /****************************************************************************/
4667 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4669 IPS_SG_LIST sg_list;
4670 uint32_t cmd_busaddr, sg_busaddr;
4671 METHOD_TRACE("ips_init_scb", 1);
4676 sg_list.list = scb->sg_list.list;
4677 cmd_busaddr = scb->scb_busaddr;
4678 sg_busaddr = scb->sg_busaddr;
4680 memset(scb, 0, sizeof (ips_scb_t));
4681 memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4683 /* Initialize dummy command bucket */
4684 ha->dummy->op_code = 0xFF;
4685 ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4686 + sizeof (IPS_ADAPTER));
4687 ha->dummy->command_id = IPS_MAX_CMDS;
4689 /* set bus address of scb */
4690 scb->scb_busaddr = cmd_busaddr;
4691 scb->sg_busaddr = sg_busaddr;
4692 scb->sg_list.list = sg_list.list;
4695 scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4696 scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4697 + sizeof (IPS_ADAPTER));
4700 /****************************************************************************/
4702 /* Routine Name: ips_get_scb */
4704 /* Routine Description: */
4706 /* Initialize a CCB to default values */
4708 /* ASSUMED to be callled from within a lock */
4710 /****************************************************************************/
4712 ips_getscb(ips_ha_t * ha)
4716 METHOD_TRACE("ips_getscb", 1);
4718 if ((scb = ha->scb_freelist) == NULL) {
4723 ha->scb_freelist = scb->q_next;
4727 ips_init_scb(ha, scb);
4732 /****************************************************************************/
4734 /* Routine Name: ips_free_scb */
4736 /* Routine Description: */
4738 /* Return an unused CCB back to the free list */
4740 /* ASSUMED to be called from within a lock */
4742 /****************************************************************************/
4744 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4747 METHOD_TRACE("ips_freescb", 1);
4748 if (scb->flags & IPS_SCB_MAP_SG)
4749 pci_unmap_sg(ha->pcidev, scb->scsi_cmd->request_buffer,
4750 scb->scsi_cmd->use_sg, IPS_DMA_DIR(scb));
4751 else if (scb->flags & IPS_SCB_MAP_SINGLE)
4752 pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len,
4755 /* check to make sure this is not our "special" scb */
4756 if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4757 scb->q_next = ha->scb_freelist;
4758 ha->scb_freelist = scb;
4762 /****************************************************************************/
4764 /* Routine Name: ips_isinit_copperhead */
4766 /* Routine Description: */
4768 /* Is controller initialized ? */
4770 /****************************************************************************/
4772 ips_isinit_copperhead(ips_ha_t * ha)
4777 METHOD_TRACE("ips_isinit_copperhead", 1);
4779 isr = inb(ha->io_addr + IPS_REG_HISR);
4780 scpr = inb(ha->io_addr + IPS_REG_SCPR);
4782 if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4788 /****************************************************************************/
4790 /* Routine Name: ips_isinit_copperhead_memio */
4792 /* Routine Description: */
4794 /* Is controller initialized ? */
4796 /****************************************************************************/
4798 ips_isinit_copperhead_memio(ips_ha_t * ha)
4803 METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4805 isr = readb(ha->mem_ptr + IPS_REG_HISR);
4806 scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4808 if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4814 /****************************************************************************/
4816 /* Routine Name: ips_isinit_morpheus */
4818 /* Routine Description: */
4820 /* Is controller initialized ? */
4822 /****************************************************************************/
4824 ips_isinit_morpheus(ips_ha_t * ha)
4829 METHOD_TRACE("ips_is_init_morpheus", 1);
4831 if (ips_isintr_morpheus(ha))
4832 ips_flush_and_reset(ha);
4834 post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4835 bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4839 else if (bits & 0x3)
4845 /****************************************************************************/
4847 /* Routine Name: ips_flush_and_reset */
4849 /* Routine Description: */
4851 /* Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown */
4852 /* state ( was trying to INIT and an interrupt was already pending ) ... */
4854 /****************************************************************************/
4856 ips_flush_and_reset(ips_ha_t *ha)
4862 dma_addr_t command_dma;
4864 /* Create a usuable SCB */
4865 scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma);
4867 memset(scb, 0, sizeof(ips_scb_t));
4868 ips_init_scb(ha, scb);
4869 scb->scb_busaddr = command_dma;
4871 scb->timeout = ips_cmd_timeout;
4872 scb->cdb[0] = IPS_CMD_FLUSH;
4874 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4875 scb->cmd.flush_cache.command_id = IPS_MAX_CMDS; /* Use an ID that would otherwise not exist */
4876 scb->cmd.flush_cache.state = IPS_NORM_STATE;
4877 scb->cmd.flush_cache.reserved = 0;
4878 scb->cmd.flush_cache.reserved2 = 0;
4879 scb->cmd.flush_cache.reserved3 = 0;
4880 scb->cmd.flush_cache.reserved4 = 0;
4882 ret = ips_send_cmd(ha, scb); /* Send the Flush Command */
4884 if (ret == IPS_SUCCESS) {
4885 time = 60 * IPS_ONE_SEC; /* Max Wait time is 60 seconds */
4888 while ((time > 0) && (!done)) {
4889 done = ips_poll_for_flush_complete(ha);
4890 /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4897 /* Now RESET and INIT the adapter */
4898 (*ha->func.reset) (ha);
4900 pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma);
4904 /****************************************************************************/
4906 /* Routine Name: ips_poll_for_flush_complete */
4908 /* Routine Description: */
4910 /* Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4911 /* All other responses are just taken off the queue and ignored */
4913 /****************************************************************************/
4915 ips_poll_for_flush_complete(ips_ha_t * ha)
4920 cstatus.value = (*ha->func.statupd) (ha);
4922 if (cstatus.value == 0xffffffff) /* If No Interrupt to process */
4925 /* Success is when we see the Flush Command ID */
4926 if (cstatus.fields.command_id == IPS_MAX_CMDS )
4933 /****************************************************************************/
4935 /* Routine Name: ips_enable_int_copperhead */
4937 /* Routine Description: */
4938 /* Turn on interrupts */
4940 /****************************************************************************/
4942 ips_enable_int_copperhead(ips_ha_t * ha)
4944 METHOD_TRACE("ips_enable_int_copperhead", 1);
4946 outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4947 inb(ha->io_addr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/
4950 /****************************************************************************/
4952 /* Routine Name: ips_enable_int_copperhead_memio */
4954 /* Routine Description: */
4955 /* Turn on interrupts */
4957 /****************************************************************************/
4959 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4961 METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4963 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4964 readb(ha->mem_ptr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/
4967 /****************************************************************************/
4969 /* Routine Name: ips_enable_int_morpheus */
4971 /* Routine Description: */
4972 /* Turn on interrupts */
4974 /****************************************************************************/
4976 ips_enable_int_morpheus(ips_ha_t * ha)
4980 METHOD_TRACE("ips_enable_int_morpheus", 1);
4982 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4984 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4985 readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
4988 /****************************************************************************/
4990 /* Routine Name: ips_init_copperhead */
4992 /* Routine Description: */
4994 /* Initialize a copperhead controller */
4996 /****************************************************************************/
4998 ips_init_copperhead(ips_ha_t * ha)
5002 uint8_t PostByte[IPS_MAX_POST_BYTES];
5003 uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
5006 METHOD_TRACE("ips_init_copperhead", 1);
5008 for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
5009 for (j = 0; j < 45; j++) {
5010 Isr = inb(ha->io_addr + IPS_REG_HISR);
5011 if (Isr & IPS_BIT_GHI)
5014 /* Delay for 1 Second */
5015 MDELAY(IPS_ONE_SEC);
5019 /* error occurred */
5022 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
5023 outb(Isr, ha->io_addr + IPS_REG_HISR);
5026 if (PostByte[0] < IPS_GOOD_POST_STATUS) {
5027 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5028 "reset controller fails (post status %x %x).\n",
5029 PostByte[0], PostByte[1]);
5034 for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
5035 for (j = 0; j < 240; j++) {
5036 Isr = inb(ha->io_addr + IPS_REG_HISR);
5037 if (Isr & IPS_BIT_GHI)
5040 /* Delay for 1 Second */
5041 MDELAY(IPS_ONE_SEC);
5045 /* error occurred */
5048 ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
5049 outb(Isr, ha->io_addr + IPS_REG_HISR);
5052 for (i = 0; i < 240; i++) {
5053 Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
5055 if ((Cbsp & IPS_BIT_OP) == 0)
5058 /* Delay for 1 Second */
5059 MDELAY(IPS_ONE_SEC);
5067 outl(cpu_to_le32(0x1010), ha->io_addr + IPS_REG_CCCR);
5069 /* Enable busmastering */
5070 outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
5072 if (ha->revision_id == IPS_REVID_TROMBONE64)
5073 /* fix for anaconda64 */
5074 outl(0, ha->io_addr + IPS_REG_NDAE);
5076 /* Enable interrupts */
5077 outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
5082 /****************************************************************************/
5084 /* Routine Name: ips_init_copperhead_memio */
5086 /* Routine Description: */
5088 /* Initialize a copperhead controller with memory mapped I/O */
5090 /****************************************************************************/
5092 ips_init_copperhead_memio(ips_ha_t * ha)
5096 uint8_t PostByte[IPS_MAX_POST_BYTES];
5097 uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
5100 METHOD_TRACE("ips_init_copperhead_memio", 1);
5102 for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
5103 for (j = 0; j < 45; j++) {
5104 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5105 if (Isr & IPS_BIT_GHI)
5108 /* Delay for 1 Second */
5109 MDELAY(IPS_ONE_SEC);
5113 /* error occurred */
5116 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
5117 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5120 if (PostByte[0] < IPS_GOOD_POST_STATUS) {
5121 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5122 "reset controller fails (post status %x %x).\n",
5123 PostByte[0], PostByte[1]);
5128 for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
5129 for (j = 0; j < 240; j++) {
5130 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5131 if (Isr & IPS_BIT_GHI)
5134 /* Delay for 1 Second */
5135 MDELAY(IPS_ONE_SEC);
5139 /* error occurred */
5142 ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
5143 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5146 for (i = 0; i < 240; i++) {
5147 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
5149 if ((Cbsp & IPS_BIT_OP) == 0)
5152 /* Delay for 1 Second */
5153 MDELAY(IPS_ONE_SEC);
5157 /* error occurred */
5161 writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
5163 /* Enable busmastering */
5164 writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
5166 if (ha->revision_id == IPS_REVID_TROMBONE64)
5167 /* fix for anaconda64 */
5168 writel(0, ha->mem_ptr + IPS_REG_NDAE);
5170 /* Enable interrupts */
5171 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
5173 /* if we get here then everything went OK */
5177 /****************************************************************************/
5179 /* Routine Name: ips_init_morpheus */
5181 /* Routine Description: */
5183 /* Initialize a morpheus controller */
5185 /****************************************************************************/
5187 ips_init_morpheus(ips_ha_t * ha)
5195 METHOD_TRACE("ips_init_morpheus", 1);
5197 /* Wait up to 45 secs for Post */
5198 for (i = 0; i < 45; i++) {
5199 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5201 if (Isr & IPS_BIT_I960_MSG0I)
5204 /* Delay for 1 Second */
5205 MDELAY(IPS_ONE_SEC);
5209 /* error occurred */
5210 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5211 "timeout waiting for post.\n");
5216 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5218 if (Post == 0x4F00) { /* If Flashing the Battery PIC */
5219 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5220 "Flashing Battery PIC, Please wait ...\n");
5222 /* Clear the interrupt bit */
5223 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5224 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5226 for (i = 0; i < 120; i++) { /* Wait Up to 2 Min. for Completion */
5227 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5230 /* Delay for 1 Second */
5231 MDELAY(IPS_ONE_SEC);
5235 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5236 "timeout waiting for Battery PIC Flash\n");
5242 /* Clear the interrupt bit */
5243 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5244 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5246 if (Post < (IPS_GOOD_POST_STATUS << 8)) {
5247 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5248 "reset controller fails (post status %x).\n", Post);
5253 /* Wait up to 240 secs for config bytes */
5254 for (i = 0; i < 240; i++) {
5255 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5257 if (Isr & IPS_BIT_I960_MSG1I)
5260 /* Delay for 1 Second */
5261 MDELAY(IPS_ONE_SEC);
5265 /* error occurred */
5266 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5267 "timeout waiting for config.\n");
5272 Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
5274 /* Clear interrupt bit */
5275 Isr = (uint32_t) IPS_BIT_I960_MSG1I;
5276 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5278 /* Turn on the interrupts */
5279 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
5281 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
5283 /* if we get here then everything went OK */
5285 /* Since we did a RESET, an EraseStripeLock may be needed */
5286 if (Post == 0xEF10) {
5287 if ((Config == 0x000F) || (Config == 0x0009))
5288 ha->requires_esl = 1;
5294 /****************************************************************************/
5296 /* Routine Name: ips_reset_copperhead */
5298 /* Routine Description: */
5300 /* Reset the controller */
5302 /****************************************************************************/
5304 ips_reset_copperhead(ips_ha_t * ha)
5308 METHOD_TRACE("ips_reset_copperhead", 1);
5310 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5311 ips_name, ha->host_num, ha->io_addr, ha->irq);
5315 while (reset_counter < 2) {
5318 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5320 /* Delay for 1 Second */
5321 MDELAY(IPS_ONE_SEC);
5323 outb(0, ha->io_addr + IPS_REG_SCPR);
5325 /* Delay for 1 Second */
5326 MDELAY(IPS_ONE_SEC);
5328 if ((*ha->func.init) (ha))
5330 else if (reset_counter >= 2) {
5339 /****************************************************************************/
5341 /* Routine Name: ips_reset_copperhead_memio */
5343 /* Routine Description: */
5345 /* Reset the controller */
5347 /****************************************************************************/
5349 ips_reset_copperhead_memio(ips_ha_t * ha)
5353 METHOD_TRACE("ips_reset_copperhead_memio", 1);
5355 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5356 ips_name, ha->host_num, ha->mem_addr, ha->irq);
5360 while (reset_counter < 2) {
5363 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5365 /* Delay for 1 Second */
5366 MDELAY(IPS_ONE_SEC);
5368 writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5370 /* Delay for 1 Second */
5371 MDELAY(IPS_ONE_SEC);
5373 if ((*ha->func.init) (ha))
5375 else if (reset_counter >= 2) {
5384 /****************************************************************************/
5386 /* Routine Name: ips_reset_morpheus */
5388 /* Routine Description: */
5390 /* Reset the controller */
5392 /****************************************************************************/
5394 ips_reset_morpheus(ips_ha_t * ha)
5399 METHOD_TRACE("ips_reset_morpheus", 1);
5401 DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5402 ips_name, ha->host_num, ha->mem_addr, ha->irq);
5406 while (reset_counter < 2) {
5409 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5411 /* Delay for 5 Seconds */
5412 MDELAY(5 * IPS_ONE_SEC);
5414 /* Do a PCI config read to wait for adapter */
5415 pci_read_config_byte(ha->pcidev, 4, &junk);
5417 if ((*ha->func.init) (ha))
5419 else if (reset_counter >= 2) {
5428 /****************************************************************************/
5430 /* Routine Name: ips_statinit */
5432 /* Routine Description: */
5434 /* Initialize the status queues on the controller */
5436 /****************************************************************************/
5438 ips_statinit(ips_ha_t * ha)
5440 uint32_t phys_status_start;
5442 METHOD_TRACE("ips_statinit", 1);
5444 ha->adapt->p_status_start = ha->adapt->status;
5445 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5446 ha->adapt->p_status_tail = ha->adapt->status;
5448 phys_status_start = ha->adapt->hw_status_start;
5449 outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQSR);
5450 outl(cpu_to_le32(phys_status_start + IPS_STATUS_Q_SIZE),
5451 ha->io_addr + IPS_REG_SQER);
5452 outl(cpu_to_le32(phys_status_start + IPS_STATUS_SIZE),
5453 ha->io_addr + IPS_REG_SQHR);
5454 outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQTR);
5456 ha->adapt->hw_status_tail = phys_status_start;
5459 /****************************************************************************/
5461 /* Routine Name: ips_statinit_memio */
5463 /* Routine Description: */
5465 /* Initialize the status queues on the controller */
5467 /****************************************************************************/
5469 ips_statinit_memio(ips_ha_t * ha)
5471 uint32_t phys_status_start;
5473 METHOD_TRACE("ips_statinit_memio", 1);
5475 ha->adapt->p_status_start = ha->adapt->status;
5476 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5477 ha->adapt->p_status_tail = ha->adapt->status;
5479 phys_status_start = ha->adapt->hw_status_start;
5480 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5481 writel(phys_status_start + IPS_STATUS_Q_SIZE,
5482 ha->mem_ptr + IPS_REG_SQER);
5483 writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5484 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5486 ha->adapt->hw_status_tail = phys_status_start;
5489 /****************************************************************************/
5491 /* Routine Name: ips_statupd_copperhead */
5493 /* Routine Description: */
5495 /* Remove an element from the status queue */
5497 /****************************************************************************/
5499 ips_statupd_copperhead(ips_ha_t * ha)
5501 METHOD_TRACE("ips_statupd_copperhead", 1);
5503 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5504 ha->adapt->p_status_tail++;
5505 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5507 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5508 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5511 outl(cpu_to_le32(ha->adapt->hw_status_tail),
5512 ha->io_addr + IPS_REG_SQTR);
5514 return (ha->adapt->p_status_tail->value);
5517 /****************************************************************************/
5519 /* Routine Name: ips_statupd_copperhead_memio */
5521 /* Routine Description: */
5523 /* Remove an element from the status queue */
5525 /****************************************************************************/
5527 ips_statupd_copperhead_memio(ips_ha_t * ha)
5529 METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5531 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5532 ha->adapt->p_status_tail++;
5533 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5535 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5536 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5539 writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5541 return (ha->adapt->p_status_tail->value);
5544 /****************************************************************************/
5546 /* Routine Name: ips_statupd_morpheus */
5548 /* Routine Description: */
5550 /* Remove an element from the status queue */
5552 /****************************************************************************/
5554 ips_statupd_morpheus(ips_ha_t * ha)
5558 METHOD_TRACE("ips_statupd_morpheus", 1);
5560 val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5565 /****************************************************************************/
5567 /* Routine Name: ips_issue_copperhead */
5569 /* Routine Description: */
5571 /* Send a command down to the controller */
5573 /****************************************************************************/
5575 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5580 METHOD_TRACE("ips_issue_copperhead", 1);
5582 if (scb->scsi_cmd) {
5583 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5587 scb->cmd.basic_io.command_id,
5588 scb->bus, scb->target_id, scb->lun);
5590 DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5591 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5597 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5600 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5601 if (!(val & IPS_BIT_START_STOP))
5604 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5605 "ips_issue val [0x%x].\n", val);
5606 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5607 "ips_issue semaphore chk timeout.\n");
5609 return (IPS_FAILURE);
5613 outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_CCSAR);
5614 outw(cpu_to_le32(IPS_BIT_START_CMD), ha->io_addr + IPS_REG_CCCR);
5616 return (IPS_SUCCESS);
5619 /****************************************************************************/
5621 /* Routine Name: ips_issue_copperhead_memio */
5623 /* Routine Description: */
5625 /* Send a command down to the controller */
5627 /****************************************************************************/
5629 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5634 METHOD_TRACE("ips_issue_copperhead_memio", 1);
5636 if (scb->scsi_cmd) {
5637 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5641 scb->cmd.basic_io.command_id,
5642 scb->bus, scb->target_id, scb->lun);
5644 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5645 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5650 while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5653 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5654 if (!(val & IPS_BIT_START_STOP))
5657 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5658 "ips_issue val [0x%x].\n", val);
5659 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5660 "ips_issue semaphore chk timeout.\n");
5662 return (IPS_FAILURE);
5666 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5667 writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5669 return (IPS_SUCCESS);
5672 /****************************************************************************/
5674 /* Routine Name: ips_issue_i2o */
5676 /* Routine Description: */
5678 /* Send a command down to the controller */
5680 /****************************************************************************/
5682 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5685 METHOD_TRACE("ips_issue_i2o", 1);
5687 if (scb->scsi_cmd) {
5688 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5692 scb->cmd.basic_io.command_id,
5693 scb->bus, scb->target_id, scb->lun);
5695 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5696 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5699 outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_I2O_INMSGQ);
5701 return (IPS_SUCCESS);
5704 /****************************************************************************/
5706 /* Routine Name: ips_issue_i2o_memio */
5708 /* Routine Description: */
5710 /* Send a command down to the controller */
5712 /****************************************************************************/
5714 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5717 METHOD_TRACE("ips_issue_i2o_memio", 1);
5719 if (scb->scsi_cmd) {
5720 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5724 scb->cmd.basic_io.command_id,
5725 scb->bus, scb->target_id, scb->lun);
5727 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5728 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5731 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5733 return (IPS_SUCCESS);
5736 /****************************************************************************/
5738 /* Routine Name: ips_isintr_copperhead */
5740 /* Routine Description: */
5742 /* Test to see if an interrupt is for us */
5744 /****************************************************************************/
5746 ips_isintr_copperhead(ips_ha_t * ha)
5750 METHOD_TRACE("ips_isintr_copperhead", 2);
5752 Isr = inb(ha->io_addr + IPS_REG_HISR);
5755 /* ?!?! Nothing really there */
5758 if (Isr & IPS_BIT_SCE)
5760 else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5761 /* status queue overflow or GHI */
5762 /* just clear the interrupt */
5763 outb(Isr, ha->io_addr + IPS_REG_HISR);
5769 /****************************************************************************/
5771 /* Routine Name: ips_isintr_copperhead_memio */
5773 /* Routine Description: */
5775 /* Test to see if an interrupt is for us */
5777 /****************************************************************************/
5779 ips_isintr_copperhead_memio(ips_ha_t * ha)
5783 METHOD_TRACE("ips_isintr_memio", 2);
5785 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5788 /* ?!?! Nothing really there */
5791 if (Isr & IPS_BIT_SCE)
5793 else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5794 /* status queue overflow or GHI */
5795 /* just clear the interrupt */
5796 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5802 /****************************************************************************/
5804 /* Routine Name: ips_isintr_morpheus */
5806 /* Routine Description: */
5808 /* Test to see if an interrupt is for us */
5810 /****************************************************************************/
5812 ips_isintr_morpheus(ips_ha_t * ha)
5816 METHOD_TRACE("ips_isintr_morpheus", 2);
5818 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5820 if (Isr & IPS_BIT_I2O_OPQI)
5826 /****************************************************************************/
5828 /* Routine Name: ips_wait */
5830 /* Routine Description: */
5832 /* Wait for a command to complete */
5834 /****************************************************************************/
5836 ips_wait(ips_ha_t * ha, int time, int intr)
5841 METHOD_TRACE("ips_wait", 1);
5846 time *= IPS_ONE_SEC; /* convert seconds */
5848 while ((time > 0) && (!done)) {
5849 if (intr == IPS_INTR_ON) {
5850 if (ha->waitflag == FALSE) {
5855 } else if (intr == IPS_INTR_IORL) {
5856 if (ha->waitflag == FALSE) {
5858 * controller generated an interrupt to
5859 * acknowledge completion of the command
5860 * and ips_intr() has serviced the interrupt.
5868 * NOTE: we already have the io_request_lock so
5869 * even if we get an interrupt it won't get serviced
5870 * until after we finish.
5873 (*ha->func.intr) (ha);
5876 /* This looks like a very evil loop, but it only does this during start-up */
5884 /****************************************************************************/
5886 /* Routine Name: ips_write_driver_status */
5888 /* Routine Description: */
5890 /* Write OS/Driver version to Page 5 of the nvram on the controller */
5892 /****************************************************************************/
5894 ips_write_driver_status(ips_ha_t * ha, int intr)
5896 METHOD_TRACE("ips_write_driver_status", 1);
5898 if (!ips_readwrite_page5(ha, FALSE, intr)) {
5899 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5900 "unable to read NVRAM page 5.\n");
5905 /* check to make sure the page has a valid */
5907 if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5909 "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5910 ips_name, ha->host_num, ha->nvram->signature);
5911 ha->nvram->signature = IPS_NVRAM_P5_SIG;
5915 "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5916 ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5917 ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5918 ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5919 ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5920 ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5921 ha->nvram->bios_low[3]);
5923 ips_get_bios_version(ha, intr);
5925 /* change values (as needed) */
5926 ha->nvram->operating_system = IPS_OS_LINUX;
5927 ha->nvram->adapter_type = ha->ad_type;
5928 strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5929 strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5930 strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5931 strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5933 ha->nvram->versioning = 0; /* Indicate the Driver Does Not Support Versioning */
5935 /* now update the page */
5936 if (!ips_readwrite_page5(ha, TRUE, intr)) {
5937 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5938 "unable to write NVRAM page 5.\n");
5943 /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5944 ha->slot_num = ha->nvram->adapter_slot;
5949 /****************************************************************************/
5951 /* Routine Name: ips_read_adapter_status */
5953 /* Routine Description: */
5955 /* Do an Inquiry command to the adapter */
5957 /****************************************************************************/
5959 ips_read_adapter_status(ips_ha_t * ha, int intr)
5964 METHOD_TRACE("ips_read_adapter_status", 1);
5966 scb = &ha->scbs[ha->max_cmds - 1];
5968 ips_init_scb(ha, scb);
5970 scb->timeout = ips_cmd_timeout;
5971 scb->cdb[0] = IPS_CMD_ENQUIRY;
5973 scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5974 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5975 scb->cmd.basic_io.sg_count = 0;
5976 scb->cmd.basic_io.lba = 0;
5977 scb->cmd.basic_io.sector_count = 0;
5978 scb->cmd.basic_io.log_drv = 0;
5979 scb->data_len = sizeof (*ha->enq);
5980 scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5984 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5985 || (ret == IPS_SUCCESS_IMM)
5986 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5992 /****************************************************************************/
5994 /* Routine Name: ips_read_subsystem_parameters */
5996 /* Routine Description: */
5998 /* Read subsystem parameters from the adapter */
6000 /****************************************************************************/
6002 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
6007 METHOD_TRACE("ips_read_subsystem_parameters", 1);
6009 scb = &ha->scbs[ha->max_cmds - 1];
6011 ips_init_scb(ha, scb);
6013 scb->timeout = ips_cmd_timeout;
6014 scb->cdb[0] = IPS_CMD_GET_SUBSYS;
6016 scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
6017 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
6018 scb->cmd.basic_io.sg_count = 0;
6019 scb->cmd.basic_io.lba = 0;
6020 scb->cmd.basic_io.sector_count = 0;
6021 scb->cmd.basic_io.log_drv = 0;
6022 scb->data_len = sizeof (*ha->subsys);
6023 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
6027 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6028 || (ret == IPS_SUCCESS_IMM)
6029 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6032 memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
6036 /****************************************************************************/
6038 /* Routine Name: ips_read_config */
6040 /* Routine Description: */
6042 /* Read the configuration on the adapter */
6044 /****************************************************************************/
6046 ips_read_config(ips_ha_t * ha, int intr)
6052 METHOD_TRACE("ips_read_config", 1);
6054 /* set defaults for initiator IDs */
6055 for (i = 0; i < 4; i++)
6056 ha->conf->init_id[i] = 7;
6058 scb = &ha->scbs[ha->max_cmds - 1];
6060 ips_init_scb(ha, scb);
6062 scb->timeout = ips_cmd_timeout;
6063 scb->cdb[0] = IPS_CMD_READ_CONF;
6065 scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
6066 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
6067 scb->data_len = sizeof (*ha->conf);
6068 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
6072 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6073 || (ret == IPS_SUCCESS_IMM)
6074 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
6076 memset(ha->conf, 0, sizeof (IPS_CONF));
6078 /* reset initiator IDs */
6079 for (i = 0; i < 4; i++)
6080 ha->conf->init_id[i] = 7;
6082 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
6083 if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
6084 IPS_CMD_CMPLT_WERROR)
6090 memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
6094 /****************************************************************************/
6096 /* Routine Name: ips_readwrite_page5 */
6098 /* Routine Description: */
6100 /* Read nvram page 5 from the adapter */
6102 /****************************************************************************/
6104 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
6109 METHOD_TRACE("ips_readwrite_page5", 1);
6111 scb = &ha->scbs[ha->max_cmds - 1];
6113 ips_init_scb(ha, scb);
6115 scb->timeout = ips_cmd_timeout;
6116 scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
6118 scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
6119 scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
6120 scb->cmd.nvram.page = 5;
6121 scb->cmd.nvram.write = write;
6122 scb->cmd.nvram.reserved = 0;
6123 scb->cmd.nvram.reserved2 = 0;
6124 scb->data_len = sizeof (*ha->nvram);
6125 scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
6127 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
6129 /* issue the command */
6131 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6132 || (ret == IPS_SUCCESS_IMM)
6133 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
6135 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
6140 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
6144 /****************************************************************************/
6146 /* Routine Name: ips_clear_adapter */
6148 /* Routine Description: */
6150 /* Clear the stripe lock tables */
6152 /****************************************************************************/
6154 ips_clear_adapter(ips_ha_t * ha, int intr)
6159 METHOD_TRACE("ips_clear_adapter", 1);
6161 scb = &ha->scbs[ha->max_cmds - 1];
6163 ips_init_scb(ha, scb);
6165 scb->timeout = ips_reset_timeout;
6166 scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
6168 scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
6169 scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
6170 scb->cmd.config_sync.channel = 0;
6171 scb->cmd.config_sync.source_target = IPS_POCL;
6172 scb->cmd.config_sync.reserved = 0;
6173 scb->cmd.config_sync.reserved2 = 0;
6174 scb->cmd.config_sync.reserved3 = 0;
6178 ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
6179 || (ret == IPS_SUCCESS_IMM)
6180 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6183 /* send unlock stripe command */
6184 ips_init_scb(ha, scb);
6186 scb->cdb[0] = IPS_CMD_ERROR_TABLE;
6187 scb->timeout = ips_reset_timeout;
6189 scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
6190 scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
6191 scb->cmd.unlock_stripe.log_drv = 0;
6192 scb->cmd.unlock_stripe.control = IPS_CSL;
6193 scb->cmd.unlock_stripe.reserved = 0;
6194 scb->cmd.unlock_stripe.reserved2 = 0;
6195 scb->cmd.unlock_stripe.reserved3 = 0;
6199 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6200 || (ret == IPS_SUCCESS_IMM)
6201 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6207 /****************************************************************************/
6209 /* Routine Name: ips_ffdc_reset */
6211 /* Routine Description: */
6213 /* FFDC: write reset info */
6215 /****************************************************************************/
6217 ips_ffdc_reset(ips_ha_t * ha, int intr)
6221 METHOD_TRACE("ips_ffdc_reset", 1);
6223 scb = &ha->scbs[ha->max_cmds - 1];
6225 ips_init_scb(ha, scb);
6227 scb->timeout = ips_cmd_timeout;
6228 scb->cdb[0] = IPS_CMD_FFDC;
6229 scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6230 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6231 scb->cmd.ffdc.reset_count = ha->reset_count;
6232 scb->cmd.ffdc.reset_type = 0x80;
6234 /* convert time to what the card wants */
6235 ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6238 ips_send_wait(ha, scb, ips_cmd_timeout, intr);
6241 /****************************************************************************/
6243 /* Routine Name: ips_ffdc_time */
6245 /* Routine Description: */
6247 /* FFDC: write time info */
6249 /****************************************************************************/
6251 ips_ffdc_time(ips_ha_t * ha)
6255 METHOD_TRACE("ips_ffdc_time", 1);
6257 DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
6259 scb = &ha->scbs[ha->max_cmds - 1];
6261 ips_init_scb(ha, scb);
6263 scb->timeout = ips_cmd_timeout;
6264 scb->cdb[0] = IPS_CMD_FFDC;
6265 scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6266 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6267 scb->cmd.ffdc.reset_count = 0;
6268 scb->cmd.ffdc.reset_type = 0;
6270 /* convert time to what the card wants */
6271 ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6274 ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
6277 /****************************************************************************/
6279 /* Routine Name: ips_fix_ffdc_time */
6281 /* Routine Description: */
6282 /* Adjust time_t to what the card wants */
6284 /****************************************************************************/
6286 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time)
6293 int year_lengths[2] = { IPS_DAYS_NORMAL_YEAR, IPS_DAYS_LEAP_YEAR };
6294 int month_lengths[12][2] = { {31, 31},
6308 METHOD_TRACE("ips_fix_ffdc_time", 1);
6310 days = current_time / IPS_SECS_DAY;
6311 rem = current_time % IPS_SECS_DAY;
6313 scb->cmd.ffdc.hour = (rem / IPS_SECS_HOUR);
6314 rem = rem % IPS_SECS_HOUR;
6315 scb->cmd.ffdc.minute = (rem / IPS_SECS_MIN);
6316 scb->cmd.ffdc.second = (rem % IPS_SECS_MIN);
6318 year = IPS_EPOCH_YEAR;
6319 while (days < 0 || days >= year_lengths[yleap = IPS_IS_LEAP_YEAR(year)]) {
6322 newy = year + (days / IPS_DAYS_NORMAL_YEAR);
6325 days -= (newy - year) * IPS_DAYS_NORMAL_YEAR +
6326 IPS_NUM_LEAP_YEARS_THROUGH(newy - 1) -
6327 IPS_NUM_LEAP_YEARS_THROUGH(year - 1);
6331 scb->cmd.ffdc.yearH = year / 100;
6332 scb->cmd.ffdc.yearL = year % 100;
6334 for (i = 0; days >= month_lengths[i][yleap]; ++i)
6335 days -= month_lengths[i][yleap];
6337 scb->cmd.ffdc.month = i + 1;
6338 scb->cmd.ffdc.day = days + 1;
6341 /****************************************************************************
6342 * BIOS Flash Routines *
6343 ****************************************************************************/
6345 /****************************************************************************/
6347 /* Routine Name: ips_erase_bios */
6349 /* Routine Description: */
6350 /* Erase the BIOS on the adapter */
6352 /****************************************************************************/
6354 ips_erase_bios(ips_ha_t * ha)
6359 METHOD_TRACE("ips_erase_bios", 1);
6363 /* Clear the status register */
6364 outl(0, ha->io_addr + IPS_REG_FLAP);
6365 if (ha->revision_id == IPS_REVID_TROMBONE64)
6366 udelay(25); /* 25 us */
6368 outb(0x50, ha->io_addr + IPS_REG_FLDP);
6369 if (ha->revision_id == IPS_REVID_TROMBONE64)
6370 udelay(25); /* 25 us */
6373 outb(0x20, ha->io_addr + IPS_REG_FLDP);
6374 if (ha->revision_id == IPS_REVID_TROMBONE64)
6375 udelay(25); /* 25 us */
6378 outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6379 if (ha->revision_id == IPS_REVID_TROMBONE64)
6380 udelay(25); /* 25 us */
6383 outb(0x70, ha->io_addr + IPS_REG_FLDP);
6384 if (ha->revision_id == IPS_REVID_TROMBONE64)
6385 udelay(25); /* 25 us */
6387 timeout = 80000; /* 80 seconds */
6389 while (timeout > 0) {
6390 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6391 outl(0, ha->io_addr + IPS_REG_FLAP);
6392 udelay(25); /* 25 us */
6395 status = inb(ha->io_addr + IPS_REG_FLDP);
6404 /* check for timeout */
6408 /* try to suspend the erase */
6409 outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6410 if (ha->revision_id == IPS_REVID_TROMBONE64)
6411 udelay(25); /* 25 us */
6413 /* wait for 10 seconds */
6415 while (timeout > 0) {
6416 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6417 outl(0, ha->io_addr + IPS_REG_FLAP);
6418 udelay(25); /* 25 us */
6421 status = inb(ha->io_addr + IPS_REG_FLDP);
6433 /* check for valid VPP */
6438 /* check for succesful flash */
6440 /* sequence error */
6443 /* Otherwise, we were successful */
6445 outb(0x50, ha->io_addr + IPS_REG_FLDP);
6446 if (ha->revision_id == IPS_REVID_TROMBONE64)
6447 udelay(25); /* 25 us */
6450 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6451 if (ha->revision_id == IPS_REVID_TROMBONE64)
6452 udelay(25); /* 25 us */
6457 /****************************************************************************/
6459 /* Routine Name: ips_erase_bios_memio */
6461 /* Routine Description: */
6462 /* Erase the BIOS on the adapter */
6464 /****************************************************************************/
6466 ips_erase_bios_memio(ips_ha_t * ha)
6471 METHOD_TRACE("ips_erase_bios_memio", 1);
6475 /* Clear the status register */
6476 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6477 if (ha->revision_id == IPS_REVID_TROMBONE64)
6478 udelay(25); /* 25 us */
6480 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6481 if (ha->revision_id == IPS_REVID_TROMBONE64)
6482 udelay(25); /* 25 us */
6485 writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6486 if (ha->revision_id == IPS_REVID_TROMBONE64)
6487 udelay(25); /* 25 us */
6490 writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6491 if (ha->revision_id == IPS_REVID_TROMBONE64)
6492 udelay(25); /* 25 us */
6495 writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6496 if (ha->revision_id == IPS_REVID_TROMBONE64)
6497 udelay(25); /* 25 us */
6499 timeout = 80000; /* 80 seconds */
6501 while (timeout > 0) {
6502 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6503 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6504 udelay(25); /* 25 us */
6507 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6516 /* check for timeout */
6520 /* try to suspend the erase */
6521 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6522 if (ha->revision_id == IPS_REVID_TROMBONE64)
6523 udelay(25); /* 25 us */
6525 /* wait for 10 seconds */
6527 while (timeout > 0) {
6528 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6529 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6530 udelay(25); /* 25 us */
6533 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6545 /* check for valid VPP */
6550 /* check for succesful flash */
6552 /* sequence error */
6555 /* Otherwise, we were successful */
6557 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6558 if (ha->revision_id == IPS_REVID_TROMBONE64)
6559 udelay(25); /* 25 us */
6562 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6563 if (ha->revision_id == IPS_REVID_TROMBONE64)
6564 udelay(25); /* 25 us */
6569 /****************************************************************************/
6571 /* Routine Name: ips_program_bios */
6573 /* Routine Description: */
6574 /* Program the BIOS on the adapter */
6576 /****************************************************************************/
6578 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6585 METHOD_TRACE("ips_program_bios", 1);
6589 for (i = 0; i < buffersize; i++) {
6591 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6592 if (ha->revision_id == IPS_REVID_TROMBONE64)
6593 udelay(25); /* 25 us */
6595 outb(0x40, ha->io_addr + IPS_REG_FLDP);
6596 if (ha->revision_id == IPS_REVID_TROMBONE64)
6597 udelay(25); /* 25 us */
6599 outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6600 if (ha->revision_id == IPS_REVID_TROMBONE64)
6601 udelay(25); /* 25 us */
6603 /* wait up to one second */
6605 while (timeout > 0) {
6606 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6607 outl(0, ha->io_addr + IPS_REG_FLAP);
6608 udelay(25); /* 25 us */
6611 status = inb(ha->io_addr + IPS_REG_FLDP);
6622 outl(0, ha->io_addr + IPS_REG_FLAP);
6623 if (ha->revision_id == IPS_REVID_TROMBONE64)
6624 udelay(25); /* 25 us */
6626 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6627 if (ha->revision_id == IPS_REVID_TROMBONE64)
6628 udelay(25); /* 25 us */
6633 /* check the status */
6634 if (status & 0x18) {
6635 /* programming error */
6636 outl(0, ha->io_addr + IPS_REG_FLAP);
6637 if (ha->revision_id == IPS_REVID_TROMBONE64)
6638 udelay(25); /* 25 us */
6640 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6641 if (ha->revision_id == IPS_REVID_TROMBONE64)
6642 udelay(25); /* 25 us */
6648 /* Enable reading */
6649 outl(0, ha->io_addr + IPS_REG_FLAP);
6650 if (ha->revision_id == IPS_REVID_TROMBONE64)
6651 udelay(25); /* 25 us */
6653 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6654 if (ha->revision_id == IPS_REVID_TROMBONE64)
6655 udelay(25); /* 25 us */
6660 /****************************************************************************/
6662 /* Routine Name: ips_program_bios_memio */
6664 /* Routine Description: */
6665 /* Program the BIOS on the adapter */
6667 /****************************************************************************/
6669 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6676 METHOD_TRACE("ips_program_bios_memio", 1);
6680 for (i = 0; i < buffersize; i++) {
6682 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6683 if (ha->revision_id == IPS_REVID_TROMBONE64)
6684 udelay(25); /* 25 us */
6686 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6687 if (ha->revision_id == IPS_REVID_TROMBONE64)
6688 udelay(25); /* 25 us */
6690 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6691 if (ha->revision_id == IPS_REVID_TROMBONE64)
6692 udelay(25); /* 25 us */
6694 /* wait up to one second */
6696 while (timeout > 0) {
6697 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6698 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6699 udelay(25); /* 25 us */
6702 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6713 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6714 if (ha->revision_id == IPS_REVID_TROMBONE64)
6715 udelay(25); /* 25 us */
6717 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6718 if (ha->revision_id == IPS_REVID_TROMBONE64)
6719 udelay(25); /* 25 us */
6724 /* check the status */
6725 if (status & 0x18) {
6726 /* programming error */
6727 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6728 if (ha->revision_id == IPS_REVID_TROMBONE64)
6729 udelay(25); /* 25 us */
6731 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6732 if (ha->revision_id == IPS_REVID_TROMBONE64)
6733 udelay(25); /* 25 us */
6739 /* Enable reading */
6740 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6741 if (ha->revision_id == IPS_REVID_TROMBONE64)
6742 udelay(25); /* 25 us */
6744 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6745 if (ha->revision_id == IPS_REVID_TROMBONE64)
6746 udelay(25); /* 25 us */
6751 /****************************************************************************/
6753 /* Routine Name: ips_verify_bios */
6755 /* Routine Description: */
6756 /* Verify the BIOS on the adapter */
6758 /****************************************************************************/
6760 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6766 METHOD_TRACE("ips_verify_bios", 1);
6769 outl(0, ha->io_addr + IPS_REG_FLAP);
6770 if (ha->revision_id == IPS_REVID_TROMBONE64)
6771 udelay(25); /* 25 us */
6773 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6776 outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
6777 if (ha->revision_id == IPS_REVID_TROMBONE64)
6778 udelay(25); /* 25 us */
6779 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6783 for (i = 2; i < buffersize; i++) {
6785 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6786 if (ha->revision_id == IPS_REVID_TROMBONE64)
6787 udelay(25); /* 25 us */
6789 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6800 /****************************************************************************/
6802 /* Routine Name: ips_verify_bios_memio */
6804 /* Routine Description: */
6805 /* Verify the BIOS on the adapter */
6807 /****************************************************************************/
6809 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6815 METHOD_TRACE("ips_verify_bios_memio", 1);
6818 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6819 if (ha->revision_id == IPS_REVID_TROMBONE64)
6820 udelay(25); /* 25 us */
6822 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6825 writel(1, ha->mem_ptr + IPS_REG_FLAP);
6826 if (ha->revision_id == IPS_REVID_TROMBONE64)
6827 udelay(25); /* 25 us */
6828 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6832 for (i = 2; i < buffersize; i++) {
6834 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6835 if (ha->revision_id == IPS_REVID_TROMBONE64)
6836 udelay(25); /* 25 us */
6839 (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6850 /****************************************************************************/
6852 /* Routine Name: ips_abort_init */
6854 /* Routine Description: */
6855 /* cleanup routine for a failed adapter initialization */
6856 /****************************************************************************/
6858 ips_abort_init(ips_ha_t * ha, int index)
6862 ips_ha[index] = NULL;
6863 ips_sh[index] = NULL;
6867 /****************************************************************************/
6869 /* Routine Name: ips_shift_controllers */
6871 /* Routine Description: */
6872 /* helper function for ordering adapters */
6873 /****************************************************************************/
6875 ips_shift_controllers(int lowindex, int highindex)
6877 ips_ha_t *ha_sav = ips_ha[highindex];
6878 struct Scsi_Host *sh_sav = ips_sh[highindex];
6881 for (i = highindex; i > lowindex; i--) {
6882 ips_ha[i] = ips_ha[i - 1];
6883 ips_sh[i] = ips_sh[i - 1];
6884 ips_ha[i]->host_num = i;
6886 ha_sav->host_num = lowindex;
6887 ips_ha[lowindex] = ha_sav;
6888 ips_sh[lowindex] = sh_sav;
6891 /****************************************************************************/
6893 /* Routine Name: ips_order_controllers */
6895 /* Routine Description: */
6896 /* place controllers is the "proper" boot order */
6897 /****************************************************************************/
6899 ips_order_controllers(void)
6901 int i, j, tmp, position = 0;
6902 IPS_NVRAM_P5 *nvram;
6905 nvram = ips_ha[0]->nvram;
6907 if (nvram->adapter_order[0]) {
6908 for (i = 1; i <= nvram->adapter_order[0]; i++) {
6909 for (j = position; j < ips_num_controllers; j++) {
6910 switch (ips_ha[j]->ad_type) {
6911 case IPS_ADTYPE_SERVERAID6M:
6912 case IPS_ADTYPE_SERVERAID7M:
6913 if (nvram->adapter_order[i] == 'M') {
6914 ips_shift_controllers(position,
6919 case IPS_ADTYPE_SERVERAID4L:
6920 case IPS_ADTYPE_SERVERAID4M:
6921 case IPS_ADTYPE_SERVERAID4MX:
6922 case IPS_ADTYPE_SERVERAID4LX:
6923 if (nvram->adapter_order[i] == 'N') {
6924 ips_shift_controllers(position,
6929 case IPS_ADTYPE_SERVERAID6I:
6930 case IPS_ADTYPE_SERVERAID5I2:
6931 case IPS_ADTYPE_SERVERAID5I1:
6932 case IPS_ADTYPE_SERVERAID7k:
6933 if (nvram->adapter_order[i] == 'S') {
6934 ips_shift_controllers(position,
6939 case IPS_ADTYPE_SERVERAID:
6940 case IPS_ADTYPE_SERVERAID2:
6941 case IPS_ADTYPE_NAVAJO:
6942 case IPS_ADTYPE_KIOWA:
6943 case IPS_ADTYPE_SERVERAID3L:
6944 case IPS_ADTYPE_SERVERAID3:
6945 case IPS_ADTYPE_SERVERAID4H:
6946 if (nvram->adapter_order[i] == 'A') {
6947 ips_shift_controllers(position,
6957 /* if adapter_order[0], then ordering is complete */
6960 /* old bios, use older ordering */
6962 for (i = position; i < ips_num_controllers; i++) {
6963 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
6964 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
6965 ips_shift_controllers(position, i);
6970 /* if there were no 5I cards, then don't do any extra ordering */
6973 for (i = position; i < ips_num_controllers; i++) {
6974 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
6975 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
6976 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
6977 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
6978 ips_shift_controllers(position, i);
6986 /****************************************************************************/
6988 /* Routine Name: ips_register_scsi */
6990 /* Routine Description: */
6991 /* perform any registration and setup with the scsi layer */
6992 /****************************************************************************/
6994 ips_register_scsi(int index)
6996 struct Scsi_Host *sh;
6997 ips_ha_t *ha, *oldha = ips_ha[index];
6998 sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
7000 IPS_PRINTK(KERN_WARNING, oldha->pcidev,
7001 "Unable to register controller with SCSI subsystem\n");
7005 memcpy(ha, oldha, sizeof (ips_ha_t));
7006 free_irq(oldha->irq, oldha);
7007 /* Install the interrupt handler with the new ha */
7008 if (request_irq(ha->irq, do_ipsintr, SA_SHIRQ, ips_name, ha)) {
7009 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7010 "Unable to install interrupt handler\n");
7018 IPS_SCSI_SET_DEVICE(sh, ha);
7020 /* Store away needed values for later use */
7021 sh->io_port = ha->io_addr;
7022 sh->n_io_port = ha->io_addr ? 255 : 0;
7023 sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
7025 sh->sg_tablesize = sh->hostt->sg_tablesize;
7026 sh->can_queue = sh->hostt->can_queue;
7027 sh->cmd_per_lun = sh->hostt->cmd_per_lun;
7028 sh->unchecked_isa_dma = sh->hostt->unchecked_isa_dma;
7029 sh->use_clustering = sh->hostt->use_clustering;
7031 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,7)
7032 sh->max_sectors = 128;
7035 sh->max_id = ha->ntargets;
7036 sh->max_lun = ha->nlun;
7037 sh->max_channel = ha->nbus - 1;
7038 sh->can_queue = ha->max_cmds - 1;
7040 IPS_ADD_HOST(sh, NULL);
7044 /*---------------------------------------------------------------------------*/
7045 /* Routine Name: ips_remove_device */
7047 /* Routine Description: */
7048 /* Remove one Adapter ( Hot Plugging ) */
7049 /*---------------------------------------------------------------------------*/
7050 static void __devexit
7051 ips_remove_device(struct pci_dev *pci_dev)
7054 struct Scsi_Host *sh;
7057 for (i = 0; i < IPS_MAX_ADAPTERS; i++) {
7060 if ((pci_dev->bus->number == ha->pcidev->bus->number) &&
7061 (pci_dev->devfn == ha->pcidev->devfn)) {
7069 /****************************************************************************/
7071 /* Routine Name: ips_module_init */
7073 /* Routine Description: */
7074 /* function called on module load */
7075 /****************************************************************************/
7077 ips_module_init(void)
7079 if (pci_module_init(&ips_pci_driver) < 0)
7081 ips_driver_template.module = THIS_MODULE;
7082 ips_order_controllers();
7083 if (IPS_REGISTER_HOSTS(&ips_driver_template)) {
7084 pci_unregister_driver(&ips_pci_driver);
7087 register_reboot_notifier(&ips_notifier);
7091 /****************************************************************************/
7093 /* Routine Name: ips_module_exit */
7095 /* Routine Description: */
7096 /* function called on module unload */
7097 /****************************************************************************/
7099 ips_module_exit(void)
7101 IPS_UNREGISTER_HOSTS(&ips_driver_template);
7102 pci_unregister_driver(&ips_pci_driver);
7103 unregister_reboot_notifier(&ips_notifier);
7106 module_init(ips_module_init);
7107 module_exit(ips_module_exit);
7109 /*---------------------------------------------------------------------------*/
7110 /* Routine Name: ips_insert_device */
7112 /* Routine Description: */
7113 /* Add One Adapter ( Hot Plug ) */
7116 /* 0 if Successful, else non-zero */
7117 /*---------------------------------------------------------------------------*/
7118 static int __devinit
7119 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
7124 METHOD_TRACE("ips_insert_device", 1);
7125 if (pci_enable_device(pci_dev))
7128 rc = ips_init_phase1(pci_dev, &index);
7130 rc = ips_init_phase2(index);
7133 if (ips_register_scsi(index)) {
7134 ips_free(ips_ha[index]);
7139 ips_num_controllers++;
7141 ips_next_controller = ips_num_controllers;
7145 /*---------------------------------------------------------------------------*/
7146 /* Routine Name: ips_init_phase1 */
7148 /* Routine Description: */
7149 /* Adapter Initialization */
7152 /* 0 if Successful, else non-zero */
7153 /*---------------------------------------------------------------------------*/
7155 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
7162 uint8_t revision_id;
7166 uint16_t subdevice_id;
7169 dma_addr_t dma_address;
7170 char __iomem *ioremap_ptr;
7171 char __iomem *mem_ptr;
7174 METHOD_TRACE("ips_init_phase1", 1);
7175 index = IPS_MAX_ADAPTERS;
7176 for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
7177 if (ips_ha[j] == 0) {
7183 if (index >= IPS_MAX_ADAPTERS)
7186 /* stuff that we get in dev */
7188 bus = pci_dev->bus->number;
7189 func = pci_dev->devfn;
7191 /* Init MEM/IO addresses to 0 */
7197 for (j = 0; j < 2; j++) {
7198 if (!pci_resource_start(pci_dev, j))
7201 if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
7202 io_addr = pci_resource_start(pci_dev, j);
7203 io_len = pci_resource_len(pci_dev, j);
7205 mem_addr = pci_resource_start(pci_dev, j);
7206 mem_len = pci_resource_len(pci_dev, j);
7210 /* setup memory mapped area (if applicable) */
7215 if (!request_mem_region(mem_addr, mem_len, "ips")) {
7216 IPS_PRINTK(KERN_WARNING, pci_dev,
7217 "Couldn't allocate IO Memory space %x len %d.\n",
7222 base = mem_addr & PAGE_MASK;
7223 offs = mem_addr - base;
7224 ioremap_ptr = ioremap(base, PAGE_SIZE);
7225 mem_ptr = ioremap_ptr + offs;
7231 /* setup I/O mapped area (if applicable) */
7233 if (!request_region(io_addr, io_len, "ips")) {
7234 IPS_PRINTK(KERN_WARNING, pci_dev,
7235 "Couldn't allocate IO space %x len %d.\n",
7241 /* get the revision ID */
7242 if (pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id)) {
7243 IPS_PRINTK(KERN_WARNING, pci_dev, "Can't get revision id.\n");
7247 subdevice_id = pci_dev->subsystem_device;
7249 /* found a controller */
7250 ha = kmalloc(sizeof (ips_ha_t), GFP_KERNEL);
7252 IPS_PRINTK(KERN_WARNING, pci_dev,
7253 "Unable to allocate temporary ha struct\n");
7257 memset(ha, 0, sizeof (ips_ha_t));
7259 ips_sh[index] = NULL;
7263 /* Store info in HA structure */
7265 ha->io_addr = io_addr;
7266 ha->io_len = io_len;
7267 ha->mem_addr = mem_addr;
7268 ha->mem_len = mem_len;
7269 ha->mem_ptr = mem_ptr;
7270 ha->ioremap_ptr = ioremap_ptr;
7271 ha->host_num = (uint32_t) index;
7272 ha->revision_id = revision_id;
7273 ha->slot_num = PCI_SLOT(pci_dev->devfn);
7274 ha->device_id = pci_dev->device;
7275 ha->subdevice_id = subdevice_id;
7276 ha->pcidev = pci_dev;
7279 * Set the pci_dev's dma_mask. Not all adapters support 64bit
7280 * addressing so don't enable it if the adapter can't support
7281 * it! Also, don't use 64bit addressing if dma addresses
7282 * are guaranteed to be < 4G.
7284 if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
7285 !pci_set_dma_mask(ha->pcidev, 0xffffffffffffffffULL)) {
7286 (ha)->flags |= IPS_HA_ENH_SG;
7288 if (pci_set_dma_mask(ha->pcidev, 0xffffffffULL) != 0) {
7289 printk(KERN_WARNING "Unable to set DMA Mask\n");
7290 return ips_abort_init(ha, index);
7293 if(ips_cd_boot && !ips_FlashData){
7294 ips_FlashData = pci_alloc_consistent(pci_dev, PAGE_SIZE << 7,
7298 ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ),
7301 IPS_PRINTK(KERN_WARNING, pci_dev,
7302 "Unable to allocate host inquiry structure\n");
7303 return ips_abort_init(ha, index);
7306 ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) +
7307 sizeof (IPS_IO_CMD), &dma_address);
7309 IPS_PRINTK(KERN_WARNING, pci_dev,
7310 "Unable to allocate host adapt & dummy structures\n");
7311 return ips_abort_init(ha, index);
7313 ha->adapt->hw_status_start = dma_address;
7314 ha->dummy = (void *) (ha->adapt + 1);
7318 ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address);
7319 if (!ha->logical_drive_info) {
7320 IPS_PRINTK(KERN_WARNING, pci_dev,
7321 "Unable to allocate logical drive info structure\n");
7322 return ips_abort_init(ha, index);
7324 ha->logical_drive_info_dma_addr = dma_address;
7327 ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
7330 IPS_PRINTK(KERN_WARNING, pci_dev,
7331 "Unable to allocate host conf structure\n");
7332 return ips_abort_init(ha, index);
7335 ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
7338 IPS_PRINTK(KERN_WARNING, pci_dev,
7339 "Unable to allocate host NVRAM structure\n");
7340 return ips_abort_init(ha, index);
7343 ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
7346 IPS_PRINTK(KERN_WARNING, pci_dev,
7347 "Unable to allocate host subsystem structure\n");
7348 return ips_abort_init(ha, index);
7351 /* the ioctl buffer is now used during adapter initialization, so its
7352 * successful allocation is now required */
7353 if (ips_ioctlsize < PAGE_SIZE)
7354 ips_ioctlsize = PAGE_SIZE;
7356 ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize,
7357 &ha->ioctl_busaddr);
7358 ha->ioctl_len = ips_ioctlsize;
7359 if (!ha->ioctl_data) {
7360 IPS_PRINTK(KERN_WARNING, pci_dev,
7361 "Unable to allocate IOCTL data\n");
7362 return ips_abort_init(ha, index);
7368 ips_setup_funclist(ha);
7370 if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7371 /* If Morpheus appears dead, reset it */
7372 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7373 if (IsDead == 0xDEADBEEF) {
7374 ips_reset_morpheus(ha);
7379 * Initialize the card if it isn't already
7382 if (!(*ha->func.isinit) (ha)) {
7383 if (!(*ha->func.init) (ha)) {
7385 * Initialization failed
7387 IPS_PRINTK(KERN_WARNING, pci_dev,
7388 "Unable to initialize controller\n");
7389 return ips_abort_init(ha, index);
7397 /*---------------------------------------------------------------------------*/
7398 /* Routine Name: ips_init_phase2 */
7400 /* Routine Description: */
7401 /* Adapter Initialization Phase 2 */
7404 /* 0 if Successful, else non-zero */
7405 /*---------------------------------------------------------------------------*/
7407 ips_init_phase2(int index)
7413 METHOD_TRACE("ips_init_phase2", 1);
7415 ips_ha[index] = NULL;
7419 /* Install the interrupt handler */
7420 if (request_irq(ha->irq, do_ipsintr, SA_SHIRQ, ips_name, ha)) {
7421 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7422 "Unable to install interrupt handler\n");
7423 return ips_abort_init(ha, index);
7427 * Allocate a temporary SCB for initialization
7430 if (!ips_allocatescbs(ha)) {
7431 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7432 "Unable to allocate a CCB\n");
7433 free_irq(ha->irq, ha);
7434 return ips_abort_init(ha, index);
7437 if (!ips_hainit(ha)) {
7438 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7439 "Unable to initialize controller\n");
7440 free_irq(ha->irq, ha);
7441 return ips_abort_init(ha, index);
7443 /* Free the temporary SCB */
7444 ips_deallocatescbs(ha, 1);
7447 if (!ips_allocatescbs(ha)) {
7448 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7449 "Unable to allocate CCBs\n");
7450 free_irq(ha->irq, ha);
7451 return ips_abort_init(ha, index);
7457 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,9)
7458 MODULE_LICENSE("GPL");
7461 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7463 #ifdef MODULE_VERSION
7464 MODULE_VERSION(IPS_VER_STRING);
7469 * Overrides for Emacs so that we almost follow Linus's tabbing style.
7470 * Emacs will notice this stuff at the end of the file and automatically
7471 * adjust the settings for this buffer only. This must remain at the end
7473 * ---------------------------------------------------------------------------
7476 * c-brace-imaginary-offset: 0
7477 * c-brace-offset: -2
7478 * c-argdecl-indent: 2
7479 * c-label-offset: -2
7480 * c-continued-statement-offset: 2
7481 * c-continued-brace-offset: 0
7482 * indent-tabs-mode: nil