2 * MPC8378E MDS Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "fsl,mpc8378emds";
16 compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
41 clock-frequency = <0>;
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
53 compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
58 // booting from NOR flash
59 ranges = <0 0x0 0xfe000000 0x02000000
60 1 0x0 0xf8000000 0x00008000
61 3 0x0 0xe0600000 0x00008000>;
66 compatible = "cfi-flash";
67 reg = <0 0x0 0x2000000>;
77 reg = <0x100000 0x800000>;
81 reg = <0x1d00000 0x200000>;
85 reg = <0x1f00000 0x100000>;
91 compatible = "fsl,mpc837xmds-bcsr";
97 compatible = "fsl,mpc8378-fcm-nand",
102 reg = <0x0 0x100000>;
107 reg = <0x100000 0x300000>;
111 reg = <0x400000 0x1c00000>;
117 #address-cells = <1>;
120 compatible = "simple-bus";
121 ranges = <0x0 0xe0000000 0x00100000>;
122 reg = <0xe0000000 0x00000200>;
126 compatible = "mpc83xx_wdt";
131 #address-cells = <1>;
134 compatible = "fsl-i2c";
135 reg = <0x3000 0x100>;
136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>;
142 #address-cells = <1>;
145 compatible = "fsl-i2c";
146 reg = <0x3100 0x100>;
147 interrupts = <15 0x8>;
148 interrupt-parent = <&ipic>;
154 compatible = "fsl,spi";
155 reg = <0x7000 0x1000>;
156 interrupts = <16 0x8>;
157 interrupt-parent = <&ipic>;
162 #address-cells = <1>;
164 compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
166 ranges = <0 0x8100 0x1a8>;
167 interrupt-parent = <&ipic>;
171 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
173 interrupt-parent = <&ipic>;
177 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
179 interrupt-parent = <&ipic>;
183 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
185 interrupt-parent = <&ipic>;
189 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
191 interrupt-parent = <&ipic>;
197 compatible = "fsl-usb2-dr";
198 reg = <0x23000 0x1000>;
199 #address-cells = <1>;
201 interrupt-parent = <&ipic>;
202 interrupts = <38 0x8>;
208 #address-cells = <1>;
210 compatible = "fsl,gianfar-mdio";
211 reg = <0x24520 0x20>;
212 phy2: ethernet-phy@2 {
213 interrupt-parent = <&ipic>;
214 interrupts = <17 0x8>;
216 device_type = "ethernet-phy";
218 phy3: ethernet-phy@3 {
219 interrupt-parent = <&ipic>;
220 interrupts = <18 0x8>;
222 device_type = "ethernet-phy";
226 enet0: ethernet@24000 {
228 device_type = "network";
230 compatible = "gianfar";
231 reg = <0x24000 0x1000>;
232 local-mac-address = [ 00 00 00 00 00 00 ];
233 interrupts = <32 0x8 33 0x8 34 0x8>;
234 phy-connection-type = "mii";
235 interrupt-parent = <&ipic>;
236 phy-handle = <&phy2>;
239 enet1: ethernet@25000 {
241 device_type = "network";
243 compatible = "gianfar";
244 reg = <0x25000 0x1000>;
245 local-mac-address = [ 00 00 00 00 00 00 ];
246 interrupts = <35 0x8 36 0x8 37 0x8>;
247 phy-connection-type = "mii";
248 interrupt-parent = <&ipic>;
249 phy-handle = <&phy3>;
252 serial0: serial@4500 {
254 device_type = "serial";
255 compatible = "ns16550";
256 reg = <0x4500 0x100>;
257 clock-frequency = <0>;
258 interrupts = <9 0x8>;
259 interrupt-parent = <&ipic>;
262 serial1: serial@4600 {
264 device_type = "serial";
265 compatible = "ns16550";
266 reg = <0x4600 0x100>;
267 clock-frequency = <0>;
268 interrupts = <10 0x8>;
269 interrupt-parent = <&ipic>;
273 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
274 "fsl,sec2.1", "fsl,sec2.0";
275 reg = <0x30000 0x10000>;
276 interrupts = <11 0x8>;
277 interrupt-parent = <&ipic>;
278 fsl,num-channels = <4>;
279 fsl,channel-fifo-len = <24>;
280 fsl,exec-units-mask = <0x9fe>;
281 fsl,descriptor-types-mask = <0x3ab0ebf>;
286 compatible = "fsl,esdhc";
287 reg = <0x2e000 0x1000>;
288 interrupts = <42 0x8>;
289 interrupt-parent = <&ipic>;
293 * interrupts cell = <intr #, sense>
294 * sense values match linux IORESOURCE_IRQ_* defines:
295 * sense == 8: Level, low assertion
296 * sense == 2: Edge, high-to-low change
299 compatible = "fsl,ipic";
300 interrupt-controller;
301 #address-cells = <0>;
302 #interrupt-cells = <2>;
309 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
313 0x8800 0x0 0x0 0x1 &ipic 20 0x8
314 0x8800 0x0 0x0 0x2 &ipic 21 0x8
315 0x8800 0x0 0x0 0x3 &ipic 22 0x8
316 0x8800 0x0 0x0 0x4 &ipic 23 0x8
319 0x9000 0x0 0x0 0x1 &ipic 22 0x8
320 0x9000 0x0 0x0 0x2 &ipic 23 0x8
321 0x9000 0x0 0x0 0x3 &ipic 20 0x8
322 0x9000 0x0 0x0 0x4 &ipic 21 0x8
325 0x9800 0x0 0x0 0x1 &ipic 23 0x8
326 0x9800 0x0 0x0 0x2 &ipic 20 0x8
327 0x9800 0x0 0x0 0x3 &ipic 21 0x8
328 0x9800 0x0 0x0 0x4 &ipic 22 0x8
331 0xa800 0x0 0x0 0x1 &ipic 20 0x8
332 0xa800 0x0 0x0 0x2 &ipic 21 0x8
333 0xa800 0x0 0x0 0x3 &ipic 22 0x8
334 0xa800 0x0 0x0 0x4 &ipic 23 0x8
337 0xb000 0x0 0x0 0x1 &ipic 23 0x8
338 0xb000 0x0 0x0 0x2 &ipic 20 0x8
339 0xb000 0x0 0x0 0x3 &ipic 21 0x8
340 0xb000 0x0 0x0 0x4 &ipic 22 0x8
343 0xb800 0x0 0x0 0x1 &ipic 22 0x8
344 0xb800 0x0 0x0 0x2 &ipic 23 0x8
345 0xb800 0x0 0x0 0x3 &ipic 20 0x8
346 0xb800 0x0 0x0 0x4 &ipic 21 0x8
349 0xc000 0x0 0x0 0x1 &ipic 21 0x8
350 0xc000 0x0 0x0 0x2 &ipic 22 0x8
351 0xc000 0x0 0x0 0x3 &ipic 23 0x8
352 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
353 interrupt-parent = <&ipic>;
354 interrupts = <66 0x8>;
355 bus-range = <0x0 0x0>;
356 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
357 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
358 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
359 clock-frequency = <0>;
360 #interrupt-cells = <1>;
362 #address-cells = <3>;
363 reg = <0xe0008500 0x100>;
364 compatible = "fsl,mpc8349-pci";