git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <net/mac80211.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40
  41 #include "iwl-eeprom.h"
  42 #include "iwl-dev.h"
  43 #include "iwl-core.h"
  44 #include "iwl-io.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-calib.h"
  47 #include "iwl-sta.h"
  48
  49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  50 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  51
  52 /* module parameters */
  53 static struct iwl_mod_params iwl4965_mod_params = {
  54         .num_of_queues = IWL49_NUM_QUEUES,
  55         .enable_qos = 1,
  56         .amsdu_size_8K = 1,
  57         .restart_fw = 1,
  58         /* the rest are 0 by default */
  59 };
  60
  61 /* check contents of special bootstrap uCode SRAM */
  62 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  63 {
  64         __le32 *image = priv->ucode_boot.v_addr;
  65         u32 len = priv->ucode_boot.len;
  66         u32 reg;
  67         u32 val;
  68
  69         IWL_DEBUG_INFO("Begin verify bsm\n");
  70
  71         /* verify BSM SRAM contents */
  72         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  73         for (reg = BSM_SRAM_LOWER_BOUND;
  74              reg < BSM_SRAM_LOWER_BOUND + len;
  75              reg += sizeof(u32), image++) {
  76                 val = iwl_read_prph(priv, reg);
  77                 if (val != le32_to_cpu(*image)) {
  78                         IWL_ERROR("BSM uCode verification failed at "
  79                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  80                                   BSM_SRAM_LOWER_BOUND,
  81                                   reg - BSM_SRAM_LOWER_BOUND, len,
  82                                   val, le32_to_cpu(*image));
  83                         return -EIO;
  84                 }
  85         }
  86
  87         IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  88
  89         return 0;
  90 }
  91
  92 /**
  93  * iwl4965_load_bsm - Load bootstrap instructions
  94  *
  95  * BSM operation:
  96  *
  97  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  98  * in special SRAM that does not power down during RFKILL.  When powering back
  99  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 100  * the bootstrap program into the on-board processor, and starts it.
 101  *
 102  * The bootstrap program loads (via DMA) instructions and data for a new
 103  * program from host DRAM locations indicated by the host driver in the
 104  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 105  * automatically.
 106  *
 107  * When initializing the NIC, the host driver points the BSM to the
 108  * "initialize" uCode image.  This uCode sets up some internal data, then
 109  * notifies host via "initialize alive" that it is complete.
 110  *
 111  * The host then replaces the BSM_DRAM_* pointer values to point to the
 112  * normal runtime uCode instructions and a backup uCode data cache buffer
 113  * (filled initially with starting data values for the on-board processor),
 114  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 115  * which begins normal operation.
 116  *
 117  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 118  * the backup data cache in DRAM before SRAM is powered down.
 119  *
 120  * When powering back up, the BSM loads the bootstrap program.  This reloads
 121  * the runtime uCode instructions and the backup data cache into SRAM,
 122  * and re-launches the runtime uCode from where it left off.
 123  */
 124 static int iwl4965_load_bsm(struct iwl_priv *priv)
 125 {
 126         __le32 *image = priv->ucode_boot.v_addr;
 127         u32 len = priv->ucode_boot.len;
 128         dma_addr_t pinst;
 129         dma_addr_t pdata;
 130         u32 inst_len;
 131         u32 data_len;
 132         int i;
 133         u32 done;
 134         u32 reg_offset;
 135         int ret;
 136
 137         IWL_DEBUG_INFO("Begin load bsm\n");
 138
 139         priv->ucode_type = UCODE_RT;
 140
 141         /* make sure bootstrap program is no larger than BSM's SRAM size */
 142         if (len > IWL_MAX_BSM_SIZE)
 143                 return -EINVAL;
 144
 145         /* Tell bootstrap uCode where to find the "Initialize" uCode
 146          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 147          * NOTE:  iwl_init_alive_start() will replace these values,
 148          *        after the "initialize" uCode has run, to point to
 149          *        runtime/protocol instructions and backup data cache.
 150          */
 151         pinst = priv->ucode_init.p_addr >> 4;
 152         pdata = priv->ucode_init_data.p_addr >> 4;
 153         inst_len = priv->ucode_init.len;
 154         data_len = priv->ucode_init_data.len;
 155
 156         ret = iwl_grab_nic_access(priv);
 157         if (ret)
 158                 return ret;
 159
 160         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 161         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 162         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 163         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 164
 165         /* Fill BSM memory with bootstrap instructions */
 166         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 167              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 168              reg_offset += sizeof(u32), image++)
 169                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 170
 171         ret = iwl4965_verify_bsm(priv);
 172         if (ret) {
 173                 iwl_release_nic_access(priv);
 174                 return ret;
 175         }
 176
 177         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 178         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 179         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
 180         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 181
 182         /* Load bootstrap code into instruction SRAM now,
 183          *   to prepare to load "initialize" uCode */
 184         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 185
 186         /* Wait for load of bootstrap uCode to finish */
 187         for (i = 0; i < 100; i++) {
 188                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 189                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 190                         break;
 191                 udelay(10);
 192         }
 193         if (i < 100)
 194                 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
 195         else {
 196                 IWL_ERROR("BSM write did not complete!\n");
 197                 return -EIO;
 198         }
 199
 200         /* Enable future boot loads whenever power management unit triggers it
 201          *   (e.g. when powering back up after power-save shutdown) */
 202         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 203
 204         iwl_release_nic_access(priv);
 205
 206         return 0;
 207 }
 208
 209 /**
 210  * iwl4965_set_ucode_ptrs - Set uCode address location
 211  *
 212  * Tell initialization uCode where to find runtime uCode.
 213  *
 214  * BSM registers initially contain pointers to initialization uCode.
 215  * We need to replace them to load runtime uCode inst and data,
 216  * and to save runtime data when powering down.
 217  */
 218 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 219 {
 220         dma_addr_t pinst;
 221         dma_addr_t pdata;
 222         unsigned long flags;
 223         int ret = 0;
 224
 225         /* bits 35:4 for 4965 */
 226         pinst = priv->ucode_code.p_addr >> 4;
 227         pdata = priv->ucode_data_backup.p_addr >> 4;
 228
 229         spin_lock_irqsave(&priv->lock, flags);
 230         ret = iwl_grab_nic_access(priv);
 231         if (ret) {
 232                 spin_unlock_irqrestore(&priv->lock, flags);
 233                 return ret;
 234         }
 235
 236         /* Tell bootstrap uCode where to find image to load */
 237         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 238         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 239         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 240                                  priv->ucode_data.len);
 241
 242         /* Inst bytecount must be last to set up, bit 31 signals uCode
 243          *   that all new ptr/size info is in place */
 244         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 245                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 246         iwl_release_nic_access(priv);
 247
 248         spin_unlock_irqrestore(&priv->lock, flags);
 249
 250         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
 251
 252         return ret;
 253 }
 254
 255 /**
 256  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 257  *
 258  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 259  *
 260  * The 4965 "initialize" ALIVE reply contains calibration data for:
 261  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 262  *   (3945 does not contain this data).
 263  *
 264  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 265 */
 266 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 267 {
 268         /* Check alive response for "valid" sign from uCode */
 269         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 270                 /* We had an error bringing up the hardware, so take it
 271                  * all the way back down so we can try again */
 272                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
 273                 goto restart;
 274         }
 275
 276         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 277          * This is a paranoid check, because we would not have gotten the
 278          * "initialize" alive if code weren't properly loaded.  */
 279         if (iwl_verify_ucode(priv)) {
 280                 /* Runtime instruction load was bad;
 281                  * take it all the way back down so we can try again */
 282                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 283                 goto restart;
 284         }
 285
 286         /* Calculate temperature */
 287         priv->temperature = iwl4965_hw_get_temperature(priv);
 288
 289         /* Send pointers to protocol/runtime uCode image ... init code will
 290          * load and launch runtime uCode, which will send us another "Alive"
 291          * notification. */
 292         IWL_DEBUG_INFO("Initialization Alive received.\n");
 293         if (iwl4965_set_ucode_ptrs(priv)) {
 294                 /* Runtime instruction load won't happen;
 295                  * take it all the way back down so we can try again */
 296                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
 297                 goto restart;
 298         }
 299         return;
 300
 301 restart:
 302         queue_work(priv->workqueue, &priv->restart);
 303 }
 304
 305 static int is_fat_channel(__le32 rxon_flags)
 306 {
 307         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 308                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 309 }
 310
 311 /*
 312  * EEPROM handlers
 313  */
 314
 315 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
 316 {
 317         u16 eeprom_ver;
 318         u16 calib_ver;
 319
 320         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 321
 322         calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 323
 324         if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
 325             calib_ver < EEPROM_4965_TX_POWER_VERSION)
 326                 goto err;
 327
 328         return 0;
 329 err:
 330         IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 331                   eeprom_ver, EEPROM_4965_EEPROM_VERSION,
 332                   calib_ver, EEPROM_4965_TX_POWER_VERSION);
 333         return -EINVAL;
 334
 335 }
 336 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 337 {
 338         int ret;
 339         unsigned long flags;
 340
 341         spin_lock_irqsave(&priv->lock, flags);
 342         ret = iwl_grab_nic_access(priv);
 343         if (ret) {
 344                 spin_unlock_irqrestore(&priv->lock, flags);
 345                 return ret;
 346         }
 347
 348         if (src == IWL_PWR_SRC_VAUX) {
 349                 u32 val;
 350                 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
 351                                             &val);
 352
 353                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 354                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 355                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 356                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 357                 }
 358         } else {
 359                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 360                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 361                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 362         }
 363
 364         iwl_release_nic_access(priv);
 365         spin_unlock_irqrestore(&priv->lock, flags);
 366
 367         return ret;
 368 }
 369
 370 /*
 371  * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
 372  * must be called under priv->lock and mac access
 373  */
 374 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 375 {
 376         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 377 }
 378
 379 static int iwl4965_apm_init(struct iwl_priv *priv)
 380 {
 381         int ret = 0;
 382
 383         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 384                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 385
 386         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 387         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 388                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 389
 390         /* set "initialization complete" bit to move adapter
 391          * D0U* --> D0A* state */
 392         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 393
 394         /* wait for clock stabilization */
 395         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 396                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 397                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 398         if (ret < 0) {
 399                 IWL_DEBUG_INFO("Failed to init the card\n");
 400                 goto out;
 401         }
 402
 403         ret = iwl_grab_nic_access(priv);
 404         if (ret)
 405                 goto out;
 406
 407         /* enable DMA */
 408         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 409                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 410
 411         udelay(20);
 412
 413         /* disable L1-Active */
 414         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 415                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 416
 417         iwl_release_nic_access(priv);
 418 out:
 419         return ret;
 420 }
 421
 422
 423 static void iwl4965_nic_config(struct iwl_priv *priv)
 424 {
 425         unsigned long flags;
 426         u32 val;
 427         u16 radio_cfg;
 428         u8 val_link;
 429
 430         spin_lock_irqsave(&priv->lock, flags);
 431
 432         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 433                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 434                 /* Enable No Snoop field */
 435                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 436                                        val & ~(1 << 11));
 437         }
 438
 439         pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
 440
 441         /* L1 is enabled by BIOS */
 442         if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
 443                 /* diable L0S disabled L1A enabled */
 444                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 445         else
 446                 /* L0S enabled L1A disabled */
 447                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 448
 449         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 450
 451         /* write radio config values to register */
 452         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 453                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 454                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 455                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 456                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 457
 458         /* set CSR_HW_CONFIG_REG for uCode use */
 459         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 460                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 461                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 462
 463         priv->calib_info = (struct iwl_eeprom_calib_info *)
 464                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 465
 466         spin_unlock_irqrestore(&priv->lock, flags);
 467 }
 468
 469 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 470 {
 471         int ret = 0;
 472         unsigned long flags;
 473
 474         spin_lock_irqsave(&priv->lock, flags);
 475
 476         /* set stop master bit */
 477         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 478
 479         ret = iwl_poll_bit(priv, CSR_RESET,
 480                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
 481                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 482         if (ret < 0)
 483                 goto out;
 484
 485 out:
 486         spin_unlock_irqrestore(&priv->lock, flags);
 487         IWL_DEBUG_INFO("stop master\n");
 488
 489         return ret;
 490 }
 491
 492 static void iwl4965_apm_stop(struct iwl_priv *priv)
 493 {
 494         unsigned long flags;
 495
 496         iwl4965_apm_stop_master(priv);
 497
 498         spin_lock_irqsave(&priv->lock, flags);
 499
 500         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 501
 502         udelay(10);
 503
 504         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 505         spin_unlock_irqrestore(&priv->lock, flags);
 506 }
 507
 508 static int iwl4965_apm_reset(struct iwl_priv *priv)
 509 {
 510         int ret = 0;
 511         unsigned long flags;
 512
 513         iwl4965_apm_stop_master(priv);
 514
 515         spin_lock_irqsave(&priv->lock, flags);
 516
 517         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 518
 519         udelay(10);
 520
 521         /* FIXME: put here L1A -L0S w/a */
 522
 523         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 524
 525         ret = iwl_poll_bit(priv, CSR_RESET,
 526                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 527                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
 528
 529         if (ret)
 530                 goto out;
 531
 532         udelay(10);
 533
 534         ret = iwl_grab_nic_access(priv);
 535         if (ret)
 536                 goto out;
 537         /* Enable DMA and BSM Clock */
 538         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 539                                               APMG_CLK_VAL_BSM_CLK_RQT);
 540
 541         udelay(10);
 542
 543         /* disable L1A */
 544         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 545                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 546
 547         iwl_release_nic_access(priv);
 548
 549         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 550         wake_up_interruptible(&priv->wait_command_queue);
 551
 552 out:
 553         spin_unlock_irqrestore(&priv->lock, flags);
 554
 555         return ret;
 556 }
 557
 558 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 559  * Called after every association, but this runs only once!
 560  *  ... once chain noise is calibrated the first time, it's good forever.  */
 561 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 562 {
 563         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 564
 565         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 566                 struct iwl4965_calibration_cmd cmd;
 567
 568                 memset(&cmd, 0, sizeof(cmd));
 569                 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
 570                 cmd.diff_gain_a = 0;
 571                 cmd.diff_gain_b = 0;
 572                 cmd.diff_gain_c = 0;
 573                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 574                                  sizeof(cmd), &cmd))
 575                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 576                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 577                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 578         }
 579 }
 580
 581 static void iwl4965_gain_computation(struct iwl_priv *priv,
 582                 u32 *average_noise,
 583                 u16 min_average_noise_antenna_i,
 584                 u32 min_average_noise)
 585 {
 586         int i, ret;
 587         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 588
 589         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 590
 591         for (i = 0; i < NUM_RX_CHAINS; i++) {
 592                 s32 delta_g = 0;
 593
 594                 if (!(data->disconn_array[i]) &&
 595                     (data->delta_gain_code[i] ==
 596                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 597                         delta_g = average_noise[i] - min_average_noise;
 598                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 599                         data->delta_gain_code[i] =
 600                                 min(data->delta_gain_code[i],
 601                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 602
 603                         data->delta_gain_code[i] =
 604                                 (data->delta_gain_code[i] | (1 << 2));
 605                 } else {
 606                         data->delta_gain_code[i] = 0;
 607                 }
 608         }
 609         IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
 610                      data->delta_gain_code[0],
 611                      data->delta_gain_code[1],
 612                      data->delta_gain_code[2]);
 613
 614         /* Differential gain gets sent to uCode only once */
 615         if (!data->radio_write) {
 616                 struct iwl4965_calibration_cmd cmd;
 617                 data->radio_write = 1;
 618
 619                 memset(&cmd, 0, sizeof(cmd));
 620                 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
 621                 cmd.diff_gain_a = data->delta_gain_code[0];
 622                 cmd.diff_gain_b = data->delta_gain_code[1];
 623                 cmd.diff_gain_c = data->delta_gain_code[2];
 624                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 625                                       sizeof(cmd), &cmd);
 626                 if (ret)
 627                         IWL_DEBUG_CALIB("fail sending cmd "
 628                                      "REPLY_PHY_CALIBRATION_CMD \n");
 629
 630                 /* TODO we might want recalculate
 631                  * rx_chain in rxon cmd */
 632
 633                 /* Mark so we run this algo only once! */
 634                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 635         }
 636         data->chain_noise_a = 0;
 637         data->chain_noise_b = 0;
 638         data->chain_noise_c = 0;
 639         data->chain_signal_a = 0;
 640         data->chain_signal_b = 0;
 641         data->chain_signal_c = 0;
 642         data->beacon_count = 0;
 643 }
 644
 645 static void iwl4965_bg_txpower_work(struct work_struct *work)
 646 {
 647         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 648                         txpower_work);
 649
 650         /* If a scan happened to start before we got here
 651          * then just return; the statistics notification will
 652          * kick off another scheduled work to compensate for
 653          * any temperature delta we missed here. */
 654         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 655             test_bit(STATUS_SCANNING, &priv->status))
 656                 return;
 657
 658         mutex_lock(&priv->mutex);
 659
 660         /* Regardless of if we are assocaited, we must reconfigure the
 661          * TX power since frames can be sent on non-radar channels while
 662          * not associated */
 663         iwl4965_send_tx_power(priv);
 664
 665         /* Update last_temperature to keep is_calib_needed from running
 666          * when it isn't needed... */
 667         priv->last_temperature = priv->temperature;
 668
 669         mutex_unlock(&priv->mutex);
 670 }
 671
 672 /*
 673  * Acquire priv->lock before calling this function !
 674  */
 675 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 676 {
 677         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 678                              (index & 0xff) | (txq_id << 8));
 679         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 680 }
 681
 682 /**
 683  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 684  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 685  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 686  *
 687  * NOTE:  Acquire priv->lock before calling this function !
 688  */
 689 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 690                                         struct iwl_tx_queue *txq,
 691                                         int tx_fifo_id, int scd_retry)
 692 {
 693         int txq_id = txq->q.id;
 694
 695         /* Find out whether to activate Tx queue */
 696         int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
 697
 698         /* Set up and activate */
 699         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 700                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 701                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 702                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 703                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 704                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 705
 706         txq->sched_retry = scd_retry;
 707
 708         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 709                        active ? "Activate" : "Deactivate",
 710                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 711 }
 712
 713 static const u16 default_queue_to_tx_fifo[] = {
 714         IWL_TX_FIFO_AC3,
 715         IWL_TX_FIFO_AC2,
 716         IWL_TX_FIFO_AC1,
 717         IWL_TX_FIFO_AC0,
 718         IWL49_CMD_FIFO_NUM,
 719         IWL_TX_FIFO_HCCA_1,
 720         IWL_TX_FIFO_HCCA_2
 721 };
 722
 723 static int iwl4965_alive_notify(struct iwl_priv *priv)
 724 {
 725         u32 a;
 726         int i = 0;
 727         unsigned long flags;
 728         int ret;
 729
 730         spin_lock_irqsave(&priv->lock, flags);
 731
 732         ret = iwl_grab_nic_access(priv);
 733         if (ret) {
 734                 spin_unlock_irqrestore(&priv->lock, flags);
 735                 return ret;
 736         }
 737
 738         /* Clear 4965's internal Tx Scheduler data base */
 739         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 740         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 741         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 742                 iwl_write_targ_mem(priv, a, 0);
 743         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 744                 iwl_write_targ_mem(priv, a, 0);
 745         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 746                 iwl_write_targ_mem(priv, a, 0);
 747
 748         /* Tel 4965 where to find Tx byte count tables */
 749         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 750                 (priv->shared_phys +
 751                  offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
 752
 753         /* Disable chain mode for all queues */
 754         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 755
 756         /* Initialize each Tx queue (including the command queue) */
 757         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 758
 759                 /* TFD circular buffer read/write indexes */
 760                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 761                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 762
 763                 /* Max Tx Window size for Scheduler-ACK mode */
 764                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 765                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 766                                 (SCD_WIN_SIZE <<
 767                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 768                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 769
 770                 /* Frame limit */
 771                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 772                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 773                                 sizeof(u32),
 774                                 (SCD_FRAME_LIMIT <<
 775                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 776                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 777
 778         }
 779         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 780                                  (1 << priv->hw_params.max_txq_num) - 1);
 781
 782         /* Activate all Tx DMA/FIFO channels */
 783         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
 784
 785         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 786
 787         /* Map each Tx/cmd queue to its corresponding fifo */
 788         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 789                 int ac = default_queue_to_tx_fifo[i];
 790                 iwl_txq_ctx_activate(priv, i);
 791                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 792         }
 793
 794         iwl_release_nic_access(priv);
 795         spin_unlock_irqrestore(&priv->lock, flags);
 796
 797         return ret;
 798 }
 799
 800 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 801         .min_nrg_cck = 97,
 802         .max_nrg_cck = 0,
 803
 804         .auto_corr_min_ofdm = 85,
 805         .auto_corr_min_ofdm_mrc = 170,
 806         .auto_corr_min_ofdm_x1 = 105,
 807         .auto_corr_min_ofdm_mrc_x1 = 220,
 808
 809         .auto_corr_max_ofdm = 120,
 810         .auto_corr_max_ofdm_mrc = 210,
 811         .auto_corr_max_ofdm_x1 = 140,
 812         .auto_corr_max_ofdm_mrc_x1 = 270,
 813
 814         .auto_corr_min_cck = 125,
 815         .auto_corr_max_cck = 200,
 816         .auto_corr_min_cck_mrc = 200,
 817         .auto_corr_max_cck_mrc = 400,
 818
 819         .nrg_th_cck = 100,
 820         .nrg_th_ofdm = 100,
 821 };
 822
 823 /**
 824  * iwl4965_hw_set_hw_params
 825  *
 826  * Called when initializing driver
 827  */
 828 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 829 {
 830
 831         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 832             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 833                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 834                           IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 835                 return -EINVAL;
 836         }
 837
 838         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 839         priv->hw_params.first_ampdu_q = IWL49_FIRST_AMPDU_QUEUE;
 840         priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
 841         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
 842         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
 843         if (priv->cfg->mod_params->amsdu_size_8K)
 844                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
 845         else
 846                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
 847         priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
 848         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 849         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 850
 851         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 852         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 853         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 854         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 855
 856         priv->hw_params.tx_chains_num = 2;
 857         priv->hw_params.rx_chains_num = 2;
 858         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 859         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 860         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 861
 862         priv->hw_params.sens = &iwl4965_sensitivity;
 863
 864         return 0;
 865 }
 866
 867 /* set card power command */
 868 static int iwl4965_set_power(struct iwl_priv *priv,
 869                       void *cmd)
 870 {
 871         int ret = 0;
 872
 873         ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
 874                                     sizeof(struct iwl4965_powertable_cmd),
 875                                     cmd, NULL);
 876         return ret;
 877 }
 878
 879 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 880 {
 881         s32 sign = 1;
 882
 883         if (num < 0) {
 884                 sign = -sign;
 885                 num = -num;
 886         }
 887         if (denom < 0) {
 888                 sign = -sign;
 889                 denom = -denom;
 890         }
 891         *res = 1;
 892         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 893
 894         return 1;
 895 }
 896
 897 /**
 898  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 899  *
 900  * Determines power supply voltage compensation for txpower calculations.
 901  * Returns number of 1/2-dB steps to subtract from gain table index,
 902  * to compensate for difference between power supply voltage during
 903  * factory measurements, vs. current power supply voltage.
 904  *
 905  * Voltage indication is higher for lower voltage.
 906  * Lower voltage requires more gain (lower gain table index).
 907  */
 908 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 909                                             s32 current_voltage)
 910 {
 911         s32 comp = 0;
 912
 913         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 914             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 915                 return 0;
 916
 917         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 918                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 919
 920         if (current_voltage > eeprom_voltage)
 921                 comp *= 2;
 922         if ((comp < -2) || (comp > 2))
 923                 comp = 0;
 924
 925         return comp;
 926 }
 927
 928 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 929 {
 930         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 931             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 932                 return CALIB_CH_GROUP_5;
 933
 934         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 935             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 936                 return CALIB_CH_GROUP_1;
 937
 938         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 939             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 940                 return CALIB_CH_GROUP_2;
 941
 942         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 943             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 944                 return CALIB_CH_GROUP_3;
 945
 946         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 947             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 948                 return CALIB_CH_GROUP_4;
 949
 950         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
 951         return -1;
 952 }
 953
 954 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 955 {
 956         s32 b = -1;
 957
 958         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 959                 if (priv->calib_info->band_info[b].ch_from == 0)
 960                         continue;
 961
 962                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 963                     && (channel <= priv->calib_info->band_info[b].ch_to))
 964                         break;
 965         }
 966
 967         return b;
 968 }
 969
 970 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 971 {
 972         s32 val;
 973
 974         if (x2 == x1)
 975                 return y1;
 976         else {
 977                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 978                 return val + y2;
 979         }
 980 }
 981
 982 /**
 983  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 984  *
 985  * Interpolates factory measurements from the two sample channels within a
 986  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 987  * differences in channel frequencies, which is proportional to differences
 988  * in channel number.
 989  */
 990 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 991                                     struct iwl_eeprom_calib_ch_info *chan_info)
 992 {
 993         s32 s = -1;
 994         u32 c;
 995         u32 m;
 996         const struct iwl_eeprom_calib_measure *m1;
 997         const struct iwl_eeprom_calib_measure *m2;
 998         struct iwl_eeprom_calib_measure *omeas;
 999         u32 ch_i1;
1000         u32 ch_i2;
1001
1002         s = iwl4965_get_sub_band(priv, channel);
1003         if (s >= EEPROM_TX_POWER_BANDS) {
1004                 IWL_ERROR("Tx Power can not find channel %d ", channel);
1005                 return -1;
1006         }
1007
1008         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1009         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1010         chan_info->ch_num = (u8) channel;
1011
1012         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1013                           channel, s, ch_i1, ch_i2);
1014
1015         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1016                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1017                         m1 = &(priv->calib_info->band_info[s].ch1.
1018                                measurements[c][m]);
1019                         m2 = &(priv->calib_info->band_info[s].ch2.
1020                                measurements[c][m]);
1021                         omeas = &(chan_info->measurements[c][m]);
1022
1023                         omeas->actual_pow =
1024                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1025                                                            m1->actual_pow,
1026                                                            ch_i2,
1027                                                            m2->actual_pow);
1028                         omeas->gain_idx =
1029                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1030                                                            m1->gain_idx, ch_i2,
1031                                                            m2->gain_idx);
1032                         omeas->temperature =
1033                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1034                                                            m1->temperature,
1035                                                            ch_i2,
1036                                                            m2->temperature);
1037                         omeas->pa_det =
1038                             (s8) iwl4965_interpolate_value(channel, ch_i1,
1039                                                            m1->pa_det, ch_i2,
1040                                                            m2->pa_det);
1041
1042                         IWL_DEBUG_TXPOWER
1043                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1044                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1045                         IWL_DEBUG_TXPOWER
1046                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1047                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1048                         IWL_DEBUG_TXPOWER
1049                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1050                              m1->pa_det, m2->pa_det, omeas->pa_det);
1051                         IWL_DEBUG_TXPOWER
1052                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
1053                              m1->temperature, m2->temperature,
1054                              omeas->temperature);
1055                 }
1056         }
1057
1058         return 0;
1059 }
1060
1061 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1062  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1063 static s32 back_off_table[] = {
1064         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1065         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1066         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1067         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1068         10                      /* CCK */
1069 };
1070
1071 /* Thermal compensation values for txpower for various frequency ranges ...
1072  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1073 static struct iwl4965_txpower_comp_entry {
1074         s32 degrees_per_05db_a;
1075         s32 degrees_per_05db_a_denom;
1076 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1077         {9, 2},                 /* group 0 5.2, ch  34-43 */
1078         {4, 1},                 /* group 1 5.2, ch  44-70 */
1079         {4, 1},                 /* group 2 5.2, ch  71-124 */
1080         {4, 1},                 /* group 3 5.2, ch 125-200 */
1081         {3, 1}                  /* group 4 2.4, ch   all */
1082 };
1083
1084 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1085 {
1086         if (!band) {
1087                 if ((rate_power_index & 7) <= 4)
1088                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1089         }
1090         return MIN_TX_GAIN_INDEX;
1091 }
1092
1093 struct gain_entry {
1094         u8 dsp;
1095         u8 radio;
1096 };
1097
1098 static const struct gain_entry gain_table[2][108] = {
1099         /* 5.2GHz power gain index table */
1100         {
1101          {123, 0x3F},           /* highest txpower */
1102          {117, 0x3F},
1103          {110, 0x3F},
1104          {104, 0x3F},
1105          {98, 0x3F},
1106          {110, 0x3E},
1107          {104, 0x3E},
1108          {98, 0x3E},
1109          {110, 0x3D},
1110          {104, 0x3D},
1111          {98, 0x3D},
1112          {110, 0x3C},
1113          {104, 0x3C},
1114          {98, 0x3C},
1115          {110, 0x3B},
1116          {104, 0x3B},
1117          {98, 0x3B},
1118          {110, 0x3A},
1119          {104, 0x3A},
1120          {98, 0x3A},
1121          {110, 0x39},
1122          {104, 0x39},
1123          {98, 0x39},
1124          {110, 0x38},
1125          {104, 0x38},
1126          {98, 0x38},
1127          {110, 0x37},
1128          {104, 0x37},
1129          {98, 0x37},
1130          {110, 0x36},
1131          {104, 0x36},
1132          {98, 0x36},
1133          {110, 0x35},
1134          {104, 0x35},
1135          {98, 0x35},
1136          {110, 0x34},
1137          {104, 0x34},
1138          {98, 0x34},
1139          {110, 0x33},
1140          {104, 0x33},
1141          {98, 0x33},
1142          {110, 0x32},
1143          {104, 0x32},
1144          {98, 0x32},
1145          {110, 0x31},
1146          {104, 0x31},
1147          {98, 0x31},
1148          {110, 0x30},
1149          {104, 0x30},
1150          {98, 0x30},
1151          {110, 0x25},
1152          {104, 0x25},
1153          {98, 0x25},
1154          {110, 0x24},
1155          {104, 0x24},
1156          {98, 0x24},
1157          {110, 0x23},
1158          {104, 0x23},
1159          {98, 0x23},
1160          {110, 0x22},
1161          {104, 0x18},
1162          {98, 0x18},
1163          {110, 0x17},
1164          {104, 0x17},
1165          {98, 0x17},
1166          {110, 0x16},
1167          {104, 0x16},
1168          {98, 0x16},
1169          {110, 0x15},
1170          {104, 0x15},
1171          {98, 0x15},
1172          {110, 0x14},
1173          {104, 0x14},
1174          {98, 0x14},
1175          {110, 0x13},
1176          {104, 0x13},
1177          {98, 0x13},
1178          {110, 0x12},
1179          {104, 0x08},
1180          {98, 0x08},
1181          {110, 0x07},
1182          {104, 0x07},
1183          {98, 0x07},
1184          {110, 0x06},
1185          {104, 0x06},
1186          {98, 0x06},
1187          {110, 0x05},
1188          {104, 0x05},
1189          {98, 0x05},
1190          {110, 0x04},
1191          {104, 0x04},
1192          {98, 0x04},
1193          {110, 0x03},
1194          {104, 0x03},
1195          {98, 0x03},
1196          {110, 0x02},
1197          {104, 0x02},
1198          {98, 0x02},
1199          {110, 0x01},
1200          {104, 0x01},
1201          {98, 0x01},
1202          {110, 0x00},
1203          {104, 0x00},
1204          {98, 0x00},
1205          {93, 0x00},
1206          {88, 0x00},
1207          {83, 0x00},
1208          {78, 0x00},
1209          },
1210         /* 2.4GHz power gain index table */
1211         {
1212          {110, 0x3f},           /* highest txpower */
1213          {104, 0x3f},
1214          {98, 0x3f},
1215          {110, 0x3e},
1216          {104, 0x3e},
1217          {98, 0x3e},
1218          {110, 0x3d},
1219          {104, 0x3d},
1220          {98, 0x3d},
1221          {110, 0x3c},
1222          {104, 0x3c},
1223          {98, 0x3c},
1224          {110, 0x3b},
1225          {104, 0x3b},
1226          {98, 0x3b},
1227          {110, 0x3a},
1228          {104, 0x3a},
1229          {98, 0x3a},
1230          {110, 0x39},
1231          {104, 0x39},
1232          {98, 0x39},
1233          {110, 0x38},
1234          {104, 0x38},
1235          {98, 0x38},
1236          {110, 0x37},
1237          {104, 0x37},
1238          {98, 0x37},
1239          {110, 0x36},
1240          {104, 0x36},
1241          {98, 0x36},
1242          {110, 0x35},
1243          {104, 0x35},
1244          {98, 0x35},
1245          {110, 0x34},
1246          {104, 0x34},
1247          {98, 0x34},
1248          {110, 0x33},
1249          {104, 0x33},
1250          {98, 0x33},
1251          {110, 0x32},
1252          {104, 0x32},
1253          {98, 0x32},
1254          {110, 0x31},
1255          {104, 0x31},
1256          {98, 0x31},
1257          {110, 0x30},
1258          {104, 0x30},
1259          {98, 0x30},
1260          {110, 0x6},
1261          {104, 0x6},
1262          {98, 0x6},
1263          {110, 0x5},
1264          {104, 0x5},
1265          {98, 0x5},
1266          {110, 0x4},
1267          {104, 0x4},
1268          {98, 0x4},
1269          {110, 0x3},
1270          {104, 0x3},
1271          {98, 0x3},
1272          {110, 0x2},
1273          {104, 0x2},
1274          {98, 0x2},
1275          {110, 0x1},
1276          {104, 0x1},
1277          {98, 0x1},
1278          {110, 0x0},
1279          {104, 0x0},
1280          {98, 0x0},
1281          {97, 0},
1282          {96, 0},
1283          {95, 0},
1284          {94, 0},
1285          {93, 0},
1286          {92, 0},
1287          {91, 0},
1288          {90, 0},
1289          {89, 0},
1290          {88, 0},
1291          {87, 0},
1292          {86, 0},
1293          {85, 0},
1294          {84, 0},
1295          {83, 0},
1296          {82, 0},
1297          {81, 0},
1298          {80, 0},
1299          {79, 0},
1300          {78, 0},
1301          {77, 0},
1302          {76, 0},
1303          {75, 0},
1304          {74, 0},
1305          {73, 0},
1306          {72, 0},
1307          {71, 0},
1308          {70, 0},
1309          {69, 0},
1310          {68, 0},
1311          {67, 0},
1312          {66, 0},
1313          {65, 0},
1314          {64, 0},
1315          {63, 0},
1316          {62, 0},
1317          {61, 0},
1318          {60, 0},
1319          {59, 0},
1320          }
1321 };
1322
1323 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1324                                     u8 is_fat, u8 ctrl_chan_high,
1325                                     struct iwl4965_tx_power_db *tx_power_tbl)
1326 {
1327         u8 saturation_power;
1328         s32 target_power;
1329         s32 user_target_power;
1330         s32 power_limit;
1331         s32 current_temp;
1332         s32 reg_limit;
1333         s32 current_regulatory;
1334         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1335         int i;
1336         int c;
1337         const struct iwl_channel_info *ch_info = NULL;
1338         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1339         const struct iwl_eeprom_calib_measure *measurement;
1340         s16 voltage;
1341         s32 init_voltage;
1342         s32 voltage_compensation;
1343         s32 degrees_per_05db_num;
1344         s32 degrees_per_05db_denom;
1345         s32 factory_temp;
1346         s32 temperature_comp[2];
1347         s32 factory_gain_index[2];
1348         s32 factory_actual_pwr[2];
1349         s32 power_index;
1350
1351         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1352          *   are used for indexing into txpower table) */
1353         user_target_power = 2 * priv->tx_power_user_lmt;
1354
1355         /* Get current (RXON) channel, band, width */
1356         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1357                           is_fat);
1358
1359         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1360
1361         if (!is_channel_valid(ch_info))
1362                 return -EINVAL;
1363
1364         /* get txatten group, used to select 1) thermal txpower adjustment
1365          *   and 2) mimo txpower balance between Tx chains. */
1366         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1367         if (txatten_grp < 0)
1368                 return -EINVAL;
1369
1370         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1371                           channel, txatten_grp);
1372
1373         if (is_fat) {
1374                 if (ctrl_chan_high)
1375                         channel -= 2;
1376                 else
1377                         channel += 2;
1378         }
1379
1380         /* hardware txpower limits ...
1381          * saturation (clipping distortion) txpowers are in half-dBm */
1382         if (band)
1383                 saturation_power = priv->calib_info->saturation_power24;
1384         else
1385                 saturation_power = priv->calib_info->saturation_power52;
1386
1387         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1388             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1389                 if (band)
1390                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1391                 else
1392                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1393         }
1394
1395         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1396          *   max_power_avg values are in dBm, convert * 2 */
1397         if (is_fat)
1398                 reg_limit = ch_info->fat_max_power_avg * 2;
1399         else
1400                 reg_limit = ch_info->max_power_avg * 2;
1401
1402         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1403             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1404                 if (band)
1405                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1406                 else
1407                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1408         }
1409
1410         /* Interpolate txpower calibration values for this channel,
1411          *   based on factory calibration tests on spaced channels. */
1412         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1413
1414         /* calculate tx gain adjustment based on power supply voltage */
1415         voltage = priv->calib_info->voltage;
1416         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1417         voltage_compensation =
1418             iwl4965_get_voltage_compensation(voltage, init_voltage);
1419
1420         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1421                           init_voltage,
1422                           voltage, voltage_compensation);
1423
1424         /* get current temperature (Celsius) */
1425         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1426         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1427         current_temp = KELVIN_TO_CELSIUS(current_temp);
1428
1429         /* select thermal txpower adjustment params, based on channel group
1430          *   (same frequency group used for mimo txatten adjustment) */
1431         degrees_per_05db_num =
1432             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1433         degrees_per_05db_denom =
1434             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1435
1436         /* get per-chain txpower values from factory measurements */
1437         for (c = 0; c < 2; c++) {
1438                 measurement = &ch_eeprom_info.measurements[c][1];
1439
1440                 /* txgain adjustment (in half-dB steps) based on difference
1441                  *   between factory and current temperature */
1442                 factory_temp = measurement->temperature;
1443                 iwl4965_math_div_round((current_temp - factory_temp) *
1444                                        degrees_per_05db_denom,
1445                                        degrees_per_05db_num,
1446                                        &temperature_comp[c]);
1447
1448                 factory_gain_index[c] = measurement->gain_idx;
1449                 factory_actual_pwr[c] = measurement->actual_pow;
1450
1451                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1452                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1453                                   "curr tmp %d, comp %d steps\n",
1454                                   factory_temp, current_temp,
1455                                   temperature_comp[c]);
1456
1457                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1458                                   factory_gain_index[c],
1459                                   factory_actual_pwr[c]);
1460         }
1461
1462         /* for each of 33 bit-rates (including 1 for CCK) */
1463         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1464                 u8 is_mimo_rate;
1465                 union iwl4965_tx_power_dual_stream tx_power;
1466
1467                 /* for mimo, reduce each chain's txpower by half
1468                  * (3dB, 6 steps), so total output power is regulatory
1469                  * compliant. */
1470                 if (i & 0x8) {
1471                         current_regulatory = reg_limit -
1472                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1473                         is_mimo_rate = 1;
1474                 } else {
1475                         current_regulatory = reg_limit;
1476                         is_mimo_rate = 0;
1477                 }
1478
1479                 /* find txpower limit, either hardware or regulatory */
1480                 power_limit = saturation_power - back_off_table[i];
1481                 if (power_limit > current_regulatory)
1482                         power_limit = current_regulatory;
1483
1484                 /* reduce user's txpower request if necessary
1485                  * for this rate on this channel */
1486                 target_power = user_target_power;
1487                 if (target_power > power_limit)
1488                         target_power = power_limit;
1489
1490                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1491                                   i, saturation_power - back_off_table[i],
1492                                   current_regulatory, user_target_power,
1493                                   target_power);
1494
1495                 /* for each of 2 Tx chains (radio transmitters) */
1496                 for (c = 0; c < 2; c++) {
1497                         s32 atten_value;
1498
1499                         if (is_mimo_rate)
1500                                 atten_value =
1501                                     (s32)le32_to_cpu(priv->card_alive_init.
1502                                     tx_atten[txatten_grp][c]);
1503                         else
1504                                 atten_value = 0;
1505
1506                         /* calculate index; higher index means lower txpower */
1507                         power_index = (u8) (factory_gain_index[c] -
1508                                             (target_power -
1509                                              factory_actual_pwr[c]) -
1510                                             temperature_comp[c] -
1511                                             voltage_compensation +
1512                                             atten_value);
1513
1514 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1515                                                 power_index); */
1516
1517                         if (power_index < get_min_power_index(i, band))
1518                                 power_index = get_min_power_index(i, band);
1519
1520                         /* adjust 5 GHz index to support negative indexes */
1521                         if (!band)
1522                                 power_index += 9;
1523
1524                         /* CCK, rate 32, reduce txpower for CCK */
1525                         if (i == POWER_TABLE_CCK_ENTRY)
1526                                 power_index +=
1527                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1528
1529                         /* stay within the table! */
1530                         if (power_index > 107) {
1531                                 IWL_WARNING("txpower index %d > 107\n",
1532                                             power_index);
1533                                 power_index = 107;
1534                         }
1535                         if (power_index < 0) {
1536                                 IWL_WARNING("txpower index %d < 0\n",
1537                                             power_index);
1538                                 power_index = 0;
1539                         }
1540
1541                         /* fill txpower command for this rate/chain */
1542                         tx_power.s.radio_tx_gain[c] =
1543                                 gain_table[band][power_index].radio;
1544                         tx_power.s.dsp_predis_atten[c] =
1545                                 gain_table[band][power_index].dsp;
1546
1547                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1548                                           "gain 0x%02x dsp %d\n",
1549                                           c, atten_value, power_index,
1550                                         tx_power.s.radio_tx_gain[c],
1551                                         tx_power.s.dsp_predis_atten[c]);
1552                 }/* for each chain */
1553
1554                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1555
1556         }/* for each rate */
1557
1558         return 0;
1559 }
1560
1561 /**
1562  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1563  *
1564  * Uses the active RXON for channel, band, and characteristics (fat, high)
1565  * The power limit is taken from priv->tx_power_user_lmt.
1566  */
1567 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1568 {
1569         struct iwl4965_txpowertable_cmd cmd = { 0 };
1570         int ret;
1571         u8 band = 0;
1572         u8 is_fat = 0;
1573         u8 ctrl_chan_high = 0;
1574
1575         if (test_bit(STATUS_SCANNING, &priv->status)) {
1576                 /* If this gets hit a lot, switch it to a BUG() and catch
1577                  * the stack trace to find out who is calling this during
1578                  * a scan. */
1579                 IWL_WARNING("TX Power requested while scanning!\n");
1580                 return -EAGAIN;
1581         }
1582
1583         band = priv->band == IEEE80211_BAND_2GHZ;
1584
1585         is_fat =  is_fat_channel(priv->active_rxon.flags);
1586
1587         if (is_fat &&
1588             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1589                 ctrl_chan_high = 1;
1590
1591         cmd.band = band;
1592         cmd.channel = priv->active_rxon.channel;
1593
1594         ret = iwl4965_fill_txpower_tbl(priv, band,
1595                                 le16_to_cpu(priv->active_rxon.channel),
1596                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1597         if (ret)
1598                 goto out;
1599
1600         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1601
1602 out:
1603         return ret;
1604 }
1605
1606 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1607 {
1608         int ret = 0;
1609         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1610         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1611         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1612
1613         if ((rxon1->flags == rxon2->flags) &&
1614             (rxon1->filter_flags == rxon2->filter_flags) &&
1615             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1616             (rxon1->ofdm_ht_single_stream_basic_rates ==
1617              rxon2->ofdm_ht_single_stream_basic_rates) &&
1618             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1619              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1620             (rxon1->rx_chain == rxon2->rx_chain) &&
1621             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1622                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
1623                 return 0;
1624         }
1625
1626         rxon_assoc.flags = priv->staging_rxon.flags;
1627         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1628         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1629         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1630         rxon_assoc.reserved = 0;
1631         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1632             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1633         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1634             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1635         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1636
1637         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1638                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1639         if (ret)
1640                 return ret;
1641
1642         return ret;
1643 }
1644
1645
1646 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1647 {
1648         int rc;
1649         u8 band = 0;
1650         u8 is_fat = 0;
1651         u8 ctrl_chan_high = 0;
1652         struct iwl4965_channel_switch_cmd cmd = { 0 };
1653         const struct iwl_channel_info *ch_info;
1654
1655         band = priv->band == IEEE80211_BAND_2GHZ;
1656
1657         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1658
1659         is_fat = is_fat_channel(priv->staging_rxon.flags);
1660
1661         if (is_fat &&
1662             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1663                 ctrl_chan_high = 1;
1664
1665         cmd.band = band;
1666         cmd.expect_beacon = 0;
1667         cmd.channel = cpu_to_le16(channel);
1668         cmd.rxon_flags = priv->active_rxon.flags;
1669         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1670         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1671         if (ch_info)
1672                 cmd.expect_beacon = is_channel_radar(ch_info);
1673         else
1674                 cmd.expect_beacon = 1;
1675
1676         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1677                                       ctrl_chan_high, &cmd.tx_power);
1678         if (rc) {
1679                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
1680                 return rc;
1681         }
1682
1683         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1684         return rc;
1685 }
1686
1687 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1688 {
1689         struct iwl4965_shared *s = priv->shared_virt;
1690         return le32_to_cpu(s->rb_closed) & 0xFFF;
1691 }
1692
1693 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1694                           struct iwl_frame *frame, u8 rate)
1695 {
1696         struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1697         unsigned int frame_size;
1698
1699         tx_beacon_cmd = &frame->u.beacon;
1700         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1701
1702         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1703         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1704
1705         frame_size = iwl4965_fill_beacon_frame(priv,
1706                                 tx_beacon_cmd->frame,
1707                                 iwl_bcast_addr,
1708                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1709
1710         BUG_ON(frame_size > MAX_MPDU_SIZE);
1711         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1712
1713         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1714                 tx_beacon_cmd->tx.rate_n_flags =
1715                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1716         else
1717                 tx_beacon_cmd->tx.rate_n_flags =
1718                         iwl_hw_set_rate_n_flags(rate, 0);
1719
1720         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1721                                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1722         return (sizeof(*tx_beacon_cmd) + frame_size);
1723 }
1724
1725 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1726 {
1727         priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1728                                         sizeof(struct iwl4965_shared),
1729                                         &priv->shared_phys);
1730         if (!priv->shared_virt)
1731                 return -ENOMEM;
1732
1733         memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1734
1735         priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1736
1737         return 0;
1738 }
1739
1740 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1741 {
1742         if (priv->shared_virt)
1743                 pci_free_consistent(priv->pci_dev,
1744                                     sizeof(struct iwl4965_shared),
1745                                     priv->shared_virt,
1746                                     priv->shared_phys);
1747 }
1748
1749 /**
1750  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1751  */
1752 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1753                                             struct iwl_tx_queue *txq,
1754                                             u16 byte_cnt)
1755 {
1756         int len;
1757         int txq_id = txq->q.id;
1758         struct iwl4965_shared *shared_data = priv->shared_virt;
1759
1760         len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1761
1762         /* Set up byte count within first 256 entries */
1763         IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1764                        tfd_offset[txq->q.write_ptr], byte_cnt, len);
1765
1766         /* If within first 64 entries, duplicate at end */
1767         if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
1768                 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1769                         tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
1770                         byte_cnt, len);
1771 }
1772
1773 /**
1774  * sign_extend - Sign extend a value using specified bit as sign-bit
1775  *
1776  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1777  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1778  *
1779  * @param oper value to sign extend
1780  * @param index 0 based bit index (0<=index<32) to sign bit
1781  */
1782 static s32 sign_extend(u32 oper, int index)
1783 {
1784         u8 shift = 31 - index;
1785
1786         return (s32)(oper << shift) >> shift;
1787 }
1788
1789 /**
1790  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1791  * @statistics: Provides the temperature reading from the uCode
1792  *
1793  * A return of <0 indicates bogus data in the statistics
1794  */
1795 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1796 {
1797         s32 temperature;
1798         s32 vt;
1799         s32 R1, R2, R3;
1800         u32 R4;
1801
1802         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1803                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1804                 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1805                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1806                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1807                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1808                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1809         } else {
1810                 IWL_DEBUG_TEMP("Running temperature calibration\n");
1811                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1812                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1813                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1814                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1815         }
1816
1817         /*
1818          * Temperature is only 23 bits, so sign extend out to 32.
1819          *
1820          * NOTE If we haven't received a statistics notification yet
1821          * with an updated temperature, use R4 provided to us in the
1822          * "initialize" ALIVE response.
1823          */
1824         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1825                 vt = sign_extend(R4, 23);
1826         else
1827                 vt = sign_extend(
1828                         le32_to_cpu(priv->statistics.general.temperature), 23);
1829
1830         IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1831
1832         if (R3 == R1) {
1833                 IWL_ERROR("Calibration conflict R1 == R3\n");
1834                 return -1;
1835         }
1836
1837         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1838          * Add offset to center the adjustment around 0 degrees Centigrade. */
1839         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1840         temperature /= (R3 - R1);
1841         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1842
1843         IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1844                         temperature, KELVIN_TO_CELSIUS(temperature));
1845
1846         return temperature;
1847 }
1848
1849 /* Adjust Txpower only if temperature variance is greater than threshold. */
1850 #define IWL_TEMPERATURE_THRESHOLD   3
1851
1852 /**
1853  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1854  *
1855  * If the temperature changed has changed sufficiently, then a recalibration
1856  * is needed.
1857  *
1858  * Assumes caller will replace priv->last_temperature once calibration
1859  * executed.
1860  */
1861 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1862 {
1863         int temp_diff;
1864
1865         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1866                 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1867                 return 0;
1868         }
1869
1870         temp_diff = priv->temperature - priv->last_temperature;
1871
1872         /* get absolute value */
1873         if (temp_diff < 0) {
1874                 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1875                 temp_diff = -temp_diff;
1876         } else if (temp_diff == 0)
1877                 IWL_DEBUG_POWER("Same temp, \n");
1878         else
1879                 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1880
1881         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1882                 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1883                 return 0;
1884         }
1885
1886         IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1887
1888         return 1;
1889 }
1890
1891 static void iwl4965_temperature_calib(struct iwl_priv *priv,
1892                                       struct iwl_notif_statistics *stats)
1893 {
1894         s32 temp;
1895         int change = ((priv->statistics.general.temperature !=
1896                    stats->general.temperature) ||
1897                   ((priv->statistics.flag &
1898                     STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
1899                    (stats->flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
1900
1901         /* If the hardware hasn't reported a change in
1902          * temperature then don't bother computing a
1903          * calibrated temperature value */
1904         if (!change)
1905                 return;
1906
1907         temp = iwl4965_hw_get_temperature(priv);
1908         if (temp < 0)
1909                 return;
1910
1911         if (priv->temperature != temp) {
1912                 if (priv->temperature)
1913                         IWL_DEBUG_TEMP("Temperature changed "
1914                                        "from %dC to %dC\n",
1915                                        KELVIN_TO_CELSIUS(priv->temperature),
1916                                        KELVIN_TO_CELSIUS(temp));
1917                 else
1918                         IWL_DEBUG_TEMP("Temperature "
1919                                        "initialized to %dC\n",
1920                                        KELVIN_TO_CELSIUS(temp));
1921         }
1922
1923         priv->temperature = temp;
1924         set_bit(STATUS_TEMPERATURE, &priv->status);
1925
1926         if (!priv->disable_tx_power_cal &&
1927              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1928              iwl4965_is_temp_calib_needed(priv))
1929                 queue_work(priv->workqueue, &priv->txpower_work);
1930 }
1931
1932 static void iwl4965_add_radiotap(struct iwl_priv *priv,
1933                                  struct sk_buff *skb,
1934                                  struct iwl4965_rx_phy_res *rx_start,
1935                                  struct ieee80211_rx_status *stats,
1936                                  u32 ampdu_status)
1937 {
1938         s8 signal = stats->signal;
1939         s8 noise = 0;
1940         int rate = stats->rate_idx;
1941         u64 tsf = stats->mactime;
1942         __le16 antenna;
1943         __le16 phy_flags_hw = rx_start->phy_flags;
1944         struct iwl4965_rt_rx_hdr {
1945                 struct ieee80211_radiotap_header rt_hdr;
1946                 __le64 rt_tsf;          /* TSF */
1947                 u8 rt_flags;            /* radiotap packet flags */
1948                 u8 rt_rate;             /* rate in 500kb/s */
1949                 __le16 rt_channelMHz;   /* channel in MHz */
1950                 __le16 rt_chbitmask;    /* channel bitfield */
1951                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
1952                 s8 rt_dbmnoise;
1953                 u8 rt_antenna;          /* antenna number */
1954         } __attribute__ ((packed)) *iwl4965_rt;
1955
1956         /* TODO: We won't have enough headroom for HT frames. Fix it later. */
1957         if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
1958                 if (net_ratelimit())
1959                         printk(KERN_ERR "not enough headroom [%d] for "
1960                                "radiotap head [%zd]\n",
1961                                skb_headroom(skb), sizeof(*iwl4965_rt));
1962                 return;
1963         }
1964
1965         /* put radiotap header in front of 802.11 header and data */
1966         iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
1967
1968         /* initialise radiotap header */
1969         iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
1970         iwl4965_rt->rt_hdr.it_pad = 0;
1971
1972         /* total header + data */
1973         put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
1974                       &iwl4965_rt->rt_hdr.it_len);
1975
1976         /* Indicate all the fields we add to the radiotap header */
1977         put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
1978                                   (1 << IEEE80211_RADIOTAP_FLAGS) |
1979                                   (1 << IEEE80211_RADIOTAP_RATE) |
1980                                   (1 << IEEE80211_RADIOTAP_CHANNEL) |
1981                                   (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
1982                                   (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
1983                                   (1 << IEEE80211_RADIOTAP_ANTENNA)),
1984                       &iwl4965_rt->rt_hdr.it_present);
1985
1986         /* Zero the flags, we'll add to them as we go */
1987         iwl4965_rt->rt_flags = 0;
1988
1989         put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
1990
1991         iwl4965_rt->rt_dbmsignal = signal;
1992         iwl4965_rt->rt_dbmnoise = noise;
1993
1994         /* Convert the channel frequency and set the flags */
1995         put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
1996         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
1997                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
1998                                           IEEE80211_CHAN_5GHZ),
1999                               &iwl4965_rt->rt_chbitmask);
2000         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2001                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2002                                           IEEE80211_CHAN_2GHZ),
2003                               &iwl4965_rt->rt_chbitmask);
2004         else    /* 802.11g */
2005                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2006                                           IEEE80211_CHAN_2GHZ),
2007                               &iwl4965_rt->rt_chbitmask);
2008
2009         if (rate == -1)
2010                 iwl4965_rt->rt_rate = 0;
2011         else
2012                 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
2013
2014         /*
2015          * "antenna number"
2016          *
2017          * It seems that the antenna field in the phy flags value
2018          * is actually a bitfield. This is undefined by radiotap,
2019          * it wants an actual antenna number but I always get "7"
2020          * for most legacy frames I receive indicating that the
2021          * same frame was received on all three RX chains.
2022          *
2023          * I think this field should be removed in favour of a
2024          * new 802.11n radiotap field "RX chains" that is defined
2025          * as a bitmask.
2026          */
2027         antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2028         iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2029
2030         /* set the preamble flag if appropriate */
2031         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2032                 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2033
2034         stats->flag |= RX_FLAG_RADIOTAP;
2035 }
2036
2037 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2038 {
2039         /* 0 - mgmt, 1 - cnt, 2 - data */
2040         int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2041         priv->rx_stats[idx].cnt++;
2042         priv->rx_stats[idx].bytes += len;
2043 }
2044
2045 /*
2046  * returns non-zero if packet should be dropped
2047  */
2048 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2049                                       struct ieee80211_hdr *hdr,
2050                                       u32 decrypt_res,
2051                                       struct ieee80211_rx_status *stats)
2052 {
2053         u16 fc = le16_to_cpu(hdr->frame_control);
2054
2055         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2056                 return 0;
2057
2058         if (!(fc & IEEE80211_FCTL_PROTECTED))
2059                 return 0;
2060
2061         IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2062         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2063         case RX_RES_STATUS_SEC_TYPE_TKIP:
2064                 /* The uCode has got a bad phase 1 Key, pushes the packet.
2065                  * Decryption will be done in SW. */
2066                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2067                     RX_RES_STATUS_BAD_KEY_TTAK)
2068                         break;
2069
2070         case RX_RES_STATUS_SEC_TYPE_WEP:
2071                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2072                     RX_RES_STATUS_BAD_ICV_MIC) {
2073                         /* bad ICV, the packet is destroyed since the
2074                          * decryption is inplace, drop it */
2075                         IWL_DEBUG_RX("Packet destroyed\n");
2076                         return -1;
2077                 }
2078         case RX_RES_STATUS_SEC_TYPE_CCMP:
2079                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2080                     RX_RES_STATUS_DECRYPT_OK) {
2081                         IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2082                         stats->flag |= RX_FLAG_DECRYPTED;
2083                 }
2084                 break;
2085
2086         default:
2087                 break;
2088         }
2089         return 0;
2090 }
2091
2092 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
2093 {
2094         u32 decrypt_out = 0;
2095
2096         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2097                                         RX_RES_STATUS_STATION_FOUND)
2098                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2099                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2100
2101         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2102
2103         /* packet was not encrypted */
2104         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2105                                         RX_RES_STATUS_SEC_TYPE_NONE)
2106                 return decrypt_out;
2107
2108         /* packet was encrypted with unknown alg */
2109         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2110                                         RX_RES_STATUS_SEC_TYPE_ERR)
2111                 return decrypt_out;
2112
2113         /* decryption was not done in HW */
2114         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2115                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2116                 return decrypt_out;
2117
2118         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2119
2120         case RX_RES_STATUS_SEC_TYPE_CCMP:
2121                 /* alg is CCM: check MIC only */
2122                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2123                         /* Bad MIC */
2124                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2125                 else
2126                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2127
2128                 break;
2129
2130         case RX_RES_STATUS_SEC_TYPE_TKIP:
2131                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2132                         /* Bad TTAK */
2133                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2134                         break;
2135                 }
2136                 /* fall through if TTAK OK */
2137         default:
2138                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2139                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2140                 else
2141                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2142                 break;
2143         };
2144
2145         IWL_DEBUG_RX("decrypt_in:0x%x  decrypt_out = 0x%x\n",
2146                                         decrypt_in, decrypt_out);
2147
2148         return decrypt_out;
2149 }
2150
2151 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2152                                        int include_phy,
2153                                        struct iwl_rx_mem_buffer *rxb,
2154                                        struct ieee80211_rx_status *stats)
2155 {
2156         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2157         struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2158             (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2159         struct ieee80211_hdr *hdr;
2160         u16 len;
2161         __le32 *rx_end;
2162         unsigned int skblen;
2163         u32 ampdu_status;
2164         u32 ampdu_status_legacy;
2165
2166         if (!include_phy && priv->last_phy_res[0])
2167                 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2168
2169         if (!rx_start) {
2170                 IWL_ERROR("MPDU frame without a PHY data\n");
2171                 return;
2172         }
2173         if (include_phy) {
2174                 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2175                                                rx_start->cfg_phy_cnt);
2176
2177                 len = le16_to_cpu(rx_start->byte_count);
2178
2179                 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2180                                   sizeof(struct iwl4965_rx_phy_res) +
2181                                   rx_start->cfg_phy_cnt + len);
2182
2183         } else {
2184                 struct iwl4965_rx_mpdu_res_start *amsdu =
2185                     (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2186
2187                 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2188                                sizeof(struct iwl4965_rx_mpdu_res_start));
2189                 len =  le16_to_cpu(amsdu->byte_count);
2190                 rx_start->byte_count = amsdu->byte_count;
2191                 rx_end = (__le32 *) (((u8 *) hdr) + len);
2192         }
2193         /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2194         if (len > priv->hw_params.max_pkt_size ||
2195             len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
2196                 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
2197                 return;
2198         }
2199
2200         ampdu_status = le32_to_cpu(*rx_end);
2201         skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2202
2203         if (!include_phy) {
2204                 /* New status scheme, need to translate */
2205                 ampdu_status_legacy = ampdu_status;
2206                 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
2207         }
2208
2209         /* start from MAC */
2210         skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2211         skb_put(rxb->skb, len); /* end where data ends */
2212
2213         /* We only process data packets if the interface is open */
2214         if (unlikely(!priv->is_open)) {
2215                 IWL_DEBUG_DROP_LIMIT
2216                     ("Dropping packet while interface is not open.\n");
2217                 return;
2218         }
2219
2220         stats->flag = 0;
2221         hdr = (struct ieee80211_hdr *)rxb->skb->data;
2222
2223         /*  in case of HW accelerated crypto and bad decryption, drop */
2224         if (!priv->hw_params.sw_crypto &&
2225             iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2226                 return;
2227
2228         if (priv->add_radiotap)
2229                 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2230
2231         iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
2232         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2233         priv->alloc_rxb_skb--;
2234         rxb->skb = NULL;
2235 }
2236
2237 /* Calc max signal level (dBm) among 3 possible receivers */
2238 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2239                              struct iwl4965_rx_phy_res *rx_resp)
2240 {
2241         /* data from PHY/DSP regarding signal strength, etc.,
2242          *   contents are always there, not configurable by host.  */
2243         struct iwl4965_rx_non_cfg_phy *ncphy =
2244             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2245         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2246                         >> IWL_AGC_DB_POS;
2247
2248         u32 valid_antennae =
2249             (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2250                         >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2251         u8 max_rssi = 0;
2252         u32 i;
2253
2254         /* Find max rssi among 3 possible receivers.
2255          * These values are measured by the digital signal processor (DSP).
2256          * They should stay fairly constant even as the signal strength varies,
2257          *   if the radio's automatic gain control (AGC) is working right.
2258          * AGC value (see below) will provide the "interesting" info. */
2259         for (i = 0; i < 3; i++)
2260                 if (valid_antennae & (1 << i))
2261                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2262
2263         IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2264                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2265                 max_rssi, agc);
2266
2267         /* dBm = max_rssi dB - agc dB - constant.
2268          * Higher AGC (higher radio gain) means lower signal. */
2269         return (max_rssi - agc - IWL_RSSI_OFFSET);
2270 }
2271
2272 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
2273 {
2274         unsigned long flags;
2275
2276         spin_lock_irqsave(&priv->sta_lock, flags);
2277         priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2278         priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2279         priv->stations[sta_id].sta.sta.modify_mask = 0;
2280         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2281         spin_unlock_irqrestore(&priv->sta_lock, flags);
2282
2283         iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2284 }
2285
2286 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
2287 {
2288         /* FIXME: need locking over ps_status ??? */
2289         u8 sta_id = iwl_find_station(priv, addr);
2290
2291         if (sta_id != IWL_INVALID_STATION) {
2292                 u8 sta_awake = priv->stations[sta_id].
2293                                 ps_status == STA_PS_STATUS_WAKE;
2294
2295                 if (sta_awake && ps_bit)
2296                         priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2297                 else if (!sta_awake && !ps_bit) {
2298                         iwl4965_sta_modify_ps_wake(priv, sta_id);
2299                         priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2300                 }
2301         }
2302 }
2303 #ifdef CONFIG_IWLWIFI_DEBUG
2304
2305 /**
2306  * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2307  *
2308  * You may hack this function to show different aspects of received frames,
2309  * including selective frame dumps.
2310  * group100 parameter selects whether to show 1 out of 100 good frames.
2311  *
2312  * TODO:  This was originally written for 3945, need to audit for
2313  *        proper operation with 4965.
2314  */
2315 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2316                       struct iwl_rx_packet *pkt,
2317                       struct ieee80211_hdr *header, int group100)
2318 {
2319         u32 to_us;
2320         u32 print_summary = 0;
2321         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
2322         u32 hundred = 0;
2323         u32 dataframe = 0;
2324         __le16 fc;
2325         u16 seq_ctl;
2326         u16 channel;
2327         u16 phy_flags;
2328         int rate_sym;
2329         u16 length;
2330         u16 status;
2331         u16 bcn_tmr;
2332         u32 tsf_low;
2333         u64 tsf;
2334         u8 rssi;
2335         u8 agc;
2336         u16 sig_avg;
2337         u16 noise_diff;
2338         struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2339         struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2340         struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2341         u8 *data = IWL_RX_DATA(pkt);
2342
2343         if (likely(!(priv->debug_level & IWL_DL_RX)))
2344                 return;
2345
2346         /* MAC header */
2347         fc = header->frame_control;
2348         seq_ctl = le16_to_cpu(header->seq_ctrl);
2349
2350         /* metadata */
2351         channel = le16_to_cpu(rx_hdr->channel);
2352         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2353         rate_sym = rx_hdr->rate;
2354         length = le16_to_cpu(rx_hdr->len);
2355
2356         /* end-of-frame status and timestamp */
2357         status = le32_to_cpu(rx_end->status);
2358         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2359         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2360         tsf = le64_to_cpu(rx_end->timestamp);
2361
2362         /* signal statistics */
2363         rssi = rx_stats->rssi;
2364         agc = rx_stats->agc;
2365         sig_avg = le16_to_cpu(rx_stats->sig_avg);
2366         noise_diff = le16_to_cpu(rx_stats->noise_diff);
2367
2368         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2369
2370         /* if data frame is to us and all is good,
2371          *   (optionally) print summary for only 1 out of every 100 */
2372         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
2373             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2374                 dataframe = 1;
2375                 if (!group100)
2376                         print_summary = 1;      /* print each frame */
2377                 else if (priv->framecnt_to_us < 100) {
2378                         priv->framecnt_to_us++;
2379                         print_summary = 0;
2380                 } else {
2381                         priv->framecnt_to_us = 0;
2382                         print_summary = 1;
2383                         hundred = 1;
2384                 }
2385         } else {
2386                 /* print summary for all other frames */
2387                 print_summary = 1;
2388         }
2389
2390         if (print_summary) {
2391                 char *title;
2392                 int rate_idx;
2393                 u32 bitrate;
2394
2395                 if (hundred)
2396                         title = "100Frames";
2397                 else if (ieee80211_has_retry(fc))
2398                         title = "Retry";
2399                 else if (ieee80211_is_assoc_resp(fc))
2400                         title = "AscRsp";
2401                 else if (ieee80211_is_reassoc_resp(fc))
2402                         title = "RasRsp";
2403                 else if (ieee80211_is_probe_resp(fc)) {
2404                         title = "PrbRsp";
2405                         print_dump = 1; /* dump frame contents */
2406                 } else if (ieee80211_is_beacon(fc)) {
2407                         title = "Beacon";
2408                         print_dump = 1; /* dump frame contents */
2409                 } else if (ieee80211_is_atim(fc))
2410                         title = "ATIM";
2411                 else if (ieee80211_is_auth(fc))
2412                         title = "Auth";
2413                 else if (ieee80211_is_deauth(fc))
2414                         title = "DeAuth";
2415                 else if (ieee80211_is_disassoc(fc))
2416                         title = "DisAssoc";
2417                 else
2418                         title = "Frame";
2419
2420                 rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
2421                 if (unlikely(rate_idx == -1))
2422                         bitrate = 0;
2423                 else
2424                         bitrate = iwl_rates[rate_idx].ieee / 2;
2425
2426                 /* print frame summary.
2427                  * MAC addresses show just the last byte (for brevity),
2428                  *    but you can hack it to show more, if you'd like to. */
2429                 if (dataframe)
2430                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2431                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2432                                      title, le16_to_cpu(fc), header->addr1[5],
2433                                      length, rssi, channel, bitrate);
2434                 else {
2435                         /* src/dst addresses assume managed mode */
2436                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2437                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
2438                                      "phy=0x%02x, chnl=%d\n",
2439                                      title, le16_to_cpu(fc), header->addr1[5],
2440                                      header->addr3[5], rssi,
2441                                      tsf_low - priv->scan_start_tsf,
2442                                      phy_flags, channel);
2443                 }
2444         }
2445         if (print_dump)
2446                 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
2447 }
2448 #else
2449 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2450                                             struct iwl_rx_packet *pkt,
2451                                             struct ieee80211_hdr *header,
2452                                             int group100)
2453 {
2454 }
2455 #endif
2456
2457
2458
2459 /* Called for REPLY_RX (legacy ABG frames), or
2460  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
2461 void iwl4965_rx_reply_rx(struct iwl_priv *priv,
2462                                 struct iwl_rx_mem_buffer *rxb)
2463 {
2464         struct ieee80211_hdr *header;
2465         struct ieee80211_rx_status rx_status;
2466         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2467         /* Use phy data (Rx signal strength, etc.) contained within
2468          *   this rx packet for legacy frames,
2469          *   or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
2470         int include_phy = (pkt->hdr.cmd == REPLY_RX);
2471         struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2472                 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2473                 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2474         __le32 *rx_end;
2475         unsigned int len = 0;
2476         u16 fc;
2477         u8 network_packet;
2478
2479         rx_status.mactime = le64_to_cpu(rx_start->timestamp);
2480         rx_status.freq =
2481                 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
2482         rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2483                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
2484         rx_status.rate_idx =
2485                 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
2486         if (rx_status.band == IEEE80211_BAND_5GHZ)
2487                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2488
2489         rx_status.antenna = 0;
2490         rx_status.flag = 0;
2491
2492         if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
2493                 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2494                                 rx_start->cfg_phy_cnt);
2495                 return;
2496         }
2497
2498         if (!include_phy) {
2499                 if (priv->last_phy_res[0])
2500                         rx_start = (struct iwl4965_rx_phy_res *)
2501                                 &priv->last_phy_res[1];
2502                 else
2503                         rx_start = NULL;
2504         }
2505
2506         if (!rx_start) {
2507                 IWL_ERROR("MPDU frame without a PHY data\n");
2508                 return;
2509         }
2510
2511         if (include_phy) {
2512                 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2513                                                   + rx_start->cfg_phy_cnt);
2514
2515                 len = le16_to_cpu(rx_start->byte_count);
2516                 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
2517                                   sizeof(struct iwl4965_rx_phy_res) + len);
2518         } else {
2519                 struct iwl4965_rx_mpdu_res_start *amsdu =
2520                         (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2521
2522                 header = (void *)(pkt->u.raw +
2523                         sizeof(struct iwl4965_rx_mpdu_res_start));
2524                 len = le16_to_cpu(amsdu->byte_count);
2525                 rx_end = (__le32 *) (pkt->u.raw +
2526                         sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2527         }
2528
2529         if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2530             !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2531                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2532                                 le32_to_cpu(*rx_end));
2533                 return;
2534         }
2535
2536         priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2537
2538         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
2539         rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
2540
2541         /* Meaningful noise values are available only from beacon statistics,
2542          *   which are gathered only when associated, and indicate noise
2543          *   only for the associated network channel ...
2544          * Ignore these noise values while scanning (other channels) */
2545         if (iwl_is_associated(priv) &&
2546             !test_bit(STATUS_SCANNING, &priv->status)) {
2547                 rx_status.noise = priv->last_rx_noise;
2548                 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
2549                                                          rx_status.noise);
2550         } else {
2551                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2552                 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
2553         }
2554
2555         /* Reset beacon noise level if not associated. */
2556         if (!iwl_is_associated(priv))
2557                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2558
2559         /* Set "1" to report good data frames in groups of 100 */
2560         /* FIXME: need to optimze the call: */
2561         iwl4965_dbg_report_frame(priv, pkt, header, 1);
2562
2563         IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
2564                               rx_status.signal, rx_status.noise, rx_status.signal,
2565                               (unsigned long long)rx_status.mactime);
2566
2567
2568         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2569                 iwl4965_handle_data_packet(priv, 1, include_phy,
2570                                                  rxb, &rx_status);
2571                 return;
2572         }
2573
2574         network_packet = iwl4965_is_network_packet(priv, header);
2575         if (network_packet) {
2576                 priv->last_rx_rssi = rx_status.signal;
2577                 priv->last_beacon_time =  priv->ucode_beacon_time;
2578                 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2579         }
2580
2581         fc = le16_to_cpu(header->frame_control);
2582         switch (fc & IEEE80211_FCTL_FTYPE) {
2583         case IEEE80211_FTYPE_MGMT:
2584                 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2585                         iwl4965_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
2586                                                 header->addr2);
2587                 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
2588                 break;
2589
2590         case IEEE80211_FTYPE_CTL:
2591                 switch (fc & IEEE80211_FCTL_STYPE) {
2592                 case IEEE80211_STYPE_BACK_REQ:
2593                         IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2594                         iwl4965_handle_data_packet(priv, 0, include_phy,
2595                                                 rxb, &rx_status);
2596                         break;
2597                 default:
2598                         break;
2599                 }
2600                 break;
2601
2602         case IEEE80211_FTYPE_DATA: {
2603                 DECLARE_MAC_BUF(mac1);
2604                 DECLARE_MAC_BUF(mac2);
2605                 DECLARE_MAC_BUF(mac3);
2606
2607                 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2608                         iwl4965_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
2609                                                 header->addr2);
2610
2611                 if (unlikely(!network_packet))
2612                         IWL_DEBUG_DROP("Dropping (non network): "
2613                                        "%s, %s, %s\n",
2614                                        print_mac(mac1, header->addr1),
2615                                        print_mac(mac2, header->addr2),
2616                                        print_mac(mac3, header->addr3));
2617                 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
2618                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2619                                        print_mac(mac1, header->addr1),
2620                                        print_mac(mac2, header->addr2),
2621                                        print_mac(mac3, header->addr3));
2622                 else
2623                         iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
2624                                                    &rx_status);
2625                 break;
2626         }
2627         default:
2628                 break;
2629
2630         }
2631 }
2632
2633 /**
2634  * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2635  *
2636  * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2637  * ACK vs. not.  This gets sent to mac80211, then to rate scaling algo.
2638  */
2639 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
2640                                                  struct iwl_ht_agg *agg,
2641                                                  struct iwl4965_compressed_ba_resp*
2642                                                  ba_resp)
2643
2644 {
2645         int i, sh, ack;
2646         u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2647         u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2648         u64 bitmap;
2649         int successes = 0;
2650         struct ieee80211_tx_info *info;
2651
2652         if (unlikely(!agg->wait_for_ba))  {
2653                 IWL_ERROR("Received BA when not expected\n");
2654                 return -EINVAL;
2655         }
2656
2657         /* Mark that the expected block-ack response arrived */
2658         agg->wait_for_ba = 0;
2659         IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2660
2661         /* Calculate shift to align block-ack bits with our Tx window bits */
2662         sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
2663         if (sh < 0) /* tbw something is wrong with indices */
2664                 sh += 0x100;
2665
2666         /* don't use 64-bit values for now */
2667         bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
2668
2669         if (agg->frame_count > (64 - sh)) {
2670                 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
2671                 return -1;
2672         }
2673
2674         /* check for success or failure according to the
2675          * transmitted bitmap and block-ack bitmap */
2676         bitmap &= agg->bitmap;
2677
2678         /* For each frame attempted in aggregation,
2679          * update driver's record of tx frame's status. */
2680         for (i = 0; i < agg->frame_count ; i++) {
2681                 ack = bitmap & (1 << i);
2682                 successes += !!ack;
2683                 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
2684                         ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
2685                         agg->start_idx + i);
2686         }
2687
2688         info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
2689         memset(&info->status, 0, sizeof(info->status));
2690         info->flags = IEEE80211_TX_STAT_ACK;
2691         info->flags |= IEEE80211_TX_STAT_AMPDU;
2692         info->status.ampdu_ack_map = successes;
2693         info->status.ampdu_ack_len = agg->frame_count;
2694         iwl_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
2695
2696         IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2697
2698         return 0;
2699 }
2700
2701 /**
2702  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2703  */
2704 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
2705                                             u16 txq_id)
2706 {
2707         /* Simply stop the queue, but don't change any configuration;
2708          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2709         iwl_write_prph(priv,
2710                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
2711                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
2712                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2713 }
2714
2715 /**
2716  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
2717  * priv->lock must be held by the caller
2718  */
2719 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
2720                                    u16 ssn_idx, u8 tx_fifo)
2721 {
2722         int ret = 0;
2723
2724         if (IWL49_FIRST_AMPDU_QUEUE > txq_id) {
2725                 IWL_WARNING("queue number too small: %d, must be > %d\n",
2726                                 txq_id, IWL49_FIRST_AMPDU_QUEUE);
2727                 return -EINVAL;
2728         }
2729
2730         ret = iwl_grab_nic_access(priv);
2731         if (ret)
2732                 return ret;
2733
2734         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2735
2736         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2737
2738         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2739         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2740         /* supposes that ssn_idx is valid (!= 0xFFF) */
2741         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2742
2743         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2744         iwl_txq_ctx_deactivate(priv, txq_id);
2745         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
2746
2747         iwl_release_nic_access(priv);
2748
2749         return 0;
2750 }
2751
2752
2753 /**
2754  * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
2755  *
2756  * Handles block-acknowledge notification from device, which reports success
2757  * of frames sent via aggregation.
2758  */
2759 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
2760                                            struct iwl_rx_mem_buffer *rxb)
2761 {
2762         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2763         struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
2764         int index;
2765         struct iwl_tx_queue *txq = NULL;
2766         struct iwl_ht_agg *agg;
2767         DECLARE_MAC_BUF(mac);
2768
2769         /* "flow" corresponds to Tx queue */
2770         u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2771
2772         /* "ssn" is start of block-ack Tx window, corresponds to index
2773          * (in Tx queue's circular buffer) of first TFD/frame in window */
2774         u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
2775
2776         if (scd_flow >= priv->hw_params.max_txq_num) {
2777                 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
2778                 return;
2779         }
2780
2781         txq = &priv->txq[scd_flow];
2782         agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
2783
2784         /* Find index just before block-ack window */
2785         index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
2786
2787         /* TODO: Need to get this copy more safely - now good for debug */
2788
2789         IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
2790                            "sta_id = %d\n",
2791                            agg->wait_for_ba,
2792                            print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
2793                            ba_resp->sta_id);
2794         IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
2795                            "%d, scd_ssn = %d\n",
2796                            ba_resp->tid,
2797                            ba_resp->seq_ctl,
2798                            (unsigned long long)le64_to_cpu(ba_resp->bitmap),
2799                            ba_resp->scd_flow,
2800                            ba_resp->scd_ssn);
2801         IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
2802                            agg->start_idx,
2803                            (unsigned long long)agg->bitmap);
2804
2805         /* Update driver's record of ACK vs. not for each frame in window */
2806         iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
2807
2808         /* Release all TFDs before the SSN, i.e. all TFDs in front of
2809          * block-ack window (we assume that they've been successfully
2810          * transmitted ... if not, it's too late anyway). */
2811         if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
2812                 /* calculate mac80211 ampdu sw queue to wake */
2813                 int ampdu_q =
2814                    scd_flow - priv->hw_params.first_ampdu_q + priv->hw->queues;
2815                 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
2816                 priv->stations[ba_resp->sta_id].
2817                         tid[ba_resp->tid].tfds_in_queue -= freed;
2818                 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
2819                         priv->mac80211_registered &&
2820                         agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
2821                         ieee80211_wake_queue(priv->hw, ampdu_q);
2822
2823                 iwl_txq_check_empty(priv, ba_resp->sta_id,
2824                                     ba_resp->tid, scd_flow);
2825         }
2826 }
2827
2828 /**
2829  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2830  */
2831 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
2832                                         u16 txq_id)
2833 {
2834         u32 tbl_dw_addr;
2835         u32 tbl_dw;
2836         u16 scd_q2ratid;
2837
2838         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
2839
2840         tbl_dw_addr = priv->scd_base_addr +
2841                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
2842
2843         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
2844
2845         if (txq_id & 0x1)
2846                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
2847         else
2848                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
2849
2850         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
2851
2852         return 0;
2853 }
2854
2855
2856 /**
2857  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2858  *
2859  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
2860  *        i.e. it must be one of the higher queues used for aggregation
2861  */
2862 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
2863                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
2864 {
2865         unsigned long flags;
2866         int ret;
2867         u16 ra_tid;
2868
2869         if (IWL49_FIRST_AMPDU_QUEUE > txq_id)
2870                 IWL_WARNING("queue number too small: %d, must be > %d\n",
2871                         txq_id, IWL49_FIRST_AMPDU_QUEUE);
2872
2873         ra_tid = BUILD_RAxTID(sta_id, tid);
2874
2875         /* Modify device's station table to Tx this TID */
2876         iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
2877
2878         spin_lock_irqsave(&priv->lock, flags);
2879         ret = iwl_grab_nic_access(priv);
2880         if (ret) {
2881                 spin_unlock_irqrestore(&priv->lock, flags);
2882                 return ret;
2883         }
2884
2885         /* Stop this Tx queue before configuring it */
2886         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2887
2888         /* Map receiver-address / traffic-ID to this queue */
2889         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
2890
2891         /* Set this queue as a chain-building queue */
2892         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2893
2894         /* Place first TFD at index corresponding to start sequence number.
2895          * Assumes that ssn_idx is valid (!= 0xFFF) */
2896         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2897         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2898         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2899
2900         /* Set up Tx window size and frame limit for this queue */
2901         iwl_write_targ_mem(priv,
2902                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2903                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
2904                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2905
2906         iwl_write_targ_mem(priv, priv->scd_base_addr +
2907                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2908                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
2909                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2910
2911         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2912
2913         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2914         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
2915
2916         iwl_release_nic_access(priv);
2917         spin_unlock_irqrestore(&priv->lock, flags);
2918
2919         return 0;
2920 }
2921
2922 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
2923                                 const u8 *addr, int tid, u16 ssn)
2924 {
2925         unsigned long flags;
2926         int sta_id;
2927
2928         sta_id = iwl_find_station(priv, addr);
2929         if (sta_id == IWL_INVALID_STATION)
2930                 return -ENXIO;
2931
2932         spin_lock_irqsave(&priv->sta_lock, flags);
2933         priv->stations[sta_id].sta.station_flags_msk = 0;
2934         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
2935         priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
2936         priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
2937         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2938         spin_unlock_irqrestore(&priv->sta_lock, flags);
2939
2940         return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
2941                                         CMD_ASYNC);
2942 }
2943
2944 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
2945                                const u8 *addr, int tid)
2946 {
2947         unsigned long flags;
2948         int sta_id;
2949
2950         sta_id = iwl_find_station(priv, addr);
2951         if (sta_id == IWL_INVALID_STATION)
2952                 return -ENXIO;
2953
2954         spin_lock_irqsave(&priv->sta_lock, flags);
2955         priv->stations[sta_id].sta.station_flags_msk = 0;
2956         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
2957         priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
2958         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2959         spin_unlock_irqrestore(&priv->sta_lock, flags);
2960
2961         return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
2962                                         CMD_ASYNC);
2963 }
2964
2965 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
2966                              enum ieee80211_ampdu_mlme_action action,
2967                              const u8 *addr, u16 tid, u16 *ssn)
2968 {
2969         struct iwl_priv *priv = hw->priv;
2970         DECLARE_MAC_BUF(mac);
2971
2972         IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
2973                      print_mac(mac, addr), tid);
2974
2975         switch (action) {
2976         case IEEE80211_AMPDU_RX_START:
2977                 IWL_DEBUG_HT("start Rx\n");
2978                 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
2979         case IEEE80211_AMPDU_RX_STOP:
2980                 IWL_DEBUG_HT("stop Rx\n");
2981                 return iwl4965_rx_agg_stop(priv, addr, tid);
2982         case IEEE80211_AMPDU_TX_START:
2983                 IWL_DEBUG_HT("start Tx\n");
2984                 return iwl_tx_agg_start(priv, addr, tid, ssn);
2985         case IEEE80211_AMPDU_TX_STOP:
2986                 IWL_DEBUG_HT("stop Tx\n");
2987                 return iwl_tx_agg_stop(priv, addr, tid);
2988         default:
2989                 IWL_DEBUG_HT("unknown\n");
2990                 return -EINVAL;
2991                 break;
2992         }
2993         return 0;
2994 }
2995
2996 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
2997 {
2998         switch (cmd_id) {
2999         case REPLY_RXON:
3000                 return (u16) sizeof(struct iwl4965_rxon_cmd);
3001         default:
3002                 return len;
3003         }
3004 }
3005
3006 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3007 {
3008         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3009         addsta->mode = cmd->mode;
3010         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3011         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3012         addsta->station_flags = cmd->station_flags;
3013         addsta->station_flags_msk = cmd->station_flags_msk;
3014         addsta->tid_disable_tx = cmd->tid_disable_tx;
3015         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3016         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3017         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3018         addsta->reserved1 = __constant_cpu_to_le16(0);
3019         addsta->reserved2 = __constant_cpu_to_le32(0);
3020
3021         return (u16)sizeof(struct iwl4965_addsta_cmd);
3022 }
3023
3024 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3025 {
3026         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
3027 }
3028
3029 /**
3030  * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3031  */
3032 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
3033                                       struct iwl_ht_agg *agg,
3034                                       struct iwl4965_tx_resp *tx_resp,
3035                                       int txq_id, u16 start_idx)
3036 {
3037         u16 status;
3038         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
3039         struct ieee80211_tx_info *info = NULL;
3040         struct ieee80211_hdr *hdr = NULL;
3041         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3042         int i, sh, idx;
3043         u16 seq;
3044         if (agg->wait_for_ba)
3045                 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3046
3047         agg->frame_count = tx_resp->frame_count;
3048         agg->start_idx = start_idx;
3049         agg->rate_n_flags = rate_n_flags;
3050         agg->bitmap = 0;
3051
3052         /* # frames attempted by Tx command */
3053         if (agg->frame_count == 1) {
3054                 /* Only one frame was attempted; no block-ack will arrive */
3055                 status = le16_to_cpu(frame_status[0].status);
3056                 idx = start_idx;
3057
3058                 /* FIXME: code repetition */
3059                 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3060                                    agg->frame_count, agg->start_idx, idx);
3061
3062                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
3063                 info->status.retry_count = tx_resp->failure_frame;
3064                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
3065                 info->flags |= iwl_is_tx_success(status)?
3066                         IEEE80211_TX_STAT_ACK : 0;
3067                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
3068                 /* FIXME: code repetition end */
3069
3070                 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3071                                     status & 0xff, tx_resp->failure_frame);
3072                 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
3073
3074                 agg->wait_for_ba = 0;
3075         } else {
3076                 /* Two or more frames were attempted; expect block-ack */
3077                 u64 bitmap = 0;
3078                 int start = agg->start_idx;
3079
3080                 /* Construct bit-map of pending frames within Tx window */
3081                 for (i = 0; i < agg->frame_count; i++) {
3082                         u16 sc;
3083                         status = le16_to_cpu(frame_status[i].status);
3084                         seq  = le16_to_cpu(frame_status[i].sequence);
3085                         idx = SEQ_TO_INDEX(seq);
3086                         txq_id = SEQ_TO_QUEUE(seq);
3087
3088                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3089                                       AGG_TX_STATE_ABORT_MSK))
3090                                 continue;
3091
3092                         IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3093                                            agg->frame_count, txq_id, idx);
3094
3095                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
3096
3097                         sc = le16_to_cpu(hdr->seq_ctrl);
3098                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3099                                 IWL_ERROR("BUG_ON idx doesn't match seq control"
3100                                           " idx=%d, seq_idx=%d, seq=%d\n",
3101                                           idx, SEQ_TO_SN(sc),
3102                                           hdr->seq_ctrl);
3103                                 return -1;
3104                         }
3105
3106                         IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3107                                            i, idx, SEQ_TO_SN(sc));
3108
3109                         sh = idx - start;
3110                         if (sh > 64) {
3111                                 sh = (start - idx) + 0xff;
3112                                 bitmap = bitmap << sh;
3113                                 sh = 0;
3114                                 start = idx;
3115                         } else if (sh < -64)
3116                                 sh  = 0xff - (start - idx);
3117                         else if (sh < 0) {
3118                                 sh = start - idx;
3119                                 start = idx;
3120                                 bitmap = bitmap << sh;
3121                                 sh = 0;
3122                         }
3123                         bitmap |= (1 << sh);
3124                         IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3125                                            start, (u32)(bitmap & 0xFFFFFFFF));
3126                 }
3127
3128                 agg->bitmap = bitmap;
3129                 agg->start_idx = start;
3130                 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
3131                                    agg->frame_count, agg->start_idx,
3132                                    (unsigned long long)agg->bitmap);
3133
3134                 if (bitmap)
3135                         agg->wait_for_ba = 1;
3136         }
3137         return 0;
3138 }
3139
3140 /**
3141  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3142  */
3143 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
3144                                 struct iwl_rx_mem_buffer *rxb)
3145 {
3146         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3147         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3148         int txq_id = SEQ_TO_QUEUE(sequence);
3149         int index = SEQ_TO_INDEX(sequence);
3150         struct iwl_tx_queue *txq = &priv->txq[txq_id];
3151         struct ieee80211_tx_info *info;
3152         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3153         u32  status = le32_to_cpu(tx_resp->u.status);
3154         int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3155         __le16 fc;
3156         struct ieee80211_hdr *hdr;
3157         u8 *qc = NULL;
3158
3159         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
3160                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3161                           "is out of range [0-%d] %d %d\n", txq_id,
3162                           index, txq->q.n_bd, txq->q.write_ptr,
3163                           txq->q.read_ptr);
3164                 return;
3165         }
3166
3167         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
3168         memset(&info->status, 0, sizeof(info->status));
3169
3170         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
3171         fc = hdr->frame_control;
3172         if (ieee80211_is_data_qos(fc)) {
3173                 qc = ieee80211_get_qos_ctl(hdr);
3174                 tid = qc[0] & 0xf;
3175         }
3176
3177         sta_id = iwl_get_ra_sta_id(priv, hdr);
3178         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3179                 IWL_ERROR("Station not known\n");
3180                 return;
3181         }
3182
3183         if (txq->sched_retry) {
3184                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3185                 struct iwl_ht_agg *agg = NULL;
3186
3187                 if (!qc)
3188                         return;
3189
3190                 agg = &priv->stations[sta_id].tid[tid].agg;
3191
3192                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
3193
3194                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status)) {
3195                         /* TODO: send BAR */
3196                 }
3197
3198                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3199                         int freed, ampdu_q;
3200                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3201                         IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3202                                            "%d index %d\n", scd_ssn , index);
3203                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
3204                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3205
3206                         if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3207                             txq_id >= 0 && priv->mac80211_registered &&
3208                             agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
3209                                 /* calculate mac80211 ampdu sw queue to wake */
3210                                 ampdu_q = txq_id - IWL49_FIRST_AMPDU_QUEUE +
3211                                           priv->hw->queues;
3212                                 if (agg->state == IWL_AGG_OFF)
3213                                         ieee80211_wake_queue(priv->hw, txq_id);
3214                                 else
3215                                         ieee80211_wake_queue(priv->hw, ampdu_q);
3216                         }
3217                         iwl_txq_check_empty(priv, sta_id, tid, txq_id);
3218                 }
3219         } else {
3220                 info->status.retry_count = tx_resp->failure_frame;
3221                 info->flags |=
3222                         iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
3223                 iwl_hwrate_to_tx_control(priv,
3224                                         le32_to_cpu(tx_resp->rate_n_flags),
3225                                         info);
3226
3227                 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
3228                              "0x%x retries %d\n", txq_id,
3229                                 iwl_get_tx_fail_reason(status),
3230                                 status, le32_to_cpu(tx_resp->rate_n_flags),
3231                                 tx_resp->failure_frame);
3232
3233                 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3234
3235                 if (index != -1) {
3236                     int freed = iwl_tx_queue_reclaim(priv, txq_id, index);
3237                     if (tid != MAX_TID_COUNT)
3238                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3239                     if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3240                         (txq_id >= 0) && priv->mac80211_registered)
3241                         ieee80211_wake_queue(priv->hw, txq_id);
3242                     if (tid != MAX_TID_COUNT)
3243                         iwl_txq_check_empty(priv, sta_id, tid, txq_id);
3244                 }
3245         }
3246
3247         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3248                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
3249 }
3250
3251
3252 /* Set up 4965-specific Rx frame reply handlers */
3253 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
3254 {
3255         /* Legacy Rx frames */
3256         priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
3257         /* Tx response */
3258         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
3259         /* block ack */
3260         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
3261 }
3262
3263 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
3264 {
3265         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3266 }
3267
3268 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
3269 {
3270         cancel_work_sync(&priv->txpower_work);
3271 }
3272
3273
3274 static struct iwl_hcmd_ops iwl4965_hcmd = {
3275         .rxon_assoc = iwl4965_send_rxon_assoc,
3276 };
3277
3278 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
3279         .get_hcmd_size = iwl4965_get_hcmd_size,
3280         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
3281         .chain_noise_reset = iwl4965_chain_noise_reset,
3282         .gain_computation = iwl4965_gain_computation,
3283 };
3284
3285 static struct iwl_lib_ops iwl4965_lib = {
3286         .set_hw_params = iwl4965_hw_set_hw_params,
3287         .alloc_shared_mem = iwl4965_alloc_shared_mem,
3288         .free_shared_mem = iwl4965_free_shared_mem,
3289         .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
3290         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
3291         .txq_set_sched = iwl4965_txq_set_sched,
3292         .txq_agg_enable = iwl4965_txq_agg_enable,
3293         .txq_agg_disable = iwl4965_txq_agg_disable,
3294         .rx_handler_setup = iwl4965_rx_handler_setup,
3295         .setup_deferred_work = iwl4965_setup_deferred_work,
3296         .cancel_deferred_work = iwl4965_cancel_deferred_work,
3297         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3298         .alive_notify = iwl4965_alive_notify,
3299         .init_alive_start = iwl4965_init_alive_start,
3300         .load_ucode = iwl4965_load_bsm,
3301         .apm_ops = {
3302                 .init = iwl4965_apm_init,
3303                 .reset = iwl4965_apm_reset,
3304                 .stop = iwl4965_apm_stop,
3305                 .config = iwl4965_nic_config,
3306                 .set_pwr_src = iwl4965_set_pwr_src,
3307         },
3308         .eeprom_ops = {
3309                 .regulatory_bands = {
3310                         EEPROM_REGULATORY_BAND_1_CHANNELS,
3311                         EEPROM_REGULATORY_BAND_2_CHANNELS,
3312                         EEPROM_REGULATORY_BAND_3_CHANNELS,
3313                         EEPROM_REGULATORY_BAND_4_CHANNELS,
3314                         EEPROM_REGULATORY_BAND_5_CHANNELS,
3315                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3316                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3317                 },
3318                 .verify_signature  = iwlcore_eeprom_verify_signature,
3319                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3320                 .release_semaphore = iwlcore_eeprom_release_semaphore,
3321                 .check_version = iwl4965_eeprom_check_version,
3322                 .query_addr = iwlcore_eeprom_query_addr,
3323         },
3324         .set_power = iwl4965_set_power,
3325         .send_tx_power  = iwl4965_send_tx_power,
3326         .update_chain_flags = iwl4965_update_chain_flags,
3327         .temperature = iwl4965_temperature_calib,
3328 };
3329
3330 static struct iwl_ops iwl4965_ops = {
3331         .lib = &iwl4965_lib,
3332         .hcmd = &iwl4965_hcmd,
3333         .utils = &iwl4965_hcmd_utils,
3334 };
3335
3336 struct iwl_cfg iwl4965_agn_cfg = {
3337         .name = "4965AGN",
3338         .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
3339         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
3340         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
3341         .ops = &iwl4965_ops,
3342         .mod_params = &iwl4965_mod_params,
3343 };
3344
3345 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3346 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3347 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3348 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
3349 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3350 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
3351 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3352 MODULE_PARM_DESC(debug, "debug output mask");
3353 module_param_named(
3354         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3355 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3356
3357 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3358 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3359
3360 /* QoS */
3361 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3362 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3363 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3364 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3365 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3366 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");