2 * Dynamic DMA mapping support.
5 #include <linux/types.h>
7 #include <linux/string.h>
9 #include <linux/module.h>
10 #include <linux/dmar.h>
13 #include <asm/calgary.h>
15 int iommu_merge __read_mostly = 0;
17 dma_addr_t bad_dma_address __read_mostly;
18 EXPORT_SYMBOL(bad_dma_address);
20 /* This tells the BIO block layer to assume merging. Default to off
21 because we cannot guarantee merging later. */
22 int iommu_bio_merge __read_mostly = 0;
23 EXPORT_SYMBOL(iommu_bio_merge);
25 static int iommu_sac_force __read_mostly = 0;
27 int no_iommu __read_mostly;
28 #ifdef CONFIG_IOMMU_DEBUG
29 int panic_on_overflow __read_mostly = 1;
30 int force_iommu __read_mostly = 1;
32 int panic_on_overflow __read_mostly = 0;
33 int force_iommu __read_mostly= 0;
36 /* Set this to 1 if there is a HW IOMMU in the system */
37 int iommu_detected __read_mostly = 0;
39 /* Dummy device used for NULL arguments (normally ISA). Better would
40 be probably a smaller DMA mask, but this is bug-to-bug compatible
42 struct device fallback_dev = {
43 .bus_id = "fallback device",
44 .coherent_dma_mask = DMA_32BIT_MASK,
45 .dma_mask = &fallback_dev.coherent_dma_mask,
48 /* Allocate DMA memory on node near device */
49 noinline static void *
50 dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
55 node = dev_to_node(dev);
57 page = alloc_pages_node(node, gfp, order);
58 return page ? page_address(page) : NULL;
62 * Allocate memory for a coherent mapping.
65 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
69 unsigned long dma_mask = 0;
74 dma_mask = dev->coherent_dma_mask;
76 dma_mask = DMA_32BIT_MASK;
78 /* Device not DMA able */
79 if (dev->dma_mask == NULL)
82 /* Don't invoke OOM killer */
85 /* Kludge to make it bug-to-bug compatible with i386. i386
86 uses the normal dma_mask for alloc_coherent. */
87 dma_mask &= *dev->dma_mask;
89 /* Why <=? Even when the mask is smaller than 4GB it is often
90 larger than 16MB and in this case we have a chance of
91 finding fitting memory in the next higher zone first. If
92 not retry with true GFP_DMA. -AK */
93 if (dma_mask <= DMA_32BIT_MASK)
97 memory = dma_alloc_pages(dev, gfp, get_order(size));
103 bus = virt_to_bus(memory);
104 high = (bus + size) >= dma_mask;
106 if (force_iommu && !(gfp & GFP_DMA))
109 free_pages((unsigned long)memory,
112 /* Don't use the 16MB ZONE_DMA unless absolutely
113 needed. It's better to use remapping first. */
114 if (dma_mask < DMA_32BIT_MASK && !(gfp & GFP_DMA)) {
115 gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
119 /* Let low level make its own zone decisions */
120 gfp &= ~(GFP_DMA32|GFP_DMA);
122 if (dma_ops->alloc_coherent)
123 return dma_ops->alloc_coherent(dev, size,
128 memset(memory, 0, size);
130 *dma_handle = virt_to_bus(memory);
135 if (dma_ops->alloc_coherent) {
136 free_pages((unsigned long)memory, get_order(size));
137 gfp &= ~(GFP_DMA|GFP_DMA32);
138 return dma_ops->alloc_coherent(dev, size, dma_handle, gfp);
141 if (dma_ops->map_simple) {
142 *dma_handle = dma_ops->map_simple(dev, memory,
144 PCI_DMA_BIDIRECTIONAL);
145 if (*dma_handle != bad_dma_address)
149 if (panic_on_overflow)
150 panic("dma_alloc_coherent: IOMMU overflow by %lu bytes\n",size);
151 free_pages((unsigned long)memory, get_order(size));
154 EXPORT_SYMBOL(dma_alloc_coherent);
157 * Unmap coherent memory.
158 * The caller must ensure that the device has finished accessing the mapping.
160 void dma_free_coherent(struct device *dev, size_t size,
161 void *vaddr, dma_addr_t bus)
163 WARN_ON(irqs_disabled()); /* for portability */
164 if (dma_ops->unmap_single)
165 dma_ops->unmap_single(dev, bus, size, 0);
166 free_pages((unsigned long)vaddr, get_order(size));
168 EXPORT_SYMBOL(dma_free_coherent);
170 static int forbid_dac __read_mostly;
172 int dma_supported(struct device *dev, u64 mask)
175 if (mask > 0xffffffff && forbid_dac > 0) {
179 printk(KERN_INFO "PCI: Disallowing DAC for device %s\n", dev->bus_id);
184 if (dma_ops->dma_supported)
185 return dma_ops->dma_supported(dev, mask);
187 /* Copied from i386. Doesn't make much sense, because it will
188 only work for pci_alloc_coherent.
189 The caller just has to use GFP_DMA in this case. */
190 if (mask < DMA_24BIT_MASK)
193 /* Tell the device to use SAC when IOMMU force is on. This
194 allows the driver to use cheaper accesses in some cases.
196 Problem with this is that if we overflow the IOMMU area and
197 return DAC as fallback address the device may not handle it
200 As a special case some controllers have a 39bit address
201 mode that is as efficient as 32bit (aic79xx). Don't force
202 SAC for these. Assume all masks <= 40 bits are of this
203 type. Normally this doesn't make any difference, but gives
204 more gentle handling of IOMMU overflow. */
205 if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
206 printk(KERN_INFO "%s: Force SAC with mask %Lx\n", dev->bus_id,mask);
212 EXPORT_SYMBOL(dma_supported);
214 int dma_set_mask(struct device *dev, u64 mask)
216 if (!dev->dma_mask || !dma_supported(dev, mask))
218 *dev->dma_mask = mask;
221 EXPORT_SYMBOL(dma_set_mask);
224 * See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
227 static __init int iommu_setup(char *p)
235 if (!strncmp(p,"off",3))
237 /* gart_parse_options has more force support */
238 if (!strncmp(p,"force",5))
240 if (!strncmp(p,"noforce",7)) {
245 if (!strncmp(p, "biomerge",8)) {
246 iommu_bio_merge = 4096;
250 if (!strncmp(p, "panic",5))
251 panic_on_overflow = 1;
252 if (!strncmp(p, "nopanic",7))
253 panic_on_overflow = 0;
254 if (!strncmp(p, "merge",5)) {
258 if (!strncmp(p, "nomerge",7))
260 if (!strncmp(p, "forcesac",8))
262 if (!strncmp(p, "allowdac", 8))
264 if (!strncmp(p, "nodac", 5))
267 #ifdef CONFIG_SWIOTLB
268 if (!strncmp(p, "soft",4))
272 #ifdef CONFIG_GART_IOMMU
273 gart_parse_options(p);
276 #ifdef CONFIG_CALGARY_IOMMU
277 if (!strncmp(p, "calgary", 7))
279 #endif /* CONFIG_CALGARY_IOMMU */
281 p += strcspn(p, ",");
287 early_param("iommu", iommu_setup);
289 void __init pci_iommu_alloc(void)
292 * The order of these functions is important for
293 * fall-back/fail-over reasons
295 #ifdef CONFIG_GART_IOMMU
296 gart_iommu_hole_init();
299 #ifdef CONFIG_CALGARY_IOMMU
303 detect_intel_iommu();
305 #ifdef CONFIG_SWIOTLB
310 static int __init pci_iommu_init(void)
312 #ifdef CONFIG_CALGARY_IOMMU
313 calgary_iommu_init();
318 #ifdef CONFIG_GART_IOMMU
326 void pci_iommu_shutdown(void)
328 gart_iommu_shutdown();
332 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
334 static __devinit void via_no_dac(struct pci_dev *dev)
336 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
337 printk(KERN_INFO "PCI: VIA PCI bridge detected. Disabling DAC.\n");
341 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
343 /* Must execute after PCI subsystem */
344 fs_initcall(pci_iommu_init);