1 /* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
2 * Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
5 #ifndef _ASM_PARISC_ATOMIC_H_
6 #define _ASM_PARISC_ATOMIC_H_
8 #include <linux/types.h>
11 * Atomic operations that C can't guarantee us. Useful for
12 * resource counting etc..
14 * And probably incredibly slow on parisc. OTOH, we don't
15 * have to write any serious assembly. prumpf
19 #include <asm/spinlock.h>
20 #include <asm/cache.h> /* we use L1_CACHE_BYTES */
22 /* Use an array of spinlocks for our atomic_ts.
23 * Hash function to index into a different SPINLOCK.
24 * Since "a" is usually an address, use one spinlock per cacheline.
26 # define ATOMIC_HASH_SIZE 4
27 # define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
29 extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
31 /* Can't use raw_spin_lock_irq because of #include problems, so
32 * this is the substitute */
33 #define _atomic_spin_lock_irqsave(l,f) do { \
34 raw_spinlock_t *s = ATOMIC_HASH(l); \
39 #define _atomic_spin_unlock_irqrestore(l,f) do { \
40 raw_spinlock_t *s = ATOMIC_HASH(l); \
41 __raw_spin_unlock(s); \
42 local_irq_restore(f); \
47 # define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
48 # define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
51 /* This should get optimized out since it's never called.
52 ** Or get a link error if xchg is used "wrong".
54 extern void __xchg_called_with_bad_pointer(void);
57 /* __xchg32/64 defined in arch/parisc/lib/bitops.c */
58 extern unsigned long __xchg8(char, char *);
59 extern unsigned long __xchg32(int, int *);
61 extern unsigned long __xchg64(unsigned long, unsigned long *);
64 /* optimizer better get rid of switch since size is a constant */
65 static __inline__ unsigned long
66 __xchg(unsigned long x, __volatile__ void * ptr, int size)
70 case 8: return __xchg64(x,(unsigned long *) ptr);
72 case 4: return __xchg32((int) x, (int *) ptr);
73 case 1: return __xchg8((char) x, (char *) ptr);
75 __xchg_called_with_bad_pointer();
81 ** REVISIT - Abandoned use of LDCW in xchg() for now:
82 ** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
83 ** o and while we are at it, could CONFIG_64BIT code use LDCD too?
85 ** if (__builtin_constant_p(x) && (x == NULL))
86 ** if (((unsigned long)p & 0xf) == 0)
90 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
93 #define __HAVE_ARCH_CMPXCHG 1
95 /* bug catcher for when unsupported size is used - won't link */
96 extern void __cmpxchg_called_with_bad_pointer(void);
98 /* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
99 extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_);
100 extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_);
102 /* don't worry...optimizer will get rid of most of this */
103 static __inline__ unsigned long
104 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
108 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
110 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
112 __cmpxchg_called_with_bad_pointer();
116 #define cmpxchg(ptr,o,n) \
118 __typeof__(*(ptr)) _o_ = (o); \
119 __typeof__(*(ptr)) _n_ = (n); \
120 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
121 (unsigned long)_n_, sizeof(*(ptr))); \
124 /* Note that we need not lock read accesses - aligned word writes/reads
125 * are atomic, so a reader never sees unconsistent values.
127 * Cache-line alignment would conflict with, for example, linux/module.h
130 typedef struct { volatile int counter; } atomic_t;
132 /* It's possible to reduce all atomic operations to either
133 * __atomic_add_return, atomic_set and atomic_read (the latter
134 * is there only for consistency).
137 static __inline__ int __atomic_add_return(int i, atomic_t *v)
141 _atomic_spin_lock_irqsave(v, flags);
143 ret = (v->counter += i);
145 _atomic_spin_unlock_irqrestore(v, flags);
149 static __inline__ void atomic_set(atomic_t *v, int i)
152 _atomic_spin_lock_irqsave(v, flags);
156 _atomic_spin_unlock_irqrestore(v, flags);
159 static __inline__ int atomic_read(const atomic_t *v)
164 /* exported interface */
165 #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
166 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
169 * atomic_add_unless - add unless the number is a given value
170 * @v: pointer of type atomic_t
171 * @a: the amount to add to v...
172 * @u: ...unless v is equal to u.
174 * Atomically adds @a to @v, so long as it was not @u.
175 * Returns non-zero if @v was not @u, and zero otherwise.
177 #define atomic_add_unless(v, a, u) \
179 __typeof__((v)->counter) c, old; \
180 c = atomic_read(v); \
181 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
185 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
187 #define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v))))
188 #define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v))))
189 #define atomic_inc(v) ((void)(__atomic_add_return( 1,(v))))
190 #define atomic_dec(v) ((void)(__atomic_add_return( -1,(v))))
192 #define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v)))
193 #define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v)))
194 #define atomic_inc_return(v) (__atomic_add_return( 1,(v)))
195 #define atomic_dec_return(v) (__atomic_add_return( -1,(v)))
197 #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
200 * atomic_inc_and_test - increment and test
201 * @v: pointer of type atomic_t
203 * Atomically increments @v by 1
204 * and returns true if the result is zero, or false for all
207 #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
209 #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
211 #define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
213 #define ATOMIC_INIT(i) ((atomic_t) { (i) })
215 #define smp_mb__before_atomic_dec() smp_mb()
216 #define smp_mb__after_atomic_dec() smp_mb()
217 #define smp_mb__before_atomic_inc() smp_mb()
218 #define smp_mb__after_atomic_inc() smp_mb()
222 typedef struct { volatile s64 counter; } atomic64_t;
224 #define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
226 static __inline__ int
227 __atomic64_add_return(s64 i, atomic64_t *v)
231 _atomic_spin_lock_irqsave(v, flags);
233 ret = (v->counter += i);
235 _atomic_spin_unlock_irqrestore(v, flags);
239 static __inline__ void
240 atomic64_set(atomic64_t *v, s64 i)
243 _atomic_spin_lock_irqsave(v, flags);
247 _atomic_spin_unlock_irqrestore(v, flags);
250 static __inline__ s64
251 atomic64_read(const atomic64_t *v)
256 #define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v))))
257 #define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v))))
258 #define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v))))
259 #define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v))))
261 #define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v)))
262 #define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v)))
263 #define atomic64_inc_return(v) (__atomic64_add_return( 1,(v)))
264 #define atomic64_dec_return(v) (__atomic64_add_return( -1,(v)))
266 #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
268 #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
269 #define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
270 #define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
272 /* exported interface */
273 #define atomic64_cmpxchg(v, o, n) \
274 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
275 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
278 * atomic64_add_unless - add unless the number is a given value
279 * @v: pointer of type atomic64_t
280 * @a: the amount to add to v...
281 * @u: ...unless v is equal to u.
283 * Atomically adds @a to @v, so long as it was not @u.
284 * Returns non-zero if @v was not @u, and zero otherwise.
286 #define atomic64_add_unless(v, a, u) \
288 __typeof__((v)->counter) c, old; \
289 c = atomic64_read(v); \
290 while (c != (u) && (old = atomic64_cmpxchg((v), c, c + (a))) != c) \
294 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
296 #endif /* CONFIG_64BIT */
298 #include <asm-generic/atomic.h>
300 #endif /* _ASM_PARISC_ATOMIC_H_ */