git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/platforms/iseries/setup.c

   1 /*
   2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Description:
   6  *      Architecture- / platform-specific boot-time initialization code for
   7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
   8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   9  *      <dan@net4x.com>.
  10  *
  11  *      This program is free software; you can redistribute it and/or
  12  *      modify it under the terms of the GNU General Public License
  13  *      as published by the Free Software Foundation; either version
  14  *      2 of the License, or (at your option) any later version.
  15  */
  16
  17 #undef DEBUG
  18
  19 #include <linux/config.h>
  20 #include <linux/init.h>
  21 #include <linux/threads.h>
  22 #include <linux/smp.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/seq_file.h>
  27 #include <linux/kdev_t.h>
  28 #include <linux/major.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/kernel.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/machdep.h>
  34 #include <asm/page.h>
  35 #include <asm/mmu.h>
  36 #include <asm/pgtable.h>
  37 #include <asm/mmu_context.h>
  38 #include <asm/cputable.h>
  39 #include <asm/sections.h>
  40 #include <asm/iommu.h>
  41 #include <asm/firmware.h>
  42 #include <asm/system.h>
  43 #include <asm/time.h>
  44 #include <asm/paca.h>
  45 #include <asm/cache.h>
  46 #include <asm/sections.h>
  47 #include <asm/abs_addr.h>
  48 #include <asm/iseries/hv_lp_config.h>
  49 #include <asm/iseries/hv_call_event.h>
  50 #include <asm/iseries/hv_call_xm.h>
  51 #include <asm/iseries/it_lp_queue.h>
  52 #include <asm/iseries/mf.h>
  53 #include <asm/iseries/it_exp_vpd_panel.h>
  54 #include <asm/iseries/hv_lp_event.h>
  55 #include <asm/iseries/lpar_map.h>
  56 #include <asm/udbg.h>
  57 #include <asm/irq.h>
  58
  59 #include "naca.h"
  60 #include "setup.h"
  61 #include "irq.h"
  62 #include "vpd_areas.h"
  63 #include "processor_vpd.h"
  64 #include "main_store.h"
  65 #include "call_sm.h"
  66 #include "call_hpt.h"
  67
  68 #ifdef DEBUG
  69 #define DBG(fmt...) udbg_printf(fmt)
  70 #else
  71 #define DBG(fmt...)
  72 #endif
  73
  74 /* Function Prototypes */
  75 static unsigned long build_iSeries_Memory_Map(void);
  76 static void iseries_shared_idle(void);
  77 static void iseries_dedicated_idle(void);
  78 #ifdef CONFIG_PCI
  79 extern void iSeries_pci_final_fixup(void);
  80 #else
  81 static void iSeries_pci_final_fixup(void) { }
  82 #endif
  83
  84 extern int rd_size;             /* Defined in drivers/block/rd.c */
  85 extern unsigned long embedded_sysmap_start;
  86 extern unsigned long embedded_sysmap_end;
  87
  88 extern unsigned long iSeries_recal_tb;
  89 extern unsigned long iSeries_recal_titan;
  90
  91 static unsigned long cmd_mem_limit;
  92
  93 struct MemoryBlock {
  94         unsigned long absStart;
  95         unsigned long absEnd;
  96         unsigned long logicalStart;
  97         unsigned long logicalEnd;
  98 };
  99
 100 /*
 101  * Process the main store vpd to determine where the holes in memory are
 102  * and return the number of physical blocks and fill in the array of
 103  * block data.
 104  */
 105 static unsigned long iSeries_process_Condor_mainstore_vpd(
 106                 struct MemoryBlock *mb_array, unsigned long max_entries)
 107 {
 108         unsigned long holeFirstChunk, holeSizeChunks;
 109         unsigned long numMemoryBlocks = 1;
 110         struct IoHriMainStoreSegment4 *msVpd =
 111                 (struct IoHriMainStoreSegment4 *)xMsVpd;
 112         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
 113         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
 114         unsigned long holeSize = holeEnd - holeStart;
 115
 116         printk("Mainstore_VPD: Condor\n");
 117         /*
 118          * Determine if absolute memory has any
 119          * holes so that we can interpret the
 120          * access map we get back from the hypervisor
 121          * correctly.
 122          */
 123         mb_array[0].logicalStart = 0;
 124         mb_array[0].logicalEnd = 0x100000000;
 125         mb_array[0].absStart = 0;
 126         mb_array[0].absEnd = 0x100000000;
 127
 128         if (holeSize) {
 129                 numMemoryBlocks = 2;
 130                 holeStart = holeStart & 0x000fffffffffffff;
 131                 holeStart = addr_to_chunk(holeStart);
 132                 holeFirstChunk = holeStart;
 133                 holeSize = addr_to_chunk(holeSize);
 134                 holeSizeChunks = holeSize;
 135                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
 136                                 holeFirstChunk, holeSizeChunks );
 137                 mb_array[0].logicalEnd = holeFirstChunk;
 138                 mb_array[0].absEnd = holeFirstChunk;
 139                 mb_array[1].logicalStart = holeFirstChunk;
 140                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
 141                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
 142                 mb_array[1].absEnd = 0x100000000;
 143         }
 144         return numMemoryBlocks;
 145 }
 146
 147 #define MaxSegmentAreas                 32
 148 #define MaxSegmentAdrRangeBlocks        128
 149 #define MaxAreaRangeBlocks              4
 150
 151 static unsigned long iSeries_process_Regatta_mainstore_vpd(
 152                 struct MemoryBlock *mb_array, unsigned long max_entries)
 153 {
 154         struct IoHriMainStoreSegment5 *msVpdP =
 155                 (struct IoHriMainStoreSegment5 *)xMsVpd;
 156         unsigned long numSegmentBlocks = 0;
 157         u32 existsBits = msVpdP->msAreaExists;
 158         unsigned long area_num;
 159
 160         printk("Mainstore_VPD: Regatta\n");
 161
 162         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
 163                 unsigned long numAreaBlocks;
 164                 struct IoHriMainStoreArea4 *currentArea;
 165
 166                 if (existsBits & 0x80000000) {
 167                         unsigned long block_num;
 168
 169                         currentArea = &msVpdP->msAreaArray[area_num];
 170                         numAreaBlocks = currentArea->numAdrRangeBlocks;
 171                         printk("ms_vpd: processing area %2ld  blocks=%ld",
 172                                         area_num, numAreaBlocks);
 173                         for (block_num = 0; block_num < numAreaBlocks;
 174                                         ++block_num ) {
 175                                 /* Process an address range block */
 176                                 struct MemoryBlock tempBlock;
 177                                 unsigned long i;
 178
 179                                 tempBlock.absStart =
 180                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
 181                                 tempBlock.absEnd =
 182                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
 183                                 tempBlock.logicalStart = 0;
 184                                 tempBlock.logicalEnd   = 0;
 185                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
 186                                                 block_num, tempBlock.absStart,
 187                                                 tempBlock.absEnd);
 188
 189                                 for (i = 0; i < numSegmentBlocks; ++i) {
 190                                         if (mb_array[i].absStart ==
 191                                                         tempBlock.absStart)
 192                                                 break;
 193                                 }
 194                                 if (i == numSegmentBlocks) {
 195                                         if (numSegmentBlocks == max_entries)
 196                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
 197                                         mb_array[numSegmentBlocks] = tempBlock;
 198                                         ++numSegmentBlocks;
 199                                 } else
 200                                         printk(" (duplicate)");
 201                         }
 202                         printk("\n");
 203                 }
 204                 existsBits <<= 1;
 205         }
 206         /* Now sort the blocks found into ascending sequence */
 207         if (numSegmentBlocks > 1) {
 208                 unsigned long m, n;
 209
 210                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
 211                         for (n = numSegmentBlocks - 1; m < n; --n) {
 212                                 if (mb_array[n].absStart <
 213                                                 mb_array[n-1].absStart) {
 214                                         struct MemoryBlock tempBlock;
 215
 216                                         tempBlock = mb_array[n];
 217                                         mb_array[n] = mb_array[n-1];
 218                                         mb_array[n-1] = tempBlock;
 219                                 }
 220                         }
 221                 }
 222         }
 223         /*
 224          * Assign "logical" addresses to each block.  These
 225          * addresses correspond to the hypervisor "bitmap" space.
 226          * Convert all addresses into units of 256K chunks.
 227          */
 228         {
 229         unsigned long i, nextBitmapAddress;
 230
 231         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
 232         nextBitmapAddress = 0;
 233         for (i = 0; i < numSegmentBlocks; ++i) {
 234                 unsigned long length = mb_array[i].absEnd -
 235                         mb_array[i].absStart;
 236
 237                 mb_array[i].logicalStart = nextBitmapAddress;
 238                 mb_array[i].logicalEnd = nextBitmapAddress + length;
 239                 nextBitmapAddress += length;
 240                 printk("          Bitmap range: %016lx - %016lx\n"
 241                                 "        Absolute range: %016lx - %016lx\n",
 242                                 mb_array[i].logicalStart,
 243                                 mb_array[i].logicalEnd,
 244                                 mb_array[i].absStart, mb_array[i].absEnd);
 245                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
 246                                 0x000fffffffffffff);
 247                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
 248                                 0x000fffffffffffff);
 249                 mb_array[i].logicalStart =
 250                         addr_to_chunk(mb_array[i].logicalStart);
 251                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
 252         }
 253         }
 254
 255         return numSegmentBlocks;
 256 }
 257
 258 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
 259                 unsigned long max_entries)
 260 {
 261         unsigned long i;
 262         unsigned long mem_blocks = 0;
 263
 264         if (cpu_has_feature(CPU_FTR_SLB))
 265                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
 266                                 max_entries);
 267         else
 268                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
 269                                 max_entries);
 270
 271         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
 272         for (i = 0; i < mem_blocks; ++i) {
 273                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
 274                        "                             abs chunks %016lx - %016lx\n",
 275                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
 276                         mb_array[i].absStart, mb_array[i].absEnd);
 277         }
 278         return mem_blocks;
 279 }
 280
 281 static void __init iSeries_get_cmdline(void)
 282 {
 283         char *p, *q;
 284
 285         /* copy the command line parameter from the primary VSP  */
 286         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
 287                         HvLpDma_Direction_RemoteToLocal);
 288
 289         p = cmd_line;
 290         q = cmd_line + 255;
 291         while(p < q) {
 292                 if (!*p || *p == '\n')
 293                         break;
 294                 ++p;
 295         }
 296         *p = 0;
 297 }
 298
 299 static void __init iSeries_init_early(void)
 300 {
 301         DBG(" -> iSeries_init_early()\n");
 302
 303         ppc64_interrupt_controller = IC_ISERIES;
 304
 305 #if defined(CONFIG_BLK_DEV_INITRD)
 306         /*
 307          * If the init RAM disk has been configured and there is
 308          * a non-zero starting address for it, set it up
 309          */
 310         if (naca.xRamDisk) {
 311                 initrd_start = (unsigned long)__va(naca.xRamDisk);
 312                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
 313                 initrd_below_start_ok = 1;      // ramdisk in kernel space
 314                 ROOT_DEV = Root_RAM0;
 315                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
 316                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
 317         } else
 318 #endif /* CONFIG_BLK_DEV_INITRD */
 319         {
 320             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
 321         }
 322
 323         iSeries_recal_tb = get_tb();
 324         iSeries_recal_titan = HvCallXm_loadTod();
 325
 326         /*
 327          * Initialize the hash table management pointers
 328          */
 329         hpte_init_iSeries();
 330
 331         /*
 332          * Initialize the DMA/TCE management
 333          */
 334         iommu_init_early_iSeries();
 335
 336         /* Initialize machine-dependency vectors */
 337 #ifdef CONFIG_SMP
 338         smp_init_iSeries();
 339 #endif
 340
 341         /* Associate Lp Event Queue 0 with processor 0 */
 342         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
 343
 344         mf_init();
 345
 346         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 347          * look sensible. If not, clear initrd reference.
 348          */
 349 #ifdef CONFIG_BLK_DEV_INITRD
 350         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
 351             initrd_end > initrd_start)
 352                 ROOT_DEV = Root_RAM0;
 353         else
 354                 initrd_start = initrd_end = 0;
 355 #endif /* CONFIG_BLK_DEV_INITRD */
 356
 357         DBG(" <- iSeries_init_early()\n");
 358 }
 359
 360 struct mschunks_map mschunks_map = {
 361         /* XXX We don't use these, but Piranha might need them. */
 362         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
 363         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
 364         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
 365 };
 366 EXPORT_SYMBOL(mschunks_map);
 367
 368 void mschunks_alloc(unsigned long num_chunks)
 369 {
 370         klimit = _ALIGN(klimit, sizeof(u32));
 371         mschunks_map.mapping = (u32 *)klimit;
 372         klimit += num_chunks * sizeof(u32);
 373         mschunks_map.num_chunks = num_chunks;
 374 }
 375
 376 /*
 377  * The iSeries may have very large memories ( > 128 GB ) and a partition
 378  * may get memory in "chunks" that may be anywhere in the 2**52 real
 379  * address space.  The chunks are 256K in size.  To map this to the
 380  * memory model Linux expects, the AS/400 specific code builds a
 381  * translation table to translate what Linux thinks are "physical"
 382  * addresses to the actual real addresses.  This allows us to make
 383  * it appear to Linux that we have contiguous memory starting at
 384  * physical address zero while in fact this could be far from the truth.
 385  * To avoid confusion, I'll let the words physical and/or real address
 386  * apply to the Linux addresses while I'll use "absolute address" to
 387  * refer to the actual hardware real address.
 388  *
 389  * build_iSeries_Memory_Map gets information from the Hypervisor and
 390  * looks at the Main Store VPD to determine the absolute addresses
 391  * of the memory that has been assigned to our partition and builds
 392  * a table used to translate Linux's physical addresses to these
 393  * absolute addresses.  Absolute addresses are needed when
 394  * communicating with the hypervisor (e.g. to build HPT entries)
 395  *
 396  * Returns the physical memory size
 397  */
 398
 399 static unsigned long __init build_iSeries_Memory_Map(void)
 400 {
 401         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
 402         u32 nextPhysChunk;
 403         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
 404         u32 totalChunks,moreChunks;
 405         u32 currChunk, thisChunk, absChunk;
 406         u32 currDword;
 407         u32 chunkBit;
 408         u64 map;
 409         struct MemoryBlock mb[32];
 410         unsigned long numMemoryBlocks, curBlock;
 411
 412         /* Chunk size on iSeries is 256K bytes */
 413         totalChunks = (u32)HvLpConfig_getMsChunks();
 414         mschunks_alloc(totalChunks);
 415
 416         /*
 417          * Get absolute address of our load area
 418          * and map it to physical address 0
 419          * This guarantees that the loadarea ends up at physical 0
 420          * otherwise, it might not be returned by PLIC as the first
 421          * chunks
 422          */
 423
 424         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
 425         loadAreaSize =  itLpNaca.xLoadAreaChunks;
 426
 427         /*
 428          * Only add the pages already mapped here.
 429          * Otherwise we might add the hpt pages
 430          * The rest of the pages of the load area
 431          * aren't in the HPT yet and can still
 432          * be assigned an arbitrary physical address
 433          */
 434         if ((loadAreaSize * 64) > HvPagesToMap)
 435                 loadAreaSize = HvPagesToMap / 64;
 436
 437         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
 438
 439         /*
 440          * TODO Do we need to do something if the HPT is in the 64MB load area?
 441          * This would be required if the itLpNaca.xLoadAreaChunks includes
 442          * the HPT size
 443          */
 444
 445         printk("Mapping load area - physical addr = 0000000000000000\n"
 446                 "                    absolute addr = %016lx\n",
 447                 chunk_to_addr(loadAreaFirstChunk));
 448         printk("Load area size %dK\n", loadAreaSize * 256);
 449
 450         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
 451                 mschunks_map.mapping[nextPhysChunk] =
 452                         loadAreaFirstChunk + nextPhysChunk;
 453
 454         /*
 455          * Get absolute address of our HPT and remember it so
 456          * we won't map it to any physical address
 457          */
 458         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
 459         hptSizePages = (u32)HvCallHpt_getHptPages();
 460         hptSizeChunks = hptSizePages >>
 461                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
 462         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
 463
 464         printk("HPT absolute addr = %016lx, size = %dK\n",
 465                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 466
 467         /*
 468          * Determine if absolute memory has any
 469          * holes so that we can interpret the
 470          * access map we get back from the hypervisor
 471          * correctly.
 472          */
 473         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
 474
 475         /*
 476          * Process the main store access map from the hypervisor
 477          * to build up our physical -> absolute translation table
 478          */
 479         curBlock = 0;
 480         currChunk = 0;
 481         currDword = 0;
 482         moreChunks = totalChunks;
 483
 484         while (moreChunks) {
 485                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
 486                                 currDword);
 487                 thisChunk = currChunk;
 488                 while (map) {
 489                         chunkBit = map >> 63;
 490                         map <<= 1;
 491                         if (chunkBit) {
 492                                 --moreChunks;
 493                                 while (thisChunk >= mb[curBlock].logicalEnd) {
 494                                         ++curBlock;
 495                                         if (curBlock >= numMemoryBlocks)
 496                                                 panic("out of memory blocks");
 497                                 }
 498                                 if (thisChunk < mb[curBlock].logicalStart)
 499                                         panic("memory block error");
 500
 501                                 absChunk = mb[curBlock].absStart +
 502                                         (thisChunk - mb[curBlock].logicalStart);
 503                                 if (((absChunk < hptFirstChunk) ||
 504                                      (absChunk > hptLastChunk)) &&
 505                                     ((absChunk < loadAreaFirstChunk) ||
 506                                      (absChunk > loadAreaLastChunk))) {
 507                                         mschunks_map.mapping[nextPhysChunk] =
 508                                                 absChunk;
 509                                         ++nextPhysChunk;
 510                                 }
 511                         }
 512                         ++thisChunk;
 513                 }
 514                 ++currDword;
 515                 currChunk += 64;
 516         }
 517
 518         /*
 519          * main store size (in chunks) is
 520          *   totalChunks - hptSizeChunks
 521          * which should be equal to
 522          *   nextPhysChunk
 523          */
 524         return chunk_to_addr(nextPhysChunk);
 525 }
 526
 527 /*
 528  * Document me.
 529  */
 530 static void __init iSeries_setup_arch(void)
 531 {
 532         if (get_lppaca()->shared_proc) {
 533                 ppc_md.idle_loop = iseries_shared_idle;
 534                 printk(KERN_DEBUG "Using shared processor idle loop\n");
 535         } else {
 536                 ppc_md.idle_loop = iseries_dedicated_idle;
 537                 printk(KERN_DEBUG "Using dedicated idle loop\n");
 538         }
 539
 540         /* Setup the Lp Event Queue */
 541         setup_hvlpevent_queue();
 542
 543         printk("Max  logical processors = %d\n",
 544                         itVpdAreas.xSlicMaxLogicalProcs);
 545         printk("Max physical processors = %d\n",
 546                         itVpdAreas.xSlicMaxPhysicalProcs);
 547 }
 548
 549 static void iSeries_show_cpuinfo(struct seq_file *m)
 550 {
 551         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 552 }
 553
 554 static void __init iSeries_progress(char * st, unsigned short code)
 555 {
 556         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
 557         mf_display_progress(code);
 558 }
 559
 560 static void __init iSeries_fixup_klimit(void)
 561 {
 562         /*
 563          * Change klimit to take into account any ram disk
 564          * that may be included
 565          */
 566         if (naca.xRamDisk)
 567                 klimit = KERNELBASE + (u64)naca.xRamDisk +
 568                         (naca.xRamDiskSize * HW_PAGE_SIZE);
 569         else {
 570                 /*
 571                  * No ram disk was included - check and see if there
 572                  * was an embedded system map.  Change klimit to take
 573                  * into account any embedded system map
 574                  */
 575                 if (embedded_sysmap_end)
 576                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
 577                                         0xfffffffffffff000);
 578         }
 579 }
 580
 581 static int __init iSeries_src_init(void)
 582 {
 583         /* clear the progress line */
 584         ppc_md.progress(" ", 0xffff);
 585         return 0;
 586 }
 587
 588 late_initcall(iSeries_src_init);
 589
 590 static inline void process_iSeries_events(void)
 591 {
 592         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
 593 }
 594
 595 static void yield_shared_processor(void)
 596 {
 597         unsigned long tb;
 598
 599         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
 600                                     HvCall_MaskLpEvent |
 601                                     HvCall_MaskLpProd |
 602                                     HvCall_MaskTimeout);
 603
 604         tb = get_tb();
 605         /* Compute future tb value when yield should expire */
 606         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
 607
 608         /*
 609          * The decrementer stops during the yield.  Force a fake decrementer
 610          * here and let the timer_interrupt code sort out the actual time.
 611          */
 612         get_lppaca()->int_dword.fields.decr_int = 1;
 613         ppc64_runlatch_on();
 614         process_iSeries_events();
 615 }
 616
 617 static void iseries_shared_idle(void)
 618 {
 619         while (1) {
 620                 while (!need_resched() && !hvlpevent_is_pending()) {
 621                         local_irq_disable();
 622                         ppc64_runlatch_off();
 623
 624                         /* Recheck with irqs off */
 625                         if (!need_resched() && !hvlpevent_is_pending())
 626                                 yield_shared_processor();
 627
 628                         HMT_medium();
 629                         local_irq_enable();
 630                 }
 631
 632                 ppc64_runlatch_on();
 633
 634                 if (hvlpevent_is_pending())
 635                         process_iSeries_events();
 636
 637                 preempt_enable_no_resched();
 638                 schedule();
 639                 preempt_disable();
 640         }
 641 }
 642
 643 static void iseries_dedicated_idle(void)
 644 {
 645         set_thread_flag(TIF_POLLING_NRFLAG);
 646
 647         while (1) {
 648                 if (!need_resched()) {
 649                         while (!need_resched()) {
 650                                 ppc64_runlatch_off();
 651                                 HMT_low();
 652
 653                                 if (hvlpevent_is_pending()) {
 654                                         HMT_medium();
 655                                         ppc64_runlatch_on();
 656                                         process_iSeries_events();
 657                                 }
 658                         }
 659
 660                         HMT_medium();
 661                 }
 662
 663                 ppc64_runlatch_on();
 664                 preempt_enable_no_resched();
 665                 schedule();
 666                 preempt_disable();
 667         }
 668 }
 669
 670 #ifndef CONFIG_PCI
 671 void __init iSeries_init_IRQ(void) { }
 672 #endif
 673
 674 static int __init iseries_probe(void)
 675 {
 676         unsigned long root = of_get_flat_dt_root();
 677         if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
 678                 return 0;
 679
 680         powerpc_firmware_features |= FW_FEATURE_ISERIES;
 681         powerpc_firmware_features |= FW_FEATURE_LPAR;
 682
 683         /*
 684          * The Hypervisor only allows us up to 256 interrupt
 685          * sources (the irq number is passed in a u8).
 686          */
 687         virt_irq_max = 255;
 688
 689         return 1;
 690 }
 691
 692 define_machine(iseries) {
 693         .name           = "iSeries",
 694         .setup_arch     = iSeries_setup_arch,
 695         .show_cpuinfo   = iSeries_show_cpuinfo,
 696         .init_IRQ       = iSeries_init_IRQ,
 697         .get_irq        = iSeries_get_irq,
 698         .init_early     = iSeries_init_early,
 699         .pcibios_fixup  = iSeries_pci_final_fixup,
 700         .restart        = mf_reboot,
 701         .power_off      = mf_power_off,
 702         .halt           = mf_power_off,
 703         .get_boot_time  = iSeries_get_boot_time,
 704         .set_rtc_time   = iSeries_set_rtc_time,
 705         .get_rtc_time   = iSeries_get_rtc_time,
 706         .calibrate_decr = generic_calibrate_decr,
 707         .progress       = iSeries_progress,
 708         .probe          = iseries_probe,
 709         /* XXX Implement enable_pmcs for iSeries */
 710 };
 711
 712 struct blob {
 713         unsigned char data[PAGE_SIZE];
 714         unsigned long next;
 715 };
 716
 717 struct iseries_flat_dt {
 718         struct boot_param_header header;
 719         u64 reserve_map[2];
 720         struct blob dt;
 721         struct blob strings;
 722 };
 723
 724 struct iseries_flat_dt iseries_dt;
 725
 726 void dt_init(struct iseries_flat_dt *dt)
 727 {
 728         dt->header.off_mem_rsvmap =
 729                 offsetof(struct iseries_flat_dt, reserve_map);
 730         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
 731         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
 732         dt->header.totalsize = sizeof(struct iseries_flat_dt);
 733         dt->header.dt_strings_size = sizeof(struct blob);
 734
 735         /* There is no notion of hardware cpu id on iSeries */
 736         dt->header.boot_cpuid_phys = smp_processor_id();
 737
 738         dt->dt.next = (unsigned long)&dt->dt.data;
 739         dt->strings.next = (unsigned long)&dt->strings.data;
 740
 741         dt->header.magic = OF_DT_HEADER;
 742         dt->header.version = 0x10;
 743         dt->header.last_comp_version = 0x10;
 744
 745         dt->reserve_map[0] = 0;
 746         dt->reserve_map[1] = 0;
 747 }
 748
 749 void dt_check_blob(struct blob *b)
 750 {
 751         if (b->next >= (unsigned long)&b->next) {
 752                 DBG("Ran out of space in flat device tree blob!\n");
 753                 BUG();
 754         }
 755 }
 756
 757 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
 758 {
 759         *((u32*)dt->dt.next) = value;
 760         dt->dt.next += sizeof(u32);
 761
 762         dt_check_blob(&dt->dt);
 763 }
 764
 765 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
 766 {
 767         *((u64*)dt->dt.next) = value;
 768         dt->dt.next += sizeof(u64);
 769
 770         dt_check_blob(&dt->dt);
 771 }
 772
 773 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
 774 {
 775         unsigned long start = blob->next - (unsigned long)blob->data;
 776
 777         memcpy((char *)blob->next, data, len);
 778         blob->next = _ALIGN(blob->next + len, 4);
 779
 780         dt_check_blob(blob);
 781
 782         return start;
 783 }
 784
 785 void dt_start_node(struct iseries_flat_dt *dt, char *name)
 786 {
 787         dt_push_u32(dt, OF_DT_BEGIN_NODE);
 788         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
 789 }
 790
 791 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
 792
 793 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
 794 {
 795         unsigned long offset;
 796
 797         dt_push_u32(dt, OF_DT_PROP);
 798
 799         /* Length of the data */
 800         dt_push_u32(dt, len);
 801
 802         /* Put the property name in the string blob. */
 803         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
 804
 805         /* The offset of the properties name in the string blob. */
 806         dt_push_u32(dt, (u32)offset);
 807
 808         /* The actual data. */
 809         dt_push_bytes(&dt->dt, data, len);
 810 }
 811
 812 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
 813 {
 814         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
 815 }
 816
 817 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
 818 {
 819         dt_prop(dt, name, (char *)&data, sizeof(u32));
 820 }
 821
 822 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
 823 {
 824         dt_prop(dt, name, (char *)&data, sizeof(u64));
 825 }
 826
 827 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
 828 {
 829         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
 830 }
 831
 832 void dt_prop_u32_list(struct iseries_flat_dt *dt, char *name, u32 *data, int n)
 833 {
 834         dt_prop(dt, name, (char *)data, sizeof(u32) * n);
 835 }
 836
 837 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
 838 {
 839         dt_prop(dt, name, NULL, 0);
 840 }
 841
 842 void dt_cpus(struct iseries_flat_dt *dt)
 843 {
 844         unsigned char buf[32];
 845         unsigned char *p;
 846         unsigned int i, index;
 847         struct IoHriProcessorVpd *d;
 848         u32 pft_size[2];
 849
 850         /* yuck */
 851         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
 852         p = strchr(buf, ' ');
 853         if (!p) p = buf + strlen(buf);
 854
 855         dt_start_node(dt, "cpus");
 856         dt_prop_u32(dt, "#address-cells", 1);
 857         dt_prop_u32(dt, "#size-cells", 0);
 858
 859         pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA  */
 860         pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
 861
 862         for (i = 0; i < NR_CPUS; i++) {
 863                 if (lppaca[i].dyn_proc_status >= 2)
 864                         continue;
 865
 866                 snprintf(p, 32 - (p - buf), "@%d", i);
 867                 dt_start_node(dt, buf);
 868
 869                 dt_prop_str(dt, "device_type", "cpu");
 870
 871                 index = lppaca[i].dyn_hv_phys_proc_index;
 872                 d = &xIoHriProcessorVpd[index];
 873
 874                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
 875                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
 876
 877                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
 878                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
 879
 880                 /* magic conversions to Hz copied from old code */
 881                 dt_prop_u32(dt, "clock-frequency",
 882                         ((1UL << 34) * 1000000) / d->xProcFreq);
 883                 dt_prop_u32(dt, "timebase-frequency",
 884                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
 885
 886                 dt_prop_u32(dt, "reg", i);
 887
 888                 dt_prop_u32_list(dt, "ibm,pft-size", pft_size, 2);
 889
 890                 dt_end_node(dt);
 891         }
 892
 893         dt_end_node(dt);
 894 }
 895
 896 void dt_model(struct iseries_flat_dt *dt)
 897 {
 898         char buf[16] = "IBM,";
 899
 900         /* "IBM," + mfgId[2:3] + systemSerial[1:5] */
 901         strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2);
 902         strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5);
 903         buf[11] = '\0';
 904         dt_prop_str(dt, "system-id", buf);
 905
 906         /* "IBM," + machineType[0:4] */
 907         strne2a(buf + 4, xItExtVpdPanel.machineType, 4);
 908         buf[8] = '\0';
 909         dt_prop_str(dt, "model", buf);
 910
 911         dt_prop_str(dt, "compatible", "IBM,iSeries");
 912 }
 913
 914 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
 915 {
 916         u64 tmp[2];
 917
 918         dt_init(dt);
 919
 920         dt_start_node(dt, "");
 921
 922         dt_prop_u32(dt, "#address-cells", 2);
 923         dt_prop_u32(dt, "#size-cells", 2);
 924         dt_model(dt);
 925
 926         /* /memory */
 927         dt_start_node(dt, "memory@0");
 928         dt_prop_str(dt, "name", "memory");
 929         dt_prop_str(dt, "device_type", "memory");
 930         tmp[0] = 0;
 931         tmp[1] = phys_mem_size;
 932         dt_prop_u64_list(dt, "reg", tmp, 2);
 933         dt_end_node(dt);
 934
 935         /* /chosen */
 936         dt_start_node(dt, "chosen");
 937         dt_prop_str(dt, "bootargs", cmd_line);
 938         if (cmd_mem_limit)
 939                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
 940         dt_end_node(dt);
 941
 942         dt_cpus(dt);
 943
 944         dt_end_node(dt);
 945
 946         dt_push_u32(dt, OF_DT_END);
 947 }
 948
 949 void * __init iSeries_early_setup(void)
 950 {
 951         unsigned long phys_mem_size;
 952
 953         iSeries_fixup_klimit();
 954
 955         /*
 956          * Initialize the table which translate Linux physical addresses to
 957          * AS/400 absolute addresses
 958          */
 959         phys_mem_size = build_iSeries_Memory_Map();
 960
 961         iSeries_get_cmdline();
 962
 963         /* Save unparsed command line copy for /proc/cmdline */
 964         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 965
 966         /* Parse early parameters, in particular mem=x */
 967         parse_early_param();
 968
 969         build_flat_dt(&iseries_dt, phys_mem_size);
 970
 971         return (void *) __pa(&iseries_dt);
 972 }
 973
 974 /*
 975  * On iSeries we just parse the mem=X option from the command line.
 976  * On pSeries it's a bit more complicated, see prom_init_mem()
 977  */
 978 static int __init early_parsemem(char *p)
 979 {
 980         if (p)
 981                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
 982         return 0;
 983 }
 984 early_param("mem", early_parsemem);
 985
 986 static void hvputc(char c)
 987 {
 988         if (c == '\n')
 989                 hvputc('\r');
 990
 991         HvCall_writeLogBuffer(&c, 1);
 992 }
 993
 994 void __init udbg_init_iseries(void)
 995 {
 996         udbg_putc = hvputc;
 997 }