2 * Copyright 2007, Olof Johansson, PA Semi
4 * Based on arch/powerpc/sysdev/mpic_u3msi.c:
6 * Copyright 2006, Segher Boessenkool, IBM Corporation.
7 * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2 of the
18 #include <linux/irq.h>
19 #include <linux/bootmem.h>
20 #include <linux/msi.h>
23 #include <asm/hw_irq.h>
24 #include <asm/ppc-pci.h>
28 /* Allocate 16 interrupts per device, to give an alignment of 16,
29 * since that's the size of the grouping w.r.t. affinity. If someone
30 * needs more than 32 MSI's down the road we'll have to rethink this,
31 * but it should be OK for now.
33 #define ALLOC_CHUNK 16
35 #define PASEMI_MSI_ADDR 0xfc080000
37 /* A bit ugly, can we get this from the pci_dev somehow? */
38 static struct mpic *msi_mpic;
41 static void mpic_pasemi_msi_mask_irq(unsigned int irq)
43 pr_debug("mpic_pasemi_msi_mask_irq %d\n", irq);
48 static void mpic_pasemi_msi_unmask_irq(unsigned int irq)
50 pr_debug("mpic_pasemi_msi_unmask_irq %d\n", irq);
55 static struct irq_chip mpic_pasemi_msi_chip = {
56 .shutdown = mpic_pasemi_msi_mask_irq,
57 .mask = mpic_pasemi_msi_mask_irq,
58 .unmask = mpic_pasemi_msi_unmask_irq,
60 .set_type = mpic_set_irq_type,
61 .set_affinity = mpic_set_affinity,
62 .typename = "PASEMI-MSI ",
65 static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
67 if (type == PCI_CAP_ID_MSIX)
68 pr_debug("pasemi_msi: MSI-X untested, trying anyway\n");
73 static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
75 struct msi_desc *entry;
77 pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev);
79 list_for_each_entry(entry, &pdev->msi_list, list) {
80 if (entry->irq == NO_IRQ)
83 set_irq_msi(entry->irq, NULL);
84 mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq),
86 irq_dispose_mapping(entry->irq);
92 static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
94 irq_hw_number_t hwirq;
96 struct msi_desc *entry;
99 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
103 msg.address_lo = PASEMI_MSI_ADDR;
105 list_for_each_entry(entry, &pdev->msi_list, list) {
106 /* Allocate 16 interrupts for now, since that's the grouping for
107 * affinity. This can be changed later if it turns out 32 is too
108 * few MSIs for someone, but restrictions will apply to how the
109 * sources can be changed independently.
111 hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK);
113 pr_debug("pasemi_msi: failed allocating hwirq\n");
117 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
118 if (virq == NO_IRQ) {
119 pr_debug("pasemi_msi: failed mapping hwirq 0x%lx\n", hwirq);
120 mpic_msi_free_hwirqs(msi_mpic, hwirq, ALLOC_CHUNK);
124 /* Vector on MSI is really an offset, the hardware adds
125 * it to the value written at the magic address. So set
126 * it to 0 to remain sane.
128 mpic_set_vector(virq, 0);
130 set_irq_msi(virq, entry);
131 set_irq_chip(virq, &mpic_pasemi_msi_chip);
132 set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
134 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%lx) addr 0x%x\n",
135 virq, hwirq, msg.address_lo);
137 /* Likewise, the device writes [0...511] into the target
138 * register to generate MSI [512...1023]
140 msg.data = hwirq-0x200;
141 write_msi_msg(virq, &msg);
147 int mpic_pasemi_msi_init(struct mpic *mpic)
151 if (!mpic->irqhost->of_node ||
152 !of_device_is_compatible(mpic->irqhost->of_node,
153 "pasemi,pwrficient-openpic"))
156 rc = mpic_msi_init_allocator(mpic);
158 pr_debug("pasemi_msi: Error allocating bitmap!\n");
162 pr_debug("pasemi_msi: Registering PA Semi MPIC MSI callbacks\n");
165 WARN_ON(ppc_md.setup_msi_irqs);
166 ppc_md.setup_msi_irqs = pasemi_msi_setup_msi_irqs;
167 ppc_md.teardown_msi_irqs = pasemi_msi_teardown_msi_irqs;
168 ppc_md.msi_check_device = pasemi_msi_check_device;