Merge branch 'for-linus' of ssh://master.kernel.org/pub/scm/linux/kernel/git/ieee1394...
[linux-2.6] / include / asm-ia64 / sn / l1.h
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992-1997,2000-2004 Silicon Graphics, Inc.  All Rights Reserved.
7  */
8
9 #ifndef _ASM_IA64_SN_L1_H
10 #define _ASM_IA64_SN_L1_H
11
12 /* brick type response codes */
13 #define L1_BRICKTYPE_PX         0x23            /* # */
14 #define L1_BRICKTYPE_PE         0x25            /* % */
15 #define L1_BRICKTYPE_N_p0       0x26            /* & */
16 #define L1_BRICKTYPE_IP45       0x34            /* 4 */
17 #define L1_BRICKTYPE_IP41       0x35            /* 5 */
18 #define L1_BRICKTYPE_TWISTER    0x36            /* 6 */ /* IP53 & ROUTER */
19 #define L1_BRICKTYPE_IX         0x3d            /* = */
20 #define L1_BRICKTYPE_IP34       0x61            /* a */
21 #define L1_BRICKTYPE_GA         0x62            /* b */
22 #define L1_BRICKTYPE_C          0x63            /* c */
23 #define L1_BRICKTYPE_OPUS_TIO   0x66            /* f */
24 #define L1_BRICKTYPE_I          0x69            /* i */
25 #define L1_BRICKTYPE_N          0x6e            /* n */
26 #define L1_BRICKTYPE_OPUS       0x6f            /* o */
27 #define L1_BRICKTYPE_P          0x70            /* p */
28 #define L1_BRICKTYPE_R          0x72            /* r */
29 #define L1_BRICKTYPE_CHI_CG     0x76            /* v */
30 #define L1_BRICKTYPE_X          0x78            /* x */
31 #define L1_BRICKTYPE_X2         0x79            /* y */
32 #define L1_BRICKTYPE_SA         0x5e            /* ^ */
33 #define L1_BRICKTYPE_PA         0x6a            /* j */
34 #define L1_BRICKTYPE_IA         0x6b            /* k */
35 #define L1_BRICKTYPE_ATHENA     0x2b            /* + */
36 #define L1_BRICKTYPE_DAYTONA    0x7a            /* z */
37 #define L1_BRICKTYPE_1932       0x2c            /* . */
38 #define L1_BRICKTYPE_191010     0x2e            /* , */
39
40 /* board type response codes */
41 #define L1_BOARDTYPE_IP69       0x0100          /* CA */
42 #define L1_BOARDTYPE_IP63       0x0200          /* CB */
43 #define L1_BOARDTYPE_BASEIO     0x0300          /* IB */
44 #define L1_BOARDTYPE_PCIE2SLOT  0x0400          /* IC */
45 #define L1_BOARDTYPE_PCIX3SLOT  0x0500          /* ID */
46 #define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600       /* IE */
47 #define L1_BOARDTYPE_ABACUS     0x0700          /* AB */
48 #define L1_BOARDTYPE_DAYTONA    0x0800          /* AD */
49 #define L1_BOARDTYPE_INVAL      (-1)            /* invalid brick type */
50
51 #endif /* _ASM_IA64_SN_L1_H */