Merge branches 'omap1-upstream' and 'omap2-upstream' into devel
[linux-2.6] / drivers / media / dvb / frontends / mt2266.c
1 /*
2  *  Driver for Microtune MT2266 "Direct conversion low power broadband tuner"
3  *
4  *  Copyright (c) 2007 Olivier DANET <odanet@caramail.com>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  */
16
17 #include <linux/module.h>
18 #include <linux/delay.h>
19 #include <linux/dvb/frontend.h>
20 #include <linux/i2c.h>
21
22 #include "dvb_frontend.h"
23 #include "mt2266.h"
24
25 #define I2C_ADDRESS 0x60
26
27 #define REG_PART_REV   0
28 #define REG_TUNE       1
29 #define REG_BAND       6
30 #define REG_BANDWIDTH  8
31 #define REG_LOCK       0x12
32
33 #define PART_REV 0x85
34
35 struct mt2266_priv {
36         struct mt2266_config *cfg;
37         struct i2c_adapter   *i2c;
38
39         u32 frequency;
40         u32 bandwidth;
41 };
42
43 /* Here, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
44
45 static int debug;
46 module_param(debug, int, 0644);
47 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
48
49 #define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2266: " args); printk("\n"); }} while (0)
50
51 // Reads a single register
52 static int mt2266_readreg(struct mt2266_priv *priv, u8 reg, u8 *val)
53 {
54         struct i2c_msg msg[2] = {
55                 { .addr = priv->cfg->i2c_address, .flags = 0,        .buf = &reg, .len = 1 },
56                 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val,  .len = 1 },
57         };
58         if (i2c_transfer(priv->i2c, msg, 2) != 2) {
59                 printk(KERN_WARNING "MT2266 I2C read failed\n");
60                 return -EREMOTEIO;
61         }
62         return 0;
63 }
64
65 // Writes a single register
66 static int mt2266_writereg(struct mt2266_priv *priv, u8 reg, u8 val)
67 {
68         u8 buf[2] = { reg, val };
69         struct i2c_msg msg = {
70                 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2
71         };
72         if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
73                 printk(KERN_WARNING "MT2266 I2C write failed\n");
74                 return -EREMOTEIO;
75         }
76         return 0;
77 }
78
79 // Writes a set of consecutive registers
80 static int mt2266_writeregs(struct mt2266_priv *priv,u8 *buf, u8 len)
81 {
82         struct i2c_msg msg = {
83                 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = len
84         };
85         if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
86                 printk(KERN_WARNING "MT2266 I2C write failed (len=%i)\n",(int)len);
87                 return -EREMOTEIO;
88         }
89         return 0;
90 }
91
92 // Initialisation sequences
93 static u8 mt2266_init1[] = {
94         REG_TUNE,
95         0x00, 0x00, 0x28, 0x00, 0x52, 0x99, 0x3f };
96
97 static u8 mt2266_init2[] = {
98         0x17,                                     0x6d, 0x71, 0x61, 0xc0, 0xbf, 0xff, 0xdc, 0x00, 0x0a,
99         0xd4, 0x03, 0x64, 0x64, 0x64, 0x64, 0x22, 0xaa, 0xf2, 0x1e, 0x80, 0x14, 0x01, 0x01, 0x01, 0x01,
100         0x01, 0x01, 0x7f, 0x5e, 0x3f, 0xff, 0xff, 0xff, 0x00, 0x77, 0x0f, 0x2d };
101
102 static u8 mt2266_init_8mhz[] = {
103         REG_BANDWIDTH,
104         0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22 };
105
106 static u8 mt2266_init_7mhz[] = {
107         REG_BANDWIDTH,
108         0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32 };
109
110 static u8 mt2266_init_6mhz[] = {
111         REG_BANDWIDTH,
112         0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7 };
113
114 #define FREF 30000       // Quartz oscillator 30 MHz
115
116 static int mt2266_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
117 {
118         struct mt2266_priv *priv;
119         int ret=0;
120         u32 freq;
121         u32 tune;
122         u8  lnaband;
123         u8  b[10];
124         int i;
125
126         priv = fe->tuner_priv;
127
128         mt2266_writereg(priv,0x17,0x6d);
129         mt2266_writereg(priv,0x1c,0xff);
130
131         freq = params->frequency / 1000; // Hz -> kHz
132         priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
133         priv->frequency = freq * 1000;
134         tune=2 * freq * (8192/16) / (FREF/16);
135
136         if (freq <= 495000) lnaband = 0xEE; else
137         if (freq <= 525000) lnaband = 0xDD; else
138         if (freq <= 550000) lnaband = 0xCC; else
139         if (freq <= 580000) lnaband = 0xBB; else
140         if (freq <= 605000) lnaband = 0xAA; else
141         if (freq <= 630000) lnaband = 0x99; else
142         if (freq <= 655000) lnaband = 0x88; else
143         if (freq <= 685000) lnaband = 0x77; else
144         if (freq <= 710000) lnaband = 0x66; else
145         if (freq <= 735000) lnaband = 0x55; else
146         if (freq <= 765000) lnaband = 0x44; else
147         if (freq <= 802000) lnaband = 0x33; else
148         if (freq <= 840000) lnaband = 0x22; else lnaband = 0x11;
149
150         msleep(100);
151         mt2266_writeregs(priv,(params->u.ofdm.bandwidth==BANDWIDTH_6_MHZ)?mt2266_init_6mhz:
152                                 (params->u.ofdm.bandwidth==BANDWIDTH_7_MHZ)?mt2266_init_7mhz:
153                                 mt2266_init_8mhz,sizeof(mt2266_init_8mhz));
154
155         b[0] = REG_TUNE;
156         b[1] = (tune >> 8) & 0x1F;
157         b[2] = tune & 0xFF;
158         b[3] = tune >> 13;
159         mt2266_writeregs(priv,b,4);
160
161         dprintk("set_parms: tune=%d band=%d",(int)tune,(int)lnaband);
162         dprintk("set_parms: [1..3]: %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3]);
163
164         b[0] = 0x05;
165         b[1] = 0x62;
166         b[2] = lnaband;
167         mt2266_writeregs(priv,b,3);
168
169         //Waits for pll lock or timeout
170         i = 0;
171         do {
172                 mt2266_readreg(priv,REG_LOCK,b);
173                 if ((b[0] & 0x40)==0x40)
174                         break;
175                 msleep(10);
176                 i++;
177         } while (i<10);
178         dprintk("Lock when i=%i",(int)i);
179         return ret;
180 }
181
182 static void mt2266_calibrate(struct mt2266_priv *priv)
183 {
184         mt2266_writereg(priv,0x11,0x03);
185         mt2266_writereg(priv,0x11,0x01);
186
187         mt2266_writeregs(priv,mt2266_init1,sizeof(mt2266_init1));
188         mt2266_writeregs(priv,mt2266_init2,sizeof(mt2266_init2));
189
190         mt2266_writereg(priv,0x33,0x5e);
191         mt2266_writereg(priv,0x10,0x10);
192         mt2266_writereg(priv,0x10,0x00);
193
194         mt2266_writeregs(priv,mt2266_init_8mhz,sizeof(mt2266_init_8mhz));
195
196         msleep(25);
197         mt2266_writereg(priv,0x17,0x6d);
198         mt2266_writereg(priv,0x1c,0x00);
199         msleep(75);
200         mt2266_writereg(priv,0x17,0x6d);
201         mt2266_writereg(priv,0x1c,0xff);
202 }
203
204 static int mt2266_get_frequency(struct dvb_frontend *fe, u32 *frequency)
205 {
206         struct mt2266_priv *priv = fe->tuner_priv;
207         *frequency = priv->frequency;
208         return 0;
209 }
210
211 static int mt2266_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
212 {
213         struct mt2266_priv *priv = fe->tuner_priv;
214         *bandwidth = priv->bandwidth;
215         return 0;
216 }
217
218 static int mt2266_init(struct dvb_frontend *fe)
219 {
220         struct mt2266_priv *priv = fe->tuner_priv;
221         mt2266_writereg(priv,0x17,0x6d);
222         mt2266_writereg(priv,0x1c,0xff);
223         return 0;
224 }
225
226 static int mt2266_sleep(struct dvb_frontend *fe)
227 {
228         struct mt2266_priv *priv = fe->tuner_priv;
229         mt2266_writereg(priv,0x17,0x6d);
230         mt2266_writereg(priv,0x1c,0x00);
231         return 0;
232 }
233
234 static int mt2266_release(struct dvb_frontend *fe)
235 {
236         kfree(fe->tuner_priv);
237         fe->tuner_priv = NULL;
238         return 0;
239 }
240
241 static const struct dvb_tuner_ops mt2266_tuner_ops = {
242         .info = {
243                 .name           = "Microtune MT2266",
244                 .frequency_min  = 470000000,
245                 .frequency_max  = 860000000,
246                 .frequency_step =     50000,
247         },
248         .release       = mt2266_release,
249         .init          = mt2266_init,
250         .sleep         = mt2266_sleep,
251         .set_params    = mt2266_set_params,
252         .get_frequency = mt2266_get_frequency,
253         .get_bandwidth = mt2266_get_bandwidth
254 };
255
256 struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg)
257 {
258         struct mt2266_priv *priv = NULL;
259         u8 id = 0;
260
261         priv = kzalloc(sizeof(struct mt2266_priv), GFP_KERNEL);
262         if (priv == NULL)
263                 return NULL;
264
265         priv->cfg      = cfg;
266         priv->i2c      = i2c;
267
268         if (mt2266_readreg(priv,0,&id) != 0) {
269                 kfree(priv);
270                 return NULL;
271         }
272         if (id != PART_REV) {
273                 kfree(priv);
274                 return NULL;
275         }
276         printk(KERN_INFO "MT2266: successfully identified\n");
277         memcpy(&fe->ops.tuner_ops, &mt2266_tuner_ops, sizeof(struct dvb_tuner_ops));
278
279         fe->tuner_priv = priv;
280         mt2266_calibrate(priv);
281         return fe;
282 }
283 EXPORT_SYMBOL(mt2266_attach);
284
285 MODULE_AUTHOR("Olivier DANET");
286 MODULE_DESCRIPTION("Microtune MT2266 silicon tuner driver");
287 MODULE_LICENSE("GPL");