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   1 #ifndef __HEAD_BOOKE_H__
   2 #define __HEAD_BOOKE_H__
   3
   4 /*
   5  * Macros used for common Book-e exception handling
   6  */
   7
   8 #define SET_IVOR(vector_number, vector_label)           \
   9                 li      r26,vector_label@l;             \
  10                 mtspr   SPRN_IVOR##vector_number,r26;   \
  11                 sync
  12
  13 #define NORMAL_EXCEPTION_PROLOG                                              \
  14         mtspr   SPRN_SPRG0,r10;         /* save two registers to work with */\
  15         mtspr   SPRN_SPRG1,r11;                                              \
  16         mtspr   SPRN_SPRG4W,r1;                                              \
  17         mfcr    r10;                    /* save CR in r10 for now          */\
  18         mfspr   r11,SPRN_SRR1;          /* check whether user or kernel    */\
  19         andi.   r11,r11,MSR_PR;                                              \
  20         beq     1f;                                                          \
  21         mfspr   r1,SPRN_SPRG3;          /* if from user, start at top of   */\
  22         lwz     r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack   */\
  23         addi    r1,r1,THREAD_SIZE;                                           \
  24 1:      subi    r1,r1,INT_FRAME_SIZE;   /* Allocate an exception frame     */\
  25         mr      r11,r1;                                                      \
  26         stw     r10,_CCR(r11);          /* save various registers          */\
  27         stw     r12,GPR12(r11);                                              \
  28         stw     r9,GPR9(r11);                                                \
  29         mfspr   r10,SPRN_SPRG0;                                              \
  30         stw     r10,GPR10(r11);                                              \
  31         mfspr   r12,SPRN_SPRG1;                                              \
  32         stw     r12,GPR11(r11);                                              \
  33         mflr    r10;                                                         \
  34         stw     r10,_LINK(r11);                                              \
  35         mfspr   r10,SPRN_SPRG4R;                                             \
  36         mfspr   r12,SPRN_SRR0;                                               \
  37         stw     r10,GPR1(r11);                                               \
  38         mfspr   r9,SPRN_SRR1;                                                \
  39         stw     r10,0(r11);                                                  \
  40         rlwinm  r9,r9,0,14,12;          /* clear MSR_WE (necessary?)       */\
  41         stw     r0,GPR0(r11);                                                \
  42         SAVE_4GPRS(3, r11);                                                  \
  43         SAVE_2GPRS(7, r11)
  44
  45 /* To handle the additional exception priority levels on 40x and Book-E
  46  * processors we allocate a 4k stack per additional priority level. The various
  47  * head_xxx.S files allocate space (exception_stack_top) for each priority's
  48  * stack times the number of CPUs
  49  *
  50  * On 40x critical is the only additional level
  51  * On 44x/e500 we have critical and machine check
  52  * On e200 we have critical and debug (machine check occurs via critical)
  53  *
  54  * Additionally we reserve a SPRG for each priority level so we can free up a
  55  * GPR to use as the base for indirect access to the exception stacks.  This
  56  * is necessary since the MMU is always on, for Book-E parts, and the stacks
  57  * are offset from KERNELBASE.
  58  *
  59  * There is some space optimization to be had here if desired.  However
  60  * to allow for a common kernel with support for debug exceptions either
  61  * going to critical or their own debug level we aren't currently
  62  * providing configurations that micro-optimize space usage.
  63  */
  64 #ifdef CONFIG_44x
  65 #define NUM_EXCEPTION_LVLS      2
  66 #else
  67 #define NUM_EXCEPTION_LVLS      3
  68 #endif
  69 #define BOOKE_EXCEPTION_STACK_SIZE      (4096 * NUM_EXCEPTION_LVLS)
  70
  71 /* CRIT_SPRG only used in critical exception handling */
  72 #define CRIT_SPRG       SPRN_SPRG2
  73 /* MCHECK_SPRG only used in machine check exception handling */
  74 #define MCHECK_SPRG     SPRN_SPRG6W
  75
  76 #define MCHECK_STACK_TOP        (exception_stack_top - 4096)
  77 #define CRIT_STACK_TOP          (exception_stack_top)
  78
  79 /* only on e200 for now */
  80 #define DEBUG_STACK_TOP         (exception_stack_top - 8192)
  81 #define DEBUG_SPRG              SPRN_SPRG6W
  82
  83 #ifdef CONFIG_SMP
  84 #define BOOKE_LOAD_EXC_LEVEL_STACK(level)               \
  85         mfspr   r8,SPRN_PIR;                            \
  86         mulli   r8,r8,BOOKE_EXCEPTION_STACK_SIZE;       \
  87         neg     r8,r8;                                  \
  88         addis   r8,r8,level##_STACK_TOP@ha;             \
  89         addi    r8,r8,level##_STACK_TOP@l
  90 #else
  91 #define BOOKE_LOAD_EXC_LEVEL_STACK(level)               \
  92         lis     r8,level##_STACK_TOP@h;                 \
  93         ori     r8,r8,level##_STACK_TOP@l
  94 #endif
  95
  96 /*
  97  * Exception prolog for critical/machine check exceptions.  This is a
  98  * little different from the normal exception prolog above since a
  99  * critical/machine check exception can potentially occur at any point
 100  * during normal exception processing. Thus we cannot use the same SPRG
 101  * registers as the normal prolog above. Instead we use a portion of the
 102  * critical/machine check exception stack at low physical addresses.
 103  */
 104 #define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \
 105         mtspr   exc_level##_SPRG,r8;                                         \
 106         BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \
 107         stw     r10,GPR10-INT_FRAME_SIZE(r8);                                \
 108         stw     r11,GPR11-INT_FRAME_SIZE(r8);                                \
 109         mfcr    r10;                    /* save CR in r10 for now          */\
 110         mfspr   r11,exc_level_srr1;     /* check whether user or kernel    */\
 111         andi.   r11,r11,MSR_PR;                                              \
 112         mr      r11,r8;                                                      \
 113         mfspr   r8,exc_level##_SPRG;                                         \
 114         beq     1f;                                                          \
 115         /* COMING FROM USER MODE */                                          \
 116         mfspr   r11,SPRN_SPRG3;         /* if from user, start at top of   */\
 117         lwz     r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
 118         addi    r11,r11,THREAD_SIZE;                                         \
 119 1:      subi    r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame     */\
 120         stw     r10,_CCR(r11);          /* save various registers          */\
 121         stw     r12,GPR12(r11);                                              \
 122         stw     r9,GPR9(r11);                                                \
 123         mflr    r10;                                                         \
 124         stw     r10,_LINK(r11);                                              \
 125         mfspr   r12,SPRN_DEAR;          /* save DEAR and ESR in the frame  */\
 126         stw     r12,_DEAR(r11);         /* since they may have had stuff   */\
 127         mfspr   r9,SPRN_ESR;            /* in them at the point where the  */\
 128         stw     r9,_ESR(r11);           /* exception was taken             */\
 129         mfspr   r12,exc_level_srr0;                                          \
 130         stw     r1,GPR1(r11);                                                \
 131         mfspr   r9,exc_level_srr1;                                           \
 132         stw     r1,0(r11);                                                   \
 133         mr      r1,r11;                                                      \
 134         rlwinm  r9,r9,0,14,12;          /* clear MSR_WE (necessary?)       */\
 135         stw     r0,GPR0(r11);                                                \
 136         SAVE_4GPRS(3, r11);                                                  \
 137         SAVE_2GPRS(7, r11)
 138
 139 #define CRITICAL_EXCEPTION_PROLOG \
 140                 EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1)
 141 #define DEBUG_EXCEPTION_PROLOG \
 142                 EXC_LEVEL_EXCEPTION_PROLOG(DEBUG, SPRN_DSRR0, SPRN_DSRR1)
 143 #define MCHECK_EXCEPTION_PROLOG \
 144                 EXC_LEVEL_EXCEPTION_PROLOG(MCHECK, SPRN_MCSRR0, SPRN_MCSRR1)
 145
 146 /*
 147  * Exception vectors.
 148  */
 149 #define START_EXCEPTION(label)                                               \
 150         .align 5;                                                            \
 151 label:
 152
 153 #define FINISH_EXCEPTION(func)                                  \
 154         bl      transfer_to_handler_full;                       \
 155         .long   func;                                           \
 156         .long   ret_from_except_full
 157
 158 #define EXCEPTION(n, label, hdlr, xfer)                         \
 159         START_EXCEPTION(label);                                 \
 160         NORMAL_EXCEPTION_PROLOG;                                \
 161         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 162         xfer(n, hdlr)
 163
 164 #define CRITICAL_EXCEPTION(n, label, hdlr)                      \
 165         START_EXCEPTION(label);                                 \
 166         CRITICAL_EXCEPTION_PROLOG;                              \
 167         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 168         EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 169                           NOCOPY, crit_transfer_to_handler, \
 170                           ret_from_crit_exc)
 171
 172 #define MCHECK_EXCEPTION(n, label, hdlr)                        \
 173         START_EXCEPTION(label);                                 \
 174         MCHECK_EXCEPTION_PROLOG;                                \
 175         mfspr   r5,SPRN_ESR;                                    \
 176         stw     r5,_ESR(r11);                                   \
 177         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 178         EXC_XFER_TEMPLATE(hdlr, n+4, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 179                           NOCOPY, mcheck_transfer_to_handler,   \
 180                           ret_from_mcheck_exc)
 181
 182 #define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret)   \
 183         li      r10,trap;                                       \
 184         stw     r10,_TRAP(r11);                                 \
 185         lis     r10,msr@h;                                      \
 186         ori     r10,r10,msr@l;                                  \
 187         copyee(r10, r9);                                        \
 188         bl      tfer;                                           \
 189         .long   hdlr;                                           \
 190         .long   ret
 191
 192 #define COPY_EE(d, s)           rlwimi d,s,0,16,16
 193 #define NOCOPY(d, s)
 194
 195 #define EXC_XFER_STD(n, hdlr)           \
 196         EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \
 197                           ret_from_except_full)
 198
 199 #define EXC_XFER_LITE(n, hdlr)          \
 200         EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \
 201                           ret_from_except)
 202
 203 #define EXC_XFER_EE(n, hdlr)            \
 204         EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \
 205                           ret_from_except_full)
 206
 207 #define EXC_XFER_EE_LITE(n, hdlr)       \
 208         EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
 209                           ret_from_except)
 210
 211 /* Check for a single step debug exception while in an exception
 212  * handler before state has been saved.  This is to catch the case
 213  * where an instruction that we are trying to single step causes
 214  * an exception (eg ITLB/DTLB miss) and thus the first instruction of
 215  * the exception handler generates a single step debug exception.
 216  *
 217  * If we get a debug trap on the first instruction of an exception handler,
 218  * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
 219  * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
 220  * The exception handler was handling a non-critical interrupt, so it will
 221  * save (and later restore) the MSR via SPRN_CSRR1, which will still have
 222  * the MSR_DE bit set.
 223  */
 224 #define DEBUG_DEBUG_EXCEPTION                                                 \
 225         START_EXCEPTION(DebugDebug);                                          \
 226         DEBUG_EXCEPTION_PROLOG;                                               \
 227                                                                               \
 228         /*                                                                    \
 229          * If there is a single step or branch-taken exception in an          \
 230          * exception entry sequence, it was probably meant to apply to        \
 231          * the code where the exception occurred (since exception entry       \
 232          * doesn't turn off DE automatically).  We simulate the effect        \
 233          * of turning off DE on entry to an exception handler by turning      \
 234          * off DE in the CSRR1 value and clearing the debug status.           \
 235          */                                                                   \
 236         mfspr   r10,SPRN_DBSR;          /* check single-step/branch taken */  \
 237         andis.  r10,r10,DBSR_IC@h;                                            \
 238         beq+    2f;                                                           \
 239                                                                               \
 240         lis     r10,KERNELBASE@h;       /* check if exception in vectors */   \
 241         ori     r10,r10,KERNELBASE@l;                                         \
 242         cmplw   r12,r10;                                                      \
 243         blt+    2f;                     /* addr below exception vectors */    \
 244                                                                               \
 245         lis     r10,DebugDebug@h;                                             \
 246         ori     r10,r10,DebugDebug@l;                                         \
 247         cmplw   r12,r10;                                                      \
 248         bgt+    2f;                     /* addr above exception vectors */    \
 249                                                                               \
 250         /* here it looks like we got an inappropriate debug exception. */     \
 251 1:      rlwinm  r9,r9,0,~MSR_DE;        /* clear DE in the CDRR1 value */     \
 252         lis     r10,DBSR_IC@h;          /* clear the IC event */              \
 253         mtspr   SPRN_DBSR,r10;                                                \
 254         /* restore state and get out */                                       \
 255         lwz     r10,_CCR(r11);                                                \
 256         lwz     r0,GPR0(r11);                                                 \
 257         lwz     r1,GPR1(r11);                                                 \
 258         mtcrf   0x80,r10;                                                     \
 259         mtspr   SPRN_DSRR0,r12;                                               \
 260         mtspr   SPRN_DSRR1,r9;                                                \
 261         lwz     r9,GPR9(r11);                                                 \
 262         lwz     r12,GPR12(r11);                                               \
 263         mtspr   DEBUG_SPRG,r8;                                                \
 264         BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \
 265         lwz     r10,GPR10-INT_FRAME_SIZE(r8);                                 \
 266         lwz     r11,GPR11-INT_FRAME_SIZE(r8);                                 \
 267         mfspr   r8,DEBUG_SPRG;                                                \
 268                                                                               \
 269         RFDI;                                                                 \
 270         b       .;                                                            \
 271                                                                               \
 272         /* continue normal handling for a critical exception... */            \
 273 2:      mfspr   r4,SPRN_DBSR;                                                 \
 274         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 275         EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
 276
 277 #define DEBUG_CRIT_EXCEPTION                                                  \
 278         START_EXCEPTION(DebugCrit);                                           \
 279         CRITICAL_EXCEPTION_PROLOG;                                            \
 280                                                                               \
 281         /*                                                                    \
 282          * If there is a single step or branch-taken exception in an          \
 283          * exception entry sequence, it was probably meant to apply to        \
 284          * the code where the exception occurred (since exception entry       \
 285          * doesn't turn off DE automatically).  We simulate the effect        \
 286          * of turning off DE on entry to an exception handler by turning      \
 287          * off DE in the CSRR1 value and clearing the debug status.           \
 288          */                                                                   \
 289         mfspr   r10,SPRN_DBSR;          /* check single-step/branch taken */  \
 290         andis.  r10,r10,DBSR_IC@h;                                            \
 291         beq+    2f;                                                           \
 292                                                                               \
 293         lis     r10,KERNELBASE@h;       /* check if exception in vectors */   \
 294         ori     r10,r10,KERNELBASE@l;                                         \
 295         cmplw   r12,r10;                                                      \
 296         blt+    2f;                     /* addr below exception vectors */    \
 297                                                                               \
 298         lis     r10,DebugCrit@h;                                                      \
 299         ori     r10,r10,DebugCrit@l;                                          \
 300         cmplw   r12,r10;                                                      \
 301         bgt+    2f;                     /* addr above exception vectors */    \
 302                                                                               \
 303         /* here it looks like we got an inappropriate debug exception. */     \
 304 1:      rlwinm  r9,r9,0,~MSR_DE;        /* clear DE in the CSRR1 value */     \
 305         lis     r10,DBSR_IC@h;          /* clear the IC event */              \
 306         mtspr   SPRN_DBSR,r10;                                                \
 307         /* restore state and get out */                                       \
 308         lwz     r10,_CCR(r11);                                                \
 309         lwz     r0,GPR0(r11);                                                 \
 310         lwz     r1,GPR1(r11);                                                 \
 311         mtcrf   0x80,r10;                                                     \
 312         mtspr   SPRN_CSRR0,r12;                                               \
 313         mtspr   SPRN_CSRR1,r9;                                                \
 314         lwz     r9,GPR9(r11);                                                 \
 315         lwz     r12,GPR12(r11);                                               \
 316         mtspr   CRIT_SPRG,r8;                                                 \
 317         BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */  \
 318         lwz     r10,GPR10-INT_FRAME_SIZE(r8);                                 \
 319         lwz     r11,GPR11-INT_FRAME_SIZE(r8);                                 \
 320         mfspr   r8,CRIT_SPRG;                                                 \
 321                                                                               \
 322         rfci;                                                                 \
 323         b       .;                                                            \
 324                                                                               \
 325         /* continue normal handling for a critical exception... */            \
 326 2:      mfspr   r4,SPRN_DBSR;                                                 \
 327         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 328         EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
 329
 330 #define INSTRUCTION_STORAGE_EXCEPTION                                         \
 331         START_EXCEPTION(InstructionStorage)                                   \
 332         NORMAL_EXCEPTION_PROLOG;                                              \
 333         mfspr   r5,SPRN_ESR;            /* Grab the ESR and save it */        \
 334         stw     r5,_ESR(r11);                                                 \
 335         mr      r4,r12;                 /* Pass SRR0 as arg2 */               \
 336         li      r5,0;                   /* Pass zero as arg3 */               \
 337         EXC_XFER_EE_LITE(0x0400, handle_page_fault)
 338
 339 #define ALIGNMENT_EXCEPTION                                                   \
 340         START_EXCEPTION(Alignment)                                            \
 341         NORMAL_EXCEPTION_PROLOG;                                              \
 342         mfspr   r4,SPRN_DEAR;           /* Grab the DEAR and save it */       \
 343         stw     r4,_DEAR(r11);                                                \
 344         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 345         EXC_XFER_EE(0x0600, alignment_exception)
 346
 347 #define PROGRAM_EXCEPTION                                                     \
 348         START_EXCEPTION(Program)                                              \
 349         NORMAL_EXCEPTION_PROLOG;                                              \
 350         mfspr   r4,SPRN_ESR;            /* Grab the ESR and save it */        \
 351         stw     r4,_ESR(r11);                                                 \
 352         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 353         EXC_XFER_STD(0x0700, program_check_exception)
 354
 355 #define DECREMENTER_EXCEPTION                                                 \
 356         START_EXCEPTION(Decrementer)                                          \
 357         NORMAL_EXCEPTION_PROLOG;                                              \
 358         lis     r0,TSR_DIS@h;           /* Setup the DEC interrupt mask */    \
 359         mtspr   SPRN_TSR,r0;            /* Clear the DEC interrupt */         \
 360         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 361         EXC_XFER_LITE(0x0900, timer_interrupt)
 362
 363 #define FP_UNAVAILABLE_EXCEPTION                                              \
 364         START_EXCEPTION(FloatingPointUnavailable)                             \
 365         NORMAL_EXCEPTION_PROLOG;                                              \
 366         bne     load_up_fpu;            /* if from user, just load it up */   \
 367         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 368         EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
 369
 370 #endif /* __HEAD_BOOKE_H__ */