2 * SN Platform GRU Driver
4 * FAULT HANDLER FOR GRU DETECTED TLB MISSES
6 * This file contains code that handles TLB misses within the GRU.
7 * These misses are reported either via interrupts or user polling of
10 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/kernel.h>
28 #include <linux/errno.h>
29 #include <linux/spinlock.h>
31 #include <linux/hugetlb.h>
32 #include <linux/device.h>
34 #include <linux/uaccess.h>
35 #include <asm/pgtable.h>
37 #include "grutables.h"
39 #include "gru_instructions.h"
40 #include <asm/uv/uv_hub.h>
43 * Test if a physical address is a valid GRU GSEG address
45 static inline int is_gru_paddr(unsigned long paddr)
47 return paddr >= gru_start_paddr && paddr < gru_end_paddr;
51 * Find the vma of a GRU segment. Caller must hold mmap_sem.
53 struct vm_area_struct *gru_find_vma(unsigned long vaddr)
55 struct vm_area_struct *vma;
57 vma = find_vma(current->mm, vaddr);
58 if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
64 * Find and lock the gts that contains the specified user vaddr.
67 * - *gts with the mmap_sem locked for read and the GTS locked.
68 * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
71 static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
73 struct mm_struct *mm = current->mm;
74 struct vm_area_struct *vma;
75 struct gru_thread_state *gts = NULL;
77 down_read(&mm->mmap_sem);
78 vma = gru_find_vma(vaddr);
80 gts = gru_find_thread_state(vma, TSID(vaddr, vma));
82 mutex_lock(>s->ts_ctxlock);
84 up_read(&mm->mmap_sem);
88 static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
90 struct mm_struct *mm = current->mm;
91 struct vm_area_struct *vma;
92 struct gru_thread_state *gts = NULL;
94 down_write(&mm->mmap_sem);
95 vma = gru_find_vma(vaddr);
97 gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
99 mutex_lock(>s->ts_ctxlock);
100 downgrade_write(&mm->mmap_sem);
102 up_write(&mm->mmap_sem);
109 * Unlock a GTS that was previously locked with gru_find_lock_gts().
111 static void gru_unlock_gts(struct gru_thread_state *gts)
113 mutex_unlock(>s->ts_ctxlock);
114 up_read(¤t->mm->mmap_sem);
118 * Set a CB.istatus to active using a user virtual address. This must be done
119 * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
120 * If the line is evicted, the status may be lost. The in-cache update
121 * is necessary to prevent the user from seeing a stale cb.istatus that will
122 * change as soon as the TFH restart is complete. Races may cause an
123 * occasional failure to clear the cb.istatus, but that is ok.
125 * If the cb address is not valid (should not happen, but...), nothing
126 * bad will happen.. The get_user()/put_user() will fail but there
127 * are no bad side-effects.
129 static void gru_cb_set_istatus_active(unsigned long __user *cb)
132 struct gru_instruction_bits bits;
138 u.bits.istatus = CBS_ACTIVE;
144 * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
145 * interrupt. Interrupts are always sent to a cpu on the blade that contains the
146 * GRU (except for headless blades which are not currently supported). A blade
147 * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
148 * number uniquely identifies the GRU chiplet on the local blade that caused the
149 * interrupt. Always called in interrupt context.
151 static inline struct gru_state *irq_to_gru(int irq)
153 return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
159 * The GRU has an array of fault maps. A map is private to a cpu
160 * Only one cpu will be accessing a cpu's fault map.
162 * This function scans the cpu-private fault map & clears all bits that
163 * are set. The function returns a bitmap that indicates the bits that
164 * were cleared. Note that sense the maps may be updated asynchronously by
165 * the GRU, atomic operations must be used to clear bits.
167 static void get_clear_fault_map(struct gru_state *gru,
168 struct gru_tlb_fault_map *map)
171 struct gru_tlb_fault_map *tfm;
173 tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
174 prefetchw(tfm); /* Helps on hardware, required for emulator */
175 for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
176 k = tfm->fault_bits[i];
178 k = xchg(&tfm->fault_bits[i], 0UL);
179 map->fault_bits[i] = k;
183 * Not functionally required but helps performance. (Required
186 gru_flush_cache(tfm);
190 * Atomic (interrupt context) & non-atomic (user context) functions to
191 * convert a vaddr into a physical address. The size of the page
192 * is returned in pageshift.
196 * 1 - (atomic only) try again in non-atomic context
198 static int non_atomic_pte_lookup(struct vm_area_struct *vma,
199 unsigned long vaddr, int write,
200 unsigned long *paddr, int *pageshift)
204 /* ZZZ Need to handle HUGE pages */
205 if (is_vm_hugetlb_page(vma))
207 *pageshift = PAGE_SHIFT;
209 (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
211 *paddr = page_to_phys(page);
219 * Convert a user virtual address to a physical address
220 * Only supports Intel large pages (2MB only) on x86_64.
221 * ZZZ - hugepage support is incomplete
223 * NOTE: mmap_sem is already held on entry to this function. This
224 * guarantees existence of the page tables.
226 static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
227 int write, unsigned long *paddr, int *pageshift)
234 pgdp = pgd_offset(vma->vm_mm, vaddr);
235 if (unlikely(pgd_none(*pgdp)))
238 pudp = pud_offset(pgdp, vaddr);
239 if (unlikely(pud_none(*pudp)))
242 pmdp = pmd_offset(pudp, vaddr);
243 if (unlikely(pmd_none(*pmdp)))
246 if (unlikely(pmd_large(*pmdp)))
247 pte = *(pte_t *) pmdp;
250 pte = *pte_offset_kernel(pmdp, vaddr);
252 if (unlikely(!pte_present(pte) ||
253 (write && (!pte_write(pte) || !pte_dirty(pte)))))
256 *paddr = pte_pfn(pte) << PAGE_SHIFT;
257 *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
266 * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
268 * cb Address of user CBR. Null if not running in user context
270 * 0 = dropin, exception, or switch to UPM successful
271 * 1 = range invalidate active
275 static int gru_try_dropin(struct gru_thread_state *gts,
276 struct gru_tlb_fault_handle *tfh,
277 unsigned long __user *cb)
279 struct mm_struct *mm = gts->ts_mm;
280 struct vm_area_struct *vma;
281 int pageshift, asid, write, ret;
282 unsigned long paddr, gpa, vaddr;
285 * NOTE: The GRU contains magic hardware that eliminates races between
286 * TLB invalidates and TLB dropins. If an invalidate occurs
287 * in the window between reading the TFH and the subsequent TLB dropin,
288 * the dropin is ignored. This eliminates the need for additional locks.
292 * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
293 * Might be a hardware race OR a stupid user. Ignore FMM because FMM
294 * is a transient state.
296 if (tfh->state == TFHSTATE_IDLE)
298 if (tfh->state == TFHSTATE_MISS_FMM && cb)
301 write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
302 vaddr = tfh->missvaddr;
303 asid = tfh->missasid;
307 rmb(); /* TFH must be cache resident before reading ms_range_active */
310 * TFH is cache resident - at least briefly. Fail the dropin
311 * if a range invalidate is active.
313 if (atomic_read(>s->ts_gms->ms_range_active))
316 vma = find_vma(mm, vaddr);
321 * Atomic lookup is faster & usually works even if called in non-atomic
324 rmb(); /* Must/check ms_range_active before loading PTEs */
325 ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &pageshift);
329 if (non_atomic_pte_lookup(vma, vaddr, write, &paddr,
333 if (is_gru_paddr(paddr))
336 paddr = paddr & ~((1UL << pageshift) - 1);
337 gpa = uv_soc_phys_ram_to_gpa(paddr);
338 gru_cb_set_istatus_active(cb);
339 tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
340 GRU_PAGESIZE(pageshift));
343 "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
344 ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
349 /* No asid (delayed unload). */
350 STAT(tlb_dropin_fail_no_asid);
351 gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
353 tfh_user_polling_mode(tfh);
355 gru_flush_cache(tfh);
359 /* Atomic failure switch CBR to UPM */
360 tfh_user_polling_mode(tfh);
361 STAT(tlb_dropin_fail_upm);
362 gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
366 /* FMM state on UPM call */
367 STAT(tlb_dropin_fail_fmm);
368 gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
372 /* TFH was idle - no miss pending */
373 gru_flush_cache(tfh);
376 STAT(tlb_dropin_fail_idle);
377 gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
381 /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
383 STAT(tlb_dropin_fail_invalid);
384 gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
388 /* Range invalidate active. Switch to UPM iff atomic */
390 tfh_user_polling_mode(tfh);
392 gru_flush_cache(tfh);
393 STAT(tlb_dropin_fail_range_active);
394 gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
400 * Process an external interrupt from the GRU. This interrupt is
401 * caused by a TLB miss.
402 * Note that this is the interrupt handler that is registered with linux
403 * interrupt handlers.
405 irqreturn_t gru_intr(int irq, void *dev_id)
407 struct gru_state *gru;
408 struct gru_tlb_fault_map map;
409 struct gru_thread_state *gts;
410 struct gru_tlb_fault_handle *tfh = NULL;
415 gru = irq_to_gru(irq);
417 dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
418 raw_smp_processor_id(), irq);
421 get_clear_fault_map(gru, &map);
422 gru_dbg(grudev, "irq %d, gru %x, map 0x%lx\n", irq, gru->gs_gid,
425 for_each_cbr_in_tfm(cbrnum, map.fault_bits) {
426 tfh = get_tfh_by_index(gru, cbrnum);
427 prefetchw(tfh); /* Helps on hdw, required for emulator */
430 * When hardware sets a bit in the faultmap, it implicitly
431 * locks the GRU context so that it cannot be unloaded.
432 * The gts cannot change until a TFH start/writestart command
435 ctxnum = tfh->ctxnum;
436 gts = gru->gs_gts[ctxnum];
439 * This is running in interrupt context. Trylock the mmap_sem.
440 * If it fails, retry the fault in user context.
442 if (down_read_trylock(>s->ts_mm->mmap_sem)) {
443 gru_try_dropin(gts, tfh, NULL);
444 up_read(>s->ts_mm->mmap_sem);
446 tfh_user_polling_mode(tfh);
453 static int gru_user_dropin(struct gru_thread_state *gts,
454 struct gru_tlb_fault_handle *tfh,
455 unsigned long __user *cb)
457 struct gru_mm_struct *gms = gts->ts_gms;
461 wait_event(gms->ms_wait_queue,
462 atomic_read(&gms->ms_range_active) == 0);
463 prefetchw(tfh); /* Helps on hdw, required for emulator */
464 ret = gru_try_dropin(gts, tfh, cb);
467 STAT(call_os_wait_queue);
472 * This interface is called as a result of a user detecting a "call OS" bit
473 * in a user CB. Normally means that a TLB fault has occurred.
474 * cb - user virtual address of the CB
476 int gru_handle_user_call_os(unsigned long cb)
478 struct gru_tlb_fault_handle *tfh;
479 struct gru_thread_state *gts;
480 unsigned long __user *cbp;
481 int ucbnum, cbrnum, ret = -EINVAL;
484 gru_dbg(grudev, "address 0x%lx\n", cb);
486 /* sanity check the cb pointer */
487 ucbnum = get_cb_number((void *)cb);
488 if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
490 cbp = (unsigned long *)cb;
492 gts = gru_find_lock_gts(cb);
496 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
502 * If force_unload is set, the UPM TLB fault is phony. The task
503 * has migrated to another node and the GSEG must be moved. Just
504 * unload the context. The task will page fault and assign a new
508 cbrnum = thread_cbr_number(gts, ucbnum);
509 if (gts->ts_force_unload) {
510 gru_unload_context(gts, 1);
511 } else if (gts->ts_gru) {
512 tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
513 ret = gru_user_dropin(gts, tfh, cbp);
521 * Fetch the exception detail information for a CB that terminated with
524 int gru_get_exception_detail(unsigned long arg)
526 struct control_block_extended_exc_detail excdet;
527 struct gru_control_block_extended *cbe;
528 struct gru_thread_state *gts;
529 int ucbnum, cbrnum, ret;
531 STAT(user_exception);
532 if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
535 gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
536 gts = gru_find_lock_gts(excdet.cb);
541 ucbnum = get_cb_number((void *)excdet.cb);
542 cbrnum = thread_cbr_number(gts, ucbnum);
543 cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
544 prefetchw(cbe); /* Harmless on hardware, required for emulator */
545 excdet.opc = cbe->opccpy;
546 excdet.exopc = cbe->exopccpy;
547 excdet.ecause = cbe->ecause;
548 excdet.exceptdet0 = cbe->idef1upd;
549 excdet.exceptdet1 = cbe->idef3upd;
556 gru_dbg(grudev, "address 0x%lx, ecause 0x%x\n", excdet.cb,
558 if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
564 * User request to unload a context. Content is saved for possible reload.
566 int gru_user_unload_context(unsigned long arg)
568 struct gru_thread_state *gts;
569 struct gru_unload_context_req req;
571 STAT(user_unload_context);
572 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
575 gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
577 gts = gru_find_lock_gts(req.gseg);
582 gru_unload_context(gts, 1);
589 * User request to flush a range of virtual addresses from the GRU TLB
590 * (Mainly for testing).
592 int gru_user_flush_tlb(unsigned long arg)
594 struct gru_thread_state *gts;
595 struct gru_flush_tlb_req req;
597 STAT(user_flush_tlb);
598 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
601 gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
604 gts = gru_find_lock_gts(req.gseg);
608 gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.vaddr + req.len);
615 * Register the current task as the user of the GSEG slice.
616 * Needed for TLB fault interrupt targeting.
618 int gru_set_task_slice(long address)
620 struct gru_thread_state *gts;
622 STAT(set_task_slice);
623 gru_dbg(grudev, "address 0x%lx\n", address);
624 gts = gru_alloc_locked_gts(address);
628 gts->ts_tgid_owner = current->tgid;