2 * MPC8349E-mITX Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "MPC8349EMITX";
16 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>; // from bootloader
41 bus-frequency = <0>; // from bootloader
42 clock-frequency = <0>; // from bootloader
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>;
55 compatible = "simple-bus";
56 ranges = <0x0 0xe0000000 0x00100000>;
57 reg = <0xe0000000 0x00000200>;
58 bus-frequency = <0>; // from bootloader
61 device_type = "watchdog";
62 compatible = "mpc83xx_wdt";
70 compatible = "fsl-i2c";
72 interrupts = <14 0x8>;
73 interrupt-parent = <&ipic>;
81 compatible = "fsl-i2c";
83 interrupts = <15 0x8>;
84 interrupt-parent = <&ipic>;
90 compatible = "fsl,spi";
91 reg = <0x7000 0x1000>;
92 interrupts = <16 0x8>;
93 interrupt-parent = <&ipic>;
100 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
102 ranges = <0 0x8100 0x1a8>;
103 interrupt-parent = <&ipic>;
107 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
110 interrupt-parent = <&ipic>;
114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
117 interrupt-parent = <&ipic>;
121 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124 interrupt-parent = <&ipic>;
128 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
131 interrupt-parent = <&ipic>;
137 compatible = "fsl-usb2-mph";
138 reg = <0x22000 0x1000>;
139 #address-cells = <1>;
141 interrupt-parent = <&ipic>;
142 interrupts = <39 0x8>;
148 compatible = "fsl-usb2-dr";
149 reg = <0x23000 0x1000>;
150 #address-cells = <1>;
152 interrupt-parent = <&ipic>;
153 interrupts = <38 0x8>;
154 dr_mode = "peripheral";
159 #address-cells = <1>;
161 compatible = "fsl,gianfar-mdio";
162 reg = <0x24520 0x20>;
165 phy1c: ethernet-phy@1c {
166 interrupt-parent = <&ipic>;
167 interrupts = <18 0x8>;
169 device_type = "ethernet-phy";
173 enet0: ethernet@24000 {
175 device_type = "network";
177 compatible = "gianfar";
178 reg = <0x24000 0x1000>;
179 local-mac-address = [ 00 00 00 00 00 00 ];
180 interrupts = <32 0x8 33 0x8 34 0x8>;
181 interrupt-parent = <&ipic>;
182 phy-handle = <&phy1c>;
183 linux,network-index = <0>;
186 enet1: ethernet@25000 {
188 device_type = "network";
190 compatible = "gianfar";
191 reg = <0x25000 0x1000>;
192 local-mac-address = [ 00 00 00 00 00 00 ];
193 interrupts = <35 0x8 36 0x8 37 0x8>;
194 interrupt-parent = <&ipic>;
195 /* Vitesse 7385 isn't on the MDIO bus */
196 fixed-link = <1 1 1000 0 0>;
197 linux,network-index = <1>;
200 serial0: serial@4500 {
202 device_type = "serial";
203 compatible = "ns16550";
204 reg = <0x4500 0x100>;
205 clock-frequency = <0>; // from bootloader
206 interrupts = <9 0x8>;
207 interrupt-parent = <&ipic>;
210 serial1: serial@4600 {
212 device_type = "serial";
213 compatible = "ns16550";
214 reg = <0x4600 0x100>;
215 clock-frequency = <0>; // from bootloader
216 interrupts = <10 0x8>;
217 interrupt-parent = <&ipic>;
221 compatible = "fsl,sec2.0";
222 reg = <0x30000 0x10000>;
223 interrupts = <11 0x8>;
224 interrupt-parent = <&ipic>;
225 fsl,num-channels = <4>;
226 fsl,channel-fifo-len = <24>;
227 fsl,exec-units-mask = <0x7e>;
228 fsl,descriptor-types-mask = <0x01010ebf>;
232 interrupt-controller;
233 #address-cells = <0>;
234 #interrupt-cells = <2>;
236 device_type = "ipic";
242 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
244 /* IDSEL 0x10 - SATA */
245 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
247 interrupt-parent = <&ipic>;
248 interrupts = <66 0x8>;
249 bus-range = <0x0 0x0>;
250 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
251 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
252 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
253 clock-frequency = <66666666>;
254 #interrupt-cells = <1>;
256 #address-cells = <3>;
257 reg = <0xe0008500 0x100 /* internal registers */
258 0xe0008300 0x8>; /* config space access registers */
259 compatible = "fsl,mpc8349-pci";
265 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
267 /* IDSEL 0x0E - MiniPCI Slot */
268 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
270 /* IDSEL 0x0F - PCI Slot */
271 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
272 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
274 interrupt-parent = <&ipic>;
275 interrupts = <67 0x8>;
276 bus-range = <0x0 0x0>;
277 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
278 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
279 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
280 clock-frequency = <66666666>;
281 #interrupt-cells = <1>;
283 #address-cells = <3>;
284 reg = <0xe0008600 0x100 /* internal registers */
285 0xe0008380 0x8>; /* config space access registers */
286 compatible = "fsl,mpc8349-pci";
291 #address-cells = <2>;
293 compatible = "fsl,mpc8349e-localbus",
294 "fsl,pq2pro-localbus";
295 reg = <0xe0005000 0xd8>;
296 ranges = <0x3 0x0 0xf0000000 0x210>;
299 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
300 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
303 interrupts = <23 0x8>;
304 interrupt-parent = <&ipic>;