[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
[linux-2.6] / arch / mips / tx4927 / common / tx4927_irq.c
1 /*
2  * Common tx4927 irq handler
3  *
4  * Author: MontaVista Software, Inc.
5  *         source@mvista.com
6  *
7  *  under the terms of the GNU General Public License as published by the
8  *  Free Software Foundation; either version 2 of the License, or (at your
9  *  option) any later version.
10  *
11  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
14  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
16  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
17  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
18  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
19  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
20  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21  *
22  *  You should have received a copy of the GNU General Public License along
23  *  with this program; if not, write to the Free Software Foundation, Inc.,
24  *  675 Mass Ave, Cambridge, MA 02139, USA.
25  */
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/kernel_stat.h>
29 #include <linux/module.h>
30 #include <linux/signal.h>
31 #include <linux/sched.h>
32 #include <linux/types.h>
33 #include <linux/interrupt.h>
34 #include <linux/ioport.h>
35 #include <linux/timex.h>
36 #include <linux/slab.h>
37 #include <linux/random.h>
38 #include <linux/irq.h>
39 #include <linux/bitops.h>
40 #include <asm/bootinfo.h>
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/mipsregs.h>
44 #include <asm/system.h>
45 #include <asm/tx4927/tx4927.h>
46
47 /*
48  * DEBUG
49  */
50
51 #undef TX4927_IRQ_DEBUG
52
53 #ifdef TX4927_IRQ_DEBUG
54 #define TX4927_IRQ_NONE        0x00000000
55
56 #define TX4927_IRQ_INFO        ( 1 <<  0 )
57 #define TX4927_IRQ_WARN        ( 1 <<  1 )
58 #define TX4927_IRQ_EROR        ( 1 <<  2 )
59
60 #define TX4927_IRQ_INIT        ( 1 <<  5 )
61 #define TX4927_IRQ_NEST1       ( 1 <<  6 )
62 #define TX4927_IRQ_NEST2       ( 1 <<  7 )
63 #define TX4927_IRQ_NEST3       ( 1 <<  8 )
64 #define TX4927_IRQ_NEST4       ( 1 <<  9 )
65
66 #define TX4927_IRQ_CP0_INIT     ( 1 << 10 )
67 #define TX4927_IRQ_CP0_STARTUP  ( 1 << 11 )
68 #define TX4927_IRQ_CP0_SHUTDOWN ( 1 << 12 )
69 #define TX4927_IRQ_CP0_ENABLE   ( 1 << 13 )
70 #define TX4927_IRQ_CP0_DISABLE  ( 1 << 14 )
71 #define TX4927_IRQ_CP0_MASK     ( 1 << 15 )
72 #define TX4927_IRQ_CP0_ENDIRQ   ( 1 << 16 )
73
74 #define TX4927_IRQ_PIC_INIT     ( 1 << 20 )
75 #define TX4927_IRQ_PIC_STARTUP  ( 1 << 21 )
76 #define TX4927_IRQ_PIC_SHUTDOWN ( 1 << 22 )
77 #define TX4927_IRQ_PIC_ENABLE   ( 1 << 23 )
78 #define TX4927_IRQ_PIC_DISABLE  ( 1 << 24 )
79 #define TX4927_IRQ_PIC_MASK     ( 1 << 25 )
80 #define TX4927_IRQ_PIC_ENDIRQ   ( 1 << 26 )
81
82 #define TX4927_IRQ_ALL         0xffffffff
83 #endif
84
85 #ifdef TX4927_IRQ_DEBUG
86 static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
87                                           | TX4927_IRQ_INFO
88                                           | TX4927_IRQ_WARN | TX4927_IRQ_EROR
89 //                                       | TX4927_IRQ_CP0_INIT
90 //                                       | TX4927_IRQ_CP0_STARTUP
91 //                                       | TX4927_IRQ_CP0_SHUTDOWN
92 //                                       | TX4927_IRQ_CP0_ENABLE
93 //                                       | TX4927_IRQ_CP0_DISABLE
94 //                                       | TX4927_IRQ_CP0_MASK
95 //                                       | TX4927_IRQ_CP0_ENDIRQ
96 //                                       | TX4927_IRQ_PIC_INIT
97 //                                       | TX4927_IRQ_PIC_STARTUP
98 //                                       | TX4927_IRQ_PIC_SHUTDOWN
99 //                                       | TX4927_IRQ_PIC_ENABLE
100 //                                       | TX4927_IRQ_PIC_DISABLE
101 //                                       | TX4927_IRQ_PIC_MASK
102 //                                       | TX4927_IRQ_PIC_ENDIRQ
103 //                                       | TX4927_IRQ_INIT
104 //                                       | TX4927_IRQ_NEST1
105 //                                       | TX4927_IRQ_NEST2
106 //                                       | TX4927_IRQ_NEST3
107 //                                       | TX4927_IRQ_NEST4
108     );
109 #endif
110
111 #ifdef TX4927_IRQ_DEBUG
112 #define TX4927_IRQ_DPRINTK(flag,str...) \
113         if ( (tx4927_irq_debug_flag) & (flag) ) \
114         { \
115            char tmp[100]; \
116            sprintf( tmp, str ); \
117            printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
118         }
119 #else
120 #define TX4927_IRQ_DPRINTK(flag,str...)
121 #endif
122
123 /*
124  * Forwad definitions for all pic's
125  */
126
127 static unsigned int tx4927_irq_cp0_startup(unsigned int irq);
128 static void tx4927_irq_cp0_shutdown(unsigned int irq);
129 static void tx4927_irq_cp0_enable(unsigned int irq);
130 static void tx4927_irq_cp0_disable(unsigned int irq);
131 static void tx4927_irq_cp0_mask_and_ack(unsigned int irq);
132 static void tx4927_irq_cp0_end(unsigned int irq);
133
134 static unsigned int tx4927_irq_pic_startup(unsigned int irq);
135 static void tx4927_irq_pic_shutdown(unsigned int irq);
136 static void tx4927_irq_pic_enable(unsigned int irq);
137 static void tx4927_irq_pic_disable(unsigned int irq);
138 static void tx4927_irq_pic_mask_and_ack(unsigned int irq);
139 static void tx4927_irq_pic_end(unsigned int irq);
140
141 /*
142  * Kernel structs for all pic's
143  */
144
145 static DEFINE_SPINLOCK(tx4927_cp0_lock);
146 static DEFINE_SPINLOCK(tx4927_pic_lock);
147
148 #define TX4927_CP0_NAME "TX4927-CP0"
149 static struct irq_chip tx4927_irq_cp0_type = {
150         .typename       = TX4927_CP0_NAME,
151         .startup        = tx4927_irq_cp0_startup,
152         .shutdown       = tx4927_irq_cp0_shutdown,
153         .enable         = tx4927_irq_cp0_enable,
154         .disable        = tx4927_irq_cp0_disable,
155         .ack            = tx4927_irq_cp0_mask_and_ack,
156         .end            = tx4927_irq_cp0_end,
157         .set_affinity   = NULL
158 };
159
160 #define TX4927_PIC_NAME "TX4927-PIC"
161 static struct irq_chip tx4927_irq_pic_type = {
162         .typename       = TX4927_PIC_NAME,
163         .startup        = tx4927_irq_pic_startup,
164         .shutdown       = tx4927_irq_pic_shutdown,
165         .enable         = tx4927_irq_pic_enable,
166         .disable        = tx4927_irq_pic_disable,
167         .ack            = tx4927_irq_pic_mask_and_ack,
168         .end            = tx4927_irq_pic_end,
169         .set_affinity   = NULL
170 };
171
172 #define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
173 static struct irqaction tx4927_irq_pic_action =
174 TX4927_PIC_ACTION(TX4927_PIC_NAME);
175
176 #define CCP0_STATUS 12
177 #define CCP0_CAUSE 13
178
179 /*
180  * Functions for cp0
181  */
182
183 #define tx4927_irq_cp0_mask(irq) ( 1 << ( irq-TX4927_IRQ_CP0_BEG+8 ) )
184
185 static void
186 tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits)
187 {
188         unsigned long val = 0;
189
190         switch (cp0_reg) {
191         case CCP0_STATUS:
192                 val = read_c0_status();
193                 break;
194
195         case CCP0_CAUSE:
196                 val = read_c0_cause();
197                 break;
198
199         }
200
201         val &= (~clr_bits);
202         val |= (set_bits);
203
204         switch (cp0_reg) {
205         case CCP0_STATUS:{
206                         write_c0_status(val);
207                         break;
208                 }
209         case CCP0_CAUSE:{
210                         write_c0_cause(val);
211                         break;
212                 }
213         }
214
215         return;
216 }
217
218 static void __init tx4927_irq_cp0_init(void)
219 {
220         int i;
221
222         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n",
223                            TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END);
224
225         for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) {
226                 irq_desc[i].status = IRQ_DISABLED;
227                 irq_desc[i].action = 0;
228                 irq_desc[i].depth = 1;
229                 irq_desc[i].chip = &tx4927_irq_cp0_type;
230         }
231
232         return;
233 }
234
235 static unsigned int tx4927_irq_cp0_startup(unsigned int irq)
236 {
237         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq);
238
239         tx4927_irq_cp0_enable(irq);
240
241         return (0);
242 }
243
244 static void tx4927_irq_cp0_shutdown(unsigned int irq)
245 {
246         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq);
247
248         tx4927_irq_cp0_disable(irq);
249
250         return;
251 }
252
253 static void tx4927_irq_cp0_enable(unsigned int irq)
254 {
255         unsigned long flags;
256
257         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq);
258
259         spin_lock_irqsave(&tx4927_cp0_lock, flags);
260
261         tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq));
262
263         spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
264
265         return;
266 }
267
268 static void tx4927_irq_cp0_disable(unsigned int irq)
269 {
270         unsigned long flags;
271
272         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq);
273
274         spin_lock_irqsave(&tx4927_cp0_lock, flags);
275
276         tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
277
278         spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
279
280         return;
281 }
282
283 static void tx4927_irq_cp0_mask_and_ack(unsigned int irq)
284 {
285         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq);
286
287         tx4927_irq_cp0_disable(irq);
288
289         return;
290 }
291
292 static void tx4927_irq_cp0_end(unsigned int irq)
293 {
294         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENDIRQ, "irq=%d \n", irq);
295
296         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
297                 tx4927_irq_cp0_enable(irq);
298         }
299
300         return;
301 }
302
303 /*
304  * Functions for pic
305  */
306 u32 tx4927_irq_pic_addr(int irq)
307 {
308         /* MVMCP -- need to formulize this */
309         irq -= TX4927_IRQ_PIC_BEG;
310         switch (irq) {
311         case 17:
312         case 16:
313         case 1:
314         case 0:
315                 return (0xff1ff610);
316
317         case 19:
318         case 18:
319         case 3:
320         case 2:
321                 return (0xff1ff614);
322
323         case 21:
324         case 20:
325         case 5:
326         case 4:
327                 return (0xff1ff618);
328
329         case 23:
330         case 22:
331         case 7:
332         case 6:
333                 return (0xff1ff61c);
334
335         case 25:
336         case 24:
337         case 9:
338         case 8:
339                 return (0xff1ff620);
340
341         case 27:
342         case 26:
343         case 11:
344         case 10:
345                 return (0xff1ff624);
346
347         case 29:
348         case 28:
349         case 13:
350         case 12:
351                 return (0xff1ff628);
352
353         case 31:
354         case 30:
355         case 15:
356         case 14:
357                 return (0xff1ff62c);
358
359         }
360         return (0);
361 }
362
363 u32 tx4927_irq_pic_mask(int irq)
364 {
365         /* MVMCP -- need to formulize this */
366         irq -= TX4927_IRQ_PIC_BEG;
367         switch (irq) {
368         case 31:
369         case 29:
370         case 27:
371         case 25:
372         case 23:
373         case 21:
374         case 19:
375         case 17:{
376                         return (0x07000000);
377                 }
378         case 30:
379         case 28:
380         case 26:
381         case 24:
382         case 22:
383         case 20:
384         case 18:
385         case 16:{
386                         return (0x00070000);
387                 }
388         case 15:
389         case 13:
390         case 11:
391         case 9:
392         case 7:
393         case 5:
394         case 3:
395         case 1:{
396                         return (0x00000700);
397                 }
398         case 14:
399         case 12:
400         case 10:
401         case 8:
402         case 6:
403         case 4:
404         case 2:
405         case 0:{
406                         return (0x00000007);
407                 }
408         }
409         return (0x00000000);
410 }
411
412 static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits,
413         unsigned set_bits)
414 {
415         unsigned long val = 0;
416
417         val = TX4927_RD(pic_reg);
418         val &= (~clr_bits);
419         val |= (set_bits);
420         TX4927_WR(pic_reg, val);
421
422         return;
423 }
424
425 static void __init tx4927_irq_pic_init(void)
426 {
427         unsigned long flags;
428         int i;
429
430         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n",
431                            TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END);
432
433         for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) {
434                 irq_desc[i].status = IRQ_DISABLED;
435                 irq_desc[i].action = 0;
436                 irq_desc[i].depth = 2;
437                 irq_desc[i].chip = &tx4927_irq_pic_type;
438         }
439
440         setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
441
442         spin_lock_irqsave(&tx4927_pic_lock, flags);
443
444         TX4927_WR(0xff1ff640, 0x6);     /* irq level mask -- only accept hightest */
445         TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1);     /* irq enable */
446
447         spin_unlock_irqrestore(&tx4927_pic_lock, flags);
448
449         return;
450 }
451
452 static unsigned int tx4927_irq_pic_startup(unsigned int irq)
453 {
454         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq);
455
456         tx4927_irq_pic_enable(irq);
457
458         return (0);
459 }
460
461 static void tx4927_irq_pic_shutdown(unsigned int irq)
462 {
463         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq);
464
465         tx4927_irq_pic_disable(irq);
466
467         return;
468 }
469
470 static void tx4927_irq_pic_enable(unsigned int irq)
471 {
472         unsigned long flags;
473
474         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq);
475
476         spin_lock_irqsave(&tx4927_pic_lock, flags);
477
478         tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0,
479                               tx4927_irq_pic_mask(irq));
480
481         spin_unlock_irqrestore(&tx4927_pic_lock, flags);
482
483         return;
484 }
485
486 static void tx4927_irq_pic_disable(unsigned int irq)
487 {
488         unsigned long flags;
489
490         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq);
491
492         spin_lock_irqsave(&tx4927_pic_lock, flags);
493
494         tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq),
495                               tx4927_irq_pic_mask(irq), 0);
496
497         spin_unlock_irqrestore(&tx4927_pic_lock, flags);
498
499         return;
500 }
501
502 static void tx4927_irq_pic_mask_and_ack(unsigned int irq)
503 {
504         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq);
505
506         tx4927_irq_pic_disable(irq);
507
508         return;
509 }
510
511 static void tx4927_irq_pic_end(unsigned int irq)
512 {
513         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENDIRQ, "irq=%d\n", irq);
514
515         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
516                 tx4927_irq_pic_enable(irq);
517         }
518
519         return;
520 }
521
522 /*
523  * Main init functions
524  */
525 void __init tx4927_irq_init(void)
526 {
527         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "-\n");
528
529         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_cp0_init()\n");
530         tx4927_irq_cp0_init();
531
532         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_pic_init()\n");
533         tx4927_irq_pic_init();
534
535         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n");
536
537         return;
538 }
539
540 static int tx4927_irq_nested(void)
541 {
542         int sw_irq = 0;
543         u32 level2;
544
545         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "-\n");
546
547         level2 = TX4927_RD(0xff1ff6a0);
548         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=level2a=0x%x\n", level2);
549
550         if ((level2 & 0x10000) == 0) {
551                 level2 &= 0x1f;
552                 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=level2b=0x%x\n", level2);
553
554                 sw_irq = TX4927_IRQ_PIC_BEG + level2;
555                 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=sw_irq=%d\n", sw_irq);
556
557                 if (sw_irq == 27) {
558                         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq-%d\n",
559                                            sw_irq);
560
561 #ifdef CONFIG_TOSHIBA_RBTX4927
562                         {
563                                 sw_irq = toshiba_rbtx4927_irq_nested(sw_irq);
564                         }
565 #endif
566
567                         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq+%d\n",
568                                            sw_irq);
569                 }
570         }
571
572         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=sw_irq=%d\n", sw_irq);
573
574         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "+\n");
575
576         return (sw_irq);
577 }
578
579 asmlinkage void plat_irq_dispatch(void)
580 {
581         unsigned int pending = read_c0_status() & read_c0_cause();
582
583         if (pending & STATUSF_IP7)                      /* cpu timer */
584                 do_IRQ(TX4927_IRQ_CPU_TIMER);
585         else if (pending & STATUSF_IP2) {               /* tx4927 pic */
586                 unsigned int irq = tx4927_irq_nested();
587
588                 if (unlikely(irq == 0)) {
589                         spurious_interrupt();
590                         return;
591                 }
592                 do_IRQ(irq);
593         } else if (pending & STATUSF_IP0)               /* user line 0 */
594                 do_IRQ(TX4927_IRQ_USER0);
595         else if (pending & STATUSF_IP1)                 /* user line 1 */
596                 do_IRQ(TX4927_IRQ_USER1);
597         else
598                 spurious_interrupt();
599 }