2 * cx18 ADEC firmware functions
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
22 #include "cx18-driver.h"
23 #include <linux/firmware.h>
25 #define CX18_AUDIO_ENABLE 0xc72014
26 #define FWFILE "v4l-cx23418-dig.fw"
28 int cx18_av_loadfw(struct cx18 *cx)
30 const struct firmware *fw = NULL;
37 if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) {
38 CX18_ERR("unable to open firmware %s\n", FWFILE);
42 /* The firmware load often has byte errors, so allow for several
43 retries, both at byte level and at the firmware load level. */
44 while (retries1 < 5) {
45 cx18_av_write4(cx, CXADEC_CHIP_CTRL, 0x00010000);
46 cx18_av_write(cx, CXADEC_STD_DET_CTL, 0xf6);
48 /* Reset the Mako core (Register is undocumented.) */
49 cx18_av_write4(cx, 0x8100, 0x00010000);
51 /* Put the 8051 in reset and enable firmware upload */
52 cx18_av_write4(cx, CXADEC_DL_CTL, 0x0F000000);
57 for (i = 0; i < size; i++) {
58 u32 dl_control = 0x0F000000 | i | ((u32)ptr[i] << 16);
62 for (retries2 = 0; retries2 < 5; retries2++) {
63 cx18_av_write4(cx, CXADEC_DL_CTL, dl_control);
65 value = cx18_av_read4(cx, CXADEC_DL_CTL);
66 if (value == dl_control)
68 /* Check if we can correct the byte by changing
69 the address. We can only write the lower
70 address byte of the address. */
71 if ((value & 0x3F00) != (dl_control & 0x3F00)) {
84 CX18_ERR("unable to load firmware %s\n", FWFILE);
89 cx18_av_write4(cx, CXADEC_DL_CTL, 0x13000000 | fw->size);
91 /* Output to the 416 */
92 cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x78000);
94 /* Audio input control 1 set to Sony mode */
95 /* Audio output input 2 is 0 for slave operation input */
96 /* 0xC4000914[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
97 /* 0xC4000914[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
98 after WS transition for first bit of audio word. */
99 cx18_av_write4(cx, CXADEC_I2S_IN_CTL, 0x000000A0);
101 /* Audio output control 1 is set to Sony mode */
102 /* Audio output control 2 is set to 1 for master mode */
103 /* 0xC4000918[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
104 /* 0xC4000918[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
105 after WS transition for first bit of audio word. */
106 /* 0xC4000918[8]: 0 = slave operation, 1 = master (SCK_OUT and WS_OUT
108 cx18_av_write4(cx, CXADEC_I2S_OUT_CTL, 0x000001A0);
110 /* set alt I2s master clock to /16 and enable alt divider i2s
112 cx18_av_write4(cx, CXADEC_PIN_CFG3, 0x5000B687);
114 cx18_av_write4(cx, CXADEC_STD_DET_CTL, 0x000000F6);
115 /* CxDevWrReg(CXADEC_STD_DET_CTL, 0x000000FF); */
117 /* Set bit 0 in register 0x9CC to signify that this is MiniMe. */
118 /* Register 0x09CC is defined by the Merlin firmware, and doesn't
119 have a name in the spec. */
120 cx18_av_write4(cx, 0x09CC, 1);
122 v = read_reg(CX18_AUDIO_ENABLE);
125 write_reg(v & 0xFFFFFBFF, CX18_AUDIO_ENABLE); /* Clear bit 10 */
127 /* Enable WW auto audio standard detection */
128 v = cx18_av_read4(cx, CXADEC_STD_DET_CTL);
129 v |= 0xFF; /* Auto by default */
130 v |= 0x400; /* Stereo by default */
132 cx18_av_write4(cx, CXADEC_STD_DET_CTL, v);
134 release_firmware(fw);
136 CX18_INFO("loaded %s firmware (%d bytes)\n", FWFILE, size);