Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
[linux-2.6] / arch / powerpc / boot / dts / mpc8323emds.dts
1 /*
2  * MPC8323E EMDS Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 / {
13         model = "MPC8323EMDS";
14         compatible = "MPC83xx";
15         #address-cells = <1>;
16         #size-cells = <1>;
17         linux,phandle = <100>;
18
19         cpus {
20                 #cpus = <1>;
21                 #address-cells = <1>;
22                 #size-cells = <0>;
23                 linux,phandle = <200>;
24
25                 PowerPC,8323@0 {
26                         device_type = "cpu";
27                         reg = <0>;
28                         d-cache-line-size = <20>;       // 32 bytes
29                         i-cache-line-size = <20>;       // 32 bytes
30                         d-cache-size = <4000>;          // L1, 16K
31                         i-cache-size = <4000>;          // L1, 16K
32                         timebase-frequency = <0>;
33                         bus-frequency = <0>;
34                         clock-frequency = <0>;
35                         32-bit;
36                         linux,phandle = <201>;
37                         linux,boot-cpu;
38                 };
39         };
40
41         memory {
42                 device_type = "memory";
43                 linux,phandle = <300>;
44                 reg = <00000000 08000000>;
45         };
46
47         bcsr@f8000000 {
48                 device_type = "board-control";
49                 reg = <f8000000 8000>;
50         };
51
52         soc8323@e0000000 {
53                 #address-cells = <1>;
54                 #size-cells = <1>;
55                 #interrupt-cells = <2>;
56                 device_type = "soc";
57                 ranges = <0 e0000000 00100000>;
58                 reg = <e0000000 00000200>;
59                 bus-frequency = <7DE2900>;
60
61                 wdt@200 {
62                         device_type = "watchdog";
63                         compatible = "mpc83xx_wdt";
64                         reg = <200 100>;
65                 };
66
67                 i2c@3000 {
68                         device_type = "i2c";
69                         compatible = "fsl-i2c";
70                         reg = <3000 100>;
71                         interrupts = <e 8>;
72                         interrupt-parent = <700>;
73                         dfsrr;
74                 };
75
76                 serial@4500 {
77                         device_type = "serial";
78                         compatible = "ns16550";
79                         reg = <4500 100>;
80                         clock-frequency = <0>;
81                         interrupts = <9 8>;
82                         interrupt-parent = <700>;
83                 };
84
85                 serial@4600 {
86                         device_type = "serial";
87                         compatible = "ns16550";
88                         reg = <4600 100>;
89                         clock-frequency = <0>;
90                         interrupts = <a 8>;
91                         interrupt-parent = <700>;
92                 };
93
94                 crypto@30000 {
95                         device_type = "crypto";
96                         model = "SEC2";
97                         compatible = "talitos";
98                         reg = <30000 7000>;
99                         interrupts = <b 8>;
100                         interrupt-parent = <700>;
101                         /* Rev. 2.2 */
102                         num-channels = <1>;
103                         channel-fifo-len = <18>;
104                         exec-units-mask = <0000004c>;
105                         descriptor-types-mask = <0122003f>;
106                 };
107
108                 pci@8500 {
109                         linux,phandle = <8500>;
110                         interrupt-map-mask = <f800 0 0 7>;
111                         interrupt-map = <
112                                         /* IDSEL 0x11 AD17 */
113                                          8800 0 0 1 700 14 8
114                                          8800 0 0 2 700 15 8
115                                          8800 0 0 3 700 16 8
116                                          8800 0 0 4 700 17 8
117
118                                         /* IDSEL 0x12 AD18 */
119                                          9000 0 0 1 700 16 8
120                                          9000 0 0 2 700 17 8
121                                          9000 0 0 3 700 14 8
122                                          9000 0 0 4 700 15 8
123
124                                         /* IDSEL 0x13 AD19 */
125                                          9800 0 0 1 700 17 8
126                                          9800 0 0 2 700 14 8
127                                          9800 0 0 3 700 15 8
128                                          9800 0 0 4 700 16 8
129
130                                         /* IDSEL 0x15 AD21*/
131                                          a800 0 0 1 700 14 8
132                                          a800 0 0 2 700 15 8
133                                          a800 0 0 3 700 16 8
134                                          a800 0 0 4 700 17 8
135
136                                         /* IDSEL 0x16 AD22*/
137                                          b000 0 0 1 700 17 8
138                                          b000 0 0 2 700 14 8
139                                          b000 0 0 3 700 15 8
140                                          b000 0 0 4 700 16 8
141
142                                         /* IDSEL 0x17 AD23*/
143                                          b800 0 0 1 700 16 8
144                                          b800 0 0 2 700 17 8
145                                          b800 0 0 3 700 14 8
146                                          b800 0 0 4 700 15 8
147
148                                         /* IDSEL 0x18 AD24*/
149                                          c000 0 0 1 700 15 8
150                                          c000 0 0 2 700 16 8
151                                          c000 0 0 3 700 17 8
152                                          c000 0 0 4 700 14 8>;
153                         interrupt-parent = <700>;
154                         interrupts = <42 8>;
155                         bus-range = <0 0>;
156                         ranges = <02000000 0 a0000000 90000000 0 10000000
157                                   42000000 0 80000000 80000000 0 10000000
158                                   01000000 0 00000000 d0000000 0 00100000>;
159                         clock-frequency = <0>;
160                         #interrupt-cells = <1>;
161                         #size-cells = <2>;
162                         #address-cells = <3>;
163                         reg = <8500 100>;
164                         compatible = "83xx";
165                         device_type = "pci";
166                 };
167
168                 pic@700 {
169                         linux,phandle = <700>;
170                         interrupt-controller;
171                         #address-cells = <0>;
172                         #interrupt-cells = <2>;
173                         reg = <700 100>;
174                         built-in;
175                         device_type = "ipic";
176                 };
177                 
178                 par_io@1400 {
179                         reg = <1400 100>;
180                         device_type = "par_io";
181                         num-ports = <7>;
182
183                         ucc_pin@03 {
184                                 linux,phandle = <140003>;
185                                 pio-map = <
186                         /* port  pin  dir  open_drain  assignment  has_irq */
187                                         3  4  3  0  2  0  /* MDIO */
188                                         3  5  1  0  2  0  /* MDC */
189                                         0  d  2  0  1  0        /* RX_CLK (CLK9) */
190                                         3 18  2  0  1  0        /* TX_CLK (CLK10) */
191                                         1  1  1  0  1  0        /* TxD1 */
192                                         1  0  1  0  1  0        /* TxD0 */
193                                         1  1  1  0  1  0        /* TxD1 */
194                                         1  2  1  0  1  0        /* TxD2 */
195                                         1  3  1  0  1  0        /* TxD3 */
196                                         1  4  2  0  1  0        /* RxD0 */
197                                         1  5  2  0  1  0        /* RxD1 */
198                                         1  6  2  0  1  0        /* RxD2 */
199                                         1  7  2  0  1  0        /* RxD3 */
200                                         1  8  2  0  1  0        /* RX_ER */
201                                         1  9  1  0  1  0        /* TX_ER */
202                                         1  a  2  0  1  0        /* RX_DV */
203                                         1  b  2  0  1  0        /* COL */
204                                         1  c  1  0  1  0        /* TX_EN */
205                                         1  d  2  0  1  0>;/* CRS */
206                         };
207                         ucc_pin@04 {
208                                 linux,phandle = <140004>;
209                                 pio-map = <
210                         /* port  pin  dir  open_drain  assignment  has_irq */
211                                         3 1f  2  0  1  0        /* RX_CLK (CLK7) */
212                                         3  6  2  0  1  0        /* TX_CLK (CLK8) */
213                                         1 12  1  0  1  0        /* TxD0 */
214                                         1 13  1  0  1  0        /* TxD1 */
215                                         1 14  1  0  1  0        /* TxD2 */
216                                         1 15  1  0  1  0        /* TxD3 */
217                                         1 16  2  0  1  0        /* RxD0 */
218                                         1 17  2  0  1  0        /* RxD1 */
219                                         1 18  2  0  1  0        /* RxD2 */
220                                         1 19  2  0  1  0        /* RxD3 */
221                                         1 1a  2  0  1  0        /* RX_ER */
222                                         1 1b  1  0  1  0        /* TX_ER */
223                                         1 1c  2  0  1  0        /* RX_DV */
224                                         1 1d  2  0  1  0        /* COL */
225                                         1 1e  1  0  1  0        /* TX_EN */
226                                         1 1f  2  0  1  0>;/* CRS */
227                         };
228                 };
229         };
230
231         qe@e0100000 {
232                 #address-cells = <1>;
233                 #size-cells = <1>;
234                 device_type = "qe";
235                 model = "QE";
236                 ranges = <0 e0100000 00100000>;
237                 reg = <e0100000 480>;
238                 brg-frequency = <0>;
239                 bus-frequency = <BCD3D80>;
240                 
241                 muram@10000 {
242                         device_type = "muram";
243                         ranges = <0 00010000 00004000>;
244         
245                         data-only@0 {
246                                 reg = <0 4000>;
247                         };
248                 };
249
250                 spi@4c0 {
251                         device_type = "spi";
252                         compatible = "fsl_spi";
253                         reg = <4c0 40>;
254                         interrupts = <2>;
255                         interrupt-parent = <80>;
256                         mode = "cpu";
257                 };
258
259                 spi@500 {
260                         device_type = "spi";
261                         compatible = "fsl_spi";
262                         reg = <500 40>;
263                         interrupts = <1>;
264                         interrupt-parent = <80>;
265                         mode = "cpu";
266                 };
267
268                 usb@6c0 {
269                         device_type = "usb";
270                         compatible = "qe_udc";
271                         reg = <6c0 40 8B00 100>;
272                         interrupts = <b>;
273                         interrupt-parent = <80>;
274                         mode = "slave";
275                 };
276
277                 ucc@2200 {
278                         device_type = "network";
279                         compatible = "ucc_geth";
280                         model = "UCC";
281                         device-id = <3>;
282                         reg = <2200 200>;
283                         interrupts = <22>;
284                         interrupt-parent = <80>;
285                         mac-address = [ 00 04 9f 00 23 23 ];
286                         rx-clock = <19>;
287                         tx-clock = <1a>;
288                         phy-handle = <212003>;
289                         pio-handle = <140003>;
290                 };
291
292                 ucc@3200 {
293                         device_type = "network";
294                         compatible = "ucc_geth";
295                         model = "UCC";
296                         device-id = <4>;
297                         reg = <3000 200>;
298                         interrupts = <23>;
299                         interrupt-parent = <80>;
300                         mac-address = [ 00 11 22 33 44 55 ];
301                         rx-clock = <17>;
302                         tx-clock = <18>;
303                         phy-handle = <212004>;
304                         pio-handle = <140004>;
305                 };
306
307                 mdio@2320 {
308                         #address-cells = <1>;
309                         #size-cells = <0>;
310                         reg = <2320 18>;
311                         device_type = "mdio";
312                         compatible = "ucc_geth_phy";
313
314                         ethernet-phy@03 {
315                                 linux,phandle = <212003>;
316                                 interrupt-parent = <700>;
317                                 interrupts = <11 2>;
318                                 reg = <3>;
319                                 device_type = "ethernet-phy";
320                                 interface = <3>; //ENET_100_MII
321                         };
322                         ethernet-phy@04 {
323                                 linux,phandle = <212004>;
324                                 interrupt-parent = <700>;
325                                 interrupts = <12 2>;
326                                 reg = <4>;
327                                 device_type = "ethernet-phy";
328                                 interface = <3>;
329                         };
330                 };
331
332                 qeic@80 {
333                         linux,phandle = <80>;
334                         interrupt-controller;
335                         device_type = "qeic";
336                         #address-cells = <0>;
337                         #interrupt-cells = <1>;
338                         reg = <80 80>;
339                         built-in;
340                         big-endian;
341                         interrupts = <20 8 21 8>; //high:32 low:33
342                         interrupt-parent = <700>;
343                 };
344         };
345 };