Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
[linux-2.6] / arch / powerpc / platforms / cell / pervasive.c
1 /*
2  * CBE Pervasive Monitor and Debug
3  *
4  * (C) Copyright IBM Corporation 2005
5  *
6  * Authors: Maximino Aguilar (maguilar@us.ibm.com)
7  *          Michael N. Day (mnday@us.ibm.com)
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2, or (at your option)
12  * any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #undef DEBUG
25
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/percpu.h>
29 #include <linux/types.h>
30 #include <linux/kallsyms.h>
31
32 #include <asm/io.h>
33 #include <asm/machdep.h>
34 #include <asm/prom.h>
35 #include <asm/pgtable.h>
36 #include <asm/reg.h>
37
38 #include "pervasive.h"
39 #include "cbe_regs.h"
40
41 static void cbe_power_save(void)
42 {
43         unsigned long ctrl, thread_switch_control;
44
45         /*
46          * We need to hard disable interrupts, but we also need to mark them
47          * hard disabled in the PACA so that the local_irq_enable() done by
48          * our caller upon return propertly hard enables.
49          */
50         hard_irq_disable();
51         get_paca()->hard_enabled = 0;
52
53         ctrl = mfspr(SPRN_CTRLF);
54
55         /* Enable DEC and EE interrupt request */
56         thread_switch_control  = mfspr(SPRN_TSC_CELL);
57         thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST;
58
59         switch (ctrl & CTRL_CT) {
60         case CTRL_CT0:
61                 thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
62                 break;
63         case CTRL_CT1:
64                 thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
65                 break;
66         default:
67                 printk(KERN_WARNING "%s: unknown configuration\n",
68                         __FUNCTION__);
69                 break;
70         }
71         mtspr(SPRN_TSC_CELL, thread_switch_control);
72
73         /*
74          * go into low thread priority, medium priority will be
75          * restored for us after wake-up.
76          */
77         HMT_low();
78
79         /*
80          * atomically disable thread execution and runlatch.
81          * External and Decrementer exceptions are still handled when the
82          * thread is disabled but now enter in cbe_system_reset_exception()
83          */
84         ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
85         mtspr(SPRN_CTRLT, ctrl);
86 }
87
88 static int cbe_system_reset_exception(struct pt_regs *regs)
89 {
90         switch (regs->msr & SRR1_WAKEMASK) {
91         case SRR1_WAKEEE:
92                 do_IRQ(regs);
93                 break;
94         case SRR1_WAKEDEC:
95                 timer_interrupt(regs);
96                 break;
97         case SRR1_WAKEMT:
98                 break;
99 #ifdef CONFIG_CBE_RAS
100         case SRR1_WAKESYSERR:
101                 cbe_system_error_exception(regs);
102                 break;
103         case SRR1_WAKETHERM:
104                 cbe_thermal_exception(regs);
105                 break;
106 #endif /* CONFIG_CBE_RAS */
107         default:
108                 /* do system reset */
109                 return 0;
110         }
111         /* everything handled */
112         return 1;
113 }
114
115 void __init cbe_pervasive_init(void)
116 {
117         int cpu;
118         if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
119                 return;
120
121         for_each_possible_cpu(cpu) {
122                 struct cbe_pmd_regs __iomem *regs = cbe_get_cpu_pmd_regs(cpu);
123                 if (!regs)
124                         continue;
125
126                  /* Enable Pause(0) control bit */
127                 out_be64(&regs->pmcr, in_be64(&regs->pmcr) |
128                                             CBE_PMD_PAUSE_ZERO_CONTROL);
129         }
130
131         ppc_md.power_save = cbe_power_save;
132         ppc_md.system_reset_exception = cbe_system_reset_exception;
133 }