1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
3 * Copyright (C) 2004,2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 I2C Controller
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
26 #include <linux/i2c.h>
27 #include <linux/i2c-id.h>
28 #include <linux/init.h>
29 #include <linux/time.h>
30 #include <linux/interrupt.h>
31 #include <linux/sched.h>
32 #include <linux/delay.h>
33 #include <linux/errno.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/clk.h>
38 #include <asm/hardware.h>
42 #include <asm/arch/regs-gpio.h>
43 #include <asm/arch/regs-iic.h>
44 #include <asm/arch/iic.h>
46 /* i2c controller state */
48 enum s3c24xx_i2c_state {
58 wait_queue_head_t wait;
65 enum s3c24xx_i2c_state state;
71 struct resource *ioarea;
72 struct i2c_adapter adap;
75 /* default platform data to use if not supplied in the platform_device
78 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {
83 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
86 /* s3c24xx_i2c_is2440()
88 * return true is this is an s3c2440
91 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
93 struct platform_device *pdev = to_platform_device(i2c->dev);
95 return !strcmp(pdev->name, "s3c2440-i2c");
99 /* s3c24xx_i2c_get_platformdata
101 * get the platform data associated with the given device, or return
102 * the default if there is none
105 static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)
107 if (dev->platform_data != NULL)
108 return (struct s3c2410_platform_i2c *)dev->platform_data;
110 return &s3c24xx_i2c_default_platform;
113 /* s3c24xx_i2c_master_complete
115 * complete the message and wake up the caller, using the given return code,
116 * or zero to mean ok.
119 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
121 dev_dbg(i2c->dev, "master_complete %d\n", ret);
133 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
137 tmp = readl(i2c->regs + S3C2410_IICCON);
138 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
142 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
146 tmp = readl(i2c->regs + S3C2410_IICCON);
147 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
151 /* irq enable/disable functions */
153 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
157 tmp = readl(i2c->regs + S3C2410_IICCON);
158 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
161 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
165 tmp = readl(i2c->regs + S3C2410_IICCON);
166 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
170 /* s3c24xx_i2c_message_start
172 * put the start of a message onto the bus
175 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
178 unsigned int addr = (msg->addr & 0x7f) << 1;
180 unsigned long iiccon;
183 stat |= S3C2410_IICSTAT_TXRXEN;
185 if (msg->flags & I2C_M_RD) {
186 stat |= S3C2410_IICSTAT_MASTER_RX;
189 stat |= S3C2410_IICSTAT_MASTER_TX;
191 if (msg->flags & I2C_M_REV_DIR_ADDR)
194 // todo - check for wether ack wanted or not
195 s3c24xx_i2c_enable_ack(i2c);
197 iiccon = readl(i2c->regs + S3C2410_IICCON);
198 writel(stat, i2c->regs + S3C2410_IICSTAT);
200 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
201 writeb(addr, i2c->regs + S3C2410_IICDS);
203 // delay a bit and reset iiccon before setting start (per samsung)
205 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
206 writel(iiccon, i2c->regs + S3C2410_IICCON);
208 stat |= S3C2410_IICSTAT_START;
209 writel(stat, i2c->regs + S3C2410_IICSTAT);
212 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
214 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
216 dev_dbg(i2c->dev, "STOP\n");
218 /* stop the transfer */
219 iicstat &= ~ S3C2410_IICSTAT_START;
220 writel(iicstat, i2c->regs + S3C2410_IICSTAT);
222 i2c->state = STATE_STOP;
224 s3c24xx_i2c_master_complete(i2c, ret);
225 s3c24xx_i2c_disable_irq(i2c);
228 /* helper functions to determine the current state in the set of
229 * messages we are sending */
233 * returns TRUE if the current message is the last in the set
236 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
238 return i2c->msg_idx >= (i2c->msg_num - 1);
243 * returns TRUE if we this is the last byte in the current message
246 static inline int is_msglast(struct s3c24xx_i2c *i2c)
248 return i2c->msg_ptr == i2c->msg->len-1;
253 * returns TRUE if we reached the end of the current message
256 static inline int is_msgend(struct s3c24xx_i2c *i2c)
258 return i2c->msg_ptr >= i2c->msg->len;
261 /* i2s_s3c_irq_nextbyte
263 * process an interrupt and work out what to do
266 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
272 switch (i2c->state) {
275 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);
280 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
281 s3c24xx_i2c_disable_irq(i2c);
285 /* last thing we did was send a start condition on the
286 * bus, or started a new i2c message
289 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
290 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
291 /* ack was not received... */
293 dev_dbg(i2c->dev, "ack was not received\n");
294 s3c24xx_i2c_stop(i2c, -EREMOTEIO);
298 if (i2c->msg->flags & I2C_M_RD)
299 i2c->state = STATE_READ;
301 i2c->state = STATE_WRITE;
303 /* terminate the transfer if there is nothing to do
304 * (used by the i2c probe to find devices */
306 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
307 s3c24xx_i2c_stop(i2c, 0);
311 if (i2c->state == STATE_READ)
314 /* fall through to the write state, as we will need to
315 * send a byte as well */
318 /* we are writing data to the device... check for the
319 * end of the message, and if so, work out what to do
323 if (!is_msgend(i2c)) {
324 byte = i2c->msg->buf[i2c->msg_ptr++];
325 writeb(byte, i2c->regs + S3C2410_IICDS);
327 } else if (!is_lastmsg(i2c)) {
328 /* we need to go to the next i2c message */
330 dev_dbg(i2c->dev, "WRITE: Next Message\n");
336 /* check to see if we need to do another message */
337 if (i2c->msg->flags & I2C_M_NOSTART) {
339 if (i2c->msg->flags & I2C_M_RD) {
340 /* cannot do this, the controller
341 * forces us to send a new START
342 * when we change direction */
344 s3c24xx_i2c_stop(i2c, -EINVAL);
350 /* send the new start */
351 s3c24xx_i2c_message_start(i2c, i2c->msg);
352 i2c->state = STATE_START;
358 s3c24xx_i2c_stop(i2c, 0);
363 /* we have a byte of data in the data register, do
364 * something with it, and then work out wether we are
365 * going to do any more read/write
368 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&
369 !(is_msglast(i2c) && is_lastmsg(i2c))) {
371 if (iicstat & S3C2410_IICSTAT_LASTBIT) {
372 dev_dbg(i2c->dev, "READ: No Ack\n");
374 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
379 byte = readb(i2c->regs + S3C2410_IICDS);
380 i2c->msg->buf[i2c->msg_ptr++] = byte;
383 if (is_msglast(i2c)) {
384 /* last byte of buffer */
387 s3c24xx_i2c_disable_ack(i2c);
389 } else if (is_msgend(i2c)) {
390 /* ok, we've read the entire buffer, see if there
391 * is anything else we need to do */
393 if (is_lastmsg(i2c)) {
394 /* last message, send stop and complete */
395 dev_dbg(i2c->dev, "READ: Send Stop\n");
397 s3c24xx_i2c_stop(i2c, 0);
399 /* go to the next transfer */
400 dev_dbg(i2c->dev, "READ: Next Transfer\n");
411 /* acknowlegde the IRQ and get back on with the work */
414 tmp = readl(i2c->regs + S3C2410_IICCON);
415 tmp &= ~S3C2410_IICCON_IRQPEND;
416 writel(tmp, i2c->regs + S3C2410_IICCON);
423 * top level IRQ servicing routine
426 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id,
427 struct pt_regs *regs)
429 struct s3c24xx_i2c *i2c = dev_id;
430 unsigned long status;
433 status = readl(i2c->regs + S3C2410_IICSTAT);
435 if (status & S3C2410_IICSTAT_ARBITR) {
436 // deal with arbitration loss
437 dev_err(i2c->dev, "deal with arbitration loss\n");
440 if (i2c->state == STATE_IDLE) {
441 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
443 tmp = readl(i2c->regs + S3C2410_IICCON);
444 tmp &= ~S3C2410_IICCON_IRQPEND;
445 writel(tmp, i2c->regs + S3C2410_IICCON);
449 /* pretty much this leaves us with the fact that we've
450 * transmitted or received whatever byte we last sent */
452 i2s_s3c_irq_nextbyte(i2c, status);
459 /* s3c24xx_i2c_set_master
461 * get the i2c bus for a master transaction
464 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
466 unsigned long iicstat;
469 while (timeout-- > 0) {
470 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
472 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
478 dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",
479 __raw_readl(S3C2410_GPEDAT));
484 /* s3c24xx_i2c_doxfer
486 * this starts an i2c transfer
489 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)
491 unsigned long timeout;
494 ret = s3c24xx_i2c_set_master(i2c);
496 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
501 spin_lock_irq(&i2c->lock);
507 i2c->state = STATE_START;
509 s3c24xx_i2c_enable_irq(i2c);
510 s3c24xx_i2c_message_start(i2c, msgs);
511 spin_unlock_irq(&i2c->lock);
513 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
517 /* having these next two as dev_err() makes life very
518 * noisy when doing an i2cdetect */
521 dev_dbg(i2c->dev, "timeout\n");
523 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
525 /* ensure the stop has been through the bus */
535 * first port of call from the i2c bus code when an message needs
536 * transferring across the i2c bus.
539 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
540 struct i2c_msg *msgs, int num)
542 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
546 for (retry = 0; retry < adap->retries; retry++) {
548 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
553 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
561 /* declare our i2c functionality */
562 static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
564 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
567 /* i2c bus registration info */
569 static struct i2c_algorithm s3c24xx_i2c_algorithm = {
570 .master_xfer = s3c24xx_i2c_xfer,
571 .functionality = s3c24xx_i2c_func,
574 static struct s3c24xx_i2c s3c24xx_i2c = {
575 .lock = SPIN_LOCK_UNLOCKED,
576 .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),
578 .name = "s3c2410-i2c",
579 .owner = THIS_MODULE,
580 .algo = &s3c24xx_i2c_algorithm,
582 .class = I2C_CLASS_HWMON,
586 /* s3c24xx_i2c_calcdivisor
588 * return the divisor settings for a given frequency
591 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
592 unsigned int *div1, unsigned int *divs)
594 unsigned int calc_divs = clkin / wanted;
595 unsigned int calc_div1;
597 if (calc_divs > (16*16))
602 calc_divs += calc_div1-1;
603 calc_divs /= calc_div1;
613 return clkin / (calc_divs * calc_div1);
618 * test wether a frequency is within the acceptable range of error
621 static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
623 int diff = freq - wanted;
625 return (diff >= -2 && diff <= 2);
628 /* s3c24xx_i2c_getdivisor
630 * work out a divisor for the user requested frequency setting,
631 * either by the requested frequency, or scanning the acceptable
632 * range of frequencies until something is found
635 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
636 struct s3c2410_platform_i2c *pdata,
637 unsigned long *iicon,
640 unsigned long clkin = clk_get_rate(i2c->clk);
642 unsigned int divs, div1;
646 clkin /= 1000; /* clkin now in KHz */
648 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
649 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
651 if (pdata->bus_freq != 0) {
652 freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
654 if (freq_acceptable(freq, pdata->bus_freq/1000))
658 /* ok, we may have to search for something suitable... */
660 start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
661 end = pdata->min_freq;
668 for (; start > end; start--) {
669 freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
670 if (freq_acceptable(freq, start))
674 /* cannot find frequency spec */
681 *iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
687 * initialise the controller, set the IO lines and frequency
690 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
692 unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
693 struct s3c2410_platform_i2c *pdata;
696 /* get the plafrom data */
698 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
700 /* inititalise the gpio */
702 s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
703 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
705 /* write slave address */
707 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
709 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
711 /* we need to work out the divisors for the clock... */
713 if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
714 dev_err(i2c->dev, "cannot meet bus frequency required\n");
718 /* todo - check that the i2c lines aren't being dragged anywhere */
720 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
721 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
723 writel(iicon, i2c->regs + S3C2410_IICCON);
725 /* check for s3c2440 i2c controller */
727 if (s3c24xx_i2c_is2440(i2c)) {
728 dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
730 writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
736 static void s3c24xx_i2c_free(struct s3c24xx_i2c *i2c)
738 if (i2c->clk != NULL && !IS_ERR(i2c->clk)) {
739 clk_disable(i2c->clk);
744 if (i2c->regs != NULL) {
749 if (i2c->ioarea != NULL) {
750 release_resource(i2c->ioarea);
758 * called by the bus driver when a suitable device is found
761 static int s3c24xx_i2c_probe(struct platform_device *pdev)
763 struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
764 struct resource *res;
767 /* find the clock and enable it */
769 i2c->dev = &pdev->dev;
770 i2c->clk = clk_get(&pdev->dev, "i2c");
771 if (IS_ERR(i2c->clk)) {
772 dev_err(&pdev->dev, "cannot get clock\n");
777 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
779 clk_enable(i2c->clk);
781 /* map the registers */
783 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
785 dev_err(&pdev->dev, "cannot find IO resource\n");
790 i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
793 if (i2c->ioarea == NULL) {
794 dev_err(&pdev->dev, "cannot request IO\n");
799 i2c->regs = ioremap(res->start, (res->end-res->start)+1);
801 if (i2c->regs == NULL) {
802 dev_err(&pdev->dev, "cannot map IO\n");
807 dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);
809 /* setup info block for the i2c core */
811 i2c->adap.algo_data = i2c;
812 i2c->adap.dev.parent = &pdev->dev;
814 /* initialise the i2c controller */
816 ret = s3c24xx_i2c_init(i2c);
820 /* find the IRQ for this unit (note, this relies on the init call to
821 * ensure no current IRQs pending
824 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
826 dev_err(&pdev->dev, "cannot find IRQ\n");
831 ret = request_irq(res->start, s3c24xx_i2c_irq, SA_INTERRUPT,
835 dev_err(&pdev->dev, "cannot claim IRQ\n");
841 dev_dbg(&pdev->dev, "irq resource %p (%ld)\n", res, res->start);
843 ret = i2c_add_adapter(&i2c->adap);
845 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
849 platform_set_drvdata(pdev, i2c);
851 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
855 s3c24xx_i2c_free(i2c);
860 /* s3c24xx_i2c_remove
862 * called when device is removed from the bus
865 static int s3c24xx_i2c_remove(struct platform_device *pdev)
867 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
870 s3c24xx_i2c_free(i2c);
871 platform_set_drvdata(pdev, NULL);
878 static int s3c24xx_i2c_resume(struct platform_device *dev)
880 struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
883 s3c24xx_i2c_init(i2c);
889 #define s3c24xx_i2c_resume NULL
892 /* device driver for platform bus bits */
894 static struct platform_driver s3c2410_i2c_driver = {
895 .probe = s3c24xx_i2c_probe,
896 .remove = s3c24xx_i2c_remove,
897 .resume = s3c24xx_i2c_resume,
899 .owner = THIS_MODULE,
900 .name = "s3c2410-i2c",
904 static struct platform_driver s3c2440_i2c_driver = {
905 .probe = s3c24xx_i2c_probe,
906 .remove = s3c24xx_i2c_remove,
907 .resume = s3c24xx_i2c_resume,
909 .owner = THIS_MODULE,
910 .name = "s3c2440-i2c",
914 static int __init i2c_adap_s3c_init(void)
918 ret = platform_driver_register(&s3c2410_i2c_driver);
920 ret = platform_driver_register(&s3c2440_i2c_driver);
922 platform_driver_unregister(&s3c2410_i2c_driver);
928 static void __exit i2c_adap_s3c_exit(void)
930 platform_driver_unregister(&s3c2410_i2c_driver);
931 platform_driver_unregister(&s3c2440_i2c_driver);
934 module_init(i2c_adap_s3c_init);
935 module_exit(i2c_adap_s3c_exit);
937 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
938 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
939 MODULE_LICENSE("GPL");