Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
[linux-2.6] / drivers / serial / 68360serial.c
1 /*
2  *  UART driver for 68360 CPM SCC or SMC
3  *  Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4  *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5  *  Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6  *
7  * I used the serial.c driver as the framework for this driver.
8  * Give credit to those guys.
9  * The original code was written for the MBX860 board.  I tried to make
10  * it generic, but there may be some assumptions in the structures that
11  * have to be fixed later.
12  * To save porting time, I did not bother to change any object names
13  * that are not accessed outside of this file.
14  * It still needs lots of work........When it was easy, I included code
15  * to support the SCCs, but this has never been tested, nor is it complete.
16  * Only the SCCs support modem control, so that is not complete either.
17  *
18  * This module exports the following rs232 io functions:
19  *
20  *      int rs_360_init(void);
21  */
22
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/serialP.h> 
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
38 #include <linux/mm.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <asm/irq.h>
42 #include <asm/m68360.h>
43 #include <asm/commproc.h>
44
45  
46 #ifdef CONFIG_KGDB
47 extern void breakpoint(void);
48 extern void set_debug_traps(void);
49 extern int  kgdb_output_string (const char* s, unsigned int count);
50 #endif
51
52
53 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
54 #include <linux/console.h>
55
56 /* this defines the index into rs_table for the port to use
57  */
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT      1 /* ie SMC2 - note USE_SMC2 must be defined */
60 #endif
61 /* #endif */
62
63 #if 0
64 /* SCC2 for console
65  */
66 #undef CONFIG_SERIAL_CONSOLE_PORT
67 #define CONFIG_SERIAL_CONSOLE_PORT      2
68 #endif
69
70
71 #define TX_WAKEUP       ASYNC_SHARE_IRQ
72
73 static char *serial_name = "CPM UART driver";
74 static char *serial_version = "0.03";
75
76 static struct tty_driver *serial_driver;
77 int serial_console_setup(struct console *co, char *options);
78
79 /*
80  * Serial driver configuration section.  Here are the various options:
81  */
82 #define SERIAL_PARANOIA_CHECK
83 #define CONFIG_SERIAL_NOPAUSE_IO
84 #define SERIAL_DO_RESTART
85
86 /* Set of debugging defines */
87
88 #undef SERIAL_DEBUG_INTR
89 #undef SERIAL_DEBUG_OPEN
90 #undef SERIAL_DEBUG_FLOW
91 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
92
93 #define _INLINE_ inline
94   
95 #define DBG_CNT(s)
96
97 /* We overload some of the items in the data structure to meet our
98  * needs.  For example, the port address is the CPM parameter ram
99  * offset for the SCC or SMC.  The maximum number of ports is 4 SCCs and
100  * 2 SMCs.  The "hub6" field is used to indicate the channel number, with
101  * a flag indicating SCC or SMC, and the number is used as an index into
102  * the CPM parameter area for this device.
103  * The "type" field is currently set to 0, for PORT_UNKNOWN.  It is
104  * not currently used.  I should probably use it to indicate the port
105  * type of SMC or SCC.
106  * The SMCs do not support any modem control signals.
107  */
108 #define smc_scc_num     hub6
109 #define NUM_IS_SCC      ((int)0x00010000)
110 #define PORT_NUM(P)     ((P) & 0x0000ffff)
111
112
113 #if defined (CONFIG_UCQUICC)
114
115 volatile extern void *_periph_base;
116 /* sipex transceiver
117  *   mode bits for       are on pins
118  *
119  *    SCC2                d16..19
120  *    SCC3                d20..23
121  *    SCC4                d24..27
122  */
123 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
124
125 static uint sipex_mode_bits = 0x00000000;
126
127 #endif
128
129 /* There is no `serial_state' defined back here in 2.0.
130  * Try to get by with serial_struct
131  */
132 /* #define serial_state serial_struct */
133
134 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
135  * extras: */
136
137 #if 0
138 struct async_icount_24 {
139         __u32   cts, dsr, rng, dcd, tx, rx;
140         __u32   frame, parity, overrun, brk;
141         __u32   buf_overrun;
142 } icount;
143 #endif
144
145 #if 0
146
147 struct serial_state {
148         int     magic;
149         int     baud_base;
150         unsigned long   port;
151         int     irq;
152         int     flags;
153         int     hub6;
154         int     type;
155         int     line;
156         int     revision;       /* Chip revision (950) */
157         int     xmit_fifo_size;
158         int     custom_divisor;
159         int     count;
160         u8      *iomem_base;
161         u16     iomem_reg_shift;
162         unsigned short  close_delay;
163         unsigned short  closing_wait; /* time to wait before closing */
164         struct async_icount_24     icount; 
165         int     io_type;
166         struct async_struct *info;
167 };
168 #endif
169
170 #define SSTATE_MAGIC 0x5302
171
172
173
174 /* SMC2 is sometimes used for low performance TDM interfaces.  Define
175  * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176  * Define this as 0 if you wish to use SMC2 for something else.
177  */
178 #define USE_SMC2 1
179
180 #if 0
181 /* Define SCC to ttySx mapping. */
182 #define SCC_NUM_BASE    (USE_SMC2 + 1)  /* SCC base tty "number" */
183
184 /* Define which SCC is the first one to use for a serial port.  These
185  * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186  * for Ethernet, and the first available SCC for serial UART is SCC2.
187  * NOTE:  IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188  * interrupt vectors in the table below to match.
189  */
190 #define SCC_IDX_BASE    1       /* table index */
191 #endif
192
193
194 /* Processors other than the 860 only get SMCs configured by default.
195  * Either they don't have SCCs or they are allocated somewhere else.
196  * Of course, there are now 860s without some SCCs, so we will need to
197  * address that someday.
198  * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199  * stereo codec parts, and we use SMC2 to help support that.
200  */
201 static struct serial_state rs_table[] = {
202 /*  type   line   PORT           IRQ       FLAGS  smc_scc_num (F.K.A. hub6) */
203         {  0,     0, PRSLOT_SMC1, CPMVEC_SMC1,   0,    0 }    /* SMC1 ttyS0 */
204 #if USE_SMC2
205         ,{ 0,     0, PRSLOT_SMC2, CPMVEC_SMC2,   0,    1 }     /* SMC2 ttyS1 */
206 #endif
207
208 #if defined(CONFIG_SERIAL_68360_SCC)
209         ,{ 0,     0, PRSLOT_SCC2, CPMVEC_SCC2,   0, (NUM_IS_SCC | 1) }    /* SCC2 ttyS2 */
210         ,{ 0,     0, PRSLOT_SCC3, CPMVEC_SCC3,   0, (NUM_IS_SCC | 2) }    /* SCC3 ttyS3 */
211         ,{ 0,     0, PRSLOT_SCC4, CPMVEC_SCC4,   0, (NUM_IS_SCC | 3) }    /* SCC4 ttyS4 */
212 #endif
213 };
214
215 #define NR_PORTS        (sizeof(rs_table)/sizeof(struct serial_state))
216
217 /* The number of buffer descriptors and their sizes.
218  */
219 #define RX_NUM_FIFO     4
220 #define RX_BUF_SIZE     32
221 #define TX_NUM_FIFO     4
222 #define TX_BUF_SIZE     32
223
224 #define CONSOLE_NUM_FIFO 2
225 #define CONSOLE_BUF_SIZE 4
226
227 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
228
229 /* The async_struct in serial.h does not really give us what we
230  * need, so define our own here.
231  */
232 typedef struct serial_info {
233         int                     magic;
234         int                     flags;
235
236         struct serial_state     *state;
237         /* struct serial_struct *state; */
238         /* struct async_struct  *state; */
239         
240         struct tty_struct       *tty;
241         int                     read_status_mask;
242         int                     ignore_status_mask;
243         int                     timeout;
244         int                     line;
245         int                     x_char; /* xon/xoff character */
246         int                     close_delay;
247         unsigned short          closing_wait;
248         unsigned short          closing_wait2;
249         unsigned long           event;
250         unsigned long           last_active;
251         int                     blocked_open; /* # of blocked opens */
252         struct work_struct      tqueue;
253         struct work_struct      tqueue_hangup;
254         wait_queue_head_t       open_wait; 
255         wait_queue_head_t       close_wait; 
256
257         
258 /* CPM Buffer Descriptor pointers.
259         */
260         QUICC_BD                        *rx_bd_base;
261         QUICC_BD                        *rx_cur;
262         QUICC_BD                        *tx_bd_base;
263         QUICC_BD                        *tx_cur;
264 } ser_info_t;
265
266
267 /* since kmalloc_init() does not get called until much after this initialization: */
268 static ser_info_t  quicc_ser_info[NR_PORTS];
269 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
271
272 static void change_speed(ser_info_t *info);
273 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
274
275 static inline int serial_paranoia_check(ser_info_t *info,
276                                         char *name, const char *routine)
277 {
278 #ifdef SERIAL_PARANOIA_CHECK
279         static const char *badmagic =
280                 "Warning: bad magic number for serial struct (%s) in %s\n";
281         static const char *badinfo =
282                 "Warning: null async_struct for (%s) in %s\n";
283
284         if (!info) {
285                 printk(badinfo, name, routine);
286                 return 1;
287         }
288         if (info->magic != SERIAL_MAGIC) {
289                 printk(badmagic, name, routine);
290                 return 1;
291         }
292 #endif
293         return 0;
294 }
295
296 /*
297  * This is used to figure out the divisor speeds and the timeouts,
298  * indexed by the termio value.  The generic CPM functions are responsible
299  * for setting and assigning baud rate generators for us.
300  */
301 static int baud_table[] = {
302         0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303         9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
304
305 /* This sucks. There is a better way: */
306 #if defined(CONFIG_CONSOLE_9600)
307   #define CONSOLE_BAUDRATE 9600
308 #elif defined(CONFIG_CONSOLE_19200)
309   #define CONSOLE_BAUDRATE 19200
310 #elif defined(CONFIG_CONSOLE_115200)
311   #define CONSOLE_BAUDRATE 115200
312 #else
313   #warning "console baud rate undefined"
314   #define CONSOLE_BAUDRATE 9600
315 #endif
316
317 /*
318  * ------------------------------------------------------------
319  * rs_stop() and rs_start()
320  *
321  * This routines are called before setting or resetting tty->stopped.
322  * They enable or disable transmitter interrupts, as necessary.
323  * ------------------------------------------------------------
324  */
325 static void rs_360_stop(struct tty_struct *tty)
326 {
327         ser_info_t *info = (ser_info_t *)tty->driver_data;
328         int     idx;
329         unsigned long flags;
330         volatile struct scc_regs *sccp;
331         volatile struct smc_regs *smcp;
332
333         if (serial_paranoia_check(info, tty->name, "rs_stop"))
334                 return;
335         
336         local_irq_save(flags);
337         idx = PORT_NUM(info->state->smc_scc_num);
338         if (info->state->smc_scc_num & NUM_IS_SCC) {
339                 sccp = &pquicc->scc_regs[idx];
340                 sccp->scc_sccm &= ~UART_SCCM_TX;
341         } else {
342                 /* smcp = &cpmp->cp_smc[idx]; */
343                 smcp = &pquicc->smc_regs[idx];
344                 smcp->smc_smcm &= ~SMCM_TX;
345         }
346         local_irq_restore(flags);
347 }
348
349
350 static void rs_360_start(struct tty_struct *tty)
351 {
352         ser_info_t *info = (ser_info_t *)tty->driver_data;
353         int     idx;
354         unsigned long flags;
355         volatile struct scc_regs *sccp;
356         volatile struct smc_regs *smcp;
357
358         if (serial_paranoia_check(info, tty->name, "rs_stop"))
359                 return;
360         
361         local_irq_save(flags);
362         idx = PORT_NUM(info->state->smc_scc_num);
363         if (info->state->smc_scc_num & NUM_IS_SCC) {
364                 sccp = &pquicc->scc_regs[idx];
365                 sccp->scc_sccm |= UART_SCCM_TX;
366         } else {
367                 smcp = &pquicc->smc_regs[idx];
368                 smcp->smc_smcm |= SMCM_TX;
369         }
370         local_irq_restore(flags);
371 }
372
373 /*
374  * ----------------------------------------------------------------------
375  *
376  * Here starts the interrupt handling routines.  All of the following
377  * subroutines are declared as inline and are folded into
378  * rs_interrupt().  They were separated out for readability's sake.
379  *
380  * Note: rs_interrupt() is a "fast" interrupt, which means that it
381  * runs with interrupts turned off.  People who may want to modify
382  * rs_interrupt() should try to keep the interrupt handler as fast as
383  * possible.  After you are done making modifications, it is not a bad
384  * idea to do:
385  * 
386  * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
387  *
388  * and look at the resulting assemble code in serial.s.
389  *
390  *                              - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391  * -----------------------------------------------------------------------
392  */
393
394 static _INLINE_ void receive_chars(ser_info_t *info)
395 {
396         struct tty_struct *tty = info->tty;
397         unsigned char ch, *cp;
398         /*int   ignored = 0;*/
399         int     i;
400         ushort  status;
401          struct async_icount *icount; 
402         /* struct       async_icount_24 *icount; */
403         volatile QUICC_BD       *bdp;
404
405         icount = &info->state->icount;
406
407         /* Just loop through the closed BDs and copy the characters into
408          * the buffer.
409          */
410         bdp = info->rx_cur;
411         for (;;) {
412                 if (bdp->status & BD_SC_EMPTY)  /* If this one is empty */
413                         break;                  /*   we are all done */
414
415                 /* The read status mask tell us what we should do with
416                  * incoming characters, especially if errors occur.
417                  * One special case is the use of BD_SC_EMPTY.  If
418                  * this is not set, we are supposed to be ignoring
419                  * inputs.  In this case, just mark the buffer empty and
420                  * continue.
421                  */
422                 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423                         bdp->status |= BD_SC_EMPTY;
424                         bdp->status &=
425                                 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
426
427                         if (bdp->status & BD_SC_WRAP)
428                                 bdp = info->rx_bd_base;
429                         else
430                                 bdp++;
431                         continue;
432                 }
433
434                 /* Get the number of characters and the buffer pointer.
435                 */
436                 i = bdp->length;
437                 /* cp = (unsigned char *)__va(bdp->buf); */
438                 cp = (char *)bdp->buf;
439                 status = bdp->status;
440
441                 /* Check to see if there is room in the tty buffer for
442                  * the characters in our BD buffer.  If not, we exit
443                  * now, leaving the BD with the characters.  We'll pick
444                  * them up again on the next receive interrupt (which could
445                  * be a timeout).
446                  */
447                 if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
448                         break;
449
450                 while (i-- > 0) {
451                         ch = *cp++;
452                         *tty->flip.char_buf_ptr = ch;
453                         icount->rx++;
454
455 #ifdef SERIAL_DEBUG_INTR
456                         printk("DR%02x:%02x...", ch, status);
457 #endif
458                         *tty->flip.flag_buf_ptr = 0;
459                         if (status & (BD_SC_BR | BD_SC_FR |
460                                        BD_SC_PR | BD_SC_OV)) {
461                                 /*
462                                  * For statistics only
463                                  */
464                                 if (status & BD_SC_BR)
465                                         icount->brk++;
466                                 else if (status & BD_SC_PR)
467                                         icount->parity++;
468                                 else if (status & BD_SC_FR)
469                                         icount->frame++;
470                                 if (status & BD_SC_OV)
471                                         icount->overrun++;
472
473                                 /*
474                                  * Now check to see if character should be
475                                  * ignored, and mask off conditions which
476                                  * should be ignored.
477                                 if (status & info->ignore_status_mask) {
478                                         if (++ignored > 100)
479                                                 break;
480                                         continue;
481                                 }
482                                  */
483                                 status &= info->read_status_mask;
484                 
485                                 if (status & (BD_SC_BR)) {
486 #ifdef SERIAL_DEBUG_INTR
487                                         printk("handling break....");
488 #endif
489                                         *tty->flip.flag_buf_ptr = TTY_BREAK;
490                                         if (info->flags & ASYNC_SAK)
491                                                 do_SAK(tty);
492                                 } else if (status & BD_SC_PR)
493                                         *tty->flip.flag_buf_ptr = TTY_PARITY;
494                                 else if (status & BD_SC_FR)
495                                         *tty->flip.flag_buf_ptr = TTY_FRAME;
496                                 if (status & BD_SC_OV) {
497                                         /*
498                                          * Overrun is special, since it's
499                                          * reported immediately, and doesn't
500                                          * affect the current character
501                                          */
502                                         if (tty->flip.count < TTY_FLIPBUF_SIZE) {
503                                                 tty->flip.count++;
504                                                 tty->flip.flag_buf_ptr++;
505                                                 tty->flip.char_buf_ptr++;
506                                                 *tty->flip.flag_buf_ptr =
507                                                                 TTY_OVERRUN;
508                                         }
509                                 }
510                         }
511                         if (tty->flip.count >= TTY_FLIPBUF_SIZE)
512                                 break;
513
514                         tty->flip.flag_buf_ptr++;
515                         tty->flip.char_buf_ptr++;
516                         tty->flip.count++;
517                 }
518
519                 /* This BD is ready to be used again.  Clear status.
520                  * Get next BD.
521                  */
522                 bdp->status |= BD_SC_EMPTY;
523                 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
524
525                 if (bdp->status & BD_SC_WRAP)
526                         bdp = info->rx_bd_base;
527                 else
528                         bdp++;
529         }
530
531         info->rx_cur = (QUICC_BD *)bdp;
532
533         schedule_work(&tty->flip.work);
534 }
535
536 static _INLINE_ void receive_break(ser_info_t *info)
537 {
538         struct tty_struct *tty = info->tty;
539
540         info->state->icount.brk++;
541         /* Check to see if there is room in the tty buffer for
542          * the break.  If not, we exit now, losing the break.  FIXME
543          */
544         if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
545                 return;
546         *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
547         *(tty->flip.char_buf_ptr++) = 0;
548         tty->flip.count++;
549
550         schedule_work(&tty->flip.work);
551 }
552
553 static _INLINE_ void transmit_chars(ser_info_t *info)
554 {
555
556         if ((info->flags & TX_WAKEUP) ||
557             (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
558                 schedule_work(&info->tqueue);
559         }
560
561 #ifdef SERIAL_DEBUG_INTR
562         printk("THRE...");
563 #endif
564 }
565
566 #ifdef notdef
567         /* I need to do this for the SCCs, so it is left as a reminder.
568         */
569 static _INLINE_ void check_modem_status(struct async_struct *info)
570 {
571         int     status;
572         /* struct       async_icount *icount; */
573         struct  async_icount_24 *icount;
574         
575         status = serial_in(info, UART_MSR);
576
577         if (status & UART_MSR_ANY_DELTA) {
578                 icount = &info->state->icount;
579                 /* update input line counters */
580                 if (status & UART_MSR_TERI)
581                         icount->rng++;
582                 if (status & UART_MSR_DDSR)
583                         icount->dsr++;
584                 if (status & UART_MSR_DDCD) {
585                         icount->dcd++;
586 #ifdef CONFIG_HARD_PPS
587                         if ((info->flags & ASYNC_HARDPPS_CD) &&
588                             (status & UART_MSR_DCD))
589                                 hardpps();
590 #endif
591                 }
592                 if (status & UART_MSR_DCTS)
593                         icount->cts++;
594                 wake_up_interruptible(&info->delta_msr_wait);
595         }
596
597         if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
598 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
599                 printk("ttys%d CD now %s...", info->line,
600                        (status & UART_MSR_DCD) ? "on" : "off");
601 #endif          
602                 if (status & UART_MSR_DCD)
603                         wake_up_interruptible(&info->open_wait);
604                 else {
605 #ifdef SERIAL_DEBUG_OPEN
606                         printk("scheduling hangup...");
607 #endif
608                         queue_task(&info->tqueue_hangup,
609                                            &tq_scheduler);
610                 }
611         }
612         if (info->flags & ASYNC_CTS_FLOW) {
613                 if (info->tty->hw_stopped) {
614                         if (status & UART_MSR_CTS) {
615 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
616                                 printk("CTS tx start...");
617 #endif
618                                 info->tty->hw_stopped = 0;
619                                 info->IER |= UART_IER_THRI;
620                                 serial_out(info, UART_IER, info->IER);
621                                 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
622                                 return;
623                         }
624                 } else {
625                         if (!(status & UART_MSR_CTS)) {
626 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
627                                 printk("CTS tx stop...");
628 #endif
629                                 info->tty->hw_stopped = 1;
630                                 info->IER &= ~UART_IER_THRI;
631                                 serial_out(info, UART_IER, info->IER);
632                         }
633                 }
634         }
635 }
636 #endif
637
638 /*
639  * This is the serial driver's interrupt routine for a single port
640  */
641 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
642 static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
643 {
644         u_char  events;
645         int     idx;
646         ser_info_t *info;
647         volatile struct smc_regs *smcp;
648         volatile struct scc_regs *sccp;
649         
650         info = (ser_info_t *)dev_id;
651
652         idx = PORT_NUM(info->state->smc_scc_num);
653         if (info->state->smc_scc_num & NUM_IS_SCC) {
654                 sccp = &pquicc->scc_regs[idx];
655                 events = sccp->scc_scce;
656                 if (events & SCCM_RX)
657                         receive_chars(info);
658                 if (events & SCCM_TX)
659                         transmit_chars(info);
660                 sccp->scc_scce = events;
661         } else {
662                 smcp = &pquicc->smc_regs[idx];
663                 events = smcp->smc_smce;
664                 if (events & SMCM_BRKE)
665                         receive_break(info);
666                 if (events & SMCM_RX)
667                         receive_chars(info);
668                 if (events & SMCM_TX)
669                         transmit_chars(info);
670                 smcp->smc_smce = events;
671         }
672         
673 #ifdef SERIAL_DEBUG_INTR
674         printk("rs_interrupt_single(%d, %x)...",
675                                         info->state->smc_scc_num, events);
676 #endif
677 #ifdef modem_control
678         check_modem_status(info);
679 #endif
680         info->last_active = jiffies;
681 #ifdef SERIAL_DEBUG_INTR
682         printk("end.\n");
683 #endif
684 }
685
686
687 /*
688  * -------------------------------------------------------------------
689  * Here ends the serial interrupt routines.
690  * -------------------------------------------------------------------
691  */
692
693
694 static void do_softint(void *private_)
695 {
696         ser_info_t      *info = (ser_info_t *) private_;
697         struct tty_struct       *tty;
698         
699         tty = info->tty;
700         if (!tty)
701                 return;
702
703         if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
704                 tty_wakeup(tty);
705 }
706
707
708 /*
709  * This routine is called from the scheduler tqueue when the interrupt
710  * routine has signalled that a hangup has occurred.  The path of
711  * hangup processing is:
712  *
713  *      serial interrupt routine -> (scheduler tqueue) ->
714  *      do_serial_hangup() -> tty->hangup() -> rs_hangup()
715  * 
716  */
717 static void do_serial_hangup(void *private_)
718 {
719         struct async_struct     *info = (struct async_struct *) private_;
720         struct tty_struct       *tty;
721         
722         tty = info->tty;
723         if (!tty)
724                 return;
725
726         tty_hangup(tty);
727 }
728
729
730 static int startup(ser_info_t *info)
731 {
732         unsigned long flags;
733         int     retval=0;
734         int     idx;
735         /*struct serial_state *state = info->state;*/
736         volatile struct smc_regs *smcp;
737         volatile struct scc_regs *sccp;
738         volatile struct smc_uart_pram   *up;
739         volatile struct uart_pram           *scup;
740
741
742         local_irq_save(flags);
743
744         if (info->flags & ASYNC_INITIALIZED) {
745                 goto errout;
746         }
747
748 #ifdef maybe
749         if (!state->port || !state->type) {
750                 if (info->tty)
751                         set_bit(TTY_IO_ERROR, &info->tty->flags);
752                 goto errout;
753         }
754 #endif
755
756 #ifdef SERIAL_DEBUG_OPEN
757         printk("starting up ttys%d (irq %d)...", info->line, state->irq);
758 #endif
759
760
761 #ifdef modem_control
762         info->MCR = 0;
763         if (info->tty->termios->c_cflag & CBAUD)
764                 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
765 #endif
766         
767         if (info->tty)
768                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
769
770         /*
771          * and set the speed of the serial port
772          */
773         change_speed(info);
774
775         idx = PORT_NUM(info->state->smc_scc_num);
776         if (info->state->smc_scc_num & NUM_IS_SCC) {
777                 sccp = &pquicc->scc_regs[idx];
778                 scup = &pquicc->pram[info->state->port].scc.pscc.u;
779
780                 scup->mrblr = RX_BUF_SIZE;
781                 scup->max_idl = RX_BUF_SIZE;
782
783                 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
784                 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
785
786         } else {
787                 smcp = &pquicc->smc_regs[idx];
788
789                 /* Enable interrupts and I/O.
790                 */
791                 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
792                 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
793
794                 /* We can tune the buffer length and idle characters
795                  * to take advantage of the entire incoming buffer size.
796                  * If mrblr is something other than 1, maxidl has to be
797                  * non-zero or we never get an interrupt.  The maxidl
798                  * is the number of character times we wait after reception
799                  * of the last character before we decide no more characters
800                  * are coming.
801                  */
802                 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
803                 /* holy unionized structures, Batman: */
804                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
805
806                 up->mrblr = RX_BUF_SIZE;
807                 up->max_idl = RX_BUF_SIZE;
808
809                 up->brkcr = 1;  /* number of break chars */
810         }
811
812         info->flags |= ASYNC_INITIALIZED;
813         local_irq_restore(flags);
814         return 0;
815         
816 errout:
817         local_irq_restore(flags);
818         return retval;
819 }
820
821 /*
822  * This routine will shutdown a serial port; interrupts are disabled, and
823  * DTR is dropped if the hangup on close termio flag is on.
824  */
825 static void shutdown(ser_info_t *info)
826 {
827         unsigned long   flags;
828         struct serial_state *state;
829         int             idx;
830         volatile struct smc_regs        *smcp;
831         volatile struct scc_regs        *sccp;
832
833         if (!(info->flags & ASYNC_INITIALIZED))
834                 return;
835
836         state = info->state;
837
838 #ifdef SERIAL_DEBUG_OPEN
839         printk("Shutting down serial port %d (irq %d)....", info->line,
840                state->irq);
841 #endif
842         
843         local_irq_save(flags);
844
845         idx = PORT_NUM(state->smc_scc_num);
846         if (state->smc_scc_num & NUM_IS_SCC) {
847                 sccp = &pquicc->scc_regs[idx];
848                 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
849 #ifdef CONFIG_SERIAL_CONSOLE
850                 /* We can't disable the transmitter if this is the
851                  * system console.
852                  */
853                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
854 #endif
855                 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
856         } else {
857                 smcp = &pquicc->smc_regs[idx];
858
859                 /* Disable interrupts and I/O.
860                  */
861                 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
862 #ifdef CONFIG_SERIAL_CONSOLE
863                 /* We can't disable the transmitter if this is the
864                  * system console.
865                  */
866                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
867 #endif
868                         smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
869         }
870         
871         if (info->tty)
872                 set_bit(TTY_IO_ERROR, &info->tty->flags);
873
874         info->flags &= ~ASYNC_INITIALIZED;
875         local_irq_restore(flags);
876 }
877
878 /*
879  * This routine is called to set the UART divisor registers to match
880  * the specified baud rate for a serial port.
881  */
882 static void change_speed(ser_info_t *info)
883 {
884         int     baud_rate;
885         unsigned cflag, cval, scval, prev_mode;
886         int     i, bits, sbits, idx;
887         unsigned long   flags;
888         struct serial_state *state;
889         volatile struct smc_regs        *smcp;
890         volatile struct scc_regs        *sccp;
891
892         if (!info->tty || !info->tty->termios)
893                 return;
894         cflag = info->tty->termios->c_cflag;
895
896         state = info->state;
897
898         /* Character length programmed into the mode register is the
899          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
900          * 1 or 2 stop bits, minus 1.
901          * The value 'bits' counts this for us.
902          */
903         cval = 0;
904         scval = 0;
905
906         /* byte size and parity */
907         switch (cflag & CSIZE) {
908               case CS5: bits = 5; break;
909               case CS6: bits = 6; break;
910               case CS7: bits = 7; break;
911               case CS8: bits = 8; break;
912               /* Never happens, but GCC is too dumb to figure it out */
913               default:  bits = 8; break;
914         }
915         sbits = bits - 5;
916
917         if (cflag & CSTOPB) {
918                 cval |= SMCMR_SL;       /* Two stops */
919                 scval |= SCU_PMSR_SL;
920                 bits++;
921         }
922         if (cflag & PARENB) {
923                 cval |= SMCMR_PEN;
924                 scval |= SCU_PMSR_PEN;
925                 bits++;
926         }
927         if (!(cflag & PARODD)) {
928                 cval |= SMCMR_PM_EVEN;
929                 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
930         }
931
932         /* Determine divisor based on baud rate */
933         i = cflag & CBAUD;
934         if (i >= (sizeof(baud_table)/sizeof(int)))
935                 baud_rate = 9600;
936         else
937                 baud_rate = baud_table[i];
938
939         info->timeout = (TX_BUF_SIZE*HZ*bits);
940         info->timeout += HZ/50;         /* Add .02 seconds of slop */
941
942 #ifdef modem_control
943         /* CTS flow control flag and modem status interrupts */
944         info->IER &= ~UART_IER_MSI;
945         if (info->flags & ASYNC_HARDPPS_CD)
946                 info->IER |= UART_IER_MSI;
947         if (cflag & CRTSCTS) {
948                 info->flags |= ASYNC_CTS_FLOW;
949                 info->IER |= UART_IER_MSI;
950         } else
951                 info->flags &= ~ASYNC_CTS_FLOW;
952         if (cflag & CLOCAL)
953                 info->flags &= ~ASYNC_CHECK_CD;
954         else {
955                 info->flags |= ASYNC_CHECK_CD;
956                 info->IER |= UART_IER_MSI;
957         }
958         serial_out(info, UART_IER, info->IER);
959 #endif
960
961         /*
962          * Set up parity check flag
963          */
964 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
965
966         info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
967         if (I_INPCK(info->tty))
968                 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
969         if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
970                 info->read_status_mask |= BD_SC_BR;
971         
972         /*
973          * Characters to ignore
974          */
975         info->ignore_status_mask = 0;
976         if (I_IGNPAR(info->tty))
977                 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
978         if (I_IGNBRK(info->tty)) {
979                 info->ignore_status_mask |= BD_SC_BR;
980                 /*
981                  * If we're ignore parity and break indicators, ignore 
982                  * overruns too.  (For real raw support).
983                  */
984                 if (I_IGNPAR(info->tty))
985                         info->ignore_status_mask |= BD_SC_OV;
986         }
987         /*
988          * !!! ignore all characters if CREAD is not set
989          */
990         if ((cflag & CREAD) == 0)
991          info->read_status_mask &= ~BD_SC_EMPTY;
992          local_irq_save(flags);
993
994          /* Start bit has not been added (so don't, because we would just
995           * subtract it later), and we need to add one for the number of
996           * stops bits (there is always at least one).
997           */
998          bits++;
999          idx = PORT_NUM(state->smc_scc_num);
1000          if (state->smc_scc_num & NUM_IS_SCC) {
1001          sccp = &pquicc->scc_regs[idx];
1002          sccp->scc_psmr = (sbits << 12) | scval;
1003      } else {
1004          smcp = &pquicc->smc_regs[idx];
1005
1006                 /* Set the mode register.  We want to keep a copy of the
1007                  * enables, because we want to put them back if they were
1008                  * present.
1009                  */
1010                 prev_mode = smcp->smc_smcmr;
1011                 smcp->smc_smcmr = smcr_mk_clen(bits) | cval |  SMCMR_SM_UART;
1012                 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
1013         }
1014
1015         m360_cpm_setbrg((state - rs_table), baud_rate);
1016
1017         local_irq_restore(flags);
1018 }
1019
1020 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
1021 {
1022         ser_info_t *info = (ser_info_t *)tty->driver_data;
1023         volatile QUICC_BD       *bdp;
1024
1025         if (serial_paranoia_check(info, tty->name, "rs_put_char"))
1026                 return;
1027
1028         if (!tty)
1029                 return;
1030
1031         bdp = info->tx_cur;
1032         while (bdp->status & BD_SC_READY);
1033
1034         /* *((char *)__va(bdp->buf)) = ch; */
1035         *((char *)bdp->buf) = ch;
1036         bdp->length = 1;
1037         bdp->status |= BD_SC_READY;
1038
1039         /* Get next BD.
1040         */
1041         if (bdp->status & BD_SC_WRAP)
1042                 bdp = info->tx_bd_base;
1043         else
1044                 bdp++;
1045
1046         info->tx_cur = (QUICC_BD *)bdp;
1047
1048 }
1049
1050 static int rs_360_write(struct tty_struct * tty,
1051                     const unsigned char *buf, int count)
1052 {
1053         int     c, ret = 0;
1054         ser_info_t *info = (ser_info_t *)tty->driver_data;
1055         volatile QUICC_BD *bdp;
1056
1057 #ifdef CONFIG_KGDB
1058         /* Try to let stub handle output. Returns true if it did. */ 
1059         if (kgdb_output_string(buf, count))
1060                 return ret;
1061 #endif
1062
1063         if (serial_paranoia_check(info, tty->name, "rs_write"))
1064                 return 0;
1065
1066         if (!tty) 
1067                 return 0;
1068
1069         bdp = info->tx_cur;
1070
1071         while (1) {
1072                 c = min(count, TX_BUF_SIZE);
1073
1074                 if (c <= 0)
1075                         break;
1076
1077                 if (bdp->status & BD_SC_READY) {
1078                         info->flags |= TX_WAKEUP;
1079                         break;
1080                 }
1081
1082                 /* memcpy(__va(bdp->buf), buf, c); */
1083                 memcpy((void *)bdp->buf, buf, c);
1084
1085                 bdp->length = c;
1086                 bdp->status |= BD_SC_READY;
1087
1088                 buf += c;
1089                 count -= c;
1090                 ret += c;
1091
1092                 /* Get next BD.
1093                 */
1094                 if (bdp->status & BD_SC_WRAP)
1095                         bdp = info->tx_bd_base;
1096                 else
1097                         bdp++;
1098                 info->tx_cur = (QUICC_BD *)bdp;
1099         }
1100         return ret;
1101 }
1102
1103 static int rs_360_write_room(struct tty_struct *tty)
1104 {
1105         ser_info_t *info = (ser_info_t *)tty->driver_data;
1106         int     ret;
1107
1108         if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1109                 return 0;
1110
1111         if ((info->tx_cur->status & BD_SC_READY) == 0) {
1112                 info->flags &= ~TX_WAKEUP;
1113                 ret = TX_BUF_SIZE;
1114         }
1115         else {
1116                 info->flags |= TX_WAKEUP;
1117                 ret = 0;
1118         }
1119         return ret;
1120 }
1121
1122 /* I could track this with transmit counters....maybe later.
1123 */
1124 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1125 {
1126         ser_info_t *info = (ser_info_t *)tty->driver_data;
1127                                 
1128         if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1129                 return 0;
1130         return 0;
1131 }
1132
1133 static void rs_360_flush_buffer(struct tty_struct *tty)
1134 {
1135         ser_info_t *info = (ser_info_t *)tty->driver_data;
1136                                 
1137         if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1138                 return;
1139
1140         /* There is nothing to "flush", whatever we gave the CPM
1141          * is on its way out.
1142          */
1143         tty_wakeup(tty);
1144         info->flags &= ~TX_WAKEUP;
1145 }
1146
1147 /*
1148  * This function is used to send a high-priority XON/XOFF character to
1149  * the device
1150  */
1151 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1152 {
1153         volatile QUICC_BD       *bdp;
1154
1155         ser_info_t *info = (ser_info_t *)tty->driver_data;
1156
1157         if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1158                 return;
1159
1160         bdp = info->tx_cur;
1161         while (bdp->status & BD_SC_READY);
1162
1163         /* *((char *)__va(bdp->buf)) = ch; */
1164         *((char *)bdp->buf) = ch;
1165         bdp->length = 1;
1166         bdp->status |= BD_SC_READY;
1167
1168         /* Get next BD.
1169         */
1170         if (bdp->status & BD_SC_WRAP)
1171                 bdp = info->tx_bd_base;
1172         else
1173                 bdp++;
1174
1175         info->tx_cur = (QUICC_BD *)bdp;
1176 }
1177
1178 /*
1179  * ------------------------------------------------------------
1180  * rs_throttle()
1181  * 
1182  * This routine is called by the upper-layer tty layer to signal that
1183  * incoming characters should be throttled.
1184  * ------------------------------------------------------------
1185  */
1186 static void rs_360_throttle(struct tty_struct * tty)
1187 {
1188         ser_info_t *info = (ser_info_t *)tty->driver_data;
1189 #ifdef SERIAL_DEBUG_THROTTLE
1190         char    buf[64];
1191         
1192         printk("throttle %s: %d....\n", _tty_name(tty, buf),
1193                tty->ldisc.chars_in_buffer(tty));
1194 #endif
1195
1196         if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1197                 return;
1198         
1199         if (I_IXOFF(tty))
1200                 rs_360_send_xchar(tty, STOP_CHAR(tty));
1201
1202 #ifdef modem_control
1203         if (tty->termios->c_cflag & CRTSCTS)
1204                 info->MCR &= ~UART_MCR_RTS;
1205
1206         local_irq_disable();
1207         serial_out(info, UART_MCR, info->MCR);
1208         local_irq_enable();
1209 #endif
1210 }
1211
1212 static void rs_360_unthrottle(struct tty_struct * tty)
1213 {
1214         ser_info_t *info = (ser_info_t *)tty->driver_data;
1215 #ifdef SERIAL_DEBUG_THROTTLE
1216         char    buf[64];
1217         
1218         printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1219                tty->ldisc.chars_in_buffer(tty));
1220 #endif
1221
1222         if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1223                 return;
1224         
1225         if (I_IXOFF(tty)) {
1226                 if (info->x_char)
1227                         info->x_char = 0;
1228                 else
1229                         rs_360_send_xchar(tty, START_CHAR(tty));
1230         }
1231 #ifdef modem_control
1232         if (tty->termios->c_cflag & CRTSCTS)
1233                 info->MCR |= UART_MCR_RTS;
1234         local_irq_disable();
1235         serial_out(info, UART_MCR, info->MCR);
1236         local_irq_enable();
1237 #endif
1238 }
1239
1240 /*
1241  * ------------------------------------------------------------
1242  * rs_ioctl() and friends
1243  * ------------------------------------------------------------
1244  */
1245
1246 #ifdef maybe
1247 /*
1248  * get_lsr_info - get line status register info
1249  *
1250  * Purpose: Let user call ioctl() to get info when the UART physically
1251  *          is emptied.  On bus types like RS485, the transmitter must
1252  *          release the bus after transmitting. This must be done when
1253  *          the transmit shift register is empty, not be done when the
1254  *          transmit holding register is empty.  This functionality
1255  *          allows an RS485 driver to be written in user space. 
1256  */
1257 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1258 {
1259         unsigned char status;
1260         unsigned int result;
1261
1262         local_irq_disable();
1263         status = serial_in(info, UART_LSR);
1264         local_irq_enable();
1265         result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1266         return put_user(result,value);
1267 }
1268 #endif
1269
1270 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1271 {
1272         ser_info_t *info = (ser_info_t *)tty->driver_data;
1273         unsigned int result = 0;
1274 #ifdef modem_control
1275         unsigned char control, status;
1276
1277         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1278                 return -ENODEV;
1279
1280         if (tty->flags & (1 << TTY_IO_ERROR))
1281                 return -EIO;
1282
1283         control = info->MCR;
1284         local_irq_disable();
1285         status = serial_in(info, UART_MSR);
1286         local_irq_enable();
1287         result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1288                 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1289 #ifdef TIOCM_OUT1
1290                 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1291                 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1292 #endif
1293                 | ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
1294                 | ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
1295                 | ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
1296                 | ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
1297 #endif
1298         return result;
1299 }
1300
1301 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1302                            unsigned int set, unsigned int clear)
1303 {
1304 #ifdef modem_control
1305         ser_info_t *info = (ser_info_t *)tty->driver_data;
1306         unsigned int arg;
1307
1308         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1309                 return -ENODEV;
1310
1311         if (tty->flags & (1 << TTY_IO_ERROR))
1312                 return -EIO;
1313
1314         if (set & TIOCM_RTS)
1315                 info->mcr |= UART_MCR_RTS;
1316         if (set & TIOCM_DTR)
1317                 info->mcr |= UART_MCR_DTR;
1318         if (clear & TIOCM_RTS)
1319                 info->MCR &= ~UART_MCR_RTS;
1320         if (clear & TIOCM_DTR)
1321                 info->MCR &= ~UART_MCR_DTR;
1322
1323 #ifdef TIOCM_OUT1
1324         if (set & TIOCM_OUT1)
1325                 info->MCR |= UART_MCR_OUT1;
1326         if (set & TIOCM_OUT2)
1327                 info->MCR |= UART_MCR_OUT2;
1328         if (clear & TIOCM_OUT1)
1329                 info->MCR &= ~UART_MCR_OUT1;
1330         if (clear & TIOCM_OUT2)
1331                 info->MCR &= ~UART_MCR_OUT2;
1332 #endif
1333
1334         local_irq_disable();
1335         serial_out(info, UART_MCR, info->MCR);
1336         local_irq_enable();
1337 #endif
1338         return 0;
1339 }
1340
1341 /* Sending a break is a two step process on the SMC/SCC.  It is accomplished
1342  * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1343  * command.  We take advantage of the begin/end functions to make this
1344  * happen.
1345  */
1346 static ushort   smc_chan_map[] = {
1347         CPM_CR_CH_SMC1,
1348         CPM_CR_CH_SMC2
1349 };
1350
1351 static ushort   scc_chan_map[] = {
1352         CPM_CR_CH_SCC1,
1353         CPM_CR_CH_SCC2,
1354         CPM_CR_CH_SCC3,
1355         CPM_CR_CH_SCC4
1356 };
1357
1358 static void begin_break(ser_info_t *info)
1359 {
1360         volatile QUICC *cp;
1361         ushort  chan;
1362         int     idx;
1363
1364         cp = pquicc;
1365
1366         idx = PORT_NUM(info->state->smc_scc_num);
1367         if (info->state->smc_scc_num & NUM_IS_SCC)
1368                 chan = scc_chan_map[idx];
1369         else
1370                 chan = smc_chan_map[idx];
1371
1372         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1373         while (cp->cp_cr & CPM_CR_FLG);
1374 }
1375
1376 static void end_break(ser_info_t *info)
1377 {
1378         volatile QUICC *cp;
1379         ushort  chan;
1380         int idx;
1381
1382         cp = pquicc;
1383
1384         idx = PORT_NUM(info->state->smc_scc_num);
1385         if (info->state->smc_scc_num & NUM_IS_SCC)
1386                 chan = scc_chan_map[idx];
1387         else
1388                 chan = smc_chan_map[idx];
1389
1390         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1391         while (cp->cp_cr & CPM_CR_FLG);
1392 }
1393
1394 /*
1395  * This routine sends a break character out the serial port.
1396  */
1397 static void send_break(ser_info_t *info, unsigned int duration)
1398 {
1399 #ifdef SERIAL_DEBUG_SEND_BREAK
1400         printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1401 #endif
1402         begin_break(info);
1403         msleep_interruptible(duration);
1404         end_break(info);
1405 #ifdef SERIAL_DEBUG_SEND_BREAK
1406         printk("done jiffies=%lu\n", jiffies);
1407 #endif
1408 }
1409
1410
1411 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1412                     unsigned int cmd, unsigned long arg)
1413 {
1414         int error;
1415         ser_info_t *info = (ser_info_t *)tty->driver_data;
1416         int retval;
1417         struct async_icount cnow; 
1418         /* struct async_icount_24 cnow;*/       /* kernel counter temps */
1419         struct serial_icounter_struct *p_cuser; /* user space */
1420
1421         if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1422                 return -ENODEV;
1423
1424         if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1425                 if (tty->flags & (1 << TTY_IO_ERROR))
1426                     return -EIO;
1427         }
1428         
1429         switch (cmd) {
1430                 case TCSBRK:    /* SVID version: non-zero arg --> no break */
1431                         retval = tty_check_change(tty);
1432                         if (retval)
1433                                 return retval;
1434                         tty_wait_until_sent(tty, 0);
1435                         if (signal_pending(current))
1436                                 return -EINTR;
1437                         if (!arg) {
1438                                 send_break(info, 250);  /* 1/4 second */
1439                                 if (signal_pending(current))
1440                                         return -EINTR;
1441                         }
1442                         return 0;
1443                 case TCSBRKP:   /* support for POSIX tcsendbreak() */
1444                         retval = tty_check_change(tty);
1445                         if (retval)
1446                                 return retval;
1447                         tty_wait_until_sent(tty, 0);
1448                         if (signal_pending(current))
1449                                 return -EINTR;
1450                         send_break(info, arg ? arg*100 : 250);
1451                         if (signal_pending(current))
1452                                 return -EINTR;
1453                         return 0;
1454                 case TIOCSBRK:
1455                         retval = tty_check_change(tty);
1456                         if (retval)
1457                                 return retval;
1458                         tty_wait_until_sent(tty, 0);
1459                         begin_break(info);
1460                         return 0;
1461                 case TIOCCBRK:
1462                         retval = tty_check_change(tty);
1463                         if (retval)
1464                                 return retval;
1465                         end_break(info);
1466                         return 0;
1467                 case TIOCGSOFTCAR:
1468                         /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1469                         put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1470                         return 0;
1471                 case TIOCSSOFTCAR:
1472                         error = get_user(arg, (unsigned int *) arg); 
1473                         if (error)
1474                                 return error;
1475                         tty->termios->c_cflag =
1476                                 ((tty->termios->c_cflag & ~CLOCAL) |
1477                                  (arg ? CLOCAL : 0));
1478                         return 0;
1479 #ifdef maybe
1480                 case TIOCSERGETLSR: /* Get line status register */
1481                         return get_lsr_info(info, (unsigned int *) arg);
1482 #endif
1483                 /*
1484                  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1485                  * - mask passed in arg for lines of interest
1486                  *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1487                  * Caller should use TIOCGICOUNT to see which one it was
1488                  */
1489                  case TIOCMIWAIT:
1490 #ifdef modem_control
1491                         local_irq_disable();
1492                         /* note the counters on entry */
1493                         cprev = info->state->icount;
1494                         local_irq_enable();
1495                         while (1) {
1496                                 interruptible_sleep_on(&info->delta_msr_wait);
1497                                 /* see if a signal did it */
1498                                 if (signal_pending(current))
1499                                         return -ERESTARTSYS;
1500                                 local_irq_disable();
1501                                 cnow = info->state->icount; /* atomic copy */
1502                                 local_irq_enable();
1503                                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
1504                                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1505                                         return -EIO; /* no change => error */
1506                                 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1507                                      ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1508                                      ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
1509                                      ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1510                                         return 0;
1511                                 }
1512                                 cprev = cnow;
1513                         }
1514                         /* NOTREACHED */
1515 #else
1516                         return 0;
1517 #endif
1518
1519                 /* 
1520                  * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1521                  * Return: write counters to the user passed counter struct
1522                  * NB: both 1->0 and 0->1 transitions are counted except for
1523                  *     RI where only 0->1 is counted.
1524                  */
1525                 case TIOCGICOUNT:
1526                         local_irq_disable();
1527                         cnow = info->state->icount;
1528                         local_irq_enable();
1529                         p_cuser = (struct serial_icounter_struct *) arg;
1530 /*                      error = put_user(cnow.cts, &p_cuser->cts); */
1531 /*                      if (error) return error; */
1532 /*                      error = put_user(cnow.dsr, &p_cuser->dsr); */
1533 /*                      if (error) return error; */
1534 /*                      error = put_user(cnow.rng, &p_cuser->rng); */
1535 /*                      if (error) return error; */
1536 /*                      error = put_user(cnow.dcd, &p_cuser->dcd); */
1537 /*                      if (error) return error; */
1538
1539                         put_user(cnow.cts, &p_cuser->cts);
1540                         put_user(cnow.dsr, &p_cuser->dsr);
1541                         put_user(cnow.rng, &p_cuser->rng);
1542                         put_user(cnow.dcd, &p_cuser->dcd);
1543                         return 0;
1544
1545                 default:
1546                         return -ENOIOCTLCMD;
1547                 }
1548         return 0;
1549 }
1550
1551 /* FIX UP modem control here someday......
1552 */
1553 static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
1554 {
1555         ser_info_t *info = (ser_info_t *)tty->driver_data;
1556
1557         if (   (tty->termios->c_cflag == old_termios->c_cflag)
1558             && (   RELEVANT_IFLAG(tty->termios->c_iflag) 
1559                 == RELEVANT_IFLAG(old_termios->c_iflag)))
1560           return;
1561
1562         change_speed(info);
1563
1564 #ifdef modem_control
1565         /* Handle transition to B0 status */
1566         if ((old_termios->c_cflag & CBAUD) &&
1567             !(tty->termios->c_cflag & CBAUD)) {
1568                 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1569                 local_irq_disable();
1570                 serial_out(info, UART_MCR, info->MCR);
1571                 local_irq_enable();
1572         }
1573         
1574         /* Handle transition away from B0 status */
1575         if (!(old_termios->c_cflag & CBAUD) &&
1576             (tty->termios->c_cflag & CBAUD)) {
1577                 info->MCR |= UART_MCR_DTR;
1578                 if (!tty->hw_stopped ||
1579                     !(tty->termios->c_cflag & CRTSCTS)) {
1580                         info->MCR |= UART_MCR_RTS;
1581                 }
1582                 local_irq_disable();
1583                 serial_out(info, UART_MCR, info->MCR);
1584                 local_irq_enable();
1585         }
1586         
1587         /* Handle turning off CRTSCTS */
1588         if ((old_termios->c_cflag & CRTSCTS) &&
1589             !(tty->termios->c_cflag & CRTSCTS)) {
1590                 tty->hw_stopped = 0;
1591                 rs_360_start(tty);
1592         }
1593 #endif
1594
1595 #if 0
1596         /*
1597          * No need to wake up processes in open wait, since they
1598          * sample the CLOCAL flag once, and don't recheck it.
1599          * XXX  It's not clear whether the current behavior is correct
1600          * or not.  Hence, this may change.....
1601          */
1602         if (!(old_termios->c_cflag & CLOCAL) &&
1603             (tty->termios->c_cflag & CLOCAL))
1604                 wake_up_interruptible(&info->open_wait);
1605 #endif
1606 }
1607
1608 /*
1609  * ------------------------------------------------------------
1610  * rs_close()
1611  * 
1612  * This routine is called when the serial port gets closed.  First, we
1613  * wait for the last remaining data to be sent.  Then, we unlink its
1614  * async structure from the interrupt chain if necessary, and we free
1615  * that IRQ if nothing is left in the chain.
1616  * ------------------------------------------------------------
1617  */
1618 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1619 {
1620         ser_info_t *info = (ser_info_t *)tty->driver_data;
1621         /* struct async_state *state; */
1622         struct serial_state *state;
1623         unsigned long   flags;
1624         int             idx;
1625         volatile struct smc_regs        *smcp;
1626         volatile struct scc_regs        *sccp;
1627
1628         if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1629                 return;
1630
1631         state = info->state;
1632         
1633         local_irq_save(flags);
1634         
1635         if (tty_hung_up_p(filp)) {
1636                 DBG_CNT("before DEC-hung");
1637                 local_irq_restore(flags);
1638                 return;
1639         }
1640         
1641 #ifdef SERIAL_DEBUG_OPEN
1642         printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1643 #endif
1644         if ((tty->count == 1) && (state->count != 1)) {
1645                 /*
1646                  * Uh, oh.  tty->count is 1, which means that the tty
1647                  * structure will be freed.  state->count should always
1648                  * be one in these conditions.  If it's greater than
1649                  * one, we've got real problems, since it means the
1650                  * serial port won't be shutdown.
1651                  */
1652                 printk("rs_close: bad serial port count; tty->count is 1, "
1653                        "state->count is %d\n", state->count);
1654                 state->count = 1;
1655         }
1656         if (--state->count < 0) {
1657                 printk("rs_close: bad serial port count for ttys%d: %d\n",
1658                        info->line, state->count);
1659                 state->count = 0;
1660         }
1661         if (state->count) {
1662                 DBG_CNT("before DEC-2");
1663                 local_irq_restore(flags);
1664                 return;
1665         }
1666         info->flags |= ASYNC_CLOSING;
1667         /*
1668          * Now we wait for the transmit buffer to clear; and we notify 
1669          * the line discipline to only process XON/XOFF characters.
1670          */
1671         tty->closing = 1;
1672         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1673                 tty_wait_until_sent(tty, info->closing_wait);
1674         /*
1675          * At this point we stop accepting input.  To do this, we
1676          * disable the receive line status interrupts, and tell the
1677          * interrupt driver to stop checking the data ready bit in the
1678          * line status register.
1679          */
1680         info->read_status_mask &= ~BD_SC_EMPTY;
1681         if (info->flags & ASYNC_INITIALIZED) {
1682
1683                 idx = PORT_NUM(info->state->smc_scc_num);
1684                 if (info->state->smc_scc_num & NUM_IS_SCC) {
1685                         sccp = &pquicc->scc_regs[idx];
1686                         sccp->scc_sccm &= ~UART_SCCM_RX;
1687                         sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1688                 } else {
1689                         smcp = &pquicc->smc_regs[idx];
1690                         smcp->smc_smcm &= ~SMCM_RX;
1691                         smcp->smc_smcmr &= ~SMCMR_REN;
1692                 }
1693                 /*
1694                  * Before we drop DTR, make sure the UART transmitter
1695                  * has completely drained; this is especially
1696                  * important if there is a transmit FIFO!
1697                  */
1698                 rs_360_wait_until_sent(tty, info->timeout);
1699         }
1700         shutdown(info);
1701         if (tty->driver->flush_buffer)
1702                 tty->driver->flush_buffer(tty);
1703         tty_ldisc_flush(tty);           
1704         tty->closing = 0;
1705         info->event = 0;
1706         info->tty = 0;
1707         if (info->blocked_open) {
1708                 if (info->close_delay) {
1709                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
1710                 }
1711                 wake_up_interruptible(&info->open_wait);
1712         }
1713         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1714         wake_up_interruptible(&info->close_wait);
1715         local_irq_restore(flags);
1716 }
1717
1718 /*
1719  * rs_wait_until_sent() --- wait until the transmitter is empty
1720  */
1721 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1722 {
1723         ser_info_t *info = (ser_info_t *)tty->driver_data;
1724         unsigned long orig_jiffies, char_time;
1725         /*int lsr;*/
1726         volatile QUICC_BD *bdp;
1727         
1728         if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1729                 return;
1730
1731 #ifdef maybe
1732         if (info->state->type == PORT_UNKNOWN)
1733                 return;
1734 #endif
1735
1736         orig_jiffies = jiffies;
1737         /*
1738          * Set the check interval to be 1/5 of the estimated time to
1739          * send a single character, and make it at least 1.  The check
1740          * interval should also be less than the timeout.
1741          * 
1742          * Note: we have to use pretty tight timings here to satisfy
1743          * the NIST-PCTS.
1744          */
1745         char_time = 1;
1746         if (timeout)
1747                 char_time = min(char_time, (unsigned long)timeout);
1748 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1749         printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1750         printk("jiff=%lu...", jiffies);
1751 #endif
1752
1753         /* We go through the loop at least once because we can't tell
1754          * exactly when the last character exits the shifter.  There can
1755          * be at least two characters waiting to be sent after the buffers
1756          * are empty.
1757          */
1758         do {
1759 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1760                 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1761 #endif
1762 /*              current->counter = 0;    make us low-priority */
1763                 msleep_interruptible(jiffies_to_msecs(char_time));
1764                 if (signal_pending(current))
1765                         break;
1766                 if (timeout && ((orig_jiffies + timeout) < jiffies))
1767                         break;
1768                 /* The 'tx_cur' is really the next buffer to send.  We
1769                  * have to back up to the previous BD and wait for it
1770                  * to go.  This isn't perfect, because all this indicates
1771                  * is the buffer is available.  There are still characters
1772                  * in the CPM FIFO.
1773                  */
1774                 bdp = info->tx_cur;
1775                 if (bdp == info->tx_bd_base)
1776                         bdp += (TX_NUM_FIFO-1);
1777                 else
1778                         bdp--;
1779         } while (bdp->status & BD_SC_READY);
1780         current->state = TASK_RUNNING;
1781 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1782         printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1783 #endif
1784 }
1785
1786 /*
1787  * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1788  */
1789 static void rs_360_hangup(struct tty_struct *tty)
1790 {
1791         ser_info_t *info = (ser_info_t *)tty->driver_data;
1792         struct serial_state *state = info->state;
1793         
1794         if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1795                 return;
1796
1797         state = info->state;
1798         
1799         rs_360_flush_buffer(tty);
1800         shutdown(info);
1801         info->event = 0;
1802         state->count = 0;
1803         info->flags &= ~ASYNC_NORMAL_ACTIVE;
1804         info->tty = 0;
1805         wake_up_interruptible(&info->open_wait);
1806 }
1807
1808 /*
1809  * ------------------------------------------------------------
1810  * rs_open() and friends
1811  * ------------------------------------------------------------
1812  */
1813 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1814                            ser_info_t *info)
1815 {
1816 #ifdef DO_THIS_LATER
1817         DECLARE_WAITQUEUE(wait, current);
1818 #endif
1819         struct serial_state *state = info->state;
1820         int             retval;
1821         int             do_clocal = 0;
1822
1823         /*
1824          * If the device is in the middle of being closed, then block
1825          * until it's done, and then try again.
1826          */
1827         if (tty_hung_up_p(filp) ||
1828             (info->flags & ASYNC_CLOSING)) {
1829                 if (info->flags & ASYNC_CLOSING)
1830                         interruptible_sleep_on(&info->close_wait);
1831 #ifdef SERIAL_DO_RESTART
1832                 if (info->flags & ASYNC_HUP_NOTIFY)
1833                         return -EAGAIN;
1834                 else
1835                         return -ERESTARTSYS;
1836 #else
1837                 return -EAGAIN;
1838 #endif
1839         }
1840
1841         /*
1842          * If non-blocking mode is set, or the port is not enabled,
1843          * then make the check up front and then exit.
1844          * If this is an SMC port, we don't have modem control to wait
1845          * for, so just get out here.
1846          */
1847         if ((filp->f_flags & O_NONBLOCK) ||
1848             (tty->flags & (1 << TTY_IO_ERROR)) ||
1849             !(info->state->smc_scc_num & NUM_IS_SCC)) {
1850                 info->flags |= ASYNC_NORMAL_ACTIVE;
1851                 return 0;
1852         }
1853
1854         if (tty->termios->c_cflag & CLOCAL)
1855                 do_clocal = 1;
1856         
1857         /*
1858          * Block waiting for the carrier detect and the line to become
1859          * free (i.e., not in use by the callout).  While we are in
1860          * this loop, state->count is dropped by one, so that
1861          * rs_close() knows when to free things.  We restore it upon
1862          * exit, either normal or abnormal.
1863          */
1864         retval = 0;
1865 #ifdef DO_THIS_LATER
1866         add_wait_queue(&info->open_wait, &wait);
1867 #ifdef SERIAL_DEBUG_OPEN
1868         printk("block_til_ready before block: ttys%d, count = %d\n",
1869                state->line, state->count);
1870 #endif
1871         local_irq_disable();
1872         if (!tty_hung_up_p(filp)) 
1873                 state->count--;
1874         local_irq_enable();
1875         info->blocked_open++;
1876         while (1) {
1877                 local_irq_disable();
1878                 if (tty->termios->c_cflag & CBAUD)
1879                         serial_out(info, UART_MCR,
1880                                    serial_inp(info, UART_MCR) |
1881                                    (UART_MCR_DTR | UART_MCR_RTS));
1882                 local_irq_enable();
1883                 set_current_state(TASK_INTERRUPTIBLE);
1884                 if (tty_hung_up_p(filp) ||
1885                     !(info->flags & ASYNC_INITIALIZED)) {
1886 #ifdef SERIAL_DO_RESTART
1887                         if (info->flags & ASYNC_HUP_NOTIFY)
1888                                 retval = -EAGAIN;
1889                         else
1890                                 retval = -ERESTARTSYS;  
1891 #else
1892                         retval = -EAGAIN;
1893 #endif
1894                         break;
1895                 }
1896                 if (!(info->flags & ASYNC_CLOSING) &&
1897                     (do_clocal || (serial_in(info, UART_MSR) &
1898                                    UART_MSR_DCD)))
1899                         break;
1900                 if (signal_pending(current)) {
1901                         retval = -ERESTARTSYS;
1902                         break;
1903                 }
1904 #ifdef SERIAL_DEBUG_OPEN
1905                 printk("block_til_ready blocking: ttys%d, count = %d\n",
1906                        info->line, state->count);
1907 #endif
1908                 schedule();
1909         }
1910         current->state = TASK_RUNNING;
1911         remove_wait_queue(&info->open_wait, &wait);
1912         if (!tty_hung_up_p(filp))
1913                 state->count++;
1914         info->blocked_open--;
1915 #ifdef SERIAL_DEBUG_OPEN
1916         printk("block_til_ready after blocking: ttys%d, count = %d\n",
1917                info->line, state->count);
1918 #endif
1919 #endif /* DO_THIS_LATER */
1920         if (retval)
1921                 return retval;
1922         info->flags |= ASYNC_NORMAL_ACTIVE;
1923         return 0;
1924 }
1925
1926 static int get_async_struct(int line, ser_info_t **ret_info)
1927 {
1928         struct serial_state *sstate;
1929
1930         sstate = rs_table + line;
1931         if (sstate->info) {
1932                 sstate->count++;
1933                 *ret_info = (ser_info_t *)sstate->info;
1934                 return 0;
1935         }
1936         else {
1937                 return -ENOMEM;
1938         }
1939 }
1940
1941 /*
1942  * This routine is called whenever a serial port is opened.  It
1943  * enables interrupts for a serial port, linking in its async structure into
1944  * the IRQ chain.   It also performs the serial-specific
1945  * initialization for the tty structure.
1946  */
1947 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1948 {
1949         ser_info_t      *info;
1950         int             retval, line;
1951
1952         line = tty->index;
1953         if ((line < 0) || (line >= NR_PORTS))
1954                 return -ENODEV;
1955         retval = get_async_struct(line, &info);
1956         if (retval)
1957                 return retval;
1958         if (serial_paranoia_check(info, tty->name, "rs_open"))
1959                 return -ENODEV;
1960
1961 #ifdef SERIAL_DEBUG_OPEN
1962         printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1963 #endif
1964         tty->driver_data = info;
1965         info->tty = tty;
1966
1967         /*
1968          * Start up serial port
1969          */
1970         retval = startup(info);
1971         if (retval)
1972                 return retval;
1973
1974         retval = block_til_ready(tty, filp, info);
1975         if (retval) {
1976 #ifdef SERIAL_DEBUG_OPEN
1977                 printk("rs_open returning after block_til_ready with %d\n",
1978                        retval);
1979 #endif
1980                 return retval;
1981         }
1982
1983 #ifdef SERIAL_DEBUG_OPEN
1984         printk("rs_open %s successful...", tty->name);
1985 #endif
1986         return 0;
1987 }
1988
1989 /*
1990  * /proc fs routines....
1991  */
1992
1993 static inline int line_info(char *buf, struct serial_state *state)
1994 {
1995 #ifdef notdef
1996         struct async_struct *info = state->info, scr_info;
1997         char    stat_buf[30], control, status;
1998 #endif
1999         int     ret;
2000
2001         ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
2002                       state->line,
2003                       (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
2004                       (unsigned int)(state->port), state->irq);
2005
2006         if (!state->port || (state->type == PORT_UNKNOWN)) {
2007                 ret += sprintf(buf+ret, "\n");
2008                 return ret;
2009         }
2010
2011 #ifdef notdef
2012         /*
2013          * Figure out the current RS-232 lines
2014          */
2015         if (!info) {
2016                 info = &scr_info;       /* This is just for serial_{in,out} */
2017
2018                 info->magic = SERIAL_MAGIC;
2019                 info->port = state->port;
2020                 info->flags = state->flags;
2021                 info->quot = 0;
2022                 info->tty = 0;
2023         }
2024         local_irq_disable();
2025         status = serial_in(info, UART_MSR);
2026         control = info ? info->MCR : serial_in(info, UART_MCR);
2027         local_irq_enable();
2028         
2029         stat_buf[0] = 0;
2030         stat_buf[1] = 0;
2031         if (control & UART_MCR_RTS)
2032                 strcat(stat_buf, "|RTS");
2033         if (status & UART_MSR_CTS)
2034                 strcat(stat_buf, "|CTS");
2035         if (control & UART_MCR_DTR)
2036                 strcat(stat_buf, "|DTR");
2037         if (status & UART_MSR_DSR)
2038                 strcat(stat_buf, "|DSR");
2039         if (status & UART_MSR_DCD)
2040                 strcat(stat_buf, "|CD");
2041         if (status & UART_MSR_RI)
2042                 strcat(stat_buf, "|RI");
2043
2044         if (info->quot) {
2045                 ret += sprintf(buf+ret, " baud:%d",
2046                                state->baud_base / info->quot);
2047         }
2048
2049         ret += sprintf(buf+ret, " tx:%d rx:%d",
2050                       state->icount.tx, state->icount.rx);
2051
2052         if (state->icount.frame)
2053                 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2054         
2055         if (state->icount.parity)
2056                 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2057         
2058         if (state->icount.brk)
2059                 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);  
2060
2061         if (state->icount.overrun)
2062                 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2063
2064         /*
2065          * Last thing is the RS-232 status lines
2066          */
2067         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2068 #endif
2069         return ret;
2070 }
2071
2072 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2073                  int *eof, void *data)
2074 {
2075         int i, len = 0;
2076         off_t   begin = 0;
2077
2078         len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2079         for (i = 0; i < NR_PORTS && len < 4000; i++) {
2080                 len += line_info(page + len, &rs_table[i]);
2081                 if (len+begin > off+count)
2082                         goto done;
2083                 if (len+begin < off) {
2084                         begin += len;
2085                         len = 0;
2086                 }
2087         }
2088         *eof = 1;
2089 done:
2090         if (off >= len+begin)
2091                 return 0;
2092         *start = page + (begin-off);
2093         return ((count < begin+len-off) ? count : begin+len-off);
2094 }
2095
2096 /*
2097  * ---------------------------------------------------------------------
2098  * rs_init() and friends
2099  *
2100  * rs_init() is called at boot-time to initialize the serial driver.
2101  * ---------------------------------------------------------------------
2102  */
2103
2104 /*
2105  * This routine prints out the appropriate serial driver version
2106  * number, and identifies which options were configured into this
2107  * driver.
2108  */
2109 static _INLINE_ void show_serial_version(void)
2110 {
2111         printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2112 }
2113
2114
2115 /*
2116  * The serial console driver used during boot.  Note that these names
2117  * clash with those found in "serial.c", so we currently can't support
2118  * the 16xxx uarts and these at the same time.  I will fix this to become
2119  * an indirect function call from tty_io.c (or something).
2120  */
2121
2122 #ifdef CONFIG_SERIAL_CONSOLE
2123
2124 /*
2125  * Print a string to the serial port trying not to disturb any possible
2126  * real use of the port...
2127  */
2128 static void my_console_write(int idx, const char *s,
2129                                 unsigned count)
2130 {
2131         struct          serial_state    *ser;
2132         ser_info_t              *info;
2133         unsigned                i;
2134         QUICC_BD                *bdp, *bdbase;
2135         volatile struct smc_uart_pram   *up;
2136         volatile        u_char          *cp;
2137
2138         ser = rs_table + idx;
2139
2140
2141         /* If the port has been initialized for general use, we have
2142          * to use the buffer descriptors allocated there.  Otherwise,
2143          * we simply use the single buffer allocated.
2144          */
2145         if ((info = (ser_info_t *)ser->info) != NULL) {
2146                 bdp = info->tx_cur;
2147                 bdbase = info->tx_bd_base;
2148         }
2149         else {
2150                 /* Pointer to UART in parameter ram.
2151                 */
2152                 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2153                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2154
2155                 /* Get the address of the host memory buffer.
2156                  */
2157                 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2158         }
2159
2160         /*
2161          * We need to gracefully shut down the transmitter, disable
2162          * interrupts, then send our bytes out.
2163          */
2164
2165         /*
2166          * Now, do each character.  This is not as bad as it looks
2167          * since this is a holding FIFO and not a transmitting FIFO.
2168          * We could add the complexity of filling the entire transmit
2169          * buffer, but we would just wait longer between accesses......
2170          */
2171         for (i = 0; i < count; i++, s++) {
2172                 /* Wait for transmitter fifo to empty.
2173                  * Ready indicates output is ready, and xmt is doing
2174                  * that, not that it is ready for us to send.
2175                  */
2176                 while (bdp->status & BD_SC_READY);
2177
2178                 /* Send the character out.
2179                  */
2180                 cp = bdp->buf;
2181                 *cp = *s;
2182                 
2183                 bdp->length = 1;
2184                 bdp->status |= BD_SC_READY;
2185
2186                 if (bdp->status & BD_SC_WRAP)
2187                         bdp = bdbase;
2188                 else
2189                         bdp++;
2190
2191                 /* if a LF, also do CR... */
2192                 if (*s == 10) {
2193                         while (bdp->status & BD_SC_READY);
2194                         /* cp = __va(bdp->buf); */
2195                         cp = bdp->buf;
2196                         *cp = 13;
2197                         bdp->length = 1;
2198                         bdp->status |= BD_SC_READY;
2199
2200                         if (bdp->status & BD_SC_WRAP) {
2201                                 bdp = bdbase;
2202                         }
2203                         else {
2204                                 bdp++;
2205                         }
2206                 }
2207         }
2208
2209         /*
2210          * Finally, Wait for transmitter & holding register to empty
2211          *  and restore the IER
2212          */
2213         while (bdp->status & BD_SC_READY);
2214
2215         if (info)
2216                 info->tx_cur = (QUICC_BD *)bdp;
2217 }
2218
2219 static void serial_console_write(struct console *c, const char *s,
2220                                 unsigned count)
2221 {
2222 #ifdef CONFIG_KGDB
2223         /* Try to let stub handle output. Returns true if it did. */ 
2224         if (kgdb_output_string(s, count))
2225                 return;
2226 #endif
2227         my_console_write(c->index, s, count);
2228 }
2229
2230
2231
2232 /*void console_print_68360(const char *p)
2233 {
2234         const char *cp = p;
2235         int i;
2236
2237         for (i=0;cp[i]!=0;i++);
2238
2239         serial_console_write (p, i);
2240
2241         //Comment this if you want to have a strict interrupt-driven output
2242         //rs_fair_output();
2243
2244         return;
2245 }*/
2246
2247
2248
2249
2250
2251
2252 #ifdef CONFIG_XMON
2253 int
2254 xmon_360_write(const char *s, unsigned count)
2255 {
2256         my_console_write(0, s, count);
2257         return(count);
2258 }
2259 #endif
2260
2261 #ifdef CONFIG_KGDB
2262 void
2263 putDebugChar(char ch)
2264 {
2265         my_console_write(0, &ch, 1);
2266 }
2267 #endif
2268
2269 /*
2270  * Receive character from the serial port.  This only works well
2271  * before the port is initialized for real use.
2272  */
2273 static int my_console_wait_key(int idx, int xmon, char *obuf)
2274 {
2275         struct serial_state             *ser;
2276         u_char                  c, *cp;
2277         ser_info_t              *info;
2278         QUICC_BD                *bdp;
2279         volatile struct smc_uart_pram   *up;
2280         int                             i;
2281
2282         ser = rs_table + idx;
2283
2284         /* Get the address of the host memory buffer.
2285          * If the port has been initialized for general use, we must
2286          * use information from the port structure.
2287          */
2288         if ((info = (ser_info_t *)ser->info))
2289                 bdp = info->rx_cur;
2290         else
2291                 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2292                 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2293
2294         /* Pointer to UART in parameter ram.
2295          */
2296         /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2297         up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2298
2299         /*
2300          * We need to gracefully shut down the receiver, disable
2301          * interrupts, then read the input.
2302          * XMON just wants a poll.  If no character, return -1, else
2303          * return the character.
2304          */
2305         if (!xmon) {
2306                 while (bdp->status & BD_SC_EMPTY);
2307         }
2308         else {
2309                 if (bdp->status & BD_SC_EMPTY)
2310                         return -1;
2311         }
2312
2313         cp = (char *)bdp->buf;
2314
2315         if (obuf) {
2316                 i = c = bdp->length;
2317                 while (i-- > 0)
2318                         *obuf++ = *cp++;
2319         }
2320         else {
2321                 c = *cp;
2322         }
2323         bdp->status |= BD_SC_EMPTY;
2324
2325         if (info) {
2326                 if (bdp->status & BD_SC_WRAP) {
2327                         bdp = info->rx_bd_base;
2328                 }
2329                 else {
2330                         bdp++;
2331                 }
2332                 info->rx_cur = (QUICC_BD *)bdp;
2333         }
2334
2335         return((int)c);
2336 }
2337
2338 static int serial_console_wait_key(struct console *co)
2339 {
2340         return(my_console_wait_key(co->index, 0, NULL));
2341 }
2342
2343 #ifdef CONFIG_XMON
2344 int
2345 xmon_360_read_poll(void)
2346 {
2347         return(my_console_wait_key(0, 1, NULL));
2348 }
2349
2350 int
2351 xmon_360_read_char(void)
2352 {
2353         return(my_console_wait_key(0, 0, NULL));
2354 }
2355 #endif
2356
2357 #ifdef CONFIG_KGDB
2358 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2359 static int kgdb_chars;
2360
2361 unsigned char
2362 getDebugChar(void)
2363 {
2364         if (kgdb_chars <= 0) {
2365                 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2366                 kgdp = kgdb_buf;
2367         }
2368         kgdb_chars--;
2369
2370         return(*kgdp++);
2371 }
2372
2373 void kgdb_interruptible(int state)
2374 {
2375 }
2376 void kgdb_map_scc(void)
2377 {
2378         struct          serial_state *ser;
2379         uint            mem_addr;
2380         volatile        QUICC_BD                *bdp;
2381         volatile        smc_uart_t      *up;
2382
2383         cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2384
2385         /* To avoid data cache CPM DMA coherency problems, allocate a
2386          * buffer in the CPM DPRAM.  This will work until the CPM and
2387          * serial ports are initialized.  At that time a memory buffer
2388          * will be allocated.
2389          * The port is already initialized from the boot procedure, all
2390          * we do here is give it a different buffer and make it a FIFO.
2391          */
2392
2393         ser = rs_table;
2394
2395         /* Right now, assume we are using SMCs.
2396         */
2397         up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2398
2399         /* Allocate space for an input FIFO, plus a few bytes for output.
2400          * Allocate bytes to maintain word alignment.
2401          */
2402         mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2403
2404         /* Set the physical address of the host memory buffers in
2405          * the buffer descriptors.
2406          */
2407         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2408         bdp->buf = mem_addr;
2409
2410         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2411         bdp->buf = mem_addr+RX_BUF_SIZE;
2412
2413         up->smc_mrblr = RX_BUF_SIZE;            /* receive buffer length */
2414         up->smc_maxidl = RX_BUF_SIZE;
2415 }
2416 #endif
2417
2418 static struct tty_struct *serial_console_device(struct console *c, int *index)
2419 {
2420         *index = c->index;
2421         return serial_driver;
2422 }
2423
2424
2425 struct console sercons = {
2426         .name           = "ttyS",
2427         .write          = serial_console_write,
2428         .device         = serial_console_device,
2429         .wait_key       = serial_console_wait_key,
2430         .setup          = serial_console_setup,
2431         .flags          = CON_PRINTBUFFER,
2432         .index          = CONFIG_SERIAL_CONSOLE_PORT, 
2433 };
2434
2435
2436
2437 /*
2438  *      Register console.
2439  */
2440 long console_360_init(long kmem_start, long kmem_end)
2441 {
2442         register_console(&sercons);
2443         /*register_console (console_print_68360); - 2.0.38 only required a write
2444       function pointer. */
2445         return kmem_start;
2446 }
2447
2448 #endif
2449
2450 /* Index in baud rate table of the default console baud rate.
2451 */
2452 static  int     baud_idx;
2453
2454 static struct tty_operations rs_360_ops = {
2455         .owner = THIS_MODULE,
2456         .open = rs_360_open,
2457         .close = rs_360_close,
2458         .write = rs_360_write,
2459         .put_char = rs_360_put_char,
2460         .write_room = rs_360_write_room,
2461         .chars_in_buffer = rs_360_chars_in_buffer,
2462         .flush_buffer = rs_360_flush_buffer,
2463         .ioctl = rs_360_ioctl,
2464         .throttle = rs_360_throttle,
2465         .unthrottle = rs_360_unthrottle,
2466         /* .send_xchar = rs_360_send_xchar, */
2467         .set_termios = rs_360_set_termios,
2468         .stop = rs_360_stop,
2469         .start = rs_360_start,
2470         .hangup = rs_360_hangup,
2471         /* .wait_until_sent = rs_360_wait_until_sent, */
2472         /* .read_proc = rs_360_read_proc, */
2473         .tiocmget = rs_360_tiocmget,
2474         .tiocmset = rs_360_tiocmset,
2475 };
2476
2477 static int __init rs_360_init(void)
2478 {
2479         struct serial_state * state;
2480         ser_info_t      *info;
2481         void       *mem_addr;
2482         uint            dp_addr, iobits;
2483         int                 i, j, idx;
2484         ushort          chan;
2485         QUICC_BD        *bdp;
2486         volatile        QUICC           *cp;
2487         volatile        struct smc_regs *sp;
2488         volatile        struct smc_uart_pram    *up;
2489         volatile        struct scc_regs *scp;
2490         volatile        struct uart_pram        *sup;
2491         /* volatile     immap_t         *immap; */
2492         
2493         serial_driver = alloc_tty_driver(NR_PORTS);
2494         if (!serial_driver)
2495                 return -1;
2496
2497         show_serial_version();
2498
2499         serial_driver->name = "ttyS";
2500         serial_driver->major = TTY_MAJOR;
2501         serial_driver->minor_start = 64;
2502         serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2503         serial_driver->subtype = SERIAL_TYPE_NORMAL;
2504         serial_driver->init_termios = tty_std_termios;
2505         serial_driver->init_termios.c_cflag =
2506                 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2507         serial_driver->flags = TTY_DRIVER_REAL_RAW;
2508         tty_set_operations(serial_driver, &rs_360_ops);
2509         
2510         if (tty_register_driver(serial_driver))
2511                 panic("Couldn't register serial driver\n");
2512
2513         cp = pquicc;    /* Get pointer to Communication Processor */
2514         /* immap = (immap_t *)IMAP_ADDR; */     /* and to internal registers */
2515
2516
2517         /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2518          */
2519         /* The "standard" configuration through the 860.
2520         */
2521 /*      immap->im_ioport.iop_papar |= 0x00fc; */
2522 /*      immap->im_ioport.iop_padir &= ~0x00fc; */
2523 /*      immap->im_ioport.iop_paodr &= ~0x00fc; */
2524         cp->pio_papar |= 0x00fc;
2525         cp->pio_padir &= ~0x00fc;
2526         /* cp->pio_paodr &= ~0x00fc; */
2527
2528
2529         /* Since we don't yet do modem control, connect the port C pins
2530          * as general purpose I/O.  This will assert CTS and CD for the
2531          * SCC ports.
2532          */
2533         /* FIXME: see 360um p.7-365 and 860um p.34-12 
2534          * I can't make sense of these bits - mleslie*/
2535 /*      immap->im_ioport.iop_pcdir |= 0x03c6; */
2536 /*      immap->im_ioport.iop_pcpar &= ~0x03c6; */
2537
2538 /*      cp->pio_pcdir |= 0x03c6; */
2539 /*      cp->pio_pcpar &= ~0x03c6; */
2540
2541
2542
2543         /* Connect SCC2 and SCC3 to NMSI.  Connect BRG3 to SCC2 and
2544          * BRG4 to SCC3.
2545          */
2546         cp->si_sicr &= ~0x00ffff00;
2547         cp->si_sicr |=  0x001b1200;
2548
2549 #ifdef CONFIG_PP04
2550         /* Frequentis PP04 forced to RS-232 until we know better.
2551          * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2552          */
2553         immap->im_ioport.iop_pcdir |= 0x000c;
2554         immap->im_ioport.iop_pcpar &= ~0x000c;
2555         immap->im_ioport.iop_pcdat &= ~0x000c;
2556
2557         /* This enables the TX driver.
2558         */
2559         cp->cp_pbpar &= ~0x6000;
2560         cp->cp_pbdat &= ~0x6000;
2561 #endif
2562
2563         for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2564                 state->magic = SSTATE_MAGIC;
2565                 state->line = i;
2566                 state->type = PORT_UNKNOWN;
2567                 state->custom_divisor = 0;
2568                 state->close_delay = 5*HZ/10;
2569                 state->closing_wait = 30*HZ;
2570                 state->icount.cts = state->icount.dsr = 
2571                         state->icount.rng = state->icount.dcd = 0;
2572                 state->icount.rx = state->icount.tx = 0;
2573                 state->icount.frame = state->icount.parity = 0;
2574                 state->icount.overrun = state->icount.brk = 0;
2575                 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2576                        i, (unsigned int)(state->irq),
2577                        (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2578
2579 #ifdef CONFIG_SERIAL_CONSOLE
2580                 /* If we just printed the message on the console port, and
2581                  * we are about to initialize it for general use, we have
2582                  * to wait a couple of character times for the CR/NL to
2583                  * make it out of the transmit buffer.
2584                  */
2585                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2586                         mdelay(8);
2587
2588
2589 /*              idx = PORT_NUM(info->state->smc_scc_num); */
2590 /*              if (info->state->smc_scc_num & NUM_IS_SCC) */
2591 /*                      chan = scc_chan_map[idx]; */
2592 /*              else */
2593 /*                      chan = smc_chan_map[idx]; */
2594
2595 /*              cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2596 /*              while (cp->cp_cr & CPM_CR_FLG); */
2597
2598 #endif
2599                 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2600                 info = &quicc_ser_info[i];
2601                 if (info) {
2602                         memset (info, 0, sizeof(ser_info_t));
2603                         info->magic = SERIAL_MAGIC;
2604                         info->line = i;
2605                         info->flags = state->flags;
2606                         INIT_WORK(&info->tqueue, do_softint, info);
2607                         INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2608                         init_waitqueue_head(&info->open_wait);
2609                         init_waitqueue_head(&info->close_wait);
2610                         info->state = state;
2611                         state->info = (struct async_struct *)info;
2612
2613                         /* We need to allocate a transmit and receive buffer
2614                          * descriptors from dual port ram, and a character
2615                          * buffer area from host mem.
2616                          */
2617                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2618
2619                         /* Allocate space for FIFOs in the host memory.
2620                          *  (for now this is from a static array of buffers :(
2621                          */
2622                         /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2623                         /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2624                         mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2625
2626                         /* Set the physical address of the host memory
2627                          * buffers in the buffer descriptors, and the
2628                          * virtual address for us to work with.
2629                          */
2630                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2631                         info->rx_cur = info->rx_bd_base = bdp;
2632
2633                         /* initialize rx buffer descriptors */
2634                         for (j=0; j<(RX_NUM_FIFO-1); j++) {
2635                                 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2636                                 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2637                                 mem_addr += RX_BUF_SIZE;
2638                                 bdp++;
2639                         }
2640                         bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2641                         bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2642
2643
2644                         idx = PORT_NUM(info->state->smc_scc_num);
2645                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2646
2647 #if defined (CONFIG_UCQUICC) && 1
2648                                 /* set the transceiver mode to RS232 */
2649                                 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2650                                 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2651                                 *(uint *)_periph_base = sipex_mode_bits;
2652                                 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2653 #endif
2654                         }
2655
2656                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2657
2658                         /* Allocate space for FIFOs in the host memory.
2659                         */
2660                         /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2661                         /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2662                         mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2663
2664                         /* Set the physical address of the host memory
2665                          * buffers in the buffer descriptors, and the
2666                          * virtual address for us to work with.
2667                          */
2668                         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2669                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2670                         info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2671
2672                         /* initialize tx buffer descriptors */
2673                         for (j=0; j<(TX_NUM_FIFO-1); j++) {
2674                                 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2675                                 bdp->status = BD_SC_INTRPT;
2676                                 mem_addr += TX_BUF_SIZE;
2677                                 bdp++;
2678                         }
2679                         bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2680                         bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2681
2682                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2683                                 scp = &pquicc->scc_regs[idx];
2684                                 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2685                                 sup->rbase = dp_addr;
2686                                 sup->tbase = dp_addr;
2687
2688                                 /* Set up the uart parameters in the
2689                                  * parameter ram.
2690                                  */
2691                                 sup->rfcr = SMC_EB;
2692                                 sup->tfcr = SMC_EB;
2693
2694                                 /* Set this to 1 for now, so we get single
2695                                  * character interrupts.  Using idle charater
2696                                  * time requires some additional tuning.
2697                                  */
2698                                 sup->mrblr = 1;
2699                                 sup->max_idl = 0;
2700                                 sup->brkcr = 1;
2701                                 sup->parec = 0;
2702                                 sup->frmer = 0;
2703                                 sup->nosec = 0;
2704                                 sup->brkec = 0;
2705                                 sup->uaddr1 = 0;
2706                                 sup->uaddr2 = 0;
2707                                 sup->toseq = 0;
2708                                 {
2709                                         int i;
2710                                         for (i=0;i<8;i++)
2711                                                 sup->cc[i] = 0x8000;
2712                                 }
2713                                 sup->rccm = 0xc0ff;
2714
2715                                 /* Send the CPM an initialize command.
2716                                 */
2717                                 chan = scc_chan_map[idx];
2718
2719                                 /* execute the INIT RX & TX PARAMS command for this channel. */
2720                                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2721                                 while (cp->cp_cr & CPM_CR_FLG);
2722
2723                                 /* Set UART mode, 8 bit, no parity, one stop.
2724                                  * Enable receive and transmit.
2725                                  */
2726                                 scp->scc_gsmr.w.high = 0;
2727                                 scp->scc_gsmr.w.low = 
2728                                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2729
2730                                 /* Disable all interrupts and clear all pending
2731                                  * events.
2732                                  */
2733                                 scp->scc_sccm = 0;
2734                                 scp->scc_scce = 0xffff;
2735                                 scp->scc_dsr = 0x7e7e;
2736                                 scp->scc_psmr = 0x3000;
2737
2738                                 /* If the port is the console, enable Rx and Tx.
2739                                 */
2740 #ifdef CONFIG_SERIAL_CONSOLE
2741                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2742                                         scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2743 #endif
2744                         }
2745                         else {
2746                                 /* Configure SMCs Tx/Rx instead of port B
2747                                  * parallel I/O.
2748                                  */
2749                                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2750                                 up->rbase = dp_addr;
2751
2752                                 iobits = 0xc0 << (idx * 4);
2753                                 cp->pip_pbpar |= iobits;
2754                                 cp->pip_pbdir &= ~iobits;
2755                                 cp->pip_pbodr &= ~iobits;
2756
2757
2758                                 /* Connect the baud rate generator to the
2759                                  * SMC based upon index in rs_table.  Also
2760                                  * make sure it is connected to NMSI.
2761                                  */
2762                                 cp->si_simode &= ~(0xffff << (idx * 16));
2763                                 cp->si_simode |= (i << ((idx * 16) + 12));
2764
2765                                 up->tbase = dp_addr;
2766
2767                                 /* Set up the uart parameters in the
2768                                  * parameter ram.
2769                                  */
2770                                 up->rfcr = SMC_EB;
2771                                 up->tfcr = SMC_EB;
2772
2773                                 /* Set this to 1 for now, so we get single
2774                                  * character interrupts.  Using idle charater
2775                                  * time requires some additional tuning.
2776                                  */
2777                                 up->mrblr = 1;
2778                                 up->max_idl = 0;
2779                                 up->brkcr = 1;
2780
2781                                 /* Send the CPM an initialize command.
2782                                 */
2783                                 chan = smc_chan_map[idx];
2784
2785                                 cp->cp_cr = mk_cr_cmd(chan,
2786                                                                           CPM_CR_INIT_TRX) | CPM_CR_FLG;
2787 #ifdef CONFIG_SERIAL_CONSOLE
2788                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2789                                         printk("");
2790 #endif
2791                                 while (cp->cp_cr & CPM_CR_FLG);
2792
2793                                 /* Set UART mode, 8 bit, no parity, one stop.
2794                                  * Enable receive and transmit.
2795                                  */
2796                                 sp = &cp->smc_regs[idx];
2797                                 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2798
2799                                 /* Disable all interrupts and clear all pending
2800                                  * events.
2801                                  */
2802                                 sp->smc_smcm = 0;
2803                                 sp->smc_smce = 0xff;
2804
2805                                 /* If the port is the console, enable Rx and Tx.
2806                                 */
2807 #ifdef CONFIG_SERIAL_CONSOLE
2808                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2809                                         sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2810 #endif
2811                         }
2812
2813                         /* Install interrupt handler.
2814                         */
2815                         /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info);  */
2816                         /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2817                         request_irq(state->irq, rs_360_interrupt,
2818                                                 IRQ_FLG_LOCK, "ttyS", (void *)info);
2819
2820                         /* Set up the baud rate generator.
2821                         */
2822                         m360_cpm_setbrg(i, baud_table[baud_idx]);
2823
2824                 }
2825         }
2826
2827         return 0;
2828 }
2829 module_init(rs_360_init);
2830
2831 /* This must always be called before the rs_360_init() function, otherwise
2832  * it blows away the port control information.
2833  */
2834 //static int __init serial_console_setup( struct console *co, char *options)
2835 int serial_console_setup( struct console *co, char *options)
2836 {
2837         struct          serial_state    *ser;
2838         uint            mem_addr, dp_addr, bidx, idx, iobits;
2839         ushort          chan;
2840         QUICC_BD        *bdp;
2841         volatile        QUICC                   *cp;
2842         volatile        struct smc_regs *sp;
2843         volatile        struct scc_regs *scp;
2844         volatile        struct smc_uart_pram    *up;
2845         volatile        struct uart_pram                *sup;
2846
2847 /* mleslie TODO:
2848  * add something to the 68k bootloader to store a desired initial console baud rate */
2849
2850 /*      bd_t                                            *bd; */ /* a board info struct used by EPPC-bug */
2851 /*      bd = (bd_t *)__res; */
2852
2853         for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2854          /* if (bd->bi_baudrate == baud_table[bidx]) */
2855                 if (CONSOLE_BAUDRATE == baud_table[bidx])
2856                         break;
2857
2858         /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2859         baud_idx = bidx;
2860
2861         ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2862
2863         cp = pquicc;    /* Get pointer to Communication Processor */
2864
2865         idx = PORT_NUM(ser->smc_scc_num);
2866         if (ser->smc_scc_num & NUM_IS_SCC) {
2867
2868                 /* TODO: need to set up SCC pin assignment etc. here */
2869                 
2870         }
2871         else {
2872                 iobits = 0xc0 << (idx * 4);
2873                 cp->pip_pbpar |= iobits;
2874                 cp->pip_pbdir &= ~iobits;
2875                 cp->pip_pbodr &= ~iobits;
2876
2877                 /* Connect the baud rate generator to the
2878                  * SMC based upon index in rs_table.  Also
2879                  * make sure it is connected to NMSI.
2880                  */
2881                 cp->si_simode &= ~(0xffff << (idx * 16));
2882                 cp->si_simode |= (idx << ((idx * 16) + 12));
2883         }
2884
2885         /* When we get here, the CPM has been reset, so we need
2886          * to configure the port.
2887          * We need to allocate a transmit and receive buffer descriptor
2888          * from dual port ram, and a character buffer area from host mem.
2889          */
2890
2891         /* Allocate space for two buffer descriptors in the DP ram.
2892         */
2893         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2894
2895         /* Allocate space for two 2 byte FIFOs in the host memory.
2896          */
2897         /* mem_addr = m360_cpm_hostalloc(8); */
2898         mem_addr = (uint)console_fifos;
2899
2900
2901         /* Set the physical address of the host memory buffers in
2902          * the buffer descriptors.
2903          */
2904         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2905         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2906         bdp->buf = (char *)mem_addr;
2907         (bdp+1)->buf = (char *)(mem_addr+4);
2908
2909         /* For the receive, set empty and wrap.
2910          * For transmit, set wrap.
2911          */
2912         bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2913         (bdp+1)->status = BD_SC_WRAP;
2914
2915         /* Set up the uart parameters in the parameter ram.
2916          */
2917         if (ser->smc_scc_num & NUM_IS_SCC) {
2918                 scp = &cp->scc_regs[idx];
2919                 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2920                 sup = &pquicc->pram[ser->port].scc.pscc.u;
2921
2922                 sup->rbase = dp_addr;
2923                 sup->tbase = dp_addr + sizeof(QUICC_BD);
2924
2925                 /* Set up the uart parameters in the
2926                  * parameter ram.
2927                  */
2928                 sup->rfcr = SMC_EB;
2929                 sup->tfcr = SMC_EB;
2930
2931                 /* Set this to 1 for now, so we get single
2932                  * character interrupts.  Using idle charater
2933                  * time requires some additional tuning.
2934                  */
2935                 sup->mrblr = 1;
2936                 sup->max_idl = 0;
2937                 sup->brkcr = 1;
2938                 sup->parec = 0;
2939                 sup->frmer = 0;
2940                 sup->nosec = 0;
2941                 sup->brkec = 0;
2942                 sup->uaddr1 = 0;
2943                 sup->uaddr2 = 0;
2944                 sup->toseq = 0;
2945                 {
2946                         int i;
2947                         for (i=0;i<8;i++)
2948                                 sup->cc[i] = 0x8000;
2949                 }
2950                 sup->rccm = 0xc0ff;
2951
2952                 /* Send the CPM an initialize command.
2953                 */
2954                 chan = scc_chan_map[idx];
2955
2956                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2957                 while (cp->cp_cr & CPM_CR_FLG);
2958
2959                 /* Set UART mode, 8 bit, no parity, one stop.
2960                  * Enable receive and transmit.
2961                  */
2962                 scp->scc_gsmr.w.high = 0;
2963                 scp->scc_gsmr.w.low = 
2964                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2965
2966                 /* Disable all interrupts and clear all pending
2967                  * events.
2968                  */
2969                 scp->scc_sccm = 0;
2970                 scp->scc_scce = 0xffff;
2971                 scp->scc_dsr = 0x7e7e;
2972                 scp->scc_psmr = 0x3000;
2973
2974                 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2975
2976         }
2977         else {
2978                 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2979                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2980
2981                 up->rbase = dp_addr;    /* Base of receive buffer desc. */
2982                 up->tbase = dp_addr+sizeof(QUICC_BD);   /* Base of xmt buffer desc. */
2983                 up->rfcr = SMC_EB;
2984                 up->tfcr = SMC_EB;
2985
2986                 /* Set this to 1 for now, so we get single character interrupts.
2987                 */
2988                 up->mrblr = 1;          /* receive buffer length */
2989                 up->max_idl = 0;                /* wait forever for next char */
2990
2991                 /* Send the CPM an initialize command.
2992                 */
2993                 chan = smc_chan_map[idx];
2994                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2995                 while (cp->cp_cr & CPM_CR_FLG);
2996
2997                 /* Set UART mode, 8 bit, no parity, one stop.
2998                  * Enable receive and transmit.
2999                  */
3000                 sp = &cp->smc_regs[idx];
3001                 sp->smc_smcmr = smcr_mk_clen(9) |  SMCMR_SM_UART;
3002
3003                 /* And finally, enable Rx and Tx.
3004                 */
3005                 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
3006         }
3007
3008         /* Set up the baud rate generator.
3009         */
3010         /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
3011         m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
3012
3013         return 0;
3014 }
3015
3016 /*
3017  * Local variables:
3018  *  c-indent-level: 4
3019  *  c-basic-offset: 4
3020  *  tab-width: 4
3021  * End:
3022  */