2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
5 * ########################################################################
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 * ########################################################################
22 * Routines for generic manipulation of the interrupts found on the MIPS
26 #include <linux/compiler.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/slab.h>
30 #include <linux/interrupt.h>
31 #include <linux/kernel_stat.h>
35 #include <asm/mips-boards/atlas.h>
36 #include <asm/mips-boards/atlasint.h>
37 #include <asm/gdb-stub.h>
40 static struct atlas_ictrl_regs *atlas_hw0_icregs;
42 extern asmlinkage void mipsIRQ(void);
45 #define DEBUG_INT(x...) printk(x)
47 #define DEBUG_INT(x...)
50 void disable_atlas_irq(unsigned int irq_nr)
52 atlas_hw0_icregs->intrsten = (1 << (irq_nr-ATLASINT_BASE));
56 void enable_atlas_irq(unsigned int irq_nr)
58 atlas_hw0_icregs->intseten = (1 << (irq_nr-ATLASINT_BASE));
62 static unsigned int startup_atlas_irq(unsigned int irq)
64 enable_atlas_irq(irq);
65 return 0; /* never anything pending */
68 #define shutdown_atlas_irq disable_atlas_irq
70 #define mask_and_ack_atlas_irq disable_atlas_irq
72 static void end_atlas_irq(unsigned int irq)
74 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
75 enable_atlas_irq(irq);
78 static struct hw_interrupt_type atlas_irq_type = {
84 mask_and_ack_atlas_irq,
89 static inline int ls1bit32(unsigned int x)
93 s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
94 s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
95 s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
96 s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
97 s = 1; if (x << 1 == 0) s = 0; b -= s;
102 void atlas_hw0_irqdispatch(struct pt_regs *regs)
104 unsigned long int_status;
107 int_status = atlas_hw0_icregs->intstatus;
109 /* if int_status == 0, then the interrupt has already been cleared */
110 if (unlikely(int_status == 0))
113 irq = ATLASINT_BASE + ls1bit32(int_status);
115 DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
120 void __init arch_init_irq(void)
124 atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *));
127 * Mask out all interrupt by writing "1" to all bit position in
128 * the interrupt reset reg.
130 atlas_hw0_icregs->intrsten = 0xffffffff;
132 /* Now safe to set the exception vector. */
133 set_except_vector(0, mipsIRQ);
135 for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) {
136 irq_desc[i].status = IRQ_DISABLED;
137 irq_desc[i].action = 0;
138 irq_desc[i].depth = 1;
139 irq_desc[i].handler = &atlas_irq_type;
140 spin_lock_init(&irq_desc[i].lock);