git.oblomov.eu Git - linux-2.6/blob - drivers/serial/vr41xx_siu.c

   1 /*
   2  *  Driver for NEC VR4100 series Serial Interface Unit.
   3  *
   4  *  Copyright (C) 2004-2005  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
   5  *
   6  *  Based on drivers/serial/8250.c, by Russell King.
   7  *
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation; either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program; if not, write to the Free Software
  20  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22 #include <linux/config.h>
  23
  24 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  25 #define SUPPORT_SYSRQ
  26 #endif
  27
  28 #include <linux/console.h>
  29 #include <linux/device.h>
  30 #include <linux/err.h>
  31 #include <linux/ioport.h>
  32 #include <linux/init.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/module.h>
  35 #include <linux/serial.h>
  36 #include <linux/serial_core.h>
  37 #include <linux/serial_reg.h>
  38 #include <linux/tty.h>
  39 #include <linux/tty_flip.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/vr41xx/siu.h>
  43 #include <asm/vr41xx/vr41xx.h>
  44
  45 #define SIU_PORTS_MAX   2
  46 #define SIU_BAUD_BASE   1152000
  47 #define SIU_MAJOR       204
  48 #define SIU_MINOR_BASE  82
  49
  50 #define RX_MAX_COUNT    256
  51 #define TX_MAX_COUNT    15
  52
  53 #define SIUIRSEL        0x08
  54  #define TMICMODE       0x20
  55  #define TMICTX         0x10
  56  #define IRMSEL         0x0c
  57  #define IRMSEL_HP      0x08
  58  #define IRMSEL_TEMIC   0x04
  59  #define IRMSEL_SHARP   0x00
  60  #define IRUSESEL       0x02
  61  #define SIRSEL         0x01
  62
  63 struct siu_port {
  64         unsigned int type;
  65         unsigned int irq;
  66         unsigned long start;
  67 };
  68
  69 static const struct siu_port siu_type1_ports[] = {
  70         {       .type           = PORT_VR41XX_SIU,
  71                 .irq            = SIU_IRQ,
  72                 .start          = 0x0c000000UL,         },
  73 };
  74
  75 #define SIU_TYPE1_NR_PORTS      (sizeof(siu_type1_ports) / sizeof(struct siu_port))
  76
  77 static const struct siu_port siu_type2_ports[] = {
  78         {       .type           = PORT_VR41XX_SIU,
  79                 .irq            = SIU_IRQ,
  80                 .start          = 0x0f000800UL,         },
  81         {       .type           = PORT_VR41XX_DSIU,
  82                 .irq            = DSIU_IRQ,
  83                 .start          = 0x0f000820UL,         },
  84 };
  85
  86 #define SIU_TYPE2_NR_PORTS      (sizeof(siu_type2_ports) / sizeof(struct siu_port))
  87
  88 static struct uart_port siu_uart_ports[SIU_PORTS_MAX];
  89 static uint8_t lsr_break_flag[SIU_PORTS_MAX];
  90
  91 #define siu_read(port, offset)          readb((port)->membase + (offset))
  92 #define siu_write(port, offset, value)  writeb((value), (port)->membase + (offset))
  93
  94 void vr41xx_select_siu_interface(siu_interface_t interface)
  95 {
  96         struct uart_port *port;
  97         unsigned long flags;
  98         uint8_t irsel;
  99
 100         port = &siu_uart_ports[0];
 101
 102         spin_lock_irqsave(&port->lock, flags);
 103
 104         irsel = siu_read(port, SIUIRSEL);
 105         if (interface == SIU_INTERFACE_IRDA)
 106                 irsel |= SIRSEL;
 107         else
 108                 irsel &= ~SIRSEL;
 109         siu_write(port, SIUIRSEL, irsel);
 110
 111         spin_unlock_irqrestore(&port->lock, flags);
 112 }
 113
 114 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
 115
 116 void vr41xx_use_irda(irda_use_t use)
 117 {
 118         struct uart_port *port;
 119         unsigned long flags;
 120         uint8_t irsel;
 121
 122         port = &siu_uart_ports[0];
 123
 124         spin_lock_irqsave(&port->lock, flags);
 125
 126         irsel = siu_read(port, SIUIRSEL);
 127         if (use == FIR_USE_IRDA)
 128                 irsel |= IRUSESEL;
 129         else
 130                 irsel &= ~IRUSESEL;
 131         siu_write(port, SIUIRSEL, irsel);
 132
 133         spin_unlock_irqrestore(&port->lock, flags);
 134 }
 135
 136 EXPORT_SYMBOL_GPL(vr41xx_use_irda);
 137
 138 void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
 139 {
 140         struct uart_port *port;
 141         unsigned long flags;
 142         uint8_t irsel;
 143
 144         port = &siu_uart_ports[0];
 145
 146         spin_lock_irqsave(&port->lock, flags);
 147
 148         irsel = siu_read(port, SIUIRSEL);
 149         irsel &= ~(IRMSEL | TMICTX | TMICMODE);
 150         switch (module) {
 151         case SHARP_IRDA:
 152                 irsel |= IRMSEL_SHARP;
 153                 break;
 154         case TEMIC_IRDA:
 155                 irsel |= IRMSEL_TEMIC | TMICMODE;
 156                 if (speed == IRDA_TX_4MBPS)
 157                         irsel |= TMICTX;
 158                 break;
 159         case HP_IRDA:
 160                 irsel |= IRMSEL_HP;
 161                 break;
 162         default:
 163                 break;
 164         }
 165         siu_write(port, SIUIRSEL, irsel);
 166
 167         spin_unlock_irqrestore(&port->lock, flags);
 168 }
 169
 170 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
 171
 172 static inline void siu_clear_fifo(struct uart_port *port)
 173 {
 174         siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
 175         siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
 176                                   UART_FCR_CLEAR_XMIT);
 177         siu_write(port, UART_FCR, 0);
 178 }
 179
 180 static inline int siu_probe_ports(void)
 181 {
 182         switch (current_cpu_data.cputype) {
 183         case CPU_VR4111:
 184         case CPU_VR4121:
 185                 return SIU_TYPE1_NR_PORTS;
 186         case CPU_VR4122:
 187         case CPU_VR4131:
 188         case CPU_VR4133:
 189                 return SIU_TYPE2_NR_PORTS;
 190         }
 191
 192         return 0;
 193 }
 194
 195 static inline unsigned long siu_port_size(struct uart_port *port)
 196 {
 197         switch (port->type) {
 198         case PORT_VR41XX_SIU:
 199                 return 11UL;
 200         case PORT_VR41XX_DSIU:
 201                 return 8UL;
 202         }
 203
 204         return 0;
 205 }
 206
 207 static inline unsigned int siu_check_type(struct uart_port *port)
 208 {
 209         switch (current_cpu_data.cputype) {
 210         case CPU_VR4111:
 211         case CPU_VR4121:
 212                 if (port->line == 0)
 213                         return PORT_VR41XX_SIU;
 214                 break;
 215         case CPU_VR4122:
 216         case CPU_VR4131:
 217         case CPU_VR4133:
 218                 if (port->line == 0)
 219                         return PORT_VR41XX_SIU;
 220                 else if (port->line == 1)
 221                         return PORT_VR41XX_DSIU;
 222                 break;
 223         }
 224
 225         return PORT_UNKNOWN;
 226 }
 227
 228 static inline const char *siu_type_name(struct uart_port *port)
 229 {
 230         switch (port->type) {
 231         case PORT_VR41XX_SIU:
 232                 return "SIU";
 233         case PORT_VR41XX_DSIU:
 234                 return "DSIU";
 235         }
 236
 237         return NULL;
 238 }
 239
 240 static unsigned int siu_tx_empty(struct uart_port *port)
 241 {
 242         uint8_t lsr;
 243
 244         lsr = siu_read(port, UART_LSR);
 245         if (lsr & UART_LSR_TEMT)
 246                 return TIOCSER_TEMT;
 247
 248         return 0;
 249 }
 250
 251 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 252 {
 253         uint8_t mcr = 0;
 254
 255         if (mctrl & TIOCM_DTR)
 256                 mcr |= UART_MCR_DTR;
 257         if (mctrl & TIOCM_RTS)
 258                 mcr |= UART_MCR_RTS;
 259         if (mctrl & TIOCM_OUT1)
 260                 mcr |= UART_MCR_OUT1;
 261         if (mctrl & TIOCM_OUT2)
 262                 mcr |= UART_MCR_OUT2;
 263         if (mctrl & TIOCM_LOOP)
 264                 mcr |= UART_MCR_LOOP;
 265
 266         siu_write(port, UART_MCR, mcr);
 267 }
 268
 269 static unsigned int siu_get_mctrl(struct uart_port *port)
 270 {
 271         uint8_t msr;
 272         unsigned int mctrl = 0;
 273
 274         msr = siu_read(port, UART_MSR);
 275         if (msr & UART_MSR_DCD)
 276                 mctrl |= TIOCM_CAR;
 277         if (msr & UART_MSR_RI)
 278                 mctrl |= TIOCM_RNG;
 279         if (msr & UART_MSR_DSR)
 280                 mctrl |= TIOCM_DSR;
 281         if (msr & UART_MSR_CTS)
 282                 mctrl |= TIOCM_CTS;
 283
 284         return mctrl;
 285 }
 286
 287 static void siu_stop_tx(struct uart_port *port)
 288 {
 289         unsigned long flags;
 290         uint8_t ier;
 291
 292         spin_lock_irqsave(&port->lock, flags);
 293
 294         ier = siu_read(port, UART_IER);
 295         ier &= ~UART_IER_THRI;
 296         siu_write(port, UART_IER, ier);
 297
 298         spin_unlock_irqrestore(&port->lock, flags);
 299 }
 300
 301 static void siu_start_tx(struct uart_port *port)
 302 {
 303         unsigned long flags;
 304         uint8_t ier;
 305
 306         spin_lock_irqsave(&port->lock, flags);
 307
 308         ier = siu_read(port, UART_IER);
 309         ier |= UART_IER_THRI;
 310         siu_write(port, UART_IER, ier);
 311
 312         spin_unlock_irqrestore(&port->lock, flags);
 313 }
 314
 315 static void siu_stop_rx(struct uart_port *port)
 316 {
 317         unsigned long flags;
 318         uint8_t ier;
 319
 320         spin_lock_irqsave(&port->lock, flags);
 321
 322         ier = siu_read(port, UART_IER);
 323         ier &= ~UART_IER_RLSI;
 324         siu_write(port, UART_IER, ier);
 325
 326         port->read_status_mask &= ~UART_LSR_DR;
 327
 328         spin_unlock_irqrestore(&port->lock, flags);
 329 }
 330
 331 static void siu_enable_ms(struct uart_port *port)
 332 {
 333         unsigned long flags;
 334         uint8_t ier;
 335
 336         spin_lock_irqsave(&port->lock, flags);
 337
 338         ier = siu_read(port, UART_IER);
 339         ier |= UART_IER_MSI;
 340         siu_write(port, UART_IER, ier);
 341
 342         spin_unlock_irqrestore(&port->lock, flags);
 343 }
 344
 345 static void siu_break_ctl(struct uart_port *port, int ctl)
 346 {
 347         unsigned long flags;
 348         uint8_t lcr;
 349
 350         spin_lock_irqsave(&port->lock, flags);
 351
 352         lcr = siu_read(port, UART_LCR);
 353         if (ctl == -1)
 354                 lcr |= UART_LCR_SBC;
 355         else
 356                 lcr &= ~UART_LCR_SBC;
 357         siu_write(port, UART_LCR, lcr);
 358
 359         spin_unlock_irqrestore(&port->lock, flags);
 360 }
 361
 362 static inline void receive_chars(struct uart_port *port, uint8_t *status,
 363                                  struct pt_regs *regs)
 364 {
 365         struct tty_struct *tty;
 366         uint8_t lsr, ch;
 367         char flag;
 368         int max_count = RX_MAX_COUNT;
 369
 370         tty = port->info->tty;
 371         lsr = *status;
 372
 373         do {
 374                 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
 375                         if (tty->low_latency)
 376                                 tty_flip_buffer_push(tty);
 377                 }
 378
 379                 ch = siu_read(port, UART_RX);
 380                 port->icount.rx++;
 381                 flag = TTY_NORMAL;
 382
 383 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
 384                 lsr |= lsr_break_flag[port->line];
 385                 lsr_break_flag[port->line] = 0;
 386 #endif
 387                 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
 388                                     UART_LSR_PE | UART_LSR_OE))) {
 389                         if (lsr & UART_LSR_BI) {
 390                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
 391                                 port->icount.brk++;
 392
 393                                 if (uart_handle_break(port))
 394                                         goto ignore_char;
 395                         }
 396
 397                         if (lsr & UART_LSR_FE)
 398                                 port->icount.frame++;
 399                         if (lsr & UART_LSR_PE)
 400                                 port->icount.parity++;
 401                         if (lsr & UART_LSR_OE)
 402                                 port->icount.overrun++;
 403
 404                         lsr &= port->read_status_mask;
 405                         if (lsr & UART_LSR_BI)
 406                                 flag = TTY_BREAK;
 407                         if (lsr & UART_LSR_FE)
 408                                 flag = TTY_FRAME;
 409                         if (lsr & UART_LSR_PE)
 410                                 flag = TTY_PARITY;
 411                 }
 412
 413                 if (uart_handle_sysrq_char(port, ch, regs))
 414                         goto ignore_char;
 415
 416                 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
 417
 418         ignore_char:
 419                 lsr = siu_read(port, UART_LSR);
 420         } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
 421
 422         tty_flip_buffer_push(tty);
 423
 424         *status = lsr;
 425 }
 426
 427 static inline void check_modem_status(struct uart_port *port)
 428 {
 429         uint8_t msr;
 430
 431         msr = siu_read(port, UART_MSR);
 432         if ((msr & UART_MSR_ANY_DELTA) == 0)
 433                 return;
 434         if (msr & UART_MSR_DDCD)
 435                 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
 436         if (msr & UART_MSR_TERI)
 437                 port->icount.rng++;
 438         if (msr & UART_MSR_DDSR)
 439                 port->icount.dsr++;
 440         if (msr & UART_MSR_DCTS)
 441                 uart_handle_cts_change(port, msr & UART_MSR_CTS);
 442
 443         wake_up_interruptible(&port->info->delta_msr_wait);
 444 }
 445
 446 static inline void transmit_chars(struct uart_port *port)
 447 {
 448         struct circ_buf *xmit;
 449         int max_count = TX_MAX_COUNT;
 450
 451         xmit = &port->info->xmit;
 452
 453         if (port->x_char) {
 454                 siu_write(port, UART_TX, port->x_char);
 455                 port->icount.tx++;
 456                 port->x_char = 0;
 457                 return;
 458         }
 459
 460         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 461                 siu_stop_tx(port);
 462                 return;
 463         }
 464
 465         do {
 466                 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
 467                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 468                 port->icount.tx++;
 469                 if (uart_circ_empty(xmit))
 470                         break;
 471         } while (max_count-- > 0);
 472
 473         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 474                 uart_write_wakeup(port);
 475
 476         if (uart_circ_empty(xmit))
 477                 siu_stop_tx(port);
 478 }
 479
 480 static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 481 {
 482         struct uart_port *port;
 483         uint8_t iir, lsr;
 484
 485         port = (struct uart_port *)dev_id;
 486
 487         iir = siu_read(port, UART_IIR);
 488         if (iir & UART_IIR_NO_INT)
 489                 return IRQ_NONE;
 490
 491         lsr = siu_read(port, UART_LSR);
 492         if (lsr & UART_LSR_DR)
 493                 receive_chars(port, &lsr, regs);
 494
 495         check_modem_status(port);
 496
 497         if (lsr & UART_LSR_THRE)
 498                 transmit_chars(port);
 499
 500         return IRQ_HANDLED;
 501 }
 502
 503 static int siu_startup(struct uart_port *port)
 504 {
 505         int retval;
 506
 507         if (port->membase == NULL)
 508                 return -ENODEV;
 509
 510         siu_clear_fifo(port);
 511
 512         (void)siu_read(port, UART_LSR);
 513         (void)siu_read(port, UART_RX);
 514         (void)siu_read(port, UART_IIR);
 515         (void)siu_read(port, UART_MSR);
 516
 517         if (siu_read(port, UART_LSR) == 0xff)
 518                 return -ENODEV;
 519
 520         retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
 521         if (retval)
 522                 return retval;
 523
 524         if (port->type == PORT_VR41XX_DSIU)
 525                 vr41xx_enable_dsiuint(DSIUINT_ALL);
 526
 527         siu_write(port, UART_LCR, UART_LCR_WLEN8);
 528
 529         spin_lock_irq(&port->lock);
 530         siu_set_mctrl(port, port->mctrl);
 531         spin_unlock_irq(&port->lock);
 532
 533         siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
 534
 535         (void)siu_read(port, UART_LSR);
 536         (void)siu_read(port, UART_RX);
 537         (void)siu_read(port, UART_IIR);
 538         (void)siu_read(port, UART_MSR);
 539
 540         return 0;
 541 }
 542
 543 static void siu_shutdown(struct uart_port *port)
 544 {
 545         unsigned long flags;
 546         uint8_t lcr;
 547
 548         siu_write(port, UART_IER, 0);
 549
 550         spin_lock_irqsave(&port->lock, flags);
 551
 552         port->mctrl &= ~TIOCM_OUT2;
 553         siu_set_mctrl(port, port->mctrl);
 554
 555         spin_unlock_irqrestore(&port->lock, flags);
 556
 557         lcr = siu_read(port, UART_LCR);
 558         lcr &= ~UART_LCR_SBC;
 559         siu_write(port, UART_LCR, lcr);
 560
 561         siu_clear_fifo(port);
 562
 563         (void)siu_read(port, UART_RX);
 564
 565         if (port->type == PORT_VR41XX_DSIU)
 566                 vr41xx_disable_dsiuint(DSIUINT_ALL);
 567
 568         free_irq(port->irq, port);
 569 }
 570
 571 static void siu_set_termios(struct uart_port *port, struct termios *new,
 572                             struct termios *old)
 573 {
 574         tcflag_t c_cflag, c_iflag;
 575         uint8_t lcr, fcr, ier;
 576         unsigned int baud, quot;
 577         unsigned long flags;
 578
 579         c_cflag = new->c_cflag;
 580         switch (c_cflag & CSIZE) {
 581         case CS5:
 582                 lcr = UART_LCR_WLEN5;
 583                 break;
 584         case CS6:
 585                 lcr = UART_LCR_WLEN6;
 586                 break;
 587         case CS7:
 588                 lcr = UART_LCR_WLEN7;
 589                 break;
 590         default:
 591                 lcr = UART_LCR_WLEN8;
 592                 break;
 593         }
 594
 595         if (c_cflag & CSTOPB)
 596                 lcr |= UART_LCR_STOP;
 597         if (c_cflag & PARENB)
 598                 lcr |= UART_LCR_PARITY;
 599         if ((c_cflag & PARODD) != PARODD)
 600                 lcr |= UART_LCR_EPAR;
 601         if (c_cflag & CMSPAR)
 602                 lcr |= UART_LCR_SPAR;
 603
 604         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
 605         quot = uart_get_divisor(port, baud);
 606
 607         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
 608
 609         spin_lock_irqsave(&port->lock, flags);
 610
 611         uart_update_timeout(port, c_cflag, baud);
 612
 613         c_iflag = new->c_iflag;
 614
 615         port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
 616         if (c_iflag & INPCK)
 617                 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 618         if (c_iflag & (BRKINT | PARMRK))
 619                 port->read_status_mask |= UART_LSR_BI;
 620
 621         port->ignore_status_mask = 0;
 622         if (c_iflag & IGNPAR)
 623                 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
 624         if (c_iflag & IGNBRK) {
 625                 port->ignore_status_mask |= UART_LSR_BI;
 626                 if (c_iflag & IGNPAR)
 627                         port->ignore_status_mask |= UART_LSR_OE;
 628         }
 629
 630         if ((c_cflag & CREAD) == 0)
 631                 port->ignore_status_mask |= UART_LSR_DR;
 632
 633         ier = siu_read(port, UART_IER);
 634         ier &= ~UART_IER_MSI;
 635         if (UART_ENABLE_MS(port, c_cflag))
 636                 ier |= UART_IER_MSI;
 637         siu_write(port, UART_IER, ier);
 638
 639         siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
 640
 641         siu_write(port, UART_DLL, (uint8_t)quot);
 642         siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
 643
 644         siu_write(port, UART_LCR, lcr);
 645
 646         siu_write(port, UART_FCR, fcr);
 647
 648         siu_set_mctrl(port, port->mctrl);
 649
 650         spin_unlock_irqrestore(&port->lock, flags);
 651 }
 652
 653 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
 654 {
 655         switch (state) {
 656         case 0:
 657                 switch (port->type) {
 658                 case PORT_VR41XX_SIU:
 659                         vr41xx_supply_clock(SIU_CLOCK);
 660                         break;
 661                 case PORT_VR41XX_DSIU:
 662                         vr41xx_supply_clock(DSIU_CLOCK);
 663                         break;
 664                 }
 665                 break;
 666         case 3:
 667                 switch (port->type) {
 668                 case PORT_VR41XX_SIU:
 669                         vr41xx_mask_clock(SIU_CLOCK);
 670                         break;
 671                 case PORT_VR41XX_DSIU:
 672                         vr41xx_mask_clock(DSIU_CLOCK);
 673                         break;
 674                 }
 675                 break;
 676         }
 677 }
 678
 679 static const char *siu_type(struct uart_port *port)
 680 {
 681         return siu_type_name(port);
 682 }
 683
 684 static void siu_release_port(struct uart_port *port)
 685 {
 686         unsigned long size;
 687
 688         if (port->flags & UPF_IOREMAP) {
 689                 iounmap(port->membase);
 690                 port->membase = NULL;
 691         }
 692
 693         size = siu_port_size(port);
 694         release_mem_region(port->mapbase, size);
 695 }
 696
 697 static int siu_request_port(struct uart_port *port)
 698 {
 699         unsigned long size;
 700         struct resource *res;
 701
 702         size = siu_port_size(port);
 703         res = request_mem_region(port->mapbase, size, siu_type_name(port));
 704         if (res == NULL)
 705                 return -EBUSY;
 706
 707         if (port->flags & UPF_IOREMAP) {
 708                 port->membase = ioremap(port->mapbase, size);
 709                 if (port->membase == NULL) {
 710                         release_resource(res);
 711                         return -ENOMEM;
 712                 }
 713         }
 714
 715         return 0;
 716 }
 717
 718 static void siu_config_port(struct uart_port *port, int flags)
 719 {
 720         if (flags & UART_CONFIG_TYPE) {
 721                 port->type = siu_check_type(port);
 722                 (void)siu_request_port(port);
 723         }
 724 }
 725
 726 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
 727 {
 728         if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
 729                 return -EINVAL;
 730         if (port->irq != serial->irq)
 731                 return -EINVAL;
 732         if (port->iotype != serial->io_type)
 733                 return -EINVAL;
 734         if (port->mapbase != (unsigned long)serial->iomem_base)
 735                 return -EINVAL;
 736
 737         return 0;
 738 }
 739
 740 static struct uart_ops siu_uart_ops = {
 741         .tx_empty       = siu_tx_empty,
 742         .set_mctrl      = siu_set_mctrl,
 743         .get_mctrl      = siu_get_mctrl,
 744         .stop_tx        = siu_stop_tx,
 745         .start_tx       = siu_start_tx,
 746         .stop_rx        = siu_stop_rx,
 747         .enable_ms      = siu_enable_ms,
 748         .break_ctl      = siu_break_ctl,
 749         .startup        = siu_startup,
 750         .shutdown       = siu_shutdown,
 751         .set_termios    = siu_set_termios,
 752         .pm             = siu_pm,
 753         .type           = siu_type,
 754         .release_port   = siu_release_port,
 755         .request_port   = siu_request_port,
 756         .config_port    = siu_config_port,
 757         .verify_port    = siu_verify_port,
 758 };
 759
 760 static int siu_init_ports(void)
 761 {
 762         const struct siu_port *siu;
 763         struct uart_port *port;
 764         int i, num;
 765
 766         switch (current_cpu_data.cputype) {
 767         case CPU_VR4111:
 768         case CPU_VR4121:
 769                 siu = siu_type1_ports;
 770                 break;
 771         case CPU_VR4122:
 772         case CPU_VR4131:
 773         case CPU_VR4133:
 774                 siu = siu_type2_ports;
 775                 break;
 776         default:
 777                 return 0;
 778         }
 779
 780         port = siu_uart_ports;
 781         num = siu_probe_ports();
 782         for (i = 0; i < num; i++) {
 783                 spin_lock_init(&port->lock);
 784                 port->irq = siu->irq;
 785                 port->uartclk = SIU_BAUD_BASE * 16;
 786                 port->fifosize = 16;
 787                 port->regshift = 0;
 788                 port->iotype = UPIO_MEM;
 789                 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
 790                 port->type = siu->type;
 791                 port->line = i;
 792                 port->mapbase = siu->start;
 793                 siu++;
 794                 port++;
 795         }
 796
 797         return num;
 798 }
 799
 800 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
 801
 802 #define BOTH_EMPTY      (UART_LSR_TEMT | UART_LSR_THRE)
 803
 804 static void wait_for_xmitr(struct uart_port *port)
 805 {
 806         int timeout = 10000;
 807         uint8_t lsr, msr;
 808
 809         do {
 810                 lsr = siu_read(port, UART_LSR);
 811                 if (lsr & UART_LSR_BI)
 812                         lsr_break_flag[port->line] = UART_LSR_BI;
 813
 814                 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
 815                         break;
 816         } while (timeout-- > 0);
 817
 818         if (port->flags & UPF_CONS_FLOW) {
 819                 timeout = 1000000;
 820
 821                 do {
 822                         msr = siu_read(port, UART_MSR);
 823                         if ((msr & UART_MSR_CTS) != 0)
 824                                 break;
 825                 } while (timeout-- > 0);
 826         }
 827 }
 828
 829 static void siu_console_write(struct console *con, const char *s, unsigned count)
 830 {
 831         struct uart_port *port;
 832         uint8_t ier;
 833         unsigned i;
 834
 835         port = &siu_uart_ports[con->index];
 836
 837         ier = siu_read(port, UART_IER);
 838         siu_write(port, UART_IER, 0);
 839
 840         for (i = 0; i < count && *s != '\0'; i++, s++) {
 841                 wait_for_xmitr(port);
 842                 siu_write(port, UART_TX, *s);
 843                 if (*s == '\n') {
 844                         wait_for_xmitr(port);
 845                         siu_write(port, UART_TX, '\r');
 846                 }
 847         }
 848
 849         wait_for_xmitr(port);
 850         siu_write(port, UART_IER, ier);
 851 }
 852
 853 static int siu_console_setup(struct console *con, char *options)
 854 {
 855         struct uart_port *port;
 856         int baud = 9600;
 857         int parity = 'n';
 858         int bits = 8;
 859         int flow = 'n';
 860
 861         if (con->index >= SIU_PORTS_MAX)
 862                 con->index = 0;
 863
 864         port = &siu_uart_ports[con->index];
 865         if (port->membase == NULL) {
 866                 if (port->mapbase == 0)
 867                         return -ENODEV;
 868                 port->membase = ioremap(port->mapbase, siu_port_size(port));
 869         }
 870
 871         vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
 872
 873         if (options != NULL)
 874                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 875
 876         return uart_set_options(port, con, baud, parity, bits, flow);
 877 }
 878
 879 static struct uart_driver siu_uart_driver;
 880
 881 static struct console siu_console = {
 882         .name   = "ttyVR",
 883         .write  = siu_console_write,
 884         .device = uart_console_device,
 885         .setup  = siu_console_setup,
 886         .flags  = CON_PRINTBUFFER,
 887         .index  = -1,
 888         .data   = &siu_uart_driver,
 889 };
 890
 891 static int __devinit siu_console_init(void)
 892 {
 893         struct uart_port *port;
 894         int num, i;
 895
 896         num = siu_init_ports();
 897         if (num <= 0)
 898                 return -ENODEV;
 899
 900         for (i = 0; i < num; i++) {
 901                 port = &siu_uart_ports[i];
 902                 port->ops = &siu_uart_ops;
 903         }
 904
 905         register_console(&siu_console);
 906
 907         return 0;
 908 }
 909
 910 console_initcall(siu_console_init);
 911
 912 #define SERIAL_VR41XX_CONSOLE   &siu_console
 913 #else
 914 #define SERIAL_VR41XX_CONSOLE   NULL
 915 #endif
 916
 917 static struct uart_driver siu_uart_driver = {
 918         .owner          = THIS_MODULE,
 919         .driver_name    = "SIU",
 920         .dev_name       = "ttyVR",
 921         .devfs_name     = "ttvr/",
 922         .major          = SIU_MAJOR,
 923         .minor          = SIU_MINOR_BASE,
 924         .cons           = SERIAL_VR41XX_CONSOLE,
 925 };
 926
 927 static int siu_probe(struct device *dev)
 928 {
 929         struct uart_port *port;
 930         int num, i, retval;
 931
 932         num = siu_init_ports();
 933         if (num <= 0)
 934                 return -ENODEV;
 935
 936         siu_uart_driver.nr = num;
 937         retval = uart_register_driver(&siu_uart_driver);
 938         if (retval)
 939                 return retval;
 940
 941         for (i = 0; i < num; i++) {
 942                 port = &siu_uart_ports[i];
 943                 port->ops = &siu_uart_ops;
 944                 port->dev = dev;
 945
 946                 retval = uart_add_one_port(&siu_uart_driver, port);
 947                 if (retval < 0) {
 948                         port->dev = NULL;
 949                         break;
 950                 }
 951         }
 952
 953         if (i == 0 && retval < 0) {
 954                 uart_unregister_driver(&siu_uart_driver);
 955                 return retval;
 956         }
 957
 958         return 0;
 959 }
 960
 961 static int siu_remove(struct device *dev)
 962 {
 963         struct uart_port *port;
 964         int i;
 965
 966         for (i = 0; i < siu_uart_driver.nr; i++) {
 967                 port = &siu_uart_ports[i];
 968                 if (port->dev == dev) {
 969                         uart_remove_one_port(&siu_uart_driver, port);
 970                         port->dev = NULL;
 971                 }
 972         }
 973
 974         uart_unregister_driver(&siu_uart_driver);
 975
 976         return 0;
 977 }
 978
 979 static int siu_suspend(struct device *dev, pm_message_t state, u32 level)
 980 {
 981         struct uart_port *port;
 982         int i;
 983
 984         if (level != SUSPEND_DISABLE)
 985                 return 0;
 986
 987         for (i = 0; i < siu_uart_driver.nr; i++) {
 988                 port = &siu_uart_ports[i];
 989                 if ((port->type == PORT_VR41XX_SIU ||
 990                      port->type == PORT_VR41XX_DSIU) && port->dev == dev)
 991                         uart_suspend_port(&siu_uart_driver, port);
 992
 993         }
 994
 995         return 0;
 996 }
 997
 998 static int siu_resume(struct device *dev, u32 level)
 999 {
1000         struct uart_port *port;
1001         int i;
1002
1003         if (level != RESUME_ENABLE)
1004                 return 0;
1005
1006         for (i = 0; i < siu_uart_driver.nr; i++) {
1007                 port = &siu_uart_ports[i];
1008                 if ((port->type == PORT_VR41XX_SIU ||
1009                      port->type == PORT_VR41XX_DSIU) && port->dev == dev)
1010                         uart_resume_port(&siu_uart_driver, port);
1011         }
1012
1013         return 0;
1014 }
1015
1016 static struct platform_device *siu_platform_device;
1017
1018 static struct device_driver siu_device_driver = {
1019         .name           = "SIU",
1020         .bus            = &platform_bus_type,
1021         .probe          = siu_probe,
1022         .remove         = siu_remove,
1023         .suspend        = siu_suspend,
1024         .resume         = siu_resume,
1025 };
1026
1027 static int __devinit vr41xx_siu_init(void)
1028 {
1029         int retval;
1030
1031         siu_platform_device = platform_device_register_simple("SIU", -1, NULL, 0);
1032         if (IS_ERR(siu_platform_device))
1033                 return PTR_ERR(siu_platform_device);
1034
1035         retval = driver_register(&siu_device_driver);
1036         if (retval < 0)
1037                 platform_device_unregister(siu_platform_device);
1038
1039         return retval;
1040 }
1041
1042 static void __devexit vr41xx_siu_exit(void)
1043 {
1044         driver_unregister(&siu_device_driver);
1045
1046         platform_device_unregister(siu_platform_device);
1047 }
1048
1049 module_init(vr41xx_siu_init);
1050 module_exit(vr41xx_siu_exit);