2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Authors: Kip Walker, PA Semi
5 * Olof Johansson, PA Semi
7 * Maintained by: Olof Johansson <olof@lixom.net>
9 * Based on arch/powerpc/platforms/maple/setup.c
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/errno.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/console.h>
29 #include <linux/pci.h>
32 #include <asm/system.h>
33 #include <asm/iommu.h>
34 #include <asm/machdep.h>
38 #include <asm/of_platform.h>
42 static void __iomem *reset_reg;
44 static void pas_restart(char *cmd)
46 printk("Restarting...\n");
48 out_le32(reset_reg, 0x6000000);
52 static DEFINE_SPINLOCK(timebase_lock);
54 static void __devinit pas_give_timebase(void)
58 spin_lock(&timebase_lock);
59 mtspr(SPRN_TBCTL, TBCTL_FREEZE);
61 mtspr(SPRN_TBCTL, TBCTL_UPDATE_LOWER | (tb & 0xffffffff));
62 mtspr(SPRN_TBCTL, TBCTL_UPDATE_UPPER | (tb >> 32));
63 mtspr(SPRN_TBCTL, TBCTL_RESTART);
64 spin_unlock(&timebase_lock);
65 pr_debug("pas_give_timebase: cpu %d gave tb %lx\n",
66 smp_processor_id(), tb);
69 static void __devinit pas_take_timebase(void)
71 pr_debug("pas_take_timebase: cpu %d has tb %lx\n",
72 smp_processor_id(), mftb());
75 struct smp_ops_t pas_smp_ops = {
76 .probe = smp_mpic_probe,
77 .message_pass = smp_mpic_message_pass,
78 .kick_cpu = smp_generic_kick_cpu,
79 .setup_cpu = smp_mpic_setup_cpu,
80 .give_timebase = pas_give_timebase,
81 .take_timebase = pas_take_timebase,
83 #endif /* CONFIG_SMP */
85 void __init pas_setup_arch(void)
88 /* Setup SMP callback */
89 smp_ops = &pas_smp_ops;
91 /* Lookup PCI hosts */
94 #ifdef CONFIG_DUMMY_CONSOLE
95 conswitchp = &dummy_con;
98 /* Remap SDC register for doing reset */
99 /* XXXOJN This should maybe come out of the device tree */
100 reset_reg = ioremap(0xfc101100, 4);
105 /* No legacy IO on our parts */
106 static int pas_check_legacy_ioport(unsigned int baseport)
111 static __init void pas_init_IRQ(void)
113 struct device_node *np;
114 struct device_node *root, *mpic_node;
115 unsigned long openpic_addr;
116 const unsigned int *opprop;
122 for_each_node_by_type(np, "interrupt-controller")
123 if (device_is_compatible(np, "open-pic")) {
128 for_each_node_by_type(np, "open-pic") {
134 "Failed to locate the MPIC interrupt controller\n");
138 /* Find address list in /platform-open-pic */
139 root = of_find_node_by_path("/");
140 naddr = of_n_addr_cells(root);
141 opprop = of_get_property(root, "platform-open-pic", &opplen);
143 printk(KERN_ERR "No platform-open-pic property.\n");
147 openpic_addr = of_read_number(opprop, naddr);
148 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
150 mpic = mpic_alloc(mpic_node, openpic_addr,
151 MPIC_PRIMARY|MPIC_LARGE_VECTORS|MPIC_WANTS_RESET,
155 mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
157 of_node_put(mpic_node);
161 static void __init pas_progress(char *s, unsigned short hex)
163 printk("[%04x] : %s\n", hex, s ? s : "");
167 static int pas_machine_check_handler(struct pt_regs *regs)
169 int cpu = smp_processor_id();
170 unsigned long srr0, srr1, dsisr;
174 dsisr = mfspr(SPRN_DSISR);
175 printk(KERN_ERR "Machine Check on CPU %d\n", cpu);
176 printk(KERN_ERR "SRR0 0x%016lx SRR1 0x%016lx\n", srr0, srr1);
177 printk(KERN_ERR "DSISR 0x%016lx DAR 0x%016lx\n", dsisr, regs->dar);
178 printk(KERN_ERR "Cause:\n");
181 printk(KERN_ERR "Signalled by SDC\n");
182 if (srr1 & 0x100000) {
183 printk(KERN_ERR "Load/Store detected error:\n");
185 printk(KERN_ERR "D-cache ECC double-bit error or bus error\n");
187 printk(KERN_ERR "LSU snoop response error\n");
189 printk(KERN_ERR "MMU SLB multi-hit or invalid B field\n");
191 printk(KERN_ERR "Recoverable Duptags\n");
193 printk(KERN_ERR "Recoverable D-cache parity error count overflow\n");
195 printk(KERN_ERR "TLB parity error count overflow\n");
198 printk(KERN_ERR "Bus Error\n");
200 printk(KERN_ERR "I-side SLB multiple hit\n");
202 printk(KERN_ERR "I-cache parity error hit\n");
204 /* SRR1[62] is from MSR[62] if recoverable, so pass that back */
205 return !!(srr1 & 0x2);
208 static void __init pas_init_early(void)
210 iommu_init_early_pasemi();
213 static struct of_device_id pasemi_bus_ids[] = {
218 static int __init pasemi_publish_devices(void)
220 /* Publish OF platform devices for southbridge IOs */
221 of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
225 device_initcall(pasemi_publish_devices);
229 * Called very early, MMU is off, device-tree isn't unflattened
231 static int __init pas_probe(void)
233 unsigned long root = of_get_flat_dt_root();
235 if (!of_flat_dt_is_compatible(root, "PA6T-1682M"))
245 define_machine(pas) {
246 .name = "PA Semi PA6T-1682M",
248 .setup_arch = pas_setup_arch,
249 .init_early = pas_init_early,
250 .init_IRQ = pas_init_IRQ,
251 .get_irq = mpic_get_irq,
252 .restart = pas_restart,
253 .get_boot_time = pas_get_boot_time,
254 .calibrate_decr = generic_calibrate_decr,
255 .check_legacy_ioport = pas_check_legacy_ioport,
256 .progress = pas_progress,
257 .machine_check_exception = pas_machine_check_handler,
258 .pci_irq_fixup = pas_pci_irq_fixup,