i2c: Add DaVinci I2C controller support
[linux-2.6] / include / asm-arm / arch-ebsa110 / hardware.h
1 /*
2  *  linux/include/asm-arm/arch-ebsa110/hardware.h
3  *
4  *  Copyright (C) 1996-2000 Russell King.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This file contains the hardware definitions of the EBSA-110.
11  */
12 #ifndef __ASM_ARCH_HARDWARE_H
13 #define __ASM_ARCH_HARDWARE_H
14
15 /*
16  * The EBSA110 has a weird "ISA IO" region:
17  *
18  * Region 0 (addr = 0xf0000000 + io << 2)
19  * --------------------------------------------------------
20  * Physical region      IO region
21  * f0000fe0 - f0000ffc  3f8 - 3ff  ttyS0
22  * f0000e60 - f0000e64  398 - 399
23  * f0000de0 - f0000dfc  378 - 37f  lp0
24  * f0000be0 - f0000bfc  2f8 - 2ff  ttyS1
25  *
26  * Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
27  * --------------------------------------------------------
28  * Physical region      IO region
29  * f00014f1             a79        pnp write data
30  * f00007c0 - f00007c1  3e0 - 3e1  pcmcia
31  * f00004f1             279        pnp address
32  * f0000440 - f000046c  220 - 236  eth0
33  * f0000405             203        pnp read data
34  */
35
36 #define ISAMEM_PHYS             0xe0000000
37 #define ISAMEM_SIZE             0x10000000
38
39 #define ISAIO_PHYS              0xf0000000
40 #define ISAIO_SIZE              PGDIR_SIZE
41
42 #define TRICK0_PHYS             0xf2000000
43 #define TRICK1_PHYS             0xf2400000
44 #define TRICK2_PHYS             0xf2800000
45 #define TRICK3_PHYS             0xf2c00000
46 #define TRICK4_PHYS             0xf3000000
47 #define TRICK5_PHYS             0xf3400000
48 #define TRICK6_PHYS             0xf3800000
49 #define TRICK7_PHYS             0xf3c00000
50
51 #define ISAMEM_BASE             0xe0000000
52 #define ISAIO_BASE              0xf0000000
53
54 #define PIT_BASE                0xfc000000
55 #define SOFT_BASE               0xfd000000
56
57 /*
58  * RAM definitions
59  */
60 #define UNCACHEABLE_ADDR        0xff000000      /* IRQ_STAT */
61
62 #endif
63